Adrian Bunk | b00dc83 | 2008-05-19 16:52:27 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * arch/sparc64/mm/init.c |
| 3 | * |
| 4 | * Copyright (C) 1996-1999 David S. Miller (davem@caip.rutgers.edu) |
| 5 | * Copyright (C) 1997-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz) |
| 6 | */ |
| 7 | |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 8 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | #include <linux/kernel.h> |
| 10 | #include <linux/sched.h> |
| 11 | #include <linux/string.h> |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/bootmem.h> |
| 14 | #include <linux/mm.h> |
| 15 | #include <linux/hugetlb.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include <linux/initrd.h> |
| 17 | #include <linux/swap.h> |
| 18 | #include <linux/pagemap.h> |
Randy Dunlap | c9cf552 | 2006-06-27 02:53:52 -0700 | [diff] [blame] | 19 | #include <linux/poison.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | #include <linux/fs.h> |
| 21 | #include <linux/seq_file.h> |
Prasanna S Panchamukhi | 05e14cb | 2005-09-06 15:19:30 -0700 | [diff] [blame] | 22 | #include <linux/kprobes.h> |
David S. Miller | 1ac4f5e | 2005-09-21 21:49:32 -0700 | [diff] [blame] | 23 | #include <linux/cache.h> |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 24 | #include <linux/sort.h> |
David S. Miller | 5cbc307 | 2007-05-25 15:49:59 -0700 | [diff] [blame] | 25 | #include <linux/percpu.h> |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 26 | #include <linux/memblock.h> |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 27 | #include <linux/mmzone.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 28 | #include <linux/gfp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
| 30 | #include <asm/head.h> |
| 31 | #include <asm/system.h> |
| 32 | #include <asm/page.h> |
| 33 | #include <asm/pgalloc.h> |
| 34 | #include <asm/pgtable.h> |
| 35 | #include <asm/oplib.h> |
| 36 | #include <asm/iommu.h> |
| 37 | #include <asm/io.h> |
| 38 | #include <asm/uaccess.h> |
| 39 | #include <asm/mmu_context.h> |
| 40 | #include <asm/tlbflush.h> |
| 41 | #include <asm/dma.h> |
| 42 | #include <asm/starfire.h> |
| 43 | #include <asm/tlb.h> |
| 44 | #include <asm/spitfire.h> |
| 45 | #include <asm/sections.h> |
David S. Miller | 517af33 | 2006-02-01 15:55:21 -0800 | [diff] [blame] | 46 | #include <asm/tsb.h> |
David S. Miller | 481295f | 2006-02-07 21:51:08 -0800 | [diff] [blame] | 47 | #include <asm/hypervisor.h> |
David S. Miller | 372b07b | 2006-06-21 15:35:28 -0700 | [diff] [blame] | 48 | #include <asm/prom.h> |
David S. Miller | 5cbc307 | 2007-05-25 15:49:59 -0700 | [diff] [blame] | 49 | #include <asm/mdesc.h> |
David S. Miller | 3d5ae6b | 2008-03-25 21:51:40 -0700 | [diff] [blame] | 50 | #include <asm/cpudata.h> |
David S. Miller | 4f70f7a | 2008-08-12 18:33:56 -0700 | [diff] [blame] | 51 | #include <asm/irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | |
Sam Ravnborg | 27137e5 | 2008-11-16 20:08:45 -0800 | [diff] [blame] | 53 | #include "init_64.h" |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 54 | |
| 55 | unsigned long kern_linear_pte_xor[2] __read_mostly; |
| 56 | |
| 57 | /* A bitmap, one bit for every 256MB of physical memory. If the bit |
| 58 | * is clear, we should use a 4MB page (via kern_linear_pte_xor[0]) else |
| 59 | * if set we should use a 256MB page (via kern_linear_pte_xor[1]). |
| 60 | */ |
| 61 | unsigned long kpte_linear_bitmap[KPTE_BITMAP_BYTES / sizeof(unsigned long)]; |
| 62 | |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 63 | #ifndef CONFIG_DEBUG_PAGEALLOC |
David S. Miller | 2d9e276 | 2007-05-29 01:58:31 -0700 | [diff] [blame] | 64 | /* A special kernel TSB for 4MB and 256MB linear mappings. |
| 65 | * Space is allocated for this right after the trap table |
| 66 | * in arch/sparc64/kernel/head.S |
| 67 | */ |
| 68 | extern struct tsb swapper_4m_tsb[KERNEL_TSB4M_NENTRIES]; |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 69 | #endif |
David S. Miller | d7744a0 | 2006-02-21 22:31:11 -0800 | [diff] [blame] | 70 | |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 71 | #define MAX_BANKS 32 |
David S. Miller | 1014757 | 2005-09-28 21:46:43 -0700 | [diff] [blame] | 72 | |
David S. Miller | 9a2ed5c | 2009-04-07 01:03:58 -0700 | [diff] [blame] | 73 | static struct linux_prom64_registers pavail[MAX_BANKS] __devinitdata; |
| 74 | static int pavail_ents __devinitdata; |
David S. Miller | 1014757 | 2005-09-28 21:46:43 -0700 | [diff] [blame] | 75 | |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 76 | static int cmp_p64(const void *a, const void *b) |
| 77 | { |
| 78 | const struct linux_prom64_registers *x = a, *y = b; |
| 79 | |
| 80 | if (x->phys_addr > y->phys_addr) |
| 81 | return 1; |
| 82 | if (x->phys_addr < y->phys_addr) |
| 83 | return -1; |
| 84 | return 0; |
| 85 | } |
| 86 | |
| 87 | static void __init read_obp_memory(const char *property, |
| 88 | struct linux_prom64_registers *regs, |
| 89 | int *num_ents) |
| 90 | { |
| 91 | int node = prom_finddevice("/memory"); |
| 92 | int prop_size = prom_getproplen(node, property); |
| 93 | int ents, ret, i; |
| 94 | |
| 95 | ents = prop_size / sizeof(struct linux_prom64_registers); |
| 96 | if (ents > MAX_BANKS) { |
| 97 | prom_printf("The machine has more %s property entries than " |
| 98 | "this kernel can support (%d).\n", |
| 99 | property, MAX_BANKS); |
| 100 | prom_halt(); |
| 101 | } |
| 102 | |
| 103 | ret = prom_getproperty(node, property, (char *) regs, prop_size); |
| 104 | if (ret == -1) { |
| 105 | prom_printf("Couldn't get %s property from /memory.\n"); |
| 106 | prom_halt(); |
| 107 | } |
| 108 | |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 109 | /* Sanitize what we got from the firmware, by page aligning |
| 110 | * everything. |
| 111 | */ |
| 112 | for (i = 0; i < ents; i++) { |
| 113 | unsigned long base, size; |
| 114 | |
| 115 | base = regs[i].phys_addr; |
| 116 | size = regs[i].reg_size; |
| 117 | |
| 118 | size &= PAGE_MASK; |
| 119 | if (base & ~PAGE_MASK) { |
| 120 | unsigned long new_base = PAGE_ALIGN(base); |
| 121 | |
| 122 | size -= new_base - base; |
| 123 | if ((long) size < 0L) |
| 124 | size = 0UL; |
| 125 | base = new_base; |
| 126 | } |
David S. Miller | 0015d3d | 2007-03-15 00:06:34 -0700 | [diff] [blame] | 127 | if (size == 0UL) { |
| 128 | /* If it is empty, simply get rid of it. |
| 129 | * This simplifies the logic of the other |
| 130 | * functions that process these arrays. |
| 131 | */ |
| 132 | memmove(®s[i], ®s[i + 1], |
| 133 | (ents - i - 1) * sizeof(regs[0])); |
| 134 | i--; |
| 135 | ents--; |
| 136 | continue; |
| 137 | } |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 138 | regs[i].phys_addr = base; |
| 139 | regs[i].reg_size = size; |
| 140 | } |
David S. Miller | 486ad10 | 2006-06-22 00:00:00 -0700 | [diff] [blame] | 141 | |
David S. Miller | 486ad10 | 2006-06-22 00:00:00 -0700 | [diff] [blame] | 142 | *num_ents = ents; |
| 143 | |
David S. Miller | c9c1083 | 2005-10-12 12:22:46 -0700 | [diff] [blame] | 144 | sort(regs, ents, sizeof(struct linux_prom64_registers), |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 145 | cmp_p64, NULL); |
| 146 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 147 | |
David S. Miller | d8ed1d4 | 2009-08-25 16:47:46 -0700 | [diff] [blame] | 148 | unsigned long sparc64_valid_addr_bitmap[VALID_ADDR_BITMAP_BYTES / |
| 149 | sizeof(unsigned long)]; |
Sam Ravnborg | 917c366 | 2009-01-08 16:58:20 -0800 | [diff] [blame] | 150 | EXPORT_SYMBOL(sparc64_valid_addr_bitmap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | |
David S. Miller | d111201 | 2006-03-08 02:16:07 -0800 | [diff] [blame] | 152 | /* Kernel physical address base and size in bytes. */ |
David S. Miller | 1ac4f5e | 2005-09-21 21:49:32 -0700 | [diff] [blame] | 153 | unsigned long kern_base __read_mostly; |
| 154 | unsigned long kern_size __read_mostly; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 155 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | /* Initial ramdisk setup */ |
| 157 | extern unsigned long sparc_ramdisk_image64; |
| 158 | extern unsigned int sparc_ramdisk_image; |
| 159 | extern unsigned int sparc_ramdisk_size; |
| 160 | |
David S. Miller | 1ac4f5e | 2005-09-21 21:49:32 -0700 | [diff] [blame] | 161 | struct page *mem_map_zero __read_mostly; |
Aneesh Kumar K.V | 35802c0 | 2008-04-29 08:11:12 -0400 | [diff] [blame] | 162 | EXPORT_SYMBOL(mem_map_zero); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 163 | |
David S. Miller | 0835ae0 | 2005-10-04 15:23:20 -0700 | [diff] [blame] | 164 | unsigned int sparc64_highest_unlocked_tlb_ent __read_mostly; |
| 165 | |
| 166 | unsigned long sparc64_kern_pri_context __read_mostly; |
| 167 | unsigned long sparc64_kern_pri_nuc_bits __read_mostly; |
| 168 | unsigned long sparc64_kern_sec_context __read_mostly; |
| 169 | |
David S. Miller | 6465874 | 2008-03-21 17:01:38 -0700 | [diff] [blame] | 170 | int num_kernel_image_mappings; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 171 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 172 | #ifdef CONFIG_DEBUG_DCFLUSH |
| 173 | atomic_t dcpage_flushes = ATOMIC_INIT(0); |
| 174 | #ifdef CONFIG_SMP |
| 175 | atomic_t dcpage_flushes_xcall = ATOMIC_INIT(0); |
| 176 | #endif |
| 177 | #endif |
| 178 | |
David S. Miller | 7a591cf | 2006-02-26 19:44:50 -0800 | [diff] [blame] | 179 | inline void flush_dcache_page_impl(struct page *page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 180 | { |
David S. Miller | 7a591cf | 2006-02-26 19:44:50 -0800 | [diff] [blame] | 181 | BUG_ON(tlb_type == hypervisor); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 182 | #ifdef CONFIG_DEBUG_DCFLUSH |
| 183 | atomic_inc(&dcpage_flushes); |
| 184 | #endif |
| 185 | |
| 186 | #ifdef DCACHE_ALIASING_POSSIBLE |
| 187 | __flush_dcache_page(page_address(page), |
| 188 | ((tlb_type == spitfire) && |
| 189 | page_mapping(page) != NULL)); |
| 190 | #else |
| 191 | if (page_mapping(page) != NULL && |
| 192 | tlb_type == spitfire) |
| 193 | __flush_icache_page(__pa(page_address(page))); |
| 194 | #endif |
| 195 | } |
| 196 | |
| 197 | #define PG_dcache_dirty PG_arch_1 |
David S. Miller | 22adb35 | 2007-05-26 01:14:43 -0700 | [diff] [blame] | 198 | #define PG_dcache_cpu_shift 32UL |
| 199 | #define PG_dcache_cpu_mask \ |
| 200 | ((1UL<<ilog2(roundup_pow_of_two(NR_CPUS)))-1UL) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 201 | |
| 202 | #define dcache_dirty_cpu(page) \ |
David S. Miller | 48b0e54 | 2005-07-27 16:08:44 -0700 | [diff] [blame] | 203 | (((page)->flags >> PG_dcache_cpu_shift) & PG_dcache_cpu_mask) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | |
David S. Miller | d979f17 | 2007-10-27 00:13:04 -0700 | [diff] [blame] | 205 | static inline void set_dcache_dirty(struct page *page, int this_cpu) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 206 | { |
| 207 | unsigned long mask = this_cpu; |
David S. Miller | 48b0e54 | 2005-07-27 16:08:44 -0700 | [diff] [blame] | 208 | unsigned long non_cpu_bits; |
| 209 | |
| 210 | non_cpu_bits = ~(PG_dcache_cpu_mask << PG_dcache_cpu_shift); |
| 211 | mask = (mask << PG_dcache_cpu_shift) | (1UL << PG_dcache_dirty); |
| 212 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 213 | __asm__ __volatile__("1:\n\t" |
| 214 | "ldx [%2], %%g7\n\t" |
| 215 | "and %%g7, %1, %%g1\n\t" |
| 216 | "or %%g1, %0, %%g1\n\t" |
| 217 | "casx [%2], %%g7, %%g1\n\t" |
| 218 | "cmp %%g7, %%g1\n\t" |
| 219 | "bne,pn %%xcc, 1b\n\t" |
David S. Miller | b445e26 | 2005-06-27 15:42:04 -0700 | [diff] [blame] | 220 | " nop" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 221 | : /* no outputs */ |
| 222 | : "r" (mask), "r" (non_cpu_bits), "r" (&page->flags) |
| 223 | : "g1", "g7"); |
| 224 | } |
| 225 | |
David S. Miller | d979f17 | 2007-10-27 00:13:04 -0700 | [diff] [blame] | 226 | static inline void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 227 | { |
| 228 | unsigned long mask = (1UL << PG_dcache_dirty); |
| 229 | |
| 230 | __asm__ __volatile__("! test_and_clear_dcache_dirty\n" |
| 231 | "1:\n\t" |
| 232 | "ldx [%2], %%g7\n\t" |
David S. Miller | 48b0e54 | 2005-07-27 16:08:44 -0700 | [diff] [blame] | 233 | "srlx %%g7, %4, %%g1\n\t" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 234 | "and %%g1, %3, %%g1\n\t" |
| 235 | "cmp %%g1, %0\n\t" |
| 236 | "bne,pn %%icc, 2f\n\t" |
| 237 | " andn %%g7, %1, %%g1\n\t" |
| 238 | "casx [%2], %%g7, %%g1\n\t" |
| 239 | "cmp %%g7, %%g1\n\t" |
| 240 | "bne,pn %%xcc, 1b\n\t" |
David S. Miller | b445e26 | 2005-06-27 15:42:04 -0700 | [diff] [blame] | 241 | " nop\n" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 242 | "2:" |
| 243 | : /* no outputs */ |
| 244 | : "r" (cpu), "r" (mask), "r" (&page->flags), |
David S. Miller | 48b0e54 | 2005-07-27 16:08:44 -0700 | [diff] [blame] | 245 | "i" (PG_dcache_cpu_mask), |
| 246 | "i" (PG_dcache_cpu_shift) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 247 | : "g1", "g7"); |
| 248 | } |
| 249 | |
David S. Miller | 517af33 | 2006-02-01 15:55:21 -0800 | [diff] [blame] | 250 | static inline void tsb_insert(struct tsb *ent, unsigned long tag, unsigned long pte) |
| 251 | { |
| 252 | unsigned long tsb_addr = (unsigned long) ent; |
| 253 | |
David S. Miller | 3b3ab2e | 2006-02-17 09:54:42 -0800 | [diff] [blame] | 254 | if (tlb_type == cheetah_plus || tlb_type == hypervisor) |
David S. Miller | 517af33 | 2006-02-01 15:55:21 -0800 | [diff] [blame] | 255 | tsb_addr = __pa(tsb_addr); |
| 256 | |
| 257 | __tsb_insert(tsb_addr, tag, pte); |
| 258 | } |
| 259 | |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 260 | unsigned long _PAGE_ALL_SZ_BITS __read_mostly; |
| 261 | unsigned long _PAGE_SZBITS __read_mostly; |
| 262 | |
Sam Ravnborg | ff9aefb | 2009-01-06 12:51:26 -0800 | [diff] [blame] | 263 | static void flush_dcache(unsigned long pfn) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 264 | { |
Sam Ravnborg | ff9aefb | 2009-01-06 12:51:26 -0800 | [diff] [blame] | 265 | struct page *page; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 266 | |
Sam Ravnborg | ff9aefb | 2009-01-06 12:51:26 -0800 | [diff] [blame] | 267 | page = pfn_to_page(pfn); |
David S. Miller | 1a78ced | 2009-10-12 03:20:57 -0700 | [diff] [blame] | 268 | if (page) { |
David S. Miller | 7a591cf | 2006-02-26 19:44:50 -0800 | [diff] [blame] | 269 | unsigned long pg_flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | |
Sam Ravnborg | ff9aefb | 2009-01-06 12:51:26 -0800 | [diff] [blame] | 271 | pg_flags = page->flags; |
| 272 | if (pg_flags & (1UL << PG_dcache_dirty)) { |
David S. Miller | 7a591cf | 2006-02-26 19:44:50 -0800 | [diff] [blame] | 273 | int cpu = ((pg_flags >> PG_dcache_cpu_shift) & |
| 274 | PG_dcache_cpu_mask); |
| 275 | int this_cpu = get_cpu(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 276 | |
David S. Miller | 7a591cf | 2006-02-26 19:44:50 -0800 | [diff] [blame] | 277 | /* This is just to optimize away some function calls |
| 278 | * in the SMP case. |
| 279 | */ |
| 280 | if (cpu == this_cpu) |
| 281 | flush_dcache_page_impl(page); |
| 282 | else |
| 283 | smp_flush_dcache_page_impl(page, cpu); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 284 | |
David S. Miller | 7a591cf | 2006-02-26 19:44:50 -0800 | [diff] [blame] | 285 | clear_dcache_dirty_cpu(page, cpu); |
| 286 | |
| 287 | put_cpu(); |
| 288 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 289 | } |
Sam Ravnborg | ff9aefb | 2009-01-06 12:51:26 -0800 | [diff] [blame] | 290 | } |
| 291 | |
Russell King | 4b3073e | 2009-12-18 16:40:18 +0000 | [diff] [blame] | 292 | void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep) |
Sam Ravnborg | ff9aefb | 2009-01-06 12:51:26 -0800 | [diff] [blame] | 293 | { |
| 294 | struct mm_struct *mm; |
| 295 | struct tsb *tsb; |
| 296 | unsigned long tag, flags; |
| 297 | unsigned long tsb_index, tsb_hash_shift; |
Russell King | 4b3073e | 2009-12-18 16:40:18 +0000 | [diff] [blame] | 298 | pte_t pte = *ptep; |
Sam Ravnborg | ff9aefb | 2009-01-06 12:51:26 -0800 | [diff] [blame] | 299 | |
| 300 | if (tlb_type != hypervisor) { |
| 301 | unsigned long pfn = pte_pfn(pte); |
| 302 | |
| 303 | if (pfn_valid(pfn)) |
| 304 | flush_dcache(pfn); |
| 305 | } |
David S. Miller | bd40791 | 2006-01-31 18:31:38 -0800 | [diff] [blame] | 306 | |
| 307 | mm = vma->vm_mm; |
David S. Miller | 7a1ac52 | 2006-03-16 02:02:32 -0800 | [diff] [blame] | 308 | |
David S. Miller | dcc1e8d | 2006-03-22 00:49:59 -0800 | [diff] [blame] | 309 | tsb_index = MM_TSB_BASE; |
| 310 | tsb_hash_shift = PAGE_SHIFT; |
| 311 | |
David S. Miller | 7a1ac52 | 2006-03-16 02:02:32 -0800 | [diff] [blame] | 312 | spin_lock_irqsave(&mm->context.lock, flags); |
| 313 | |
David S. Miller | dcc1e8d | 2006-03-22 00:49:59 -0800 | [diff] [blame] | 314 | #ifdef CONFIG_HUGETLB_PAGE |
| 315 | if (mm->context.tsb_block[MM_TSB_HUGE].tsb != NULL) { |
| 316 | if ((tlb_type == hypervisor && |
| 317 | (pte_val(pte) & _PAGE_SZALL_4V) == _PAGE_SZHUGE_4V) || |
| 318 | (tlb_type != hypervisor && |
| 319 | (pte_val(pte) & _PAGE_SZALL_4U) == _PAGE_SZHUGE_4U)) { |
| 320 | tsb_index = MM_TSB_HUGE; |
| 321 | tsb_hash_shift = HPAGE_SHIFT; |
| 322 | } |
| 323 | } |
| 324 | #endif |
| 325 | |
| 326 | tsb = mm->context.tsb_block[tsb_index].tsb; |
| 327 | tsb += ((address >> tsb_hash_shift) & |
| 328 | (mm->context.tsb_block[tsb_index].tsb_nentries - 1UL)); |
David S. Miller | 74ae998 | 2006-03-05 18:26:24 -0800 | [diff] [blame] | 329 | tag = (address >> 22UL); |
| 330 | tsb_insert(tsb, tag, pte_val(pte)); |
David S. Miller | 7a1ac52 | 2006-03-16 02:02:32 -0800 | [diff] [blame] | 331 | |
| 332 | spin_unlock_irqrestore(&mm->context.lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 333 | } |
| 334 | |
| 335 | void flush_dcache_page(struct page *page) |
| 336 | { |
David S. Miller | a9546f5 | 2005-04-17 18:03:09 -0700 | [diff] [blame] | 337 | struct address_space *mapping; |
| 338 | int this_cpu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 339 | |
David S. Miller | 7a591cf | 2006-02-26 19:44:50 -0800 | [diff] [blame] | 340 | if (tlb_type == hypervisor) |
| 341 | return; |
| 342 | |
David S. Miller | a9546f5 | 2005-04-17 18:03:09 -0700 | [diff] [blame] | 343 | /* Do not bother with the expensive D-cache flush if it |
| 344 | * is merely the zero page. The 'bigcore' testcase in GDB |
| 345 | * causes this case to run millions of times. |
| 346 | */ |
| 347 | if (page == ZERO_PAGE(0)) |
| 348 | return; |
| 349 | |
| 350 | this_cpu = get_cpu(); |
| 351 | |
| 352 | mapping = page_mapping(page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 353 | if (mapping && !mapping_mapped(mapping)) { |
David S. Miller | a9546f5 | 2005-04-17 18:03:09 -0700 | [diff] [blame] | 354 | int dirty = test_bit(PG_dcache_dirty, &page->flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 355 | if (dirty) { |
David S. Miller | a9546f5 | 2005-04-17 18:03:09 -0700 | [diff] [blame] | 356 | int dirty_cpu = dcache_dirty_cpu(page); |
| 357 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 358 | if (dirty_cpu == this_cpu) |
| 359 | goto out; |
| 360 | smp_flush_dcache_page_impl(page, dirty_cpu); |
| 361 | } |
| 362 | set_dcache_dirty(page, this_cpu); |
| 363 | } else { |
| 364 | /* We could delay the flush for the !page_mapping |
| 365 | * case too. But that case is for exec env/arg |
| 366 | * pages and those are %99 certainly going to get |
| 367 | * faulted into the tlb (and thus flushed) anyways. |
| 368 | */ |
| 369 | flush_dcache_page_impl(page); |
| 370 | } |
| 371 | |
| 372 | out: |
| 373 | put_cpu(); |
| 374 | } |
Sam Ravnborg | 917c366 | 2009-01-08 16:58:20 -0800 | [diff] [blame] | 375 | EXPORT_SYMBOL(flush_dcache_page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 376 | |
Prasanna S Panchamukhi | 05e14cb | 2005-09-06 15:19:30 -0700 | [diff] [blame] | 377 | void __kprobes flush_icache_range(unsigned long start, unsigned long end) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 378 | { |
David S. Miller | a43fe0e | 2006-02-04 03:10:53 -0800 | [diff] [blame] | 379 | /* Cheetah and Hypervisor platform cpus have coherent I-cache. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 380 | if (tlb_type == spitfire) { |
| 381 | unsigned long kaddr; |
| 382 | |
David S. Miller | a94aa25 | 2007-03-15 15:50:11 -0700 | [diff] [blame] | 383 | /* This code only runs on Spitfire cpus so this is |
| 384 | * why we can assume _PAGE_PADDR_4U. |
| 385 | */ |
| 386 | for (kaddr = start; kaddr < end; kaddr += PAGE_SIZE) { |
| 387 | unsigned long paddr, mask = _PAGE_PADDR_4U; |
| 388 | |
| 389 | if (kaddr >= PAGE_OFFSET) |
| 390 | paddr = kaddr & mask; |
| 391 | else { |
| 392 | pgd_t *pgdp = pgd_offset_k(kaddr); |
| 393 | pud_t *pudp = pud_offset(pgdp, kaddr); |
| 394 | pmd_t *pmdp = pmd_offset(pudp, kaddr); |
| 395 | pte_t *ptep = pte_offset_kernel(pmdp, kaddr); |
| 396 | |
| 397 | paddr = pte_val(*ptep) & mask; |
| 398 | } |
| 399 | __flush_icache_page(paddr); |
| 400 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 401 | } |
| 402 | } |
Sam Ravnborg | 917c366 | 2009-01-08 16:58:20 -0800 | [diff] [blame] | 403 | EXPORT_SYMBOL(flush_icache_range); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 404 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 405 | void mmu_info(struct seq_file *m) |
| 406 | { |
| 407 | if (tlb_type == cheetah) |
| 408 | seq_printf(m, "MMU Type\t: Cheetah\n"); |
| 409 | else if (tlb_type == cheetah_plus) |
| 410 | seq_printf(m, "MMU Type\t: Cheetah+\n"); |
| 411 | else if (tlb_type == spitfire) |
| 412 | seq_printf(m, "MMU Type\t: Spitfire\n"); |
David S. Miller | a43fe0e | 2006-02-04 03:10:53 -0800 | [diff] [blame] | 413 | else if (tlb_type == hypervisor) |
| 414 | seq_printf(m, "MMU Type\t: Hypervisor (sun4v)\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 415 | else |
| 416 | seq_printf(m, "MMU Type\t: ???\n"); |
| 417 | |
| 418 | #ifdef CONFIG_DEBUG_DCFLUSH |
| 419 | seq_printf(m, "DCPageFlushes\t: %d\n", |
| 420 | atomic_read(&dcpage_flushes)); |
| 421 | #ifdef CONFIG_SMP |
| 422 | seq_printf(m, "DCPageFlushesXC\t: %d\n", |
| 423 | atomic_read(&dcpage_flushes_xcall)); |
| 424 | #endif /* CONFIG_SMP */ |
| 425 | #endif /* CONFIG_DEBUG_DCFLUSH */ |
| 426 | } |
| 427 | |
David S. Miller | a94aa25 | 2007-03-15 15:50:11 -0700 | [diff] [blame] | 428 | struct linux_prom_translation prom_trans[512] __read_mostly; |
| 429 | unsigned int prom_trans_ents __read_mostly; |
| 430 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 431 | unsigned long kern_locked_tte_data; |
| 432 | |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 433 | /* The obp translations are saved based on 8k pagesize, since obp can |
| 434 | * use a mixture of pagesizes. Misses to the LOW_OBP_ADDRESS -> |
David S. Miller | 74bf431 | 2006-01-31 18:29:18 -0800 | [diff] [blame] | 435 | * HI_OBP_ADDRESS range are handled in ktlb.S. |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 436 | */ |
David S. Miller | 5085b4a | 2005-09-22 00:45:41 -0700 | [diff] [blame] | 437 | static inline int in_obp_range(unsigned long vaddr) |
| 438 | { |
| 439 | return (vaddr >= LOW_OBP_ADDRESS && |
| 440 | vaddr < HI_OBP_ADDRESS); |
| 441 | } |
| 442 | |
David S. Miller | c9c1083 | 2005-10-12 12:22:46 -0700 | [diff] [blame] | 443 | static int cmp_ptrans(const void *a, const void *b) |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 444 | { |
David S. Miller | c9c1083 | 2005-10-12 12:22:46 -0700 | [diff] [blame] | 445 | const struct linux_prom_translation *x = a, *y = b; |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 446 | |
David S. Miller | c9c1083 | 2005-10-12 12:22:46 -0700 | [diff] [blame] | 447 | if (x->virt > y->virt) |
| 448 | return 1; |
| 449 | if (x->virt < y->virt) |
| 450 | return -1; |
| 451 | return 0; |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 452 | } |
| 453 | |
David S. Miller | c9c1083 | 2005-10-12 12:22:46 -0700 | [diff] [blame] | 454 | /* Read OBP translations property into 'prom_trans[]'. */ |
David S. Miller | 9ad98c5 | 2005-10-05 15:12:00 -0700 | [diff] [blame] | 455 | static void __init read_obp_translations(void) |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 456 | { |
David S. Miller | c9c1083 | 2005-10-12 12:22:46 -0700 | [diff] [blame] | 457 | int n, node, ents, first, last, i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 458 | |
| 459 | node = prom_finddevice("/virtual-memory"); |
| 460 | n = prom_getproplen(node, "translations"); |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 461 | if (unlikely(n == 0 || n == -1)) { |
David S. Miller | b206fc4 | 2005-09-21 22:31:13 -0700 | [diff] [blame] | 462 | prom_printf("prom_mappings: Couldn't get size.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 463 | prom_halt(); |
| 464 | } |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 465 | if (unlikely(n > sizeof(prom_trans))) { |
| 466 | prom_printf("prom_mappings: Size %Zd is too big.\n", n); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 467 | prom_halt(); |
| 468 | } |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 469 | |
David S. Miller | b206fc4 | 2005-09-21 22:31:13 -0700 | [diff] [blame] | 470 | if ((n = prom_getproperty(node, "translations", |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 471 | (char *)&prom_trans[0], |
| 472 | sizeof(prom_trans))) == -1) { |
David S. Miller | b206fc4 | 2005-09-21 22:31:13 -0700 | [diff] [blame] | 473 | prom_printf("prom_mappings: Couldn't get property.\n"); |
| 474 | prom_halt(); |
| 475 | } |
David S. Miller | 9ad98c5 | 2005-10-05 15:12:00 -0700 | [diff] [blame] | 476 | |
David S. Miller | b206fc4 | 2005-09-21 22:31:13 -0700 | [diff] [blame] | 477 | n = n / sizeof(struct linux_prom_translation); |
David S. Miller | 9ad98c5 | 2005-10-05 15:12:00 -0700 | [diff] [blame] | 478 | |
David S. Miller | c9c1083 | 2005-10-12 12:22:46 -0700 | [diff] [blame] | 479 | ents = n; |
| 480 | |
| 481 | sort(prom_trans, ents, sizeof(struct linux_prom_translation), |
| 482 | cmp_ptrans, NULL); |
| 483 | |
| 484 | /* Now kick out all the non-OBP entries. */ |
| 485 | for (i = 0; i < ents; i++) { |
| 486 | if (in_obp_range(prom_trans[i].virt)) |
| 487 | break; |
| 488 | } |
| 489 | first = i; |
| 490 | for (; i < ents; i++) { |
| 491 | if (!in_obp_range(prom_trans[i].virt)) |
| 492 | break; |
| 493 | } |
| 494 | last = i; |
| 495 | |
| 496 | for (i = 0; i < (last - first); i++) { |
| 497 | struct linux_prom_translation *src = &prom_trans[i + first]; |
| 498 | struct linux_prom_translation *dest = &prom_trans[i]; |
| 499 | |
| 500 | *dest = *src; |
| 501 | } |
| 502 | for (; i < ents; i++) { |
| 503 | struct linux_prom_translation *dest = &prom_trans[i]; |
| 504 | dest->virt = dest->size = dest->data = 0x0UL; |
| 505 | } |
| 506 | |
| 507 | prom_trans_ents = last - first; |
| 508 | |
| 509 | if (tlb_type == spitfire) { |
| 510 | /* Clear diag TTE bits. */ |
| 511 | for (i = 0; i < prom_trans_ents; i++) |
| 512 | prom_trans[i].data &= ~0x0003fe0000000000UL; |
| 513 | } |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 514 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | |
David S. Miller | d82ace7 | 2006-02-09 02:52:44 -0800 | [diff] [blame] | 516 | static void __init hypervisor_tlb_lock(unsigned long vaddr, |
| 517 | unsigned long pte, |
| 518 | unsigned long mmu) |
| 519 | { |
David S. Miller | 7db35f3 | 2007-05-29 02:22:14 -0700 | [diff] [blame] | 520 | unsigned long ret = sun4v_mmu_map_perm_addr(vaddr, 0, pte, mmu); |
David S. Miller | d82ace7 | 2006-02-09 02:52:44 -0800 | [diff] [blame] | 521 | |
David S. Miller | 7db35f3 | 2007-05-29 02:22:14 -0700 | [diff] [blame] | 522 | if (ret != 0) { |
David S. Miller | 12e126a | 2006-02-17 14:40:30 -0800 | [diff] [blame] | 523 | prom_printf("hypervisor_tlb_lock[%lx:%lx:%lx:%lx]: " |
David S. Miller | 7db35f3 | 2007-05-29 02:22:14 -0700 | [diff] [blame] | 524 | "errors with %lx\n", vaddr, 0, pte, mmu, ret); |
David S. Miller | 12e126a | 2006-02-17 14:40:30 -0800 | [diff] [blame] | 525 | prom_halt(); |
| 526 | } |
David S. Miller | d82ace7 | 2006-02-09 02:52:44 -0800 | [diff] [blame] | 527 | } |
| 528 | |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 529 | static unsigned long kern_large_tte(unsigned long paddr); |
| 530 | |
David S. Miller | 898cf0e | 2005-09-23 11:59:44 -0700 | [diff] [blame] | 531 | static void __init remap_kernel(void) |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 532 | { |
| 533 | unsigned long phys_page, tte_vaddr, tte_data; |
David S. Miller | 6465874 | 2008-03-21 17:01:38 -0700 | [diff] [blame] | 534 | int i, tlb_ent = sparc64_highest_locked_tlbent(); |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 535 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 536 | tte_vaddr = (unsigned long) KERNBASE; |
David S. Miller | bff06d5 | 2005-09-22 20:11:33 -0700 | [diff] [blame] | 537 | phys_page = (prom_boot_mapping_phys_low >> 22UL) << 22UL; |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 538 | tte_data = kern_large_tte(phys_page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 539 | |
| 540 | kern_locked_tte_data = tte_data; |
| 541 | |
David S. Miller | d82ace7 | 2006-02-09 02:52:44 -0800 | [diff] [blame] | 542 | /* Now lock us into the TLBs via Hypervisor or OBP. */ |
| 543 | if (tlb_type == hypervisor) { |
David S. Miller | 6465874 | 2008-03-21 17:01:38 -0700 | [diff] [blame] | 544 | for (i = 0; i < num_kernel_image_mappings; i++) { |
David S. Miller | d82ace7 | 2006-02-09 02:52:44 -0800 | [diff] [blame] | 545 | hypervisor_tlb_lock(tte_vaddr, tte_data, HV_MMU_DMMU); |
| 546 | hypervisor_tlb_lock(tte_vaddr, tte_data, HV_MMU_IMMU); |
David S. Miller | 6465874 | 2008-03-21 17:01:38 -0700 | [diff] [blame] | 547 | tte_vaddr += 0x400000; |
| 548 | tte_data += 0x400000; |
David S. Miller | d82ace7 | 2006-02-09 02:52:44 -0800 | [diff] [blame] | 549 | } |
| 550 | } else { |
David S. Miller | 6465874 | 2008-03-21 17:01:38 -0700 | [diff] [blame] | 551 | for (i = 0; i < num_kernel_image_mappings; i++) { |
| 552 | prom_dtlb_load(tlb_ent - i, tte_data, tte_vaddr); |
| 553 | prom_itlb_load(tlb_ent - i, tte_data, tte_vaddr); |
| 554 | tte_vaddr += 0x400000; |
| 555 | tte_data += 0x400000; |
David S. Miller | d82ace7 | 2006-02-09 02:52:44 -0800 | [diff] [blame] | 556 | } |
David S. Miller | 6465874 | 2008-03-21 17:01:38 -0700 | [diff] [blame] | 557 | sparc64_highest_unlocked_tlb_ent = tlb_ent - i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 558 | } |
David S. Miller | 0835ae0 | 2005-10-04 15:23:20 -0700 | [diff] [blame] | 559 | if (tlb_type == cheetah_plus) { |
| 560 | sparc64_kern_pri_context = (CTX_CHEETAH_PLUS_CTX0 | |
| 561 | CTX_CHEETAH_PLUS_NUC); |
| 562 | sparc64_kern_pri_nuc_bits = CTX_CHEETAH_PLUS_NUC; |
| 563 | sparc64_kern_sec_context = CTX_CHEETAH_PLUS_CTX0; |
| 564 | } |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 565 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 566 | |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 567 | |
David S. Miller | c9c1083 | 2005-10-12 12:22:46 -0700 | [diff] [blame] | 568 | static void __init inherit_prom_mappings(void) |
David S. Miller | 9ad98c5 | 2005-10-05 15:12:00 -0700 | [diff] [blame] | 569 | { |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 570 | /* Now fixup OBP's idea about where we really are mapped. */ |
David S. Miller | 3c62a2d | 2008-02-17 23:22:50 -0800 | [diff] [blame] | 571 | printk("Remapping the kernel... "); |
David S. Miller | 405599b | 2005-09-22 00:12:35 -0700 | [diff] [blame] | 572 | remap_kernel(); |
David S. Miller | 3c62a2d | 2008-02-17 23:22:50 -0800 | [diff] [blame] | 573 | printk("done.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 574 | } |
| 575 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 576 | void prom_world(int enter) |
| 577 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 578 | if (!enter) |
| 579 | set_fs((mm_segment_t) { get_thread_current_ds() }); |
| 580 | |
David S. Miller | 3487d1d | 2006-01-31 18:33:25 -0800 | [diff] [blame] | 581 | __asm__ __volatile__("flushw"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 582 | } |
| 583 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 584 | void __flush_dcache_range(unsigned long start, unsigned long end) |
| 585 | { |
| 586 | unsigned long va; |
| 587 | |
| 588 | if (tlb_type == spitfire) { |
| 589 | int n = 0; |
| 590 | |
| 591 | for (va = start; va < end; va += 32) { |
| 592 | spitfire_put_dcache_tag(va & 0x3fe0, 0x0); |
| 593 | if (++n >= 512) |
| 594 | break; |
| 595 | } |
David S. Miller | a43fe0e | 2006-02-04 03:10:53 -0800 | [diff] [blame] | 596 | } else if (tlb_type == cheetah || tlb_type == cheetah_plus) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 597 | start = __pa(start); |
| 598 | end = __pa(end); |
| 599 | for (va = start; va < end; va += 32) |
| 600 | __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" |
| 601 | "membar #Sync" |
| 602 | : /* no outputs */ |
| 603 | : "r" (va), |
| 604 | "i" (ASI_DCACHE_INVALIDATE)); |
| 605 | } |
| 606 | } |
Sam Ravnborg | 917c366 | 2009-01-08 16:58:20 -0800 | [diff] [blame] | 607 | EXPORT_SYMBOL(__flush_dcache_range); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 608 | |
David S. Miller | 85f1e1f | 2007-03-15 17:51:26 -0700 | [diff] [blame] | 609 | /* get_new_mmu_context() uses "cache + 1". */ |
| 610 | DEFINE_SPINLOCK(ctx_alloc_lock); |
| 611 | unsigned long tlb_context_cache = CTX_FIRST_VERSION - 1; |
| 612 | #define MAX_CTX_NR (1UL << CTX_NR_BITS) |
| 613 | #define CTX_BMAP_SLOTS BITS_TO_LONGS(MAX_CTX_NR) |
| 614 | DECLARE_BITMAP(mmu_context_bmap, MAX_CTX_NR); |
| 615 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 616 | /* Caller does TLB context flushing on local CPU if necessary. |
| 617 | * The caller also ensures that CTX_VALID(mm->context) is false. |
| 618 | * |
| 619 | * We must be careful about boundary cases so that we never |
| 620 | * let the user have CTX 0 (nucleus) or we ever use a CTX |
| 621 | * version of zero (and thus NO_CONTEXT would not be caught |
| 622 | * by version mis-match tests in mmu_context.h). |
David S. Miller | a0663a7 | 2006-02-23 14:19:28 -0800 | [diff] [blame] | 623 | * |
| 624 | * Always invoked with interrupts disabled. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 625 | */ |
| 626 | void get_new_mmu_context(struct mm_struct *mm) |
| 627 | { |
| 628 | unsigned long ctx, new_ctx; |
| 629 | unsigned long orig_pgsz_bits; |
David S. Miller | a77754b | 2006-03-06 19:59:50 -0800 | [diff] [blame] | 630 | unsigned long flags; |
David S. Miller | a0663a7 | 2006-02-23 14:19:28 -0800 | [diff] [blame] | 631 | int new_version; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 632 | |
David S. Miller | a77754b | 2006-03-06 19:59:50 -0800 | [diff] [blame] | 633 | spin_lock_irqsave(&ctx_alloc_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 634 | orig_pgsz_bits = (mm->context.sparc64_ctx_val & CTX_PGSZ_MASK); |
| 635 | ctx = (tlb_context_cache + 1) & CTX_NR_MASK; |
| 636 | new_ctx = find_next_zero_bit(mmu_context_bmap, 1 << CTX_NR_BITS, ctx); |
David S. Miller | a0663a7 | 2006-02-23 14:19:28 -0800 | [diff] [blame] | 637 | new_version = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 638 | if (new_ctx >= (1 << CTX_NR_BITS)) { |
| 639 | new_ctx = find_next_zero_bit(mmu_context_bmap, ctx, 1); |
| 640 | if (new_ctx >= ctx) { |
| 641 | int i; |
| 642 | new_ctx = (tlb_context_cache & CTX_VERSION_MASK) + |
| 643 | CTX_FIRST_VERSION; |
| 644 | if (new_ctx == 1) |
| 645 | new_ctx = CTX_FIRST_VERSION; |
| 646 | |
| 647 | /* Don't call memset, for 16 entries that's just |
| 648 | * plain silly... |
| 649 | */ |
| 650 | mmu_context_bmap[0] = 3; |
| 651 | mmu_context_bmap[1] = 0; |
| 652 | mmu_context_bmap[2] = 0; |
| 653 | mmu_context_bmap[3] = 0; |
| 654 | for (i = 4; i < CTX_BMAP_SLOTS; i += 4) { |
| 655 | mmu_context_bmap[i + 0] = 0; |
| 656 | mmu_context_bmap[i + 1] = 0; |
| 657 | mmu_context_bmap[i + 2] = 0; |
| 658 | mmu_context_bmap[i + 3] = 0; |
| 659 | } |
David S. Miller | a0663a7 | 2006-02-23 14:19:28 -0800 | [diff] [blame] | 660 | new_version = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 661 | goto out; |
| 662 | } |
| 663 | } |
| 664 | mmu_context_bmap[new_ctx>>6] |= (1UL << (new_ctx & 63)); |
| 665 | new_ctx |= (tlb_context_cache & CTX_VERSION_MASK); |
| 666 | out: |
| 667 | tlb_context_cache = new_ctx; |
| 668 | mm->context.sparc64_ctx_val = new_ctx | orig_pgsz_bits; |
David S. Miller | a77754b | 2006-03-06 19:59:50 -0800 | [diff] [blame] | 669 | spin_unlock_irqrestore(&ctx_alloc_lock, flags); |
David S. Miller | a0663a7 | 2006-02-23 14:19:28 -0800 | [diff] [blame] | 670 | |
| 671 | if (unlikely(new_version)) |
| 672 | smp_new_mmu_context_version(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 673 | } |
| 674 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 675 | static int numa_enabled = 1; |
| 676 | static int numa_debug; |
| 677 | |
| 678 | static int __init early_numa(char *p) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 679 | { |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 680 | if (!p) |
| 681 | return 0; |
David S. Miller | d111201 | 2006-03-08 02:16:07 -0800 | [diff] [blame] | 682 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 683 | if (strstr(p, "off")) |
| 684 | numa_enabled = 0; |
David S. Miller | d111201 | 2006-03-08 02:16:07 -0800 | [diff] [blame] | 685 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 686 | if (strstr(p, "debug")) |
| 687 | numa_debug = 1; |
| 688 | |
| 689 | return 0; |
David S. Miller | d111201 | 2006-03-08 02:16:07 -0800 | [diff] [blame] | 690 | } |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 691 | early_param("numa", early_numa); |
| 692 | |
| 693 | #define numadbg(f, a...) \ |
| 694 | do { if (numa_debug) \ |
| 695 | printk(KERN_INFO f, ## a); \ |
| 696 | } while (0) |
David S. Miller | d111201 | 2006-03-08 02:16:07 -0800 | [diff] [blame] | 697 | |
David S. Miller | 4e82c9a | 2008-02-13 18:00:03 -0800 | [diff] [blame] | 698 | static void __init find_ramdisk(unsigned long phys_base) |
| 699 | { |
| 700 | #ifdef CONFIG_BLK_DEV_INITRD |
| 701 | if (sparc_ramdisk_image || sparc_ramdisk_image64) { |
| 702 | unsigned long ramdisk_image; |
| 703 | |
| 704 | /* Older versions of the bootloader only supported a |
| 705 | * 32-bit physical address for the ramdisk image |
| 706 | * location, stored at sparc_ramdisk_image. Newer |
| 707 | * SILO versions set sparc_ramdisk_image to zero and |
| 708 | * provide a full 64-bit physical address at |
| 709 | * sparc_ramdisk_image64. |
| 710 | */ |
| 711 | ramdisk_image = sparc_ramdisk_image; |
| 712 | if (!ramdisk_image) |
| 713 | ramdisk_image = sparc_ramdisk_image64; |
| 714 | |
| 715 | /* Another bootloader quirk. The bootloader normalizes |
| 716 | * the physical address to KERNBASE, so we have to |
| 717 | * factor that back out and add in the lowest valid |
| 718 | * physical page address to get the true physical address. |
| 719 | */ |
| 720 | ramdisk_image -= KERNBASE; |
| 721 | ramdisk_image += phys_base; |
| 722 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 723 | numadbg("Found ramdisk at physical address 0x%lx, size %u\n", |
| 724 | ramdisk_image, sparc_ramdisk_size); |
| 725 | |
David S. Miller | 4e82c9a | 2008-02-13 18:00:03 -0800 | [diff] [blame] | 726 | initrd_start = ramdisk_image; |
| 727 | initrd_end = ramdisk_image + sparc_ramdisk_size; |
David S. Miller | 3b2a7e2 | 2008-02-13 18:13:20 -0800 | [diff] [blame] | 728 | |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 729 | memblock_reserve(initrd_start, sparc_ramdisk_size); |
David S. Miller | d45100f | 2008-05-06 15:19:54 -0700 | [diff] [blame] | 730 | |
| 731 | initrd_start += PAGE_OFFSET; |
| 732 | initrd_end += PAGE_OFFSET; |
David S. Miller | 4e82c9a | 2008-02-13 18:00:03 -0800 | [diff] [blame] | 733 | } |
| 734 | #endif |
| 735 | } |
| 736 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 737 | struct node_mem_mask { |
| 738 | unsigned long mask; |
| 739 | unsigned long val; |
| 740 | unsigned long bootmem_paddr; |
| 741 | }; |
| 742 | static struct node_mem_mask node_masks[MAX_NUMNODES]; |
| 743 | static int num_node_masks; |
| 744 | |
| 745 | int numa_cpu_lookup_table[NR_CPUS]; |
| 746 | cpumask_t numa_cpumask_lookup_table[MAX_NUMNODES]; |
| 747 | |
| 748 | #ifdef CONFIG_NEED_MULTIPLE_NODES |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 749 | |
| 750 | struct mdesc_mblock { |
| 751 | u64 base; |
| 752 | u64 size; |
| 753 | u64 offset; /* RA-to-PA */ |
| 754 | }; |
| 755 | static struct mdesc_mblock *mblocks; |
| 756 | static int num_mblocks; |
| 757 | |
| 758 | static unsigned long ra_to_pa(unsigned long addr) |
David S. Miller | d111201 | 2006-03-08 02:16:07 -0800 | [diff] [blame] | 759 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 760 | int i; |
| 761 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 762 | for (i = 0; i < num_mblocks; i++) { |
| 763 | struct mdesc_mblock *m = &mblocks[i]; |
David S. Miller | 6fc5bae | 2006-12-28 21:00:23 -0800 | [diff] [blame] | 764 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 765 | if (addr >= m->base && |
| 766 | addr < (m->base + m->size)) { |
| 767 | addr += m->offset; |
| 768 | break; |
| 769 | } |
| 770 | } |
| 771 | return addr; |
| 772 | } |
| 773 | |
| 774 | static int find_node(unsigned long addr) |
| 775 | { |
| 776 | int i; |
| 777 | |
| 778 | addr = ra_to_pa(addr); |
| 779 | for (i = 0; i < num_node_masks; i++) { |
| 780 | struct node_mem_mask *p = &node_masks[i]; |
| 781 | |
| 782 | if ((addr & p->mask) == p->val) |
| 783 | return i; |
| 784 | } |
| 785 | return -1; |
| 786 | } |
| 787 | |
Benjamin Herrenschmidt | 35a1f0b | 2010-07-06 15:38:58 -0700 | [diff] [blame] | 788 | u64 memblock_nid_range(u64 start, u64 end, int *nid) |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 789 | { |
| 790 | *nid = find_node(start); |
| 791 | start += PAGE_SIZE; |
| 792 | while (start < end) { |
| 793 | int n = find_node(start); |
| 794 | |
| 795 | if (n != *nid) |
| 796 | break; |
| 797 | start += PAGE_SIZE; |
| 798 | } |
| 799 | |
David S. Miller | c918dcc | 2008-08-14 01:41:39 -0700 | [diff] [blame] | 800 | if (start > end) |
| 801 | start = end; |
| 802 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 803 | return start; |
| 804 | } |
| 805 | #else |
Benjamin Herrenschmidt | 35a1f0b | 2010-07-06 15:38:58 -0700 | [diff] [blame] | 806 | u64 memblock_nid_range(u64 start, u64 end, int *nid) |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 807 | { |
| 808 | *nid = 0; |
| 809 | return end; |
| 810 | } |
| 811 | #endif |
| 812 | |
| 813 | /* This must be invoked after performing all of the necessary |
| 814 | * add_active_range() calls for 'nid'. We need to be able to get |
| 815 | * correct data from get_pfn_range_for_nid(). |
| 816 | */ |
| 817 | static void __init allocate_node_data(int nid) |
| 818 | { |
| 819 | unsigned long paddr, num_pages, start_pfn, end_pfn; |
| 820 | struct pglist_data *p; |
| 821 | |
| 822 | #ifdef CONFIG_NEED_MULTIPLE_NODES |
Benjamin Herrenschmidt | 9d1e249 | 2010-07-06 15:39:17 -0700 | [diff] [blame] | 823 | paddr = memblock_alloc_try_nid(sizeof(struct pglist_data), SMP_CACHE_BYTES, nid); |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 824 | if (!paddr) { |
| 825 | prom_printf("Cannot allocate pglist_data for nid[%d]\n", nid); |
| 826 | prom_halt(); |
| 827 | } |
| 828 | NODE_DATA(nid) = __va(paddr); |
| 829 | memset(NODE_DATA(nid), 0, sizeof(struct pglist_data)); |
| 830 | |
Johannes Weiner | b61bfa3 | 2008-07-23 21:26:55 -0700 | [diff] [blame] | 831 | NODE_DATA(nid)->bdata = &bootmem_node_data[nid]; |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 832 | #endif |
| 833 | |
| 834 | p = NODE_DATA(nid); |
| 835 | |
| 836 | get_pfn_range_for_nid(nid, &start_pfn, &end_pfn); |
| 837 | p->node_start_pfn = start_pfn; |
| 838 | p->node_spanned_pages = end_pfn - start_pfn; |
| 839 | |
| 840 | if (p->node_spanned_pages) { |
| 841 | num_pages = bootmem_bootmap_pages(p->node_spanned_pages); |
| 842 | |
Benjamin Herrenschmidt | 9d1e249 | 2010-07-06 15:39:17 -0700 | [diff] [blame] | 843 | paddr = memblock_alloc_try_nid(num_pages << PAGE_SHIFT, PAGE_SIZE, nid); |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 844 | if (!paddr) { |
| 845 | prom_printf("Cannot allocate bootmap for nid[%d]\n", |
| 846 | nid); |
| 847 | prom_halt(); |
| 848 | } |
| 849 | node_masks[nid].bootmem_paddr = paddr; |
| 850 | } |
| 851 | } |
| 852 | |
| 853 | static void init_node_masks_nonnuma(void) |
| 854 | { |
| 855 | int i; |
| 856 | |
| 857 | numadbg("Initializing tables for non-numa.\n"); |
| 858 | |
| 859 | node_masks[0].mask = node_masks[0].val = 0; |
| 860 | num_node_masks = 1; |
| 861 | |
| 862 | for (i = 0; i < NR_CPUS; i++) |
| 863 | numa_cpu_lookup_table[i] = 0; |
| 864 | |
| 865 | numa_cpumask_lookup_table[0] = CPU_MASK_ALL; |
| 866 | } |
| 867 | |
| 868 | #ifdef CONFIG_NEED_MULTIPLE_NODES |
| 869 | struct pglist_data *node_data[MAX_NUMNODES]; |
| 870 | |
| 871 | EXPORT_SYMBOL(numa_cpu_lookup_table); |
| 872 | EXPORT_SYMBOL(numa_cpumask_lookup_table); |
| 873 | EXPORT_SYMBOL(node_data); |
| 874 | |
| 875 | struct mdesc_mlgroup { |
| 876 | u64 node; |
| 877 | u64 latency; |
| 878 | u64 match; |
| 879 | u64 mask; |
| 880 | }; |
| 881 | static struct mdesc_mlgroup *mlgroups; |
| 882 | static int num_mlgroups; |
| 883 | |
| 884 | static int scan_pio_for_cfg_handle(struct mdesc_handle *md, u64 pio, |
| 885 | u32 cfg_handle) |
| 886 | { |
| 887 | u64 arc; |
| 888 | |
| 889 | mdesc_for_each_arc(arc, md, pio, MDESC_ARC_TYPE_FWD) { |
| 890 | u64 target = mdesc_arc_target(md, arc); |
| 891 | const u64 *val; |
| 892 | |
| 893 | val = mdesc_get_property(md, target, |
| 894 | "cfg-handle", NULL); |
| 895 | if (val && *val == cfg_handle) |
| 896 | return 0; |
| 897 | } |
| 898 | return -ENODEV; |
| 899 | } |
| 900 | |
| 901 | static int scan_arcs_for_cfg_handle(struct mdesc_handle *md, u64 grp, |
| 902 | u32 cfg_handle) |
| 903 | { |
| 904 | u64 arc, candidate, best_latency = ~(u64)0; |
| 905 | |
| 906 | candidate = MDESC_NODE_NULL; |
| 907 | mdesc_for_each_arc(arc, md, grp, MDESC_ARC_TYPE_FWD) { |
| 908 | u64 target = mdesc_arc_target(md, arc); |
| 909 | const char *name = mdesc_node_name(md, target); |
| 910 | const u64 *val; |
| 911 | |
| 912 | if (strcmp(name, "pio-latency-group")) |
| 913 | continue; |
| 914 | |
| 915 | val = mdesc_get_property(md, target, "latency", NULL); |
| 916 | if (!val) |
| 917 | continue; |
| 918 | |
| 919 | if (*val < best_latency) { |
| 920 | candidate = target; |
| 921 | best_latency = *val; |
| 922 | } |
| 923 | } |
| 924 | |
| 925 | if (candidate == MDESC_NODE_NULL) |
| 926 | return -ENODEV; |
| 927 | |
| 928 | return scan_pio_for_cfg_handle(md, candidate, cfg_handle); |
| 929 | } |
| 930 | |
| 931 | int of_node_to_nid(struct device_node *dp) |
| 932 | { |
| 933 | const struct linux_prom64_registers *regs; |
| 934 | struct mdesc_handle *md; |
| 935 | u32 cfg_handle; |
| 936 | int count, nid; |
| 937 | u64 grp; |
| 938 | |
David S. Miller | 072bd41 | 2008-08-18 20:36:17 -0700 | [diff] [blame] | 939 | /* This is the right thing to do on currently supported |
| 940 | * SUN4U NUMA platforms as well, as the PCI controller does |
| 941 | * not sit behind any particular memory controller. |
| 942 | */ |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 943 | if (!mlgroups) |
| 944 | return -1; |
| 945 | |
| 946 | regs = of_get_property(dp, "reg", NULL); |
| 947 | if (!regs) |
| 948 | return -1; |
| 949 | |
| 950 | cfg_handle = (regs->phys_addr >> 32UL) & 0x0fffffff; |
| 951 | |
| 952 | md = mdesc_grab(); |
| 953 | |
| 954 | count = 0; |
| 955 | nid = -1; |
| 956 | mdesc_for_each_node_by_name(md, grp, "group") { |
| 957 | if (!scan_arcs_for_cfg_handle(md, grp, cfg_handle)) { |
| 958 | nid = count; |
| 959 | break; |
| 960 | } |
| 961 | count++; |
| 962 | } |
| 963 | |
| 964 | mdesc_release(md); |
| 965 | |
| 966 | return nid; |
| 967 | } |
| 968 | |
David S. Miller | 01c45381 | 2009-04-07 01:05:22 -0700 | [diff] [blame] | 969 | static void __init add_node_ranges(void) |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 970 | { |
Benjamin Herrenschmidt | 08b8479 | 2010-08-04 13:43:31 +1000 | [diff] [blame] | 971 | struct memblock_region *reg; |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 972 | |
Benjamin Herrenschmidt | 08b8479 | 2010-08-04 13:43:31 +1000 | [diff] [blame] | 973 | for_each_memblock(memory, reg) { |
| 974 | unsigned long size = reg->size; |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 975 | unsigned long start, end; |
| 976 | |
Benjamin Herrenschmidt | 08b8479 | 2010-08-04 13:43:31 +1000 | [diff] [blame] | 977 | start = reg->base; |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 978 | end = start + size; |
| 979 | while (start < end) { |
| 980 | unsigned long this_end; |
| 981 | int nid; |
| 982 | |
Benjamin Herrenschmidt | 35a1f0b | 2010-07-06 15:38:58 -0700 | [diff] [blame] | 983 | this_end = memblock_nid_range(start, end, &nid); |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 984 | |
| 985 | numadbg("Adding active range nid[%d] " |
| 986 | "start[%lx] end[%lx]\n", |
| 987 | nid, start, this_end); |
| 988 | |
| 989 | add_active_range(nid, |
| 990 | start >> PAGE_SHIFT, |
| 991 | this_end >> PAGE_SHIFT); |
| 992 | |
| 993 | start = this_end; |
| 994 | } |
| 995 | } |
| 996 | } |
| 997 | |
| 998 | static int __init grab_mlgroups(struct mdesc_handle *md) |
| 999 | { |
| 1000 | unsigned long paddr; |
| 1001 | int count = 0; |
| 1002 | u64 node; |
| 1003 | |
| 1004 | mdesc_for_each_node_by_name(md, node, "memory-latency-group") |
| 1005 | count++; |
| 1006 | if (!count) |
| 1007 | return -ENOENT; |
| 1008 | |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 1009 | paddr = memblock_alloc(count * sizeof(struct mdesc_mlgroup), |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1010 | SMP_CACHE_BYTES); |
| 1011 | if (!paddr) |
| 1012 | return -ENOMEM; |
| 1013 | |
| 1014 | mlgroups = __va(paddr); |
| 1015 | num_mlgroups = count; |
| 1016 | |
| 1017 | count = 0; |
| 1018 | mdesc_for_each_node_by_name(md, node, "memory-latency-group") { |
| 1019 | struct mdesc_mlgroup *m = &mlgroups[count++]; |
| 1020 | const u64 *val; |
| 1021 | |
| 1022 | m->node = node; |
| 1023 | |
| 1024 | val = mdesc_get_property(md, node, "latency", NULL); |
| 1025 | m->latency = *val; |
| 1026 | val = mdesc_get_property(md, node, "address-match", NULL); |
| 1027 | m->match = *val; |
| 1028 | val = mdesc_get_property(md, node, "address-mask", NULL); |
| 1029 | m->mask = *val; |
| 1030 | |
Sam Ravnborg | 9018113 | 2009-01-06 13:19:28 -0800 | [diff] [blame] | 1031 | numadbg("MLGROUP[%d]: node[%llx] latency[%llx] " |
| 1032 | "match[%llx] mask[%llx]\n", |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1033 | count - 1, m->node, m->latency, m->match, m->mask); |
| 1034 | } |
| 1035 | |
| 1036 | return 0; |
| 1037 | } |
| 1038 | |
| 1039 | static int __init grab_mblocks(struct mdesc_handle *md) |
| 1040 | { |
| 1041 | unsigned long paddr; |
| 1042 | int count = 0; |
| 1043 | u64 node; |
| 1044 | |
| 1045 | mdesc_for_each_node_by_name(md, node, "mblock") |
| 1046 | count++; |
| 1047 | if (!count) |
| 1048 | return -ENOENT; |
| 1049 | |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 1050 | paddr = memblock_alloc(count * sizeof(struct mdesc_mblock), |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1051 | SMP_CACHE_BYTES); |
| 1052 | if (!paddr) |
| 1053 | return -ENOMEM; |
| 1054 | |
| 1055 | mblocks = __va(paddr); |
| 1056 | num_mblocks = count; |
| 1057 | |
| 1058 | count = 0; |
| 1059 | mdesc_for_each_node_by_name(md, node, "mblock") { |
| 1060 | struct mdesc_mblock *m = &mblocks[count++]; |
| 1061 | const u64 *val; |
| 1062 | |
| 1063 | val = mdesc_get_property(md, node, "base", NULL); |
| 1064 | m->base = *val; |
| 1065 | val = mdesc_get_property(md, node, "size", NULL); |
| 1066 | m->size = *val; |
| 1067 | val = mdesc_get_property(md, node, |
| 1068 | "address-congruence-offset", NULL); |
| 1069 | m->offset = *val; |
| 1070 | |
Sam Ravnborg | 9018113 | 2009-01-06 13:19:28 -0800 | [diff] [blame] | 1071 | numadbg("MBLOCK[%d]: base[%llx] size[%llx] offset[%llx]\n", |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1072 | count - 1, m->base, m->size, m->offset); |
| 1073 | } |
| 1074 | |
| 1075 | return 0; |
| 1076 | } |
| 1077 | |
| 1078 | static void __init numa_parse_mdesc_group_cpus(struct mdesc_handle *md, |
| 1079 | u64 grp, cpumask_t *mask) |
| 1080 | { |
| 1081 | u64 arc; |
| 1082 | |
| 1083 | cpus_clear(*mask); |
| 1084 | |
| 1085 | mdesc_for_each_arc(arc, md, grp, MDESC_ARC_TYPE_BACK) { |
| 1086 | u64 target = mdesc_arc_target(md, arc); |
| 1087 | const char *name = mdesc_node_name(md, target); |
| 1088 | const u64 *id; |
| 1089 | |
| 1090 | if (strcmp(name, "cpu")) |
| 1091 | continue; |
| 1092 | id = mdesc_get_property(md, target, "id", NULL); |
Rusty Russell | e305cb8f | 2009-03-16 14:40:23 +1030 | [diff] [blame] | 1093 | if (*id < nr_cpu_ids) |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1094 | cpu_set(*id, *mask); |
| 1095 | } |
| 1096 | } |
| 1097 | |
| 1098 | static struct mdesc_mlgroup * __init find_mlgroup(u64 node) |
| 1099 | { |
| 1100 | int i; |
| 1101 | |
| 1102 | for (i = 0; i < num_mlgroups; i++) { |
| 1103 | struct mdesc_mlgroup *m = &mlgroups[i]; |
| 1104 | if (m->node == node) |
| 1105 | return m; |
| 1106 | } |
| 1107 | return NULL; |
| 1108 | } |
| 1109 | |
| 1110 | static int __init numa_attach_mlgroup(struct mdesc_handle *md, u64 grp, |
| 1111 | int index) |
| 1112 | { |
| 1113 | struct mdesc_mlgroup *candidate = NULL; |
| 1114 | u64 arc, best_latency = ~(u64)0; |
| 1115 | struct node_mem_mask *n; |
| 1116 | |
| 1117 | mdesc_for_each_arc(arc, md, grp, MDESC_ARC_TYPE_FWD) { |
| 1118 | u64 target = mdesc_arc_target(md, arc); |
| 1119 | struct mdesc_mlgroup *m = find_mlgroup(target); |
| 1120 | if (!m) |
| 1121 | continue; |
| 1122 | if (m->latency < best_latency) { |
| 1123 | candidate = m; |
| 1124 | best_latency = m->latency; |
| 1125 | } |
| 1126 | } |
| 1127 | if (!candidate) |
| 1128 | return -ENOENT; |
| 1129 | |
| 1130 | if (num_node_masks != index) { |
| 1131 | printk(KERN_ERR "Inconsistent NUMA state, " |
| 1132 | "index[%d] != num_node_masks[%d]\n", |
| 1133 | index, num_node_masks); |
| 1134 | return -EINVAL; |
| 1135 | } |
| 1136 | |
| 1137 | n = &node_masks[num_node_masks++]; |
| 1138 | |
| 1139 | n->mask = candidate->mask; |
| 1140 | n->val = candidate->match; |
| 1141 | |
Sam Ravnborg | 9018113 | 2009-01-06 13:19:28 -0800 | [diff] [blame] | 1142 | numadbg("NUMA NODE[%d]: mask[%lx] val[%lx] (latency[%llx])\n", |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1143 | index, n->mask, n->val, candidate->latency); |
| 1144 | |
| 1145 | return 0; |
| 1146 | } |
| 1147 | |
| 1148 | static int __init numa_parse_mdesc_group(struct mdesc_handle *md, u64 grp, |
| 1149 | int index) |
| 1150 | { |
| 1151 | cpumask_t mask; |
| 1152 | int cpu; |
| 1153 | |
| 1154 | numa_parse_mdesc_group_cpus(md, grp, &mask); |
| 1155 | |
| 1156 | for_each_cpu_mask(cpu, mask) |
| 1157 | numa_cpu_lookup_table[cpu] = index; |
| 1158 | numa_cpumask_lookup_table[index] = mask; |
| 1159 | |
| 1160 | if (numa_debug) { |
| 1161 | printk(KERN_INFO "NUMA GROUP[%d]: cpus [ ", index); |
| 1162 | for_each_cpu_mask(cpu, mask) |
| 1163 | printk("%d ", cpu); |
| 1164 | printk("]\n"); |
| 1165 | } |
| 1166 | |
| 1167 | return numa_attach_mlgroup(md, grp, index); |
| 1168 | } |
| 1169 | |
| 1170 | static int __init numa_parse_mdesc(void) |
| 1171 | { |
| 1172 | struct mdesc_handle *md = mdesc_grab(); |
| 1173 | int i, err, count; |
| 1174 | u64 node; |
| 1175 | |
| 1176 | node = mdesc_node_by_name(md, MDESC_NODE_NULL, "latency-groups"); |
| 1177 | if (node == MDESC_NODE_NULL) { |
| 1178 | mdesc_release(md); |
| 1179 | return -ENOENT; |
| 1180 | } |
| 1181 | |
| 1182 | err = grab_mblocks(md); |
| 1183 | if (err < 0) |
| 1184 | goto out; |
| 1185 | |
| 1186 | err = grab_mlgroups(md); |
| 1187 | if (err < 0) |
| 1188 | goto out; |
| 1189 | |
| 1190 | count = 0; |
| 1191 | mdesc_for_each_node_by_name(md, node, "group") { |
| 1192 | err = numa_parse_mdesc_group(md, node, count); |
| 1193 | if (err < 0) |
| 1194 | break; |
| 1195 | count++; |
| 1196 | } |
| 1197 | |
| 1198 | add_node_ranges(); |
| 1199 | |
| 1200 | for (i = 0; i < num_node_masks; i++) { |
| 1201 | allocate_node_data(i); |
| 1202 | node_set_online(i); |
| 1203 | } |
| 1204 | |
| 1205 | err = 0; |
| 1206 | out: |
| 1207 | mdesc_release(md); |
| 1208 | return err; |
| 1209 | } |
| 1210 | |
David S. Miller | 072bd41 | 2008-08-18 20:36:17 -0700 | [diff] [blame] | 1211 | static int __init numa_parse_jbus(void) |
| 1212 | { |
| 1213 | unsigned long cpu, index; |
| 1214 | |
| 1215 | /* NUMA node id is encoded in bits 36 and higher, and there is |
| 1216 | * a 1-to-1 mapping from CPU ID to NUMA node ID. |
| 1217 | */ |
| 1218 | index = 0; |
| 1219 | for_each_present_cpu(cpu) { |
| 1220 | numa_cpu_lookup_table[cpu] = index; |
| 1221 | numa_cpumask_lookup_table[index] = cpumask_of_cpu(cpu); |
| 1222 | node_masks[index].mask = ~((1UL << 36UL) - 1UL); |
| 1223 | node_masks[index].val = cpu << 36UL; |
| 1224 | |
| 1225 | index++; |
| 1226 | } |
| 1227 | num_node_masks = index; |
| 1228 | |
| 1229 | add_node_ranges(); |
| 1230 | |
| 1231 | for (index = 0; index < num_node_masks; index++) { |
| 1232 | allocate_node_data(index); |
| 1233 | node_set_online(index); |
| 1234 | } |
| 1235 | |
| 1236 | return 0; |
| 1237 | } |
| 1238 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1239 | static int __init numa_parse_sun4u(void) |
| 1240 | { |
David S. Miller | 072bd41 | 2008-08-18 20:36:17 -0700 | [diff] [blame] | 1241 | if (tlb_type == cheetah || tlb_type == cheetah_plus) { |
| 1242 | unsigned long ver; |
| 1243 | |
| 1244 | __asm__ ("rdpr %%ver, %0" : "=r" (ver)); |
| 1245 | if ((ver >> 32UL) == __JALAPENO_ID || |
| 1246 | (ver >> 32UL) == __SERRANO_ID) |
| 1247 | return numa_parse_jbus(); |
| 1248 | } |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1249 | return -1; |
| 1250 | } |
| 1251 | |
| 1252 | static int __init bootmem_init_numa(void) |
| 1253 | { |
| 1254 | int err = -1; |
| 1255 | |
| 1256 | numadbg("bootmem_init_numa()\n"); |
| 1257 | |
| 1258 | if (numa_enabled) { |
| 1259 | if (tlb_type == hypervisor) |
| 1260 | err = numa_parse_mdesc(); |
| 1261 | else |
| 1262 | err = numa_parse_sun4u(); |
| 1263 | } |
| 1264 | return err; |
| 1265 | } |
| 1266 | |
| 1267 | #else |
| 1268 | |
| 1269 | static int bootmem_init_numa(void) |
| 1270 | { |
| 1271 | return -1; |
| 1272 | } |
| 1273 | |
| 1274 | #endif |
| 1275 | |
| 1276 | static void __init bootmem_init_nonnuma(void) |
| 1277 | { |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 1278 | unsigned long top_of_ram = memblock_end_of_DRAM(); |
| 1279 | unsigned long total_ram = memblock_phys_mem_size(); |
Benjamin Herrenschmidt | 08b8479 | 2010-08-04 13:43:31 +1000 | [diff] [blame] | 1280 | struct memblock_region *reg; |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1281 | |
| 1282 | numadbg("bootmem_init_nonnuma()\n"); |
| 1283 | |
| 1284 | printk(KERN_INFO "Top of RAM: 0x%lx, Total RAM: 0x%lx\n", |
| 1285 | top_of_ram, total_ram); |
| 1286 | printk(KERN_INFO "Memory hole size: %ldMB\n", |
| 1287 | (top_of_ram - total_ram) >> 20); |
| 1288 | |
| 1289 | init_node_masks_nonnuma(); |
| 1290 | |
Benjamin Herrenschmidt | 08b8479 | 2010-08-04 13:43:31 +1000 | [diff] [blame] | 1291 | for_each_memblock(memory, reg) { |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1292 | unsigned long start_pfn, end_pfn; |
| 1293 | |
Benjamin Herrenschmidt | 08b8479 | 2010-08-04 13:43:31 +1000 | [diff] [blame] | 1294 | if (!reg->size) |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1295 | continue; |
| 1296 | |
Yinghai Lu | c7fc2de | 2010-10-12 14:07:09 -0700 | [diff] [blame^] | 1297 | start_pfn = memblock_region_memory_base_pfn(reg); |
| 1298 | end_pfn = memblock_region_memory_end_pfn(reg); |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1299 | add_active_range(0, start_pfn, end_pfn); |
| 1300 | } |
| 1301 | |
| 1302 | allocate_node_data(0); |
| 1303 | |
| 1304 | node_set_online(0); |
| 1305 | } |
| 1306 | |
| 1307 | static void __init reserve_range_in_node(int nid, unsigned long start, |
| 1308 | unsigned long end) |
| 1309 | { |
| 1310 | numadbg(" reserve_range_in_node(nid[%d],start[%lx],end[%lx]\n", |
| 1311 | nid, start, end); |
| 1312 | while (start < end) { |
| 1313 | unsigned long this_end; |
| 1314 | int n; |
| 1315 | |
Benjamin Herrenschmidt | 35a1f0b | 2010-07-06 15:38:58 -0700 | [diff] [blame] | 1316 | this_end = memblock_nid_range(start, end, &n); |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1317 | if (n == nid) { |
| 1318 | numadbg(" MATCH reserving range [%lx:%lx]\n", |
| 1319 | start, this_end); |
| 1320 | reserve_bootmem_node(NODE_DATA(nid), start, |
| 1321 | (this_end - start), BOOTMEM_DEFAULT); |
| 1322 | } else |
| 1323 | numadbg(" NO MATCH, advancing start to %lx\n", |
| 1324 | this_end); |
| 1325 | |
| 1326 | start = this_end; |
| 1327 | } |
| 1328 | } |
| 1329 | |
| 1330 | static void __init trim_reserved_in_node(int nid) |
| 1331 | { |
Benjamin Herrenschmidt | 08b8479 | 2010-08-04 13:43:31 +1000 | [diff] [blame] | 1332 | struct memblock_region *reg; |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1333 | |
| 1334 | numadbg(" trim_reserved_in_node(%d)\n", nid); |
| 1335 | |
Benjamin Herrenschmidt | 08b8479 | 2010-08-04 13:43:31 +1000 | [diff] [blame] | 1336 | for_each_memblock(reserved, reg) |
| 1337 | reserve_range_in_node(nid, reg->base, reg->base + reg->size); |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1338 | } |
| 1339 | |
| 1340 | static void __init bootmem_init_one_node(int nid) |
| 1341 | { |
| 1342 | struct pglist_data *p; |
| 1343 | |
| 1344 | numadbg("bootmem_init_one_node(%d)\n", nid); |
| 1345 | |
| 1346 | p = NODE_DATA(nid); |
| 1347 | |
| 1348 | if (p->node_spanned_pages) { |
| 1349 | unsigned long paddr = node_masks[nid].bootmem_paddr; |
| 1350 | unsigned long end_pfn; |
| 1351 | |
| 1352 | end_pfn = p->node_start_pfn + p->node_spanned_pages; |
| 1353 | |
| 1354 | numadbg(" init_bootmem_node(%d, %lx, %lx, %lx)\n", |
| 1355 | nid, paddr >> PAGE_SHIFT, p->node_start_pfn, end_pfn); |
| 1356 | |
| 1357 | init_bootmem_node(p, paddr >> PAGE_SHIFT, |
| 1358 | p->node_start_pfn, end_pfn); |
| 1359 | |
| 1360 | numadbg(" free_bootmem_with_active_regions(%d, %lx)\n", |
| 1361 | nid, end_pfn); |
| 1362 | free_bootmem_with_active_regions(nid, end_pfn); |
| 1363 | |
| 1364 | trim_reserved_in_node(nid); |
| 1365 | |
| 1366 | numadbg(" sparse_memory_present_with_active_regions(%d)\n", |
| 1367 | nid); |
| 1368 | sparse_memory_present_with_active_regions(nid); |
| 1369 | } |
| 1370 | } |
| 1371 | |
| 1372 | static unsigned long __init bootmem_init(unsigned long phys_base) |
| 1373 | { |
| 1374 | unsigned long end_pfn; |
| 1375 | int nid; |
| 1376 | |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 1377 | end_pfn = memblock_end_of_DRAM() >> PAGE_SHIFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1378 | max_pfn = max_low_pfn = end_pfn; |
David S. Miller | d111201 | 2006-03-08 02:16:07 -0800 | [diff] [blame] | 1379 | min_low_pfn = (phys_base >> PAGE_SHIFT); |
| 1380 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1381 | if (bootmem_init_numa() < 0) |
| 1382 | bootmem_init_nonnuma(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1383 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1384 | /* XXX cpu notifier XXX */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1385 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1386 | for_each_online_node(nid) |
| 1387 | bootmem_init_one_node(nid); |
David S. Miller | d111201 | 2006-03-08 02:16:07 -0800 | [diff] [blame] | 1388 | |
| 1389 | sparse_init(); |
| 1390 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1391 | return end_pfn; |
| 1392 | } |
| 1393 | |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 1394 | static struct linux_prom64_registers pall[MAX_BANKS] __initdata; |
| 1395 | static int pall_ents __initdata; |
| 1396 | |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1397 | #ifdef CONFIG_DEBUG_PAGEALLOC |
Sam Ravnborg | 896aef4 | 2008-02-24 19:49:52 -0800 | [diff] [blame] | 1398 | static unsigned long __ref kernel_map_range(unsigned long pstart, |
| 1399 | unsigned long pend, pgprot_t prot) |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1400 | { |
| 1401 | unsigned long vstart = PAGE_OFFSET + pstart; |
| 1402 | unsigned long vend = PAGE_OFFSET + pend; |
| 1403 | unsigned long alloc_bytes = 0UL; |
| 1404 | |
| 1405 | if ((vstart & ~PAGE_MASK) || (vend & ~PAGE_MASK)) { |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 1406 | prom_printf("kernel_map: Unaligned physmem[%lx:%lx]\n", |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1407 | vstart, vend); |
| 1408 | prom_halt(); |
| 1409 | } |
| 1410 | |
| 1411 | while (vstart < vend) { |
| 1412 | unsigned long this_end, paddr = __pa(vstart); |
| 1413 | pgd_t *pgd = pgd_offset_k(vstart); |
| 1414 | pud_t *pud; |
| 1415 | pmd_t *pmd; |
| 1416 | pte_t *pte; |
| 1417 | |
| 1418 | pud = pud_offset(pgd, vstart); |
| 1419 | if (pud_none(*pud)) { |
| 1420 | pmd_t *new; |
| 1421 | |
| 1422 | new = __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, PAGE_SIZE); |
| 1423 | alloc_bytes += PAGE_SIZE; |
| 1424 | pud_populate(&init_mm, pud, new); |
| 1425 | } |
| 1426 | |
| 1427 | pmd = pmd_offset(pud, vstart); |
| 1428 | if (!pmd_present(*pmd)) { |
| 1429 | pte_t *new; |
| 1430 | |
| 1431 | new = __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, PAGE_SIZE); |
| 1432 | alloc_bytes += PAGE_SIZE; |
| 1433 | pmd_populate_kernel(&init_mm, pmd, new); |
| 1434 | } |
| 1435 | |
| 1436 | pte = pte_offset_kernel(pmd, vstart); |
| 1437 | this_end = (vstart + PMD_SIZE) & PMD_MASK; |
| 1438 | if (this_end > vend) |
| 1439 | this_end = vend; |
| 1440 | |
| 1441 | while (vstart < this_end) { |
| 1442 | pte_val(*pte) = (paddr | pgprot_val(prot)); |
| 1443 | |
| 1444 | vstart += PAGE_SIZE; |
| 1445 | paddr += PAGE_SIZE; |
| 1446 | pte++; |
| 1447 | } |
| 1448 | } |
| 1449 | |
| 1450 | return alloc_bytes; |
| 1451 | } |
| 1452 | |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1453 | extern unsigned int kvmap_linear_patch[1]; |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 1454 | #endif /* CONFIG_DEBUG_PAGEALLOC */ |
| 1455 | |
| 1456 | static void __init mark_kpte_bitmap(unsigned long start, unsigned long end) |
| 1457 | { |
| 1458 | const unsigned long shift_256MB = 28; |
| 1459 | const unsigned long mask_256MB = ((1UL << shift_256MB) - 1UL); |
| 1460 | const unsigned long size_256MB = (1UL << shift_256MB); |
| 1461 | |
| 1462 | while (start < end) { |
| 1463 | long remains; |
| 1464 | |
David S. Miller | f7c0033 | 2006-03-05 22:18:50 -0800 | [diff] [blame] | 1465 | remains = end - start; |
| 1466 | if (remains < size_256MB) |
| 1467 | break; |
| 1468 | |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 1469 | if (start & mask_256MB) { |
| 1470 | start = (start + size_256MB) & ~mask_256MB; |
| 1471 | continue; |
| 1472 | } |
| 1473 | |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 1474 | while (remains >= size_256MB) { |
| 1475 | unsigned long index = start >> shift_256MB; |
| 1476 | |
| 1477 | __set_bit(index, kpte_linear_bitmap); |
| 1478 | |
| 1479 | start += size_256MB; |
| 1480 | remains -= size_256MB; |
| 1481 | } |
| 1482 | } |
| 1483 | } |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1484 | |
David S. Miller | 8f361453 | 2007-12-13 06:13:38 -0800 | [diff] [blame] | 1485 | static void __init init_kpte_bitmap(void) |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1486 | { |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 1487 | unsigned long i; |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 1488 | |
| 1489 | for (i = 0; i < pall_ents; i++) { |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1490 | unsigned long phys_start, phys_end; |
| 1491 | |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 1492 | phys_start = pall[i].phys_addr; |
| 1493 | phys_end = phys_start + pall[i].reg_size; |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 1494 | |
| 1495 | mark_kpte_bitmap(phys_start, phys_end); |
David S. Miller | 8f361453 | 2007-12-13 06:13:38 -0800 | [diff] [blame] | 1496 | } |
| 1497 | } |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 1498 | |
David S. Miller | 8f361453 | 2007-12-13 06:13:38 -0800 | [diff] [blame] | 1499 | static void __init kernel_physical_mapping_init(void) |
| 1500 | { |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 1501 | #ifdef CONFIG_DEBUG_PAGEALLOC |
David S. Miller | 8f361453 | 2007-12-13 06:13:38 -0800 | [diff] [blame] | 1502 | unsigned long i, mem_alloced = 0UL; |
| 1503 | |
| 1504 | for (i = 0; i < pall_ents; i++) { |
| 1505 | unsigned long phys_start, phys_end; |
| 1506 | |
| 1507 | phys_start = pall[i].phys_addr; |
| 1508 | phys_end = phys_start + pall[i].reg_size; |
| 1509 | |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1510 | mem_alloced += kernel_map_range(phys_start, phys_end, |
| 1511 | PAGE_KERNEL); |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1512 | } |
| 1513 | |
| 1514 | printk("Allocated %ld bytes for kernel page tables.\n", |
| 1515 | mem_alloced); |
| 1516 | |
| 1517 | kvmap_linear_patch[0] = 0x01000000; /* nop */ |
| 1518 | flushi(&kvmap_linear_patch[0]); |
| 1519 | |
| 1520 | __flush_tlb_all(); |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 1521 | #endif |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1522 | } |
| 1523 | |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 1524 | #ifdef CONFIG_DEBUG_PAGEALLOC |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1525 | void kernel_map_pages(struct page *page, int numpages, int enable) |
| 1526 | { |
| 1527 | unsigned long phys_start = page_to_pfn(page) << PAGE_SHIFT; |
| 1528 | unsigned long phys_end = phys_start + (numpages * PAGE_SIZE); |
| 1529 | |
| 1530 | kernel_map_range(phys_start, phys_end, |
| 1531 | (enable ? PAGE_KERNEL : __pgprot(0))); |
| 1532 | |
David S. Miller | 74bf431 | 2006-01-31 18:29:18 -0800 | [diff] [blame] | 1533 | flush_tsb_kernel_range(PAGE_OFFSET + phys_start, |
| 1534 | PAGE_OFFSET + phys_end); |
| 1535 | |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1536 | /* we should perform an IPI and flush all tlbs, |
| 1537 | * but that can deadlock->flush only current cpu. |
| 1538 | */ |
| 1539 | __flush_tlb_kernel_range(PAGE_OFFSET + phys_start, |
| 1540 | PAGE_OFFSET + phys_end); |
| 1541 | } |
| 1542 | #endif |
| 1543 | |
David S. Miller | 1014757 | 2005-09-28 21:46:43 -0700 | [diff] [blame] | 1544 | unsigned long __init find_ecache_flush_span(unsigned long size) |
| 1545 | { |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 1546 | int i; |
David S. Miller | 1014757 | 2005-09-28 21:46:43 -0700 | [diff] [blame] | 1547 | |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 1548 | for (i = 0; i < pavail_ents; i++) { |
| 1549 | if (pavail[i].reg_size >= size) |
| 1550 | return pavail[i].phys_addr; |
David S. Miller | 1014757 | 2005-09-28 21:46:43 -0700 | [diff] [blame] | 1551 | } |
| 1552 | |
| 1553 | return ~0UL; |
| 1554 | } |
| 1555 | |
David S. Miller | 517af33 | 2006-02-01 15:55:21 -0800 | [diff] [blame] | 1556 | static void __init tsb_phys_patch(void) |
| 1557 | { |
David S. Miller | d257d5d | 2006-02-06 23:44:37 -0800 | [diff] [blame] | 1558 | struct tsb_ldquad_phys_patch_entry *pquad; |
David S. Miller | 517af33 | 2006-02-01 15:55:21 -0800 | [diff] [blame] | 1559 | struct tsb_phys_patch_entry *p; |
| 1560 | |
David S. Miller | d257d5d | 2006-02-06 23:44:37 -0800 | [diff] [blame] | 1561 | pquad = &__tsb_ldquad_phys_patch; |
| 1562 | while (pquad < &__tsb_ldquad_phys_patch_end) { |
| 1563 | unsigned long addr = pquad->addr; |
| 1564 | |
| 1565 | if (tlb_type == hypervisor) |
| 1566 | *(unsigned int *) addr = pquad->sun4v_insn; |
| 1567 | else |
| 1568 | *(unsigned int *) addr = pquad->sun4u_insn; |
| 1569 | wmb(); |
| 1570 | __asm__ __volatile__("flush %0" |
| 1571 | : /* no outputs */ |
| 1572 | : "r" (addr)); |
| 1573 | |
| 1574 | pquad++; |
| 1575 | } |
| 1576 | |
David S. Miller | 517af33 | 2006-02-01 15:55:21 -0800 | [diff] [blame] | 1577 | p = &__tsb_phys_patch; |
| 1578 | while (p < &__tsb_phys_patch_end) { |
| 1579 | unsigned long addr = p->addr; |
| 1580 | |
| 1581 | *(unsigned int *) addr = p->insn; |
| 1582 | wmb(); |
| 1583 | __asm__ __volatile__("flush %0" |
| 1584 | : /* no outputs */ |
| 1585 | : "r" (addr)); |
| 1586 | |
| 1587 | p++; |
| 1588 | } |
| 1589 | } |
| 1590 | |
David S. Miller | 490384e | 2006-02-11 14:41:18 -0800 | [diff] [blame] | 1591 | /* Don't mark as init, we give this to the Hypervisor. */ |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 1592 | #ifndef CONFIG_DEBUG_PAGEALLOC |
| 1593 | #define NUM_KTSB_DESCR 2 |
| 1594 | #else |
| 1595 | #define NUM_KTSB_DESCR 1 |
| 1596 | #endif |
| 1597 | static struct hv_tsb_descr ktsb_descr[NUM_KTSB_DESCR]; |
David S. Miller | 490384e | 2006-02-11 14:41:18 -0800 | [diff] [blame] | 1598 | extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES]; |
| 1599 | |
| 1600 | static void __init sun4v_ktsb_init(void) |
| 1601 | { |
| 1602 | unsigned long ktsb_pa; |
| 1603 | |
David S. Miller | d7744a0 | 2006-02-21 22:31:11 -0800 | [diff] [blame] | 1604 | /* First KTSB for PAGE_SIZE mappings. */ |
David S. Miller | 490384e | 2006-02-11 14:41:18 -0800 | [diff] [blame] | 1605 | ktsb_pa = kern_base + ((unsigned long)&swapper_tsb[0] - KERNBASE); |
| 1606 | |
| 1607 | switch (PAGE_SIZE) { |
| 1608 | case 8 * 1024: |
| 1609 | default: |
| 1610 | ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_8K; |
| 1611 | ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_8K; |
| 1612 | break; |
| 1613 | |
| 1614 | case 64 * 1024: |
| 1615 | ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_64K; |
| 1616 | ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_64K; |
| 1617 | break; |
| 1618 | |
| 1619 | case 512 * 1024: |
| 1620 | ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_512K; |
| 1621 | ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_512K; |
| 1622 | break; |
| 1623 | |
| 1624 | case 4 * 1024 * 1024: |
| 1625 | ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_4MB; |
| 1626 | ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_4MB; |
| 1627 | break; |
| 1628 | }; |
| 1629 | |
David S. Miller | 3f19a84 | 2006-02-17 12:03:20 -0800 | [diff] [blame] | 1630 | ktsb_descr[0].assoc = 1; |
David S. Miller | 490384e | 2006-02-11 14:41:18 -0800 | [diff] [blame] | 1631 | ktsb_descr[0].num_ttes = KERNEL_TSB_NENTRIES; |
| 1632 | ktsb_descr[0].ctx_idx = 0; |
| 1633 | ktsb_descr[0].tsb_base = ktsb_pa; |
| 1634 | ktsb_descr[0].resv = 0; |
| 1635 | |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 1636 | #ifndef CONFIG_DEBUG_PAGEALLOC |
David S. Miller | d7744a0 | 2006-02-21 22:31:11 -0800 | [diff] [blame] | 1637 | /* Second KTSB for 4MB/256MB mappings. */ |
| 1638 | ktsb_pa = (kern_base + |
| 1639 | ((unsigned long)&swapper_4m_tsb[0] - KERNBASE)); |
| 1640 | |
| 1641 | ktsb_descr[1].pgsz_idx = HV_PGSZ_IDX_4MB; |
| 1642 | ktsb_descr[1].pgsz_mask = (HV_PGSZ_MASK_4MB | |
| 1643 | HV_PGSZ_MASK_256MB); |
| 1644 | ktsb_descr[1].assoc = 1; |
| 1645 | ktsb_descr[1].num_ttes = KERNEL_TSB4M_NENTRIES; |
| 1646 | ktsb_descr[1].ctx_idx = 0; |
| 1647 | ktsb_descr[1].tsb_base = ktsb_pa; |
| 1648 | ktsb_descr[1].resv = 0; |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 1649 | #endif |
David S. Miller | 490384e | 2006-02-11 14:41:18 -0800 | [diff] [blame] | 1650 | } |
| 1651 | |
| 1652 | void __cpuinit sun4v_ktsb_register(void) |
| 1653 | { |
David S. Miller | 7db35f3 | 2007-05-29 02:22:14 -0700 | [diff] [blame] | 1654 | unsigned long pa, ret; |
David S. Miller | 490384e | 2006-02-11 14:41:18 -0800 | [diff] [blame] | 1655 | |
| 1656 | pa = kern_base + ((unsigned long)&ktsb_descr[0] - KERNBASE); |
| 1657 | |
David S. Miller | 7db35f3 | 2007-05-29 02:22:14 -0700 | [diff] [blame] | 1658 | ret = sun4v_mmu_tsb_ctx0(NUM_KTSB_DESCR, pa); |
| 1659 | if (ret != 0) { |
| 1660 | prom_printf("hypervisor_mmu_tsb_ctx0[%lx]: " |
| 1661 | "errors with %lx\n", pa, ret); |
| 1662 | prom_halt(); |
| 1663 | } |
David S. Miller | 490384e | 2006-02-11 14:41:18 -0800 | [diff] [blame] | 1664 | } |
| 1665 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1666 | /* paging_init() sets up the page tables */ |
| 1667 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1668 | static unsigned long last_valid_pfn; |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1669 | pgd_t swapper_pg_dir[2048]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1670 | |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 1671 | static void sun4u_pgprot_init(void); |
| 1672 | static void sun4v_pgprot_init(void); |
| 1673 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1674 | void __init paging_init(void) |
| 1675 | { |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1676 | unsigned long end_pfn, shift, phys_base; |
David S. Miller | 0836a0e | 2005-09-28 21:38:08 -0700 | [diff] [blame] | 1677 | unsigned long real_end, i; |
| 1678 | |
David S. Miller | 22adb35 | 2007-05-26 01:14:43 -0700 | [diff] [blame] | 1679 | /* These build time checkes make sure that the dcache_dirty_cpu() |
| 1680 | * page->flags usage will work. |
| 1681 | * |
| 1682 | * When a page gets marked as dcache-dirty, we store the |
| 1683 | * cpu number starting at bit 32 in the page->flags. Also, |
| 1684 | * functions like clear_dcache_dirty_cpu use the cpu mask |
| 1685 | * in 13-bit signed-immediate instruction fields. |
| 1686 | */ |
Christoph Lameter | 9223b41 | 2008-04-28 02:12:48 -0700 | [diff] [blame] | 1687 | |
| 1688 | /* |
| 1689 | * Page flags must not reach into upper 32 bits that are used |
| 1690 | * for the cpu number |
| 1691 | */ |
| 1692 | BUILD_BUG_ON(NR_PAGEFLAGS > 32); |
| 1693 | |
| 1694 | /* |
| 1695 | * The bit fields placed in the high range must not reach below |
| 1696 | * the 32 bit boundary. Otherwise we cannot place the cpu field |
| 1697 | * at the 32 bit boundary. |
| 1698 | */ |
David S. Miller | 22adb35 | 2007-05-26 01:14:43 -0700 | [diff] [blame] | 1699 | BUILD_BUG_ON(SECTIONS_WIDTH + NODES_WIDTH + ZONES_WIDTH + |
Christoph Lameter | 9223b41 | 2008-04-28 02:12:48 -0700 | [diff] [blame] | 1700 | ilog2(roundup_pow_of_two(NR_CPUS)) > 32); |
| 1701 | |
David S. Miller | 22adb35 | 2007-05-26 01:14:43 -0700 | [diff] [blame] | 1702 | BUILD_BUG_ON(NR_CPUS > 4096); |
| 1703 | |
David S. Miller | 481295f | 2006-02-07 21:51:08 -0800 | [diff] [blame] | 1704 | kern_base = (prom_boot_mapping_phys_low >> 22UL) << 22UL; |
| 1705 | kern_size = (unsigned long)&_end - (unsigned long)KERNBASE; |
| 1706 | |
David S. Miller | d7744a0 | 2006-02-21 22:31:11 -0800 | [diff] [blame] | 1707 | /* Invalidate both kernel TSBs. */ |
David S. Miller | 8b23427 | 2006-02-17 18:01:02 -0800 | [diff] [blame] | 1708 | memset(swapper_tsb, 0x40, sizeof(swapper_tsb)); |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 1709 | #ifndef CONFIG_DEBUG_PAGEALLOC |
David S. Miller | d7744a0 | 2006-02-21 22:31:11 -0800 | [diff] [blame] | 1710 | memset(swapper_4m_tsb, 0x40, sizeof(swapper_4m_tsb)); |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 1711 | #endif |
David S. Miller | 8b23427 | 2006-02-17 18:01:02 -0800 | [diff] [blame] | 1712 | |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 1713 | if (tlb_type == hypervisor) |
| 1714 | sun4v_pgprot_init(); |
| 1715 | else |
| 1716 | sun4u_pgprot_init(); |
| 1717 | |
David S. Miller | d257d5d | 2006-02-06 23:44:37 -0800 | [diff] [blame] | 1718 | if (tlb_type == cheetah_plus || |
| 1719 | tlb_type == hypervisor) |
David S. Miller | 517af33 | 2006-02-01 15:55:21 -0800 | [diff] [blame] | 1720 | tsb_phys_patch(); |
| 1721 | |
David S. Miller | 490384e | 2006-02-11 14:41:18 -0800 | [diff] [blame] | 1722 | if (tlb_type == hypervisor) { |
David S. Miller | d257d5d | 2006-02-06 23:44:37 -0800 | [diff] [blame] | 1723 | sun4v_patch_tlb_handlers(); |
David S. Miller | 490384e | 2006-02-11 14:41:18 -0800 | [diff] [blame] | 1724 | sun4v_ktsb_init(); |
| 1725 | } |
David S. Miller | d257d5d | 2006-02-06 23:44:37 -0800 | [diff] [blame] | 1726 | |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 1727 | memblock_init(); |
David S. Miller | 3b2a7e2 | 2008-02-13 18:13:20 -0800 | [diff] [blame] | 1728 | |
David S. Miller | a94a172 | 2008-05-11 21:04:48 -0700 | [diff] [blame] | 1729 | /* Find available physical memory... |
| 1730 | * |
| 1731 | * Read it twice in order to work around a bug in openfirmware. |
| 1732 | * The call to grab this table itself can cause openfirmware to |
| 1733 | * allocate memory, which in turn can take away some space from |
| 1734 | * the list of available memory. Reading it twice makes sure |
| 1735 | * we really do get the final value. |
| 1736 | */ |
| 1737 | read_obp_translations(); |
| 1738 | read_obp_memory("reg", &pall[0], &pall_ents); |
| 1739 | read_obp_memory("available", &pavail[0], &pavail_ents); |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 1740 | read_obp_memory("available", &pavail[0], &pavail_ents); |
David S. Miller | 0836a0e | 2005-09-28 21:38:08 -0700 | [diff] [blame] | 1741 | |
| 1742 | phys_base = 0xffffffffffffffffUL; |
David S. Miller | 3b2a7e2 | 2008-02-13 18:13:20 -0800 | [diff] [blame] | 1743 | for (i = 0; i < pavail_ents; i++) { |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 1744 | phys_base = min(phys_base, pavail[i].phys_addr); |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 1745 | memblock_add(pavail[i].phys_addr, pavail[i].reg_size); |
David S. Miller | 3b2a7e2 | 2008-02-13 18:13:20 -0800 | [diff] [blame] | 1746 | } |
| 1747 | |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 1748 | memblock_reserve(kern_base, kern_size); |
David S. Miller | 0836a0e | 2005-09-28 21:38:08 -0700 | [diff] [blame] | 1749 | |
David S. Miller | 4e82c9a | 2008-02-13 18:00:03 -0800 | [diff] [blame] | 1750 | find_ramdisk(phys_base); |
| 1751 | |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 1752 | memblock_enforce_memory_limit(cmdline_memory_size); |
David S. Miller | 25b0c65 | 2008-02-13 18:20:14 -0800 | [diff] [blame] | 1753 | |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 1754 | memblock_analyze(); |
| 1755 | memblock_dump_all(); |
David S. Miller | 3b2a7e2 | 2008-02-13 18:13:20 -0800 | [diff] [blame] | 1756 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1757 | set_bit(0, mmu_context_bmap); |
| 1758 | |
David S. Miller | 2bdb3cb | 2005-09-22 01:08:57 -0700 | [diff] [blame] | 1759 | shift = kern_base + PAGE_OFFSET - ((unsigned long)KERNBASE); |
| 1760 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1761 | real_end = (unsigned long)_end; |
David S. Miller | 6465874 | 2008-03-21 17:01:38 -0700 | [diff] [blame] | 1762 | num_kernel_image_mappings = DIV_ROUND_UP(real_end - KERNBASE, 1 << 22); |
| 1763 | printk("Kernel: Using %d locked TLB entries for main kernel image.\n", |
| 1764 | num_kernel_image_mappings); |
David S. Miller | 2bdb3cb | 2005-09-22 01:08:57 -0700 | [diff] [blame] | 1765 | |
| 1766 | /* Set kernel pgd to upper alias so physical page computations |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1767 | * work. |
| 1768 | */ |
| 1769 | init_mm.pgd += ((shift) / (sizeof(pgd_t))); |
| 1770 | |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1771 | memset(swapper_low_pmd_dir, 0, sizeof(swapper_low_pmd_dir)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1772 | |
| 1773 | /* Now can init the kernel/bad page tables. */ |
| 1774 | pud_set(pud_offset(&swapper_pg_dir[0], 0), |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1775 | swapper_low_pmd_dir + (shift / sizeof(pgd_t))); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1776 | |
David S. Miller | c9c1083 | 2005-10-12 12:22:46 -0700 | [diff] [blame] | 1777 | inherit_prom_mappings(); |
David S. Miller | 5085b4a | 2005-09-22 00:45:41 -0700 | [diff] [blame] | 1778 | |
David S. Miller | 8f361453 | 2007-12-13 06:13:38 -0800 | [diff] [blame] | 1779 | init_kpte_bitmap(); |
| 1780 | |
David S. Miller | a8b900d | 2006-01-31 18:33:37 -0800 | [diff] [blame] | 1781 | /* Ok, we can use our TLB miss and window trap handlers safely. */ |
| 1782 | setup_tba(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1783 | |
David S. Miller | c9c1083 | 2005-10-12 12:22:46 -0700 | [diff] [blame] | 1784 | __flush_tlb_all(); |
David S. Miller | 9ad98c5 | 2005-10-05 15:12:00 -0700 | [diff] [blame] | 1785 | |
David S. Miller | 490384e | 2006-02-11 14:41:18 -0800 | [diff] [blame] | 1786 | if (tlb_type == hypervisor) |
| 1787 | sun4v_ktsb_register(); |
| 1788 | |
David S. Miller | ad07200 | 2008-02-13 19:21:51 -0800 | [diff] [blame] | 1789 | prom_build_devicetree(); |
David S. Miller | b696fdc | 2009-05-26 22:37:25 -0700 | [diff] [blame] | 1790 | of_populate_present_mask(); |
David S. Miller | b99c6eb | 2009-06-18 01:44:19 -0700 | [diff] [blame] | 1791 | #ifndef CONFIG_SMP |
| 1792 | of_fill_in_cpu_data(); |
| 1793 | #endif |
David S. Miller | ad07200 | 2008-02-13 19:21:51 -0800 | [diff] [blame] | 1794 | |
David S. Miller | 890db40 | 2009-04-01 03:13:15 -0700 | [diff] [blame] | 1795 | if (tlb_type == hypervisor) { |
David S. Miller | 4a28333 | 2008-02-13 19:22:23 -0800 | [diff] [blame] | 1796 | sun4v_mdesc_init(); |
Stephen Rothwell | 6ac5c61 | 2009-06-15 03:06:18 -0700 | [diff] [blame] | 1797 | mdesc_populate_present_mask(cpu_all_mask); |
David S. Miller | b99c6eb | 2009-06-18 01:44:19 -0700 | [diff] [blame] | 1798 | #ifndef CONFIG_SMP |
| 1799 | mdesc_fill_in_cpu_data(cpu_all_mask); |
| 1800 | #endif |
David S. Miller | 890db40 | 2009-04-01 03:13:15 -0700 | [diff] [blame] | 1801 | } |
David S. Miller | 4a28333 | 2008-02-13 19:22:23 -0800 | [diff] [blame] | 1802 | |
David S. Miller | 4f70f7a | 2008-08-12 18:33:56 -0700 | [diff] [blame] | 1803 | /* Once the OF device tree and MDESC have been setup, we know |
| 1804 | * the list of possible cpus. Therefore we can allocate the |
| 1805 | * IRQ stacks. |
| 1806 | */ |
| 1807 | for_each_possible_cpu(i) { |
| 1808 | /* XXX Use node local allocations... XXX */ |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 1809 | softirq_stack[i] = __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); |
| 1810 | hardirq_stack[i] = __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); |
David S. Miller | 4f70f7a | 2008-08-12 18:33:56 -0700 | [diff] [blame] | 1811 | } |
| 1812 | |
David S. Miller | 2bdb3cb | 2005-09-22 01:08:57 -0700 | [diff] [blame] | 1813 | /* Setup bootmem... */ |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1814 | last_valid_pfn = end_pfn = bootmem_init(phys_base); |
David S. Miller | d111201 | 2006-03-08 02:16:07 -0800 | [diff] [blame] | 1815 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1816 | #ifndef CONFIG_NEED_MULTIPLE_NODES |
David S. Miller | 17b0e19 | 2006-03-08 15:57:03 -0800 | [diff] [blame] | 1817 | max_mapnr = last_valid_pfn; |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1818 | #endif |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1819 | kernel_physical_mapping_init(); |
David S. Miller | 5642530 | 2005-09-25 16:46:57 -0700 | [diff] [blame] | 1820 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1821 | { |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1822 | unsigned long max_zone_pfns[MAX_NR_ZONES]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1823 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1824 | memset(max_zone_pfns, 0, sizeof(max_zone_pfns)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1825 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1826 | max_zone_pfns[ZONE_NORMAL] = end_pfn; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1827 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1828 | free_area_init_nodes(max_zone_pfns); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1829 | } |
| 1830 | |
David S. Miller | 3c62a2d | 2008-02-17 23:22:50 -0800 | [diff] [blame] | 1831 | printk("Booting Linux...\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1832 | } |
| 1833 | |
David S. Miller | 9a2ed5c | 2009-04-07 01:03:58 -0700 | [diff] [blame] | 1834 | int __devinit page_in_phys_avail(unsigned long paddr) |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1835 | { |
| 1836 | int i; |
| 1837 | |
| 1838 | paddr &= PAGE_MASK; |
| 1839 | |
| 1840 | for (i = 0; i < pavail_ents; i++) { |
| 1841 | unsigned long start, end; |
| 1842 | |
| 1843 | start = pavail[i].phys_addr; |
| 1844 | end = start + pavail[i].reg_size; |
| 1845 | |
| 1846 | if (paddr >= start && paddr < end) |
| 1847 | return 1; |
| 1848 | } |
| 1849 | if (paddr >= kern_base && paddr < (kern_base + kern_size)) |
| 1850 | return 1; |
| 1851 | #ifdef CONFIG_BLK_DEV_INITRD |
| 1852 | if (paddr >= __pa(initrd_start) && |
| 1853 | paddr < __pa(PAGE_ALIGN(initrd_end))) |
| 1854 | return 1; |
| 1855 | #endif |
| 1856 | |
| 1857 | return 0; |
| 1858 | } |
| 1859 | |
| 1860 | static struct linux_prom64_registers pavail_rescan[MAX_BANKS] __initdata; |
| 1861 | static int pavail_rescan_ents __initdata; |
| 1862 | |
| 1863 | /* Certain OBP calls, such as fetching "available" properties, can |
| 1864 | * claim physical memory. So, along with initializing the valid |
| 1865 | * address bitmap, what we do here is refetch the physical available |
| 1866 | * memory list again, and make sure it provides at least as much |
| 1867 | * memory as 'pavail' does. |
| 1868 | */ |
David S. Miller | d8ed1d4 | 2009-08-25 16:47:46 -0700 | [diff] [blame] | 1869 | static void __init setup_valid_addr_bitmap_from_pavail(unsigned long *bitmap) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1870 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1871 | int i; |
| 1872 | |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 1873 | read_obp_memory("available", &pavail_rescan[0], &pavail_rescan_ents); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1874 | |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 1875 | for (i = 0; i < pavail_ents; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1876 | unsigned long old_start, old_end; |
| 1877 | |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 1878 | old_start = pavail[i].phys_addr; |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1879 | old_end = old_start + pavail[i].reg_size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1880 | while (old_start < old_end) { |
| 1881 | int n; |
| 1882 | |
David S. Miller | c2a5a46 | 2006-06-22 00:01:56 -0700 | [diff] [blame] | 1883 | for (n = 0; n < pavail_rescan_ents; n++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1884 | unsigned long new_start, new_end; |
| 1885 | |
David S. Miller | 13edad7 | 2005-09-29 17:58:26 -0700 | [diff] [blame] | 1886 | new_start = pavail_rescan[n].phys_addr; |
| 1887 | new_end = new_start + |
| 1888 | pavail_rescan[n].reg_size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1889 | |
| 1890 | if (new_start <= old_start && |
| 1891 | new_end >= (old_start + PAGE_SIZE)) { |
David S. Miller | d8ed1d4 | 2009-08-25 16:47:46 -0700 | [diff] [blame] | 1892 | set_bit(old_start >> 22, bitmap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1893 | goto do_next_page; |
| 1894 | } |
| 1895 | } |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1896 | |
| 1897 | prom_printf("mem_init: Lost memory in pavail\n"); |
| 1898 | prom_printf("mem_init: OLD start[%lx] size[%lx]\n", |
| 1899 | pavail[i].phys_addr, |
| 1900 | pavail[i].reg_size); |
| 1901 | prom_printf("mem_init: NEW start[%lx] size[%lx]\n", |
| 1902 | pavail_rescan[i].phys_addr, |
| 1903 | pavail_rescan[i].reg_size); |
| 1904 | prom_printf("mem_init: Cannot continue, aborting.\n"); |
| 1905 | prom_halt(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1906 | |
| 1907 | do_next_page: |
| 1908 | old_start += PAGE_SIZE; |
| 1909 | } |
| 1910 | } |
| 1911 | } |
| 1912 | |
David S. Miller | d8ed1d4 | 2009-08-25 16:47:46 -0700 | [diff] [blame] | 1913 | static void __init patch_tlb_miss_handler_bitmap(void) |
| 1914 | { |
| 1915 | extern unsigned int valid_addr_bitmap_insn[]; |
| 1916 | extern unsigned int valid_addr_bitmap_patch[]; |
| 1917 | |
| 1918 | valid_addr_bitmap_insn[1] = valid_addr_bitmap_patch[1]; |
| 1919 | mb(); |
| 1920 | valid_addr_bitmap_insn[0] = valid_addr_bitmap_patch[0]; |
| 1921 | flushi(&valid_addr_bitmap_insn[0]); |
| 1922 | } |
| 1923 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1924 | void __init mem_init(void) |
| 1925 | { |
| 1926 | unsigned long codepages, datapages, initpages; |
| 1927 | unsigned long addr, last; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1928 | |
| 1929 | addr = PAGE_OFFSET + kern_base; |
| 1930 | last = PAGE_ALIGN(kern_size) + addr; |
| 1931 | while (addr < last) { |
| 1932 | set_bit(__pa(addr) >> 22, sparc64_valid_addr_bitmap); |
| 1933 | addr += PAGE_SIZE; |
| 1934 | } |
| 1935 | |
David S. Miller | d8ed1d4 | 2009-08-25 16:47:46 -0700 | [diff] [blame] | 1936 | setup_valid_addr_bitmap_from_pavail(sparc64_valid_addr_bitmap); |
| 1937 | patch_tlb_miss_handler_bitmap(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1938 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1939 | high_memory = __va(last_valid_pfn << PAGE_SHIFT); |
| 1940 | |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1941 | #ifdef CONFIG_NEED_MULTIPLE_NODES |
David S. Miller | d8ed1d4 | 2009-08-25 16:47:46 -0700 | [diff] [blame] | 1942 | { |
| 1943 | int i; |
| 1944 | for_each_online_node(i) { |
| 1945 | if (NODE_DATA(i)->node_spanned_pages != 0) { |
| 1946 | totalram_pages += |
| 1947 | free_all_bootmem_node(NODE_DATA(i)); |
| 1948 | } |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1949 | } |
| 1950 | } |
| 1951 | #else |
| 1952 | totalram_pages = free_all_bootmem(); |
| 1953 | #endif |
| 1954 | |
David S. Miller | f1cfdb5 | 2007-03-15 22:52:18 -0700 | [diff] [blame] | 1955 | /* We subtract one to account for the mem_map_zero page |
| 1956 | * allocated below. |
| 1957 | */ |
David S. Miller | 919ee67 | 2008-04-23 05:40:25 -0700 | [diff] [blame] | 1958 | totalram_pages -= 1; |
| 1959 | num_physpages = totalram_pages; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1960 | |
| 1961 | /* |
| 1962 | * Set up the zero page, mark it reserved, so that page count |
| 1963 | * is not manipulated when freeing the page from user ptes. |
| 1964 | */ |
| 1965 | mem_map_zero = alloc_pages(GFP_KERNEL|__GFP_ZERO, 0); |
| 1966 | if (mem_map_zero == NULL) { |
| 1967 | prom_printf("paging_init: Cannot alloc zero page.\n"); |
| 1968 | prom_halt(); |
| 1969 | } |
| 1970 | SetPageReserved(mem_map_zero); |
| 1971 | |
| 1972 | codepages = (((unsigned long) _etext) - ((unsigned long) _start)); |
| 1973 | codepages = PAGE_ALIGN(codepages) >> PAGE_SHIFT; |
| 1974 | datapages = (((unsigned long) _edata) - ((unsigned long) _etext)); |
| 1975 | datapages = PAGE_ALIGN(datapages) >> PAGE_SHIFT; |
| 1976 | initpages = (((unsigned long) __init_end) - ((unsigned long) __init_begin)); |
| 1977 | initpages = PAGE_ALIGN(initpages) >> PAGE_SHIFT; |
| 1978 | |
Christoph Lameter | 9617729 | 2007-02-10 01:43:03 -0800 | [diff] [blame] | 1979 | printk("Memory: %luk available (%ldk kernel code, %ldk data, %ldk init) [%016lx,%016lx]\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1980 | nr_free_pages() << (PAGE_SHIFT-10), |
| 1981 | codepages << (PAGE_SHIFT-10), |
| 1982 | datapages << (PAGE_SHIFT-10), |
| 1983 | initpages << (PAGE_SHIFT-10), |
| 1984 | PAGE_OFFSET, (last_valid_pfn << PAGE_SHIFT)); |
| 1985 | |
| 1986 | if (tlb_type == cheetah || tlb_type == cheetah_plus) |
| 1987 | cheetah_ecache_flush_init(); |
| 1988 | } |
| 1989 | |
David S. Miller | 898cf0e | 2005-09-23 11:59:44 -0700 | [diff] [blame] | 1990 | void free_initmem(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1991 | { |
| 1992 | unsigned long addr, initend; |
David S. Miller | f2b6079 | 2008-08-14 01:45:41 -0700 | [diff] [blame] | 1993 | int do_free = 1; |
| 1994 | |
| 1995 | /* If the physical memory maps were trimmed by kernel command |
| 1996 | * line options, don't even try freeing this initmem stuff up. |
| 1997 | * The kernel image could have been in the trimmed out region |
| 1998 | * and if so the freeing below will free invalid page structs. |
| 1999 | */ |
| 2000 | if (cmdline_memory_size) |
| 2001 | do_free = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2002 | |
| 2003 | /* |
| 2004 | * The init section is aligned to 8k in vmlinux.lds. Page align for >8k pagesizes. |
| 2005 | */ |
| 2006 | addr = PAGE_ALIGN((unsigned long)(__init_begin)); |
| 2007 | initend = (unsigned long)(__init_end) & PAGE_MASK; |
| 2008 | for (; addr < initend; addr += PAGE_SIZE) { |
| 2009 | unsigned long page; |
| 2010 | struct page *p; |
| 2011 | |
| 2012 | page = (addr + |
| 2013 | ((unsigned long) __va(kern_base)) - |
| 2014 | ((unsigned long) KERNBASE)); |
Randy Dunlap | c9cf552 | 2006-06-27 02:53:52 -0700 | [diff] [blame] | 2015 | memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2016 | |
David S. Miller | f2b6079 | 2008-08-14 01:45:41 -0700 | [diff] [blame] | 2017 | if (do_free) { |
| 2018 | p = virt_to_page(page); |
| 2019 | |
| 2020 | ClearPageReserved(p); |
| 2021 | init_page_count(p); |
| 2022 | __free_page(p); |
| 2023 | num_physpages++; |
| 2024 | totalram_pages++; |
| 2025 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2026 | } |
| 2027 | } |
| 2028 | |
| 2029 | #ifdef CONFIG_BLK_DEV_INITRD |
| 2030 | void free_initrd_mem(unsigned long start, unsigned long end) |
| 2031 | { |
| 2032 | if (start < end) |
| 2033 | printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10); |
| 2034 | for (; start < end; start += PAGE_SIZE) { |
| 2035 | struct page *p = virt_to_page(start); |
| 2036 | |
| 2037 | ClearPageReserved(p); |
Nick Piggin | 7835e98 | 2006-03-22 00:08:40 -0800 | [diff] [blame] | 2038 | init_page_count(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2039 | __free_page(p); |
| 2040 | num_physpages++; |
| 2041 | totalram_pages++; |
| 2042 | } |
| 2043 | } |
| 2044 | #endif |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2045 | |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2046 | #define _PAGE_CACHE_4U (_PAGE_CP_4U | _PAGE_CV_4U) |
| 2047 | #define _PAGE_CACHE_4V (_PAGE_CP_4V | _PAGE_CV_4V) |
| 2048 | #define __DIRTY_BITS_4U (_PAGE_MODIFIED_4U | _PAGE_WRITE_4U | _PAGE_W_4U) |
| 2049 | #define __DIRTY_BITS_4V (_PAGE_MODIFIED_4V | _PAGE_WRITE_4V | _PAGE_W_4V) |
| 2050 | #define __ACCESS_BITS_4U (_PAGE_ACCESSED_4U | _PAGE_READ_4U | _PAGE_R) |
| 2051 | #define __ACCESS_BITS_4V (_PAGE_ACCESSED_4V | _PAGE_READ_4V | _PAGE_R) |
| 2052 | |
| 2053 | pgprot_t PAGE_KERNEL __read_mostly; |
| 2054 | EXPORT_SYMBOL(PAGE_KERNEL); |
| 2055 | |
| 2056 | pgprot_t PAGE_KERNEL_LOCKED __read_mostly; |
| 2057 | pgprot_t PAGE_COPY __read_mostly; |
David S. Miller | 0f15952 | 2006-02-18 12:43:16 -0800 | [diff] [blame] | 2058 | |
| 2059 | pgprot_t PAGE_SHARED __read_mostly; |
| 2060 | EXPORT_SYMBOL(PAGE_SHARED); |
| 2061 | |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2062 | unsigned long pg_iobits __read_mostly; |
| 2063 | |
| 2064 | unsigned long _PAGE_IE __read_mostly; |
David S. Miller | 987c74f | 2006-06-25 01:34:43 -0700 | [diff] [blame] | 2065 | EXPORT_SYMBOL(_PAGE_IE); |
David S. Miller | b2bef44 | 2006-02-23 01:55:55 -0800 | [diff] [blame] | 2066 | |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2067 | unsigned long _PAGE_E __read_mostly; |
David S. Miller | b2bef44 | 2006-02-23 01:55:55 -0800 | [diff] [blame] | 2068 | EXPORT_SYMBOL(_PAGE_E); |
| 2069 | |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2070 | unsigned long _PAGE_CACHE __read_mostly; |
David S. Miller | b2bef44 | 2006-02-23 01:55:55 -0800 | [diff] [blame] | 2071 | EXPORT_SYMBOL(_PAGE_CACHE); |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2072 | |
David Miller | 46644c2 | 2007-10-16 01:24:16 -0700 | [diff] [blame] | 2073 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
David Miller | 46644c2 | 2007-10-16 01:24:16 -0700 | [diff] [blame] | 2074 | unsigned long vmemmap_table[VMEMMAP_SIZE]; |
| 2075 | |
| 2076 | int __meminit vmemmap_populate(struct page *start, unsigned long nr, int node) |
| 2077 | { |
| 2078 | unsigned long vstart = (unsigned long) start; |
| 2079 | unsigned long vend = (unsigned long) (start + nr); |
| 2080 | unsigned long phys_start = (vstart - VMEMMAP_BASE); |
| 2081 | unsigned long phys_end = (vend - VMEMMAP_BASE); |
| 2082 | unsigned long addr = phys_start & VMEMMAP_CHUNK_MASK; |
| 2083 | unsigned long end = VMEMMAP_ALIGN(phys_end); |
| 2084 | unsigned long pte_base; |
| 2085 | |
| 2086 | pte_base = (_PAGE_VALID | _PAGE_SZ4MB_4U | |
| 2087 | _PAGE_CP_4U | _PAGE_CV_4U | |
| 2088 | _PAGE_P_4U | _PAGE_W_4U); |
| 2089 | if (tlb_type == hypervisor) |
| 2090 | pte_base = (_PAGE_VALID | _PAGE_SZ4MB_4V | |
| 2091 | _PAGE_CP_4V | _PAGE_CV_4V | |
| 2092 | _PAGE_P_4V | _PAGE_W_4V); |
| 2093 | |
| 2094 | for (; addr < end; addr += VMEMMAP_CHUNK) { |
| 2095 | unsigned long *vmem_pp = |
| 2096 | vmemmap_table + (addr >> VMEMMAP_CHUNK_SHIFT); |
| 2097 | void *block; |
| 2098 | |
| 2099 | if (!(*vmem_pp & _PAGE_VALID)) { |
| 2100 | block = vmemmap_alloc_block(1UL << 22, node); |
| 2101 | if (!block) |
| 2102 | return -ENOMEM; |
| 2103 | |
| 2104 | *vmem_pp = pte_base | __pa(block); |
| 2105 | |
| 2106 | printk(KERN_INFO "[%p-%p] page_structs=%lu " |
| 2107 | "node=%d entry=%lu/%lu\n", start, block, nr, |
| 2108 | node, |
| 2109 | addr >> VMEMMAP_CHUNK_SHIFT, |
Ben Hutchings | 33cd9df | 2010-04-03 13:58:45 -0700 | [diff] [blame] | 2110 | VMEMMAP_SIZE); |
David Miller | 46644c2 | 2007-10-16 01:24:16 -0700 | [diff] [blame] | 2111 | } |
| 2112 | } |
| 2113 | return 0; |
| 2114 | } |
| 2115 | #endif /* CONFIG_SPARSEMEM_VMEMMAP */ |
| 2116 | |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2117 | static void prot_init_common(unsigned long page_none, |
| 2118 | unsigned long page_shared, |
| 2119 | unsigned long page_copy, |
| 2120 | unsigned long page_readonly, |
| 2121 | unsigned long page_exec_bit) |
| 2122 | { |
| 2123 | PAGE_COPY = __pgprot(page_copy); |
David S. Miller | 0f15952 | 2006-02-18 12:43:16 -0800 | [diff] [blame] | 2124 | PAGE_SHARED = __pgprot(page_shared); |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2125 | |
| 2126 | protection_map[0x0] = __pgprot(page_none); |
| 2127 | protection_map[0x1] = __pgprot(page_readonly & ~page_exec_bit); |
| 2128 | protection_map[0x2] = __pgprot(page_copy & ~page_exec_bit); |
| 2129 | protection_map[0x3] = __pgprot(page_copy & ~page_exec_bit); |
| 2130 | protection_map[0x4] = __pgprot(page_readonly); |
| 2131 | protection_map[0x5] = __pgprot(page_readonly); |
| 2132 | protection_map[0x6] = __pgprot(page_copy); |
| 2133 | protection_map[0x7] = __pgprot(page_copy); |
| 2134 | protection_map[0x8] = __pgprot(page_none); |
| 2135 | protection_map[0x9] = __pgprot(page_readonly & ~page_exec_bit); |
| 2136 | protection_map[0xa] = __pgprot(page_shared & ~page_exec_bit); |
| 2137 | protection_map[0xb] = __pgprot(page_shared & ~page_exec_bit); |
| 2138 | protection_map[0xc] = __pgprot(page_readonly); |
| 2139 | protection_map[0xd] = __pgprot(page_readonly); |
| 2140 | protection_map[0xe] = __pgprot(page_shared); |
| 2141 | protection_map[0xf] = __pgprot(page_shared); |
| 2142 | } |
| 2143 | |
| 2144 | static void __init sun4u_pgprot_init(void) |
| 2145 | { |
| 2146 | unsigned long page_none, page_shared, page_copy, page_readonly; |
| 2147 | unsigned long page_exec_bit; |
| 2148 | |
| 2149 | PAGE_KERNEL = __pgprot (_PAGE_PRESENT_4U | _PAGE_VALID | |
| 2150 | _PAGE_CACHE_4U | _PAGE_P_4U | |
| 2151 | __ACCESS_BITS_4U | __DIRTY_BITS_4U | |
| 2152 | _PAGE_EXEC_4U); |
| 2153 | PAGE_KERNEL_LOCKED = __pgprot (_PAGE_PRESENT_4U | _PAGE_VALID | |
| 2154 | _PAGE_CACHE_4U | _PAGE_P_4U | |
| 2155 | __ACCESS_BITS_4U | __DIRTY_BITS_4U | |
| 2156 | _PAGE_EXEC_4U | _PAGE_L_4U); |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2157 | |
| 2158 | _PAGE_IE = _PAGE_IE_4U; |
| 2159 | _PAGE_E = _PAGE_E_4U; |
| 2160 | _PAGE_CACHE = _PAGE_CACHE_4U; |
| 2161 | |
| 2162 | pg_iobits = (_PAGE_VALID | _PAGE_PRESENT_4U | __DIRTY_BITS_4U | |
| 2163 | __ACCESS_BITS_4U | _PAGE_E_4U); |
| 2164 | |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 2165 | #ifdef CONFIG_DEBUG_PAGEALLOC |
| 2166 | kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZBITS_4U) ^ |
David S. Miller | af1ee56 | 2008-09-12 00:19:21 -0700 | [diff] [blame] | 2167 | 0xfffff80000000000UL; |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 2168 | #else |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 2169 | kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4U) ^ |
David S. Miller | af1ee56 | 2008-09-12 00:19:21 -0700 | [diff] [blame] | 2170 | 0xfffff80000000000UL; |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 2171 | #endif |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 2172 | kern_linear_pte_xor[0] |= (_PAGE_CP_4U | _PAGE_CV_4U | |
| 2173 | _PAGE_P_4U | _PAGE_W_4U); |
| 2174 | |
| 2175 | /* XXX Should use 256MB on Panther. XXX */ |
| 2176 | kern_linear_pte_xor[1] = kern_linear_pte_xor[0]; |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2177 | |
| 2178 | _PAGE_SZBITS = _PAGE_SZBITS_4U; |
| 2179 | _PAGE_ALL_SZ_BITS = (_PAGE_SZ4MB_4U | _PAGE_SZ512K_4U | |
| 2180 | _PAGE_SZ64K_4U | _PAGE_SZ8K_4U | |
| 2181 | _PAGE_SZ32MB_4U | _PAGE_SZ256MB_4U); |
| 2182 | |
| 2183 | |
| 2184 | page_none = _PAGE_PRESENT_4U | _PAGE_ACCESSED_4U | _PAGE_CACHE_4U; |
| 2185 | page_shared = (_PAGE_VALID | _PAGE_PRESENT_4U | _PAGE_CACHE_4U | |
| 2186 | __ACCESS_BITS_4U | _PAGE_WRITE_4U | _PAGE_EXEC_4U); |
| 2187 | page_copy = (_PAGE_VALID | _PAGE_PRESENT_4U | _PAGE_CACHE_4U | |
| 2188 | __ACCESS_BITS_4U | _PAGE_EXEC_4U); |
| 2189 | page_readonly = (_PAGE_VALID | _PAGE_PRESENT_4U | _PAGE_CACHE_4U | |
| 2190 | __ACCESS_BITS_4U | _PAGE_EXEC_4U); |
| 2191 | |
| 2192 | page_exec_bit = _PAGE_EXEC_4U; |
| 2193 | |
| 2194 | prot_init_common(page_none, page_shared, page_copy, page_readonly, |
| 2195 | page_exec_bit); |
| 2196 | } |
| 2197 | |
| 2198 | static void __init sun4v_pgprot_init(void) |
| 2199 | { |
| 2200 | unsigned long page_none, page_shared, page_copy, page_readonly; |
| 2201 | unsigned long page_exec_bit; |
| 2202 | |
| 2203 | PAGE_KERNEL = __pgprot (_PAGE_PRESENT_4V | _PAGE_VALID | |
| 2204 | _PAGE_CACHE_4V | _PAGE_P_4V | |
| 2205 | __ACCESS_BITS_4V | __DIRTY_BITS_4V | |
| 2206 | _PAGE_EXEC_4V); |
| 2207 | PAGE_KERNEL_LOCKED = PAGE_KERNEL; |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2208 | |
| 2209 | _PAGE_IE = _PAGE_IE_4V; |
| 2210 | _PAGE_E = _PAGE_E_4V; |
| 2211 | _PAGE_CACHE = _PAGE_CACHE_4V; |
| 2212 | |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 2213 | #ifdef CONFIG_DEBUG_PAGEALLOC |
| 2214 | kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZBITS_4V) ^ |
David S. Miller | af1ee56 | 2008-09-12 00:19:21 -0700 | [diff] [blame] | 2215 | 0xfffff80000000000UL; |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 2216 | #else |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 2217 | kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4V) ^ |
David S. Miller | af1ee56 | 2008-09-12 00:19:21 -0700 | [diff] [blame] | 2218 | 0xfffff80000000000UL; |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 2219 | #endif |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 2220 | kern_linear_pte_xor[0] |= (_PAGE_CP_4V | _PAGE_CV_4V | |
| 2221 | _PAGE_P_4V | _PAGE_W_4V); |
| 2222 | |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 2223 | #ifdef CONFIG_DEBUG_PAGEALLOC |
| 2224 | kern_linear_pte_xor[1] = (_PAGE_VALID | _PAGE_SZBITS_4V) ^ |
David S. Miller | af1ee56 | 2008-09-12 00:19:21 -0700 | [diff] [blame] | 2225 | 0xfffff80000000000UL; |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 2226 | #else |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 2227 | kern_linear_pte_xor[1] = (_PAGE_VALID | _PAGE_SZ256MB_4V) ^ |
David S. Miller | af1ee56 | 2008-09-12 00:19:21 -0700 | [diff] [blame] | 2228 | 0xfffff80000000000UL; |
David S. Miller | d1acb42 | 2007-03-16 17:20:28 -0700 | [diff] [blame] | 2229 | #endif |
David S. Miller | 9cc3a1a | 2006-02-21 20:51:13 -0800 | [diff] [blame] | 2230 | kern_linear_pte_xor[1] |= (_PAGE_CP_4V | _PAGE_CV_4V | |
| 2231 | _PAGE_P_4V | _PAGE_W_4V); |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2232 | |
| 2233 | pg_iobits = (_PAGE_VALID | _PAGE_PRESENT_4V | __DIRTY_BITS_4V | |
| 2234 | __ACCESS_BITS_4V | _PAGE_E_4V); |
| 2235 | |
| 2236 | _PAGE_SZBITS = _PAGE_SZBITS_4V; |
| 2237 | _PAGE_ALL_SZ_BITS = (_PAGE_SZ16GB_4V | _PAGE_SZ2GB_4V | |
| 2238 | _PAGE_SZ256MB_4V | _PAGE_SZ32MB_4V | |
| 2239 | _PAGE_SZ4MB_4V | _PAGE_SZ512K_4V | |
| 2240 | _PAGE_SZ64K_4V | _PAGE_SZ8K_4V); |
| 2241 | |
| 2242 | page_none = _PAGE_PRESENT_4V | _PAGE_ACCESSED_4V | _PAGE_CACHE_4V; |
| 2243 | page_shared = (_PAGE_VALID | _PAGE_PRESENT_4V | _PAGE_CACHE_4V | |
| 2244 | __ACCESS_BITS_4V | _PAGE_WRITE_4V | _PAGE_EXEC_4V); |
| 2245 | page_copy = (_PAGE_VALID | _PAGE_PRESENT_4V | _PAGE_CACHE_4V | |
| 2246 | __ACCESS_BITS_4V | _PAGE_EXEC_4V); |
| 2247 | page_readonly = (_PAGE_VALID | _PAGE_PRESENT_4V | _PAGE_CACHE_4V | |
| 2248 | __ACCESS_BITS_4V | _PAGE_EXEC_4V); |
| 2249 | |
| 2250 | page_exec_bit = _PAGE_EXEC_4V; |
| 2251 | |
| 2252 | prot_init_common(page_none, page_shared, page_copy, page_readonly, |
| 2253 | page_exec_bit); |
| 2254 | } |
| 2255 | |
| 2256 | unsigned long pte_sz_bits(unsigned long sz) |
| 2257 | { |
| 2258 | if (tlb_type == hypervisor) { |
| 2259 | switch (sz) { |
| 2260 | case 8 * 1024: |
| 2261 | default: |
| 2262 | return _PAGE_SZ8K_4V; |
| 2263 | case 64 * 1024: |
| 2264 | return _PAGE_SZ64K_4V; |
| 2265 | case 512 * 1024: |
| 2266 | return _PAGE_SZ512K_4V; |
| 2267 | case 4 * 1024 * 1024: |
| 2268 | return _PAGE_SZ4MB_4V; |
| 2269 | }; |
| 2270 | } else { |
| 2271 | switch (sz) { |
| 2272 | case 8 * 1024: |
| 2273 | default: |
| 2274 | return _PAGE_SZ8K_4U; |
| 2275 | case 64 * 1024: |
| 2276 | return _PAGE_SZ64K_4U; |
| 2277 | case 512 * 1024: |
| 2278 | return _PAGE_SZ512K_4U; |
| 2279 | case 4 * 1024 * 1024: |
| 2280 | return _PAGE_SZ4MB_4U; |
| 2281 | }; |
| 2282 | } |
| 2283 | } |
| 2284 | |
| 2285 | pte_t mk_pte_io(unsigned long page, pgprot_t prot, int space, unsigned long page_size) |
| 2286 | { |
| 2287 | pte_t pte; |
David S. Miller | cf62715 | 2006-02-12 21:10:07 -0800 | [diff] [blame] | 2288 | |
| 2289 | pte_val(pte) = page | pgprot_val(pgprot_noncached(prot)); |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2290 | pte_val(pte) |= (((unsigned long)space) << 32); |
| 2291 | pte_val(pte) |= pte_sz_bits(page_size); |
David S. Miller | cf62715 | 2006-02-12 21:10:07 -0800 | [diff] [blame] | 2292 | |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2293 | return pte; |
| 2294 | } |
| 2295 | |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2296 | static unsigned long kern_large_tte(unsigned long paddr) |
| 2297 | { |
| 2298 | unsigned long val; |
| 2299 | |
| 2300 | val = (_PAGE_VALID | _PAGE_SZ4MB_4U | |
| 2301 | _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_P_4U | |
| 2302 | _PAGE_EXEC_4U | _PAGE_L_4U | _PAGE_W_4U); |
| 2303 | if (tlb_type == hypervisor) |
| 2304 | val = (_PAGE_VALID | _PAGE_SZ4MB_4V | |
| 2305 | _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_P_4V | |
| 2306 | _PAGE_EXEC_4V | _PAGE_W_4V); |
| 2307 | |
| 2308 | return val | paddr; |
| 2309 | } |
| 2310 | |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2311 | /* If not locked, zap it. */ |
| 2312 | void __flush_tlb_all(void) |
| 2313 | { |
| 2314 | unsigned long pstate; |
| 2315 | int i; |
| 2316 | |
| 2317 | __asm__ __volatile__("flushw\n\t" |
| 2318 | "rdpr %%pstate, %0\n\t" |
| 2319 | "wrpr %0, %1, %%pstate" |
| 2320 | : "=r" (pstate) |
| 2321 | : "i" (PSTATE_IE)); |
David S. Miller | 8f361453 | 2007-12-13 06:13:38 -0800 | [diff] [blame] | 2322 | if (tlb_type == hypervisor) { |
| 2323 | sun4v_mmu_demap_all(); |
| 2324 | } else if (tlb_type == spitfire) { |
David S. Miller | c4bce90 | 2006-02-11 21:57:54 -0800 | [diff] [blame] | 2325 | for (i = 0; i < 64; i++) { |
| 2326 | /* Spitfire Errata #32 workaround */ |
| 2327 | /* NOTE: Always runs on spitfire, so no |
| 2328 | * cheetah+ page size encodings. |
| 2329 | */ |
| 2330 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" |
| 2331 | "flush %%g6" |
| 2332 | : /* No outputs */ |
| 2333 | : "r" (0), |
| 2334 | "r" (PRIMARY_CONTEXT), "i" (ASI_DMMU)); |
| 2335 | |
| 2336 | if (!(spitfire_get_dtlb_data(i) & _PAGE_L_4U)) { |
| 2337 | __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" |
| 2338 | "membar #Sync" |
| 2339 | : /* no outputs */ |
| 2340 | : "r" (TLB_TAG_ACCESS), "i" (ASI_DMMU)); |
| 2341 | spitfire_put_dtlb_data(i, 0x0UL); |
| 2342 | } |
| 2343 | |
| 2344 | /* Spitfire Errata #32 workaround */ |
| 2345 | /* NOTE: Always runs on spitfire, so no |
| 2346 | * cheetah+ page size encodings. |
| 2347 | */ |
| 2348 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" |
| 2349 | "flush %%g6" |
| 2350 | : /* No outputs */ |
| 2351 | : "r" (0), |
| 2352 | "r" (PRIMARY_CONTEXT), "i" (ASI_DMMU)); |
| 2353 | |
| 2354 | if (!(spitfire_get_itlb_data(i) & _PAGE_L_4U)) { |
| 2355 | __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" |
| 2356 | "membar #Sync" |
| 2357 | : /* no outputs */ |
| 2358 | : "r" (TLB_TAG_ACCESS), "i" (ASI_IMMU)); |
| 2359 | spitfire_put_itlb_data(i, 0x0UL); |
| 2360 | } |
| 2361 | } |
| 2362 | } else if (tlb_type == cheetah || tlb_type == cheetah_plus) { |
| 2363 | cheetah_flush_dtlb_all(); |
| 2364 | cheetah_flush_itlb_all(); |
| 2365 | } |
| 2366 | __asm__ __volatile__("wrpr %0, 0, %%pstate" |
| 2367 | : : "r" (pstate)); |
| 2368 | } |