blob: 24a74d1ca7d9a73c77d77792402a1b12b65d7c89 [file] [log] [blame]
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/highmem.h>
10#include <linux/unistd.h>
11
12#include <asm/cacheflush.h>
13#include <asm/cachectl.h>
14#include <asm/processor.h>
15#include <asm/uaccess.h>
Jaswinder Singhc80ce2d2008-07-25 13:48:38 +053016#include <asm/syscalls.h>
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070017
18/*
19 * If you attempt to flush anything more than this, you need superuser
20 * privileges. The value is completely arbitrary.
21 */
22#define CACHEFLUSH_MAX_LEN 1024
23
24void invalidate_dcache_region(void *start, size_t size)
25{
David Brownell212868d2007-01-28 12:56:42 -080026 unsigned long v, begin, end, linesz, mask;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070027
28 linesz = boot_cpu_data.dcache.linesz;
David Brownell212868d2007-01-28 12:56:42 -080029 mask = linesz - 1;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070030
David Brownell212868d2007-01-28 12:56:42 -080031 /* when first and/or last cachelines are shared, flush them
32 * instead of invalidating ... never discard valid data!
33 */
34 begin = (unsigned long)start;
Haavard Skinnemoenab61f7d2007-06-18 14:08:18 +020035 end = begin + size;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070036
David Brownell212868d2007-01-28 12:56:42 -080037 if (begin & mask) {
38 flush_dcache_line(start);
39 begin += linesz;
David Brownell212868d2007-01-28 12:56:42 -080040 }
Haavard Skinnemoenab61f7d2007-06-18 14:08:18 +020041 if (end & mask) {
David Brownell212868d2007-01-28 12:56:42 -080042 flush_dcache_line((void *)end);
Haavard Skinnemoenab61f7d2007-06-18 14:08:18 +020043 end &= ~mask;
David Brownell212868d2007-01-28 12:56:42 -080044 }
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070045
David Brownell212868d2007-01-28 12:56:42 -080046 /* remaining cachelines only need invalidation */
Haavard Skinnemoenab61f7d2007-06-18 14:08:18 +020047 for (v = begin; v < end; v += linesz)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070048 invalidate_dcache_line((void *)v);
Haavard Skinnemoenab61f7d2007-06-18 14:08:18 +020049 flush_write_buffer();
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070050}
51
52void clean_dcache_region(void *start, size_t size)
53{
54 unsigned long v, begin, end, linesz;
55
56 linesz = boot_cpu_data.dcache.linesz;
57 begin = (unsigned long)start & ~(linesz - 1);
58 end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
59
60 for (v = begin; v < end; v += linesz)
61 clean_dcache_line((void *)v);
62 flush_write_buffer();
63}
64
65void flush_dcache_region(void *start, size_t size)
66{
67 unsigned long v, begin, end, linesz;
68
69 linesz = boot_cpu_data.dcache.linesz;
70 begin = (unsigned long)start & ~(linesz - 1);
71 end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
72
73 for (v = begin; v < end; v += linesz)
74 flush_dcache_line((void *)v);
75 flush_write_buffer();
76}
77
78void invalidate_icache_region(void *start, size_t size)
79{
80 unsigned long v, begin, end, linesz;
81
82 linesz = boot_cpu_data.icache.linesz;
83 begin = (unsigned long)start & ~(linesz - 1);
84 end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
85
86 for (v = begin; v < end; v += linesz)
87 invalidate_icache_line((void *)v);
88}
89
90static inline void __flush_icache_range(unsigned long start, unsigned long end)
91{
92 unsigned long v, linesz;
93
94 linesz = boot_cpu_data.dcache.linesz;
95 for (v = start; v < end; v += linesz) {
96 clean_dcache_line((void *)v);
97 invalidate_icache_line((void *)v);
98 }
99
100 flush_write_buffer();
101}
102
103/*
104 * This one is called after a module has been loaded.
105 */
106void flush_icache_range(unsigned long start, unsigned long end)
107{
108 unsigned long linesz;
109
110 linesz = boot_cpu_data.dcache.linesz;
111 __flush_icache_range(start & ~(linesz - 1),
112 (end + linesz - 1) & ~(linesz - 1));
113}
114
115/*
116 * This one is called from do_no_page(), do_swap_page() and install_page().
117 */
118void flush_icache_page(struct vm_area_struct *vma, struct page *page)
119{
120 if (vma->vm_flags & VM_EXEC) {
Haavard Skinnemoen28c1d392007-03-01 16:32:31 +0100121 void *v = page_address(page);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700122 __flush_icache_range((unsigned long)v, (unsigned long)v + PAGE_SIZE);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700123 }
124}
125
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700126asmlinkage int sys_cacheflush(int operation, void __user *addr, size_t len)
127{
128 int ret;
129
130 if (len > CACHEFLUSH_MAX_LEN) {
131 ret = -EPERM;
132 if (!capable(CAP_SYS_ADMIN))
133 goto out;
134 }
135
136 ret = -EFAULT;
137 if (!access_ok(VERIFY_WRITE, addr, len))
138 goto out;
139
140 switch (operation) {
141 case CACHE_IFLUSH:
142 flush_icache_range((unsigned long)addr,
143 (unsigned long)addr + len);
144 ret = 0;
145 break;
146 default:
147 ret = -EINVAL;
148 }
149
150out:
151 return ret;
152}
Haavard Skinnemoen68ca3e52007-12-03 18:04:11 +0100153
154void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
155 unsigned long vaddr, void *dst, const void *src,
156 unsigned long len)
157{
158 memcpy(dst, src, len);
159 if (vma->vm_flags & VM_EXEC)
160 flush_icache_range((unsigned long)dst,
161 (unsigned long)dst + len);
162}