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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Tony Lindgren3b59b6b2005-07-10 19:58:09 +01002 * linux/arch/arm/mach-omap1/time.c
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
4 * OMAP Timers
5 *
6 * Copyright (C) 2004 Nokia Corporation
Tony Lindgrenb3402cf2005-06-29 19:59:48 +01007 * Partial timer rewrite and additional dynamic tick timer support by
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 * Tony Lindgen <tony@atomide.com> and
9 * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
10 *
11 * MPU timer code based on the older MPU timer code for OMAP
12 * Copyright (C) 2000 RidgeRun, Inc.
13 * Author: Greg Lonnon <glonnon@ridgerun.com>
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 *
20 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
21 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
23 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
26 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
27 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * You should have received a copy of the GNU General Public License along
32 * with this program; if not, write to the Free Software Foundation, Inc.,
33 * 675 Mass Ave, Cambridge, MA 02139, USA.
34 */
35
Linus Torvalds1da177e2005-04-16 15:20:36 -070036#include <linux/kernel.h>
37#include <linux/init.h>
38#include <linux/delay.h>
39#include <linux/interrupt.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070040#include <linux/spinlock.h>
Kevin Hilman075192a2007-03-08 20:32:19 +010041#include <linux/clk.h>
42#include <linux/err.h>
43#include <linux/clocksource.h>
44#include <linux/clockchips.h>
Russell Kingfced80c2008-09-06 12:10:45 +010045#include <linux/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070046
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#include <asm/irq.h>
Tony Lindgrenf376ea12011-01-18 13:25:39 -080048#include <asm/sched_clock.h>
49
Tony Lindgren2e3ee9f2012-02-24 10:34:34 -080050#include <mach/hardware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#include <asm/mach/irq.h>
52#include <asm/mach/time.h>
53
Tony Lindgren2e3ee9f2012-02-24 10:34:34 -080054#include "iomap.h"
Tony Lindgren4e653312011-11-10 22:45:17 +010055#include "common.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070056
Tony Lindgren05b5ca92011-01-18 12:42:23 -080057#ifdef CONFIG_OMAP_MPU_TIMER
58
Linus Torvalds1da177e2005-04-16 15:20:36 -070059#define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE
60#define OMAP_MPU_TIMER_OFFSET 0x100
61
Linus Torvalds1da177e2005-04-16 15:20:36 -070062typedef struct {
63 u32 cntl; /* CNTL_TIMER, R/W */
64 u32 load_tim; /* LOAD_TIM, W */
65 u32 read_tim; /* READ_TIM, R */
66} omap_mpu_timer_regs_t;
67
Tony Lindgren94113262009-08-28 10:50:33 -070068#define omap_mpu_timer_base(n) \
Russell King111c7752011-05-09 09:45:45 +010069((omap_mpu_timer_regs_t __iomem *)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
Linus Torvalds1da177e2005-04-16 15:20:36 -070070 (n)*OMAP_MPU_TIMER_OFFSET))
71
Tony Lindgrenf376ea12011-01-18 13:25:39 -080072static inline unsigned long notrace omap_mpu_timer_read(int nr)
Linus Torvalds1da177e2005-04-16 15:20:36 -070073{
Russell King111c7752011-05-09 09:45:45 +010074 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
75 return readl(&timer->read_tim);
Linus Torvalds1da177e2005-04-16 15:20:36 -070076}
77
Kevin Hilman075192a2007-03-08 20:32:19 +010078static inline void omap_mpu_set_autoreset(int nr)
Linus Torvalds1da177e2005-04-16 15:20:36 -070079{
Russell King111c7752011-05-09 09:45:45 +010080 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
Linus Torvalds1da177e2005-04-16 15:20:36 -070081
Russell King111c7752011-05-09 09:45:45 +010082 writel(readl(&timer->cntl) | MPU_TIMER_AR, &timer->cntl);
Kevin Hilman075192a2007-03-08 20:32:19 +010083}
84
85static inline void omap_mpu_remove_autoreset(int nr)
86{
Russell King111c7752011-05-09 09:45:45 +010087 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
Kevin Hilman075192a2007-03-08 20:32:19 +010088
Russell King111c7752011-05-09 09:45:45 +010089 writel(readl(&timer->cntl) & ~MPU_TIMER_AR, &timer->cntl);
Kevin Hilman075192a2007-03-08 20:32:19 +010090}
91
92static inline void omap_mpu_timer_start(int nr, unsigned long load_val,
93 int autoreset)
94{
Russell King111c7752011-05-09 09:45:45 +010095 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
96 unsigned int timerflags = MPU_TIMER_CLOCK_ENABLE | MPU_TIMER_ST;
Kevin Hilman075192a2007-03-08 20:32:19 +010097
Russell King111c7752011-05-09 09:45:45 +010098 if (autoreset)
99 timerflags |= MPU_TIMER_AR;
Kevin Hilman075192a2007-03-08 20:32:19 +0100100
Russell King111c7752011-05-09 09:45:45 +0100101 writel(MPU_TIMER_CLOCK_ENABLE, &timer->cntl);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700102 udelay(1);
Russell King111c7752011-05-09 09:45:45 +0100103 writel(load_val, &timer->load_tim);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104 udelay(1);
Russell King111c7752011-05-09 09:45:45 +0100105 writel(timerflags, &timer->cntl);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106}
107
Kevin Hilman06cad092007-10-18 23:04:43 -0700108static inline void omap_mpu_timer_stop(int nr)
109{
Russell King111c7752011-05-09 09:45:45 +0100110 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
Kevin Hilman06cad092007-10-18 23:04:43 -0700111
Russell King111c7752011-05-09 09:45:45 +0100112 writel(readl(&timer->cntl) & ~MPU_TIMER_ST, &timer->cntl);
Kevin Hilman06cad092007-10-18 23:04:43 -0700113}
114
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115/*
Kevin Hilman075192a2007-03-08 20:32:19 +0100116 * ---------------------------------------------------------------------------
117 * MPU timer 1 ... count down to zero, interrupt, reload
118 * ---------------------------------------------------------------------------
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119 */
Kevin Hilman075192a2007-03-08 20:32:19 +0100120static int omap_mpu_set_next_event(unsigned long cycles,
Kevin Hilman06cad092007-10-18 23:04:43 -0700121 struct clock_event_device *evt)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700122{
Kevin Hilman075192a2007-03-08 20:32:19 +0100123 omap_mpu_timer_start(0, cycles, 0);
124 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125}
126
Kevin Hilman075192a2007-03-08 20:32:19 +0100127static void omap_mpu_set_mode(enum clock_event_mode mode,
128 struct clock_event_device *evt)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129{
Kevin Hilman075192a2007-03-08 20:32:19 +0100130 switch (mode) {
131 case CLOCK_EVT_MODE_PERIODIC:
132 omap_mpu_set_autoreset(0);
133 break;
134 case CLOCK_EVT_MODE_ONESHOT:
Kevin Hilman06cad092007-10-18 23:04:43 -0700135 omap_mpu_timer_stop(0);
Kevin Hilman075192a2007-03-08 20:32:19 +0100136 omap_mpu_remove_autoreset(0);
137 break;
138 case CLOCK_EVT_MODE_UNUSED:
139 case CLOCK_EVT_MODE_SHUTDOWN:
Thomas Gleixner18de5bc2007-07-21 04:37:34 -0700140 case CLOCK_EVT_MODE_RESUME:
Kevin Hilman075192a2007-03-08 20:32:19 +0100141 break;
142 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143}
144
Kevin Hilman075192a2007-03-08 20:32:19 +0100145static struct clock_event_device clockevent_mpu_timer1 = {
146 .name = "mpu_timer1",
Will Newtonc6b349e2008-03-11 09:47:43 +0000147 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
Kevin Hilman075192a2007-03-08 20:32:19 +0100148 .shift = 32,
149 .set_next_event = omap_mpu_set_next_event,
150 .set_mode = omap_mpu_set_mode,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151};
152
Linus Torvalds0cd61b62006-10-06 10:53:39 -0700153static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700154{
Kevin Hilman075192a2007-03-08 20:32:19 +0100155 struct clock_event_device *evt = &clockevent_mpu_timer1;
156
157 evt->event_handler(evt);
158
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159 return IRQ_HANDLED;
160}
161
162static struct irqaction omap_mpu_timer1_irq = {
Kevin Hilman075192a2007-03-08 20:32:19 +0100163 .name = "mpu_timer1",
Bernhard Walleb30faba2007-05-08 00:35:39 -0700164 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
Russell King09b8b5f2005-06-26 17:06:36 +0100165 .handler = omap_mpu_timer1_interrupt,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166};
167
Kevin Hilman075192a2007-03-08 20:32:19 +0100168static __init void omap_init_mpu_timer(unsigned long rate)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170 setup_irq(INT_TIMER1, &omap_mpu_timer1_irq);
Kevin Hilman075192a2007-03-08 20:32:19 +0100171 omap_mpu_timer_start(0, (rate / HZ) - 1, 1);
172
173 clockevent_mpu_timer1.mult = div_sc(rate, NSEC_PER_SEC,
174 clockevent_mpu_timer1.shift);
175 clockevent_mpu_timer1.max_delta_ns =
176 clockevent_delta2ns(-1, &clockevent_mpu_timer1);
177 clockevent_mpu_timer1.min_delta_ns =
178 clockevent_delta2ns(1, &clockevent_mpu_timer1);
179
Rusty Russell320ab2b2008-12-13 21:20:26 +1030180 clockevent_mpu_timer1.cpumask = cpumask_of(0);
Kevin Hilman075192a2007-03-08 20:32:19 +0100181 clockevents_register_device(&clockevent_mpu_timer1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182}
183
Kevin Hilman075192a2007-03-08 20:32:19 +0100184
185/*
186 * ---------------------------------------------------------------------------
187 * MPU timer 2 ... free running 32-bit clock source and scheduler clock
188 * ---------------------------------------------------------------------------
189 */
190
Marc Zyngier2f0778af2011-12-15 12:19:23 +0100191static u32 notrace omap_mpu_read_sched_clock(void)
Tony Lindgren4912cf02011-01-18 17:00:00 -0800192{
Marc Zyngier2f0778af2011-12-15 12:19:23 +0100193 return ~omap_mpu_timer_read(1);
Tony Lindgrenf376ea12011-01-18 13:25:39 -0800194}
195
Kevin Hilman075192a2007-03-08 20:32:19 +0100196static void __init omap_init_clocksource(unsigned long rate)
197{
Russell King933e54a2011-05-09 09:51:03 +0100198 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(1);
Kevin Hilman075192a2007-03-08 20:32:19 +0100199 static char err[] __initdata = KERN_ERR
200 "%s: can't register clocksource!\n";
201
Kevin Hilman075192a2007-03-08 20:32:19 +0100202 omap_mpu_timer_start(1, ~0, 1);
Marc Zyngier2f0778af2011-12-15 12:19:23 +0100203 setup_sched_clock(omap_mpu_read_sched_clock, 32, rate);
Kevin Hilman075192a2007-03-08 20:32:19 +0100204
Russell King933e54a2011-05-09 09:51:03 +0100205 if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate,
206 300, 32, clocksource_mmio_readl_down))
207 printk(err, "mpu_timer2");
Kevin Hilman075192a2007-03-08 20:32:19 +0100208}
209
Tony Lindgren05b5ca92011-01-18 12:42:23 -0800210static void __init omap_mpu_timer_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211{
Kevin Hilman075192a2007-03-08 20:32:19 +0100212 struct clk *ck_ref = clk_get(NULL, "ck_ref");
213 unsigned long rate;
214
215 BUG_ON(IS_ERR(ck_ref));
216
217 rate = clk_get_rate(ck_ref);
218 clk_put(ck_ref);
219
220 /* PTV = 0 */
221 rate /= 2;
222
223 omap_init_mpu_timer(rate);
224 omap_init_clocksource(rate);
Tony Lindgren05b5ca92011-01-18 12:42:23 -0800225}
226
227#else
228static inline void omap_mpu_timer_init(void)
229{
230 pr_err("Bogus timer, should not happen\n");
231}
232#endif /* CONFIG_OMAP_MPU_TIMER */
233
Tony Lindgren05b5ca92011-01-18 12:42:23 -0800234/*
235 * ---------------------------------------------------------------------------
236 * Timer initialization
237 * ---------------------------------------------------------------------------
238 */
Tony Lindgrene74984e2011-03-29 15:54:48 -0700239static void __init omap1_timer_init(void)
Tony Lindgren05b5ca92011-01-18 12:42:23 -0800240{
Vaibhav Hiremath18799912012-05-09 10:07:05 -0700241 if (omap_32k_timer_init() != 0)
Tony Lindgren05b5ca92011-01-18 12:42:23 -0800242 omap_mpu_timer_init();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243}
244
Tony Lindgrene74984e2011-03-29 15:54:48 -0700245struct sys_timer omap1_timer = {
246 .init = omap1_timer_init,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700247};