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Quinn Jensen52c543f2007-07-09 22:06:53 +01001/*
Anson Huange95dddb2013-03-20 19:39:42 -04002 * Copyright 2004-2013 Freescale Semiconductor, Inc. All Rights Reserved.
Quinn Jensen52c543f2007-07-09 22:06:53 +01003 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MXC_COMMON_H__
12#define __ASM_ARCH_MXC_COMMON_H__
13
Robin Holt7b6d8642013-07-08 16:01:40 -070014#include <linux/reboot.h>
15
Shawn Guod48866f2013-10-16 19:52:00 +080016struct irq_data;
Sascha Hauer282b13d2008-09-09 10:19:40 +020017struct platform_device;
Shawn Guo009e63f2013-05-08 21:05:53 +080018struct pt_regs;
Sascha Hauer30c730f2009-02-16 14:36:49 +010019struct clk;
Shawn Guoa1f1c7e2011-09-06 15:08:40 +080020enum mxc_cpu_pwr_mode;
Sascha Hauer282b13d2008-09-09 10:19:40 +020021
Shawn Guo803648d2013-10-16 21:05:35 +080022void mx1_map_io(void);
23void mx21_map_io(void);
24void mx25_map_io(void);
25void mx27_map_io(void);
26void mx31_map_io(void);
27void mx35_map_io(void);
28void mx51_map_io(void);
29void mx53_map_io(void);
30void imx1_init_early(void);
31void imx21_init_early(void);
32void imx25_init_early(void);
33void imx27_init_early(void);
34void imx31_init_early(void);
35void imx35_init_early(void);
36void imx51_init_early(void);
37void imx53_init_early(void);
38void mxc_init_irq(void __iomem *);
39void tzic_init_irq(void __iomem *);
40void mx1_init_irq(void);
41void mx21_init_irq(void);
42void mx25_init_irq(void);
43void mx27_init_irq(void);
44void mx31_init_irq(void);
45void mx35_init_irq(void);
46void mx51_init_irq(void);
47void mx53_init_irq(void);
48void imx1_soc_init(void);
49void imx21_soc_init(void);
50void imx25_soc_init(void);
51void imx27_soc_init(void);
52void imx31_soc_init(void);
53void imx35_soc_init(void);
54void imx51_soc_init(void);
55void imx51_init_late(void);
56void imx53_init_late(void);
57void epit_timer_init(void __iomem *base, int irq);
58void mxc_timer_init(void __iomem *, int);
59int mx1_clocks_init(unsigned long fref);
60int mx21_clocks_init(unsigned long lref, unsigned long fref);
61int mx25_clocks_init(void);
62int mx27_clocks_init(unsigned long fref);
63int mx31_clocks_init(unsigned long fref);
64int mx35_clocks_init(void);
65int mx51_clocks_init(unsigned long ckil, unsigned long osc,
Amit Kucheriaa329b482010-02-04 12:21:53 -080066 unsigned long ckih1, unsigned long ckih2);
Shawn Guo803648d2013-10-16 21:05:35 +080067int mx25_clocks_init_dt(void);
68int mx27_clocks_init_dt(void);
69int mx31_clocks_init_dt(void);
70struct platform_device *mxc_register_gpio(char *name, int id,
Shawn Guob78d8e52011-06-06 00:07:55 +080071 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
Shawn Guo803648d2013-10-16 21:05:35 +080072void mxc_set_cpu_type(unsigned int type);
73void mxc_restart(enum reboot_mode, const char *);
74void mxc_arch_reset_init(void __iomem *);
75void mxc_arch_reset_init_dt(void);
76int mx53_revision(void);
77void imx_set_aips(void __iomem *);
78int mxc_device_init(void);
Shawn Guobfefdff2013-08-13 13:54:02 +080079void imx_set_soc_revision(unsigned int rev);
80unsigned int imx_get_soc_revision(void);
Shawn Guof1c6f312013-08-13 14:59:43 +080081void imx_init_revision_from_anatop(void);
Shawn Guoa2887542013-08-13 16:59:28 +080082struct device *imx_soc_device_init(void);
Shawn Guo73d2b4c2011-10-17 08:42:16 +080083
Shawn Guo41e7daf2011-09-28 17:16:06 +080084enum mxc_cpu_pwr_mode {
85 WAIT_CLOCKED, /* wfi only */
86 WAIT_UNCLOCKED, /* WAIT */
87 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
88 STOP_POWER_ON, /* just STOP */
89 STOP_POWER_OFF, /* STOP + SRPG */
90};
91
Fabio Estevam3ac804e2012-02-02 20:02:32 -020092enum mx3_cpu_pwr_mode {
93 MX3_RUN,
94 MX3_WAIT,
95 MX3_DOZE,
96 MX3_SLEEP,
97};
98
Shawn Guo803648d2013-10-16 21:05:35 +080099void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
100void imx_print_silicon_rev(const char *cpu, int srev);
Sascha Hauerb6de9432011-09-20 14:28:17 +0200101
102void avic_handle_irq(struct pt_regs *);
Sascha Hauer58a92602011-09-20 14:28:39 +0200103void tzic_handle_irq(struct pt_regs *);
Sascha Hauerb6de9432011-09-20 14:28:17 +0200104
105#define imx1_handle_irq avic_handle_irq
106#define imx21_handle_irq avic_handle_irq
107#define imx25_handle_irq avic_handle_irq
108#define imx27_handle_irq avic_handle_irq
109#define imx31_handle_irq avic_handle_irq
110#define imx35_handle_irq avic_handle_irq
Greg Ungerer374daac2013-11-04 10:13:40 +1000111#define imx50_handle_irq tzic_handle_irq
Sascha Hauer58a92602011-09-20 14:28:39 +0200112#define imx51_handle_irq tzic_handle_irq
113#define imx53_handle_irq tzic_handle_irq
Sascha Hauerb6de9432011-09-20 14:28:17 +0200114
Shawn Guo803648d2013-10-16 21:05:35 +0800115void imx_enable_cpu(int cpu, bool enable);
116void imx_set_cpu_jump(int cpu, void *jump_addr);
117u32 imx_get_cpu_arg(int cpu);
118void imx_set_cpu_arg(int cpu, u32 arg);
119void v7_cpu_resume(void);
Shawn Guo69c31b72011-09-06 14:59:40 +0800120#ifdef CONFIG_SMP
Shawn Guo803648d2013-10-16 21:05:35 +0800121void v7_secondary_startup(void);
122void imx_scu_map_io(void);
123void imx_smp_prepare(void);
124void imx_scu_standby_enable(void);
Shawn Guo13eed982011-09-06 15:05:25 +0800125#else
126static inline void imx_scu_map_io(void) {}
Shawn Guoa1f1c7e2011-09-06 15:08:40 +0800127static inline void imx_smp_prepare(void) {}
Shawn Guoe5f9dec2012-12-04 22:55:15 +0800128static inline void imx_scu_standby_enable(void) {}
Shawn Guo69c31b72011-09-06 14:59:40 +0800129#endif
Shawn Guo803648d2013-10-16 21:05:35 +0800130void imx_src_init(void);
Shawn Guo803648d2013-10-16 21:05:35 +0800131void imx_gpc_init(void);
132void imx_gpc_pre_suspend(void);
133void imx_gpc_post_resume(void);
134void imx_gpc_mask_all(void);
135void imx_gpc_restore_all(void);
Shawn Guod48866f2013-10-16 19:52:00 +0800136void imx_gpc_irq_mask(struct irq_data *d);
137void imx_gpc_irq_unmask(struct irq_data *d);
Shawn Guo803648d2013-10-16 21:05:35 +0800138void imx_anatop_init(void);
139void imx_anatop_pre_suspend(void);
140void imx_anatop_post_resume(void);
141int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
142void imx6q_set_chicken_bit(void);
Eric Miao46ec1b22011-12-21 22:38:23 +0800143
Shawn Guo803648d2013-10-16 21:05:35 +0800144void imx_cpu_die(unsigned int cpu);
145int imx_cpu_kill(unsigned int cpu);
Marc Zyngiere4f2d972011-09-08 13:15:22 +0100146
Shawn Guo803648d2013-10-16 21:05:35 +0800147void imx6q_pm_init(void);
Shawn Guo9e8147b2013-09-25 23:09:36 +0800148void imx6q_pm_set_ccm_base(void __iomem *base);
Shawn Guo28a9f3b2014-02-18 10:35:05 +0800149#ifdef CONFIG_PM
Shawn Guo803648d2013-10-16 21:05:35 +0800150void imx5_pm_init(void);
Eric Miao46ec1b22011-12-21 22:38:23 +0800151#else
Fabio Estevam547dd1e2013-07-26 00:17:36 -0300152static inline void imx5_pm_init(void) {}
Eric Miao46ec1b22011-12-21 22:38:23 +0800153#endif
154
Shawn Guo8321b752012-04-26 11:42:34 +0800155#ifdef CONFIG_NEON
Shawn Guo803648d2013-10-16 21:05:35 +0800156int mx51_neon_fixup(void);
Shawn Guo8321b752012-04-26 11:42:34 +0800157#else
158static inline int mx51_neon_fixup(void) { return 0; }
159#endif
160
Shawn Guoe6a07562013-07-08 21:45:20 +0800161#ifdef CONFIG_CACHE_L2X0
Shawn Guo803648d2013-10-16 21:05:35 +0800162void imx_init_l2cache(void);
Shawn Guoe6a07562013-07-08 21:45:20 +0800163#else
164static inline void imx_init_l2cache(void) {}
165#endif
166
Marc Zyngiere4f2d972011-09-08 13:15:22 +0100167extern struct smp_operations imx_smp_ops;
168
Quinn Jensen52c543f2007-07-09 22:06:53 +0100169#endif