blob: 23fc670c0427710168ce41ef012f9e37b8218eb6 [file] [log] [blame]
Thomas Petazzonic7841472013-07-30 17:44:50 +02001/*
2 * Device Tree file for Marvell RD-AXPWiFiAP.
3 *
4 * Note: this board is shipped with a new generation boot loader that
5 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
Paul Bolle6cc082a82015-01-19 20:40:25 +01006 * is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option or the
7 * CONFIG_DEBUG_MVEBU_UART1_ALTERNATE option should be used.
Thomas Petazzonic7841472013-07-30 17:44:50 +02008 *
9 * Copyright (C) 2013 Marvell
10 *
11 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 *
Gregory CLEMENTebb56672015-01-26 15:16:00 +010013 * This file is dual-licensed: you can use it either under the terms
14 * of the GPL or the X11 license, at your option. Note that this dual
15 * licensing only applies to this file, and not this project as a
16 * whole.
17 *
18 * a) This file is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of the
21 * License, or (at your option) any later version.
22 *
23 * This file is distributed in the hope that it will be useful
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * Or, alternatively
29 *
30 * b) Permission is hereby granted, free of charge, to any person
31 * obtaining a copy of this software and associated documentation
32 * files (the "Software"), to deal in the Software without
33 * restriction, including without limitation the rights to use
34 * copy, modify, merge, publish, distribute, sublicense, and/or
35 * sell copies of the Software, and to permit persons to whom the
36 * Software is furnished to do so, subject to the following
37 * conditions:
38 *
39 * The above copyright notice and this permission notice shall be
40 * included in all copies or substantial portions of the Software.
41 *
42 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
43 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
44 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
45 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
46 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
47 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
48 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
49 * OTHER DEALINGS IN THE SOFTWARE.
Thomas Petazzonic7841472013-07-30 17:44:50 +020050 */
51
52/dts-v1/;
Thomas Petazzoni29e74f82014-02-11 18:07:12 +010053#include <dt-bindings/gpio/gpio.h>
Thomas Petazzoni5c0169d2014-02-11 18:07:13 +010054#include <dt-bindings/input/input.h>
Ezequiel Garciad10ff4d2013-08-06 14:09:42 -030055#include "armada-xp-mv78230.dtsi"
Thomas Petazzonic7841472013-07-30 17:44:50 +020056
57/ {
58 model = "Marvell RD-AXPWiFiAP";
59 compatible = "marvell,rd-axpwifiap", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
60
61 chosen {
Thomas Petazzoni95522032015-03-03 15:41:02 +010062 stdout-path = "serial0:115200n8";
Thomas Petazzonic7841472013-07-30 17:44:50 +020063 };
64
65 memory {
66 device_type = "memory";
67 reg = <0x00000000 0x00000000 0x00000000 0x40000000>; /* 1GB */
68 };
69
70 soc {
Ezequiel Garciad10ff4d2013-08-06 14:09:42 -030071 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
Boris Brezillonc466d992015-08-18 10:08:53 +020072 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
73 MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
74 MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
Ezequiel Garciad10ff4d2013-08-06 14:09:42 -030075
76 pcie-controller {
77 status = "okay";
78
79 /* First mini-PCIe port */
80 pcie@1,0 {
81 /* Port 0, Lane 0 */
82 status = "okay";
83 };
84
85 /* Second mini-PCIe port */
86 pcie@2,0 {
87 /* Port 0, Lane 1 */
88 status = "okay";
89 };
90
91 /* Renesas uPD720202 USB 3.0 controller */
92 pcie@3,0 {
93 /* Port 0, Lane 3 */
94 status = "okay";
95 };
96 };
Thomas Petazzonic7841472013-07-30 17:44:50 +020097
98 internal-regs {
Paul Bolle6cc082a82015-01-19 20:40:25 +010099 /* UART0 */
Thomas Petazzonic7841472013-07-30 17:44:50 +0200100 serial@12000 {
Thomas Petazzonic7841472013-07-30 17:44:50 +0200101 status = "okay";
102 };
103
Paul Bolle6cc082a82015-01-19 20:40:25 +0100104 /* UART1 */
Thomas Petazzonic7841472013-07-30 17:44:50 +0200105 serial@12100 {
Thomas Petazzonic7841472013-07-30 17:44:50 +0200106 status = "okay";
107 };
108
109 sata@a0000 {
110 nr-ports = <1>;
111 status = "okay";
112 };
113
114 mdio {
115 phy0: ethernet-phy@0 {
116 reg = <0>;
117 };
118
119 phy1: ethernet-phy@1 {
120 reg = <1>;
121 };
122 };
123
124 ethernet@70000 {
Arnaud Ebalard70ee4e92014-11-22 17:23:30 +0100125 pinctrl-0 = <&ge0_rgmii_pins>;
Thomas Petazzonic7841472013-07-30 17:44:50 +0200126 pinctrl-names = "default";
127 status = "okay";
128 phy = <&phy0>;
129 phy-mode = "rgmii-id";
130 };
131 ethernet@74000 {
Arnaud Ebalard70ee4e92014-11-22 17:23:30 +0100132 pinctrl-0 = <&ge1_rgmii_pins>;
Thomas Petazzonic7841472013-07-30 17:44:50 +0200133 pinctrl-names = "default";
134 status = "okay";
135 phy = <&phy1>;
136 phy-mode = "rgmii-id";
137 };
138
139 spi0: spi@10600 {
140 status = "okay";
Thomas Petazzonic7841472013-07-30 17:44:50 +0200141
142 spi-flash@0 {
143 #address-cells = <1>;
144 #size-cells = <1>;
Rafał Miłeckie9f3ed42015-05-19 13:30:46 +0200145 compatible = "n25q128a13", "jedec,spi-nor";
Thomas Petazzonic7841472013-07-30 17:44:50 +0200146 reg = <0>; /* Chip select 0 */
147 spi-max-frequency = <108000000>;
148 };
149 };
Thomas Petazzonic7841472013-07-30 17:44:50 +0200150 };
151 };
152
153 gpio_keys {
154 compatible = "gpio-keys";
155 #address-cells = <1>;
156 #size-cells = <0>;
Arnaud Ebalard70ee4e92014-11-22 17:23:30 +0100157 pinctrl-0 = <&keys_pin>;
Thomas Petazzonic7841472013-07-30 17:44:50 +0200158 pinctrl-names = "default";
159
160 button@1 {
161 label = "Factory Reset Button";
Thomas Petazzoni5c0169d2014-02-11 18:07:13 +0100162 linux,code = <KEY_SETUP>;
Thomas Petazzoni29e74f82014-02-11 18:07:12 +0100163 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
Thomas Petazzonic7841472013-07-30 17:44:50 +0200164 };
165 };
166};
Sebastian Hesselbarth01c43422014-09-19 21:20:09 +0200167
168&pinctrl {
Arnaud Ebalard70ee4e92014-11-22 17:23:30 +0100169 pinctrl-0 = <&phy_int_pin>;
Sebastian Hesselbarth01c43422014-09-19 21:20:09 +0200170 pinctrl-names = "default";
171
Arnaud Ebalard70ee4e92014-11-22 17:23:30 +0100172 keys_pin: keys-pin {
Sebastian Hesselbarth01c43422014-09-19 21:20:09 +0200173 marvell,pins = "mpp33";
174 marvell,function = "gpio";
175 };
176
Arnaud Ebalard70ee4e92014-11-22 17:23:30 +0100177 phy_int_pin: phy-int-pin {
Sebastian Hesselbarth01c43422014-09-19 21:20:09 +0200178 marvell,pins = "mpp32";
179 marvell,function = "gpio";
180 };
181};