blob: 1581dee2967a80368976303fc9e7865b1e69cef2 [file] [log] [blame]
Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata_artop.c - ARTOP ATA controller driver
3 *
Alan Coxab771632008-10-27 15:09:10 +00004 * (C) 2006 Red Hat
Bartlomiej Zolnierkiewicz067f8c72011-10-13 12:59:35 +02005 * (C) 2007,2011 Bartlomiej Zolnierkiewicz
Jeff Garzik669a5db2006-08-29 18:12:40 -04006 *
7 * Based in part on drivers/ide/pci/aec62xx.c
8 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
9 * 865/865R fixes for Macintosh card version from a patch to the old
10 * driver by Thibaut VARENE <varenet@parisc-linux.org>
11 * When setting the PCI latency we must set 0x80 or higher for burst
12 * performance Alessandro Zummo <alessandro.zummo@towertech.it>
13 *
14 * TODO
Jeff Garzik669a5db2006-08-29 18:12:40 -040015 * Investigate no_dsc on 850R
16 * Clock detect
17 */
18
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/pci.h>
22#include <linux/init.h>
23#include <linux/blkdev.h>
24#include <linux/delay.h>
25#include <linux/device.h>
26#include <scsi/scsi_host.h>
27#include <linux/libata.h>
28#include <linux/ata.h>
29
30#define DRV_NAME "pata_artop"
Bartlomiej Zolnierkiewicz067f8c72011-10-13 12:59:35 +020031#define DRV_VERSION "0.4.6"
Jeff Garzik669a5db2006-08-29 18:12:40 -040032
33/*
34 * The ARTOP has 33 Mhz and "over clocked" timing tables. Until we
35 * get PCI bus speed functionality we leave this as 0. Its a variable
36 * for when we get the functionality and also for folks wanting to
37 * test stuff.
38 */
39
40static int clock = 0;
41
Jeff Garzik669a5db2006-08-29 18:12:40 -040042/**
Bartlomiej Zolnierkiewiczf6b56692011-10-11 19:45:52 +020043 * artop62x0_pre_reset - probe begin
Tejun Heocc0680a2007-08-06 18:36:23 +090044 * @link: link
Tejun Heod4b2bab2007-02-02 16:50:52 +090045 * @deadline: deadline jiffies for the operation
Jeff Garzik669a5db2006-08-29 18:12:40 -040046 *
Jeff Garzik669a5db2006-08-29 18:12:40 -040047 * Nothing complicated needed here.
48 */
49
Bartlomiej Zolnierkiewiczf6b56692011-10-11 19:45:52 +020050static int artop62x0_pre_reset(struct ata_link *link, unsigned long deadline)
Jeff Garzik669a5db2006-08-29 18:12:40 -040051{
52 static const struct pci_bits artop_enable_bits[] = {
53 { 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */
54 { 0x4AU, 1U, 0x04UL, 0x04UL }, /* port 1 */
55 };
56
Tejun Heocc0680a2007-08-06 18:36:23 +090057 struct ata_port *ap = link->ap;
Jeff Garzik669a5db2006-08-29 18:12:40 -040058 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Jeff Garzik669a5db2006-08-29 18:12:40 -040059
Bartlomiej Zolnierkiewiczf6b56692011-10-11 19:45:52 +020060 /* Odd numbered device ids are the units with enable bits. */
Jean Delvare673424c2010-08-30 17:37:05 +020061 if ((pdev->device & 1) &&
62 !pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no]))
Alan Coxc9619222006-09-26 17:53:38 +010063 return -ENOENT;
Jeff Garzik27c78b32007-03-09 09:41:19 -050064
Tejun Heo9363c382008-04-07 22:47:16 +090065 return ata_sff_prereset(link, deadline);
Jeff Garzika73984a2007-03-09 08:37:46 -050066}
Alan Coxc9619222006-09-26 17:53:38 +010067
Jeff Garzika73984a2007-03-09 08:37:46 -050068/**
69 * artop6260_cable_detect - identify cable type
70 * @ap: Port
71 *
Alan Coxc343a832007-05-25 20:39:30 +010072 * Identify the cable type for the ARTOP interface in question
Jeff Garzika73984a2007-03-09 08:37:46 -050073 */
Jeff Garzika617c092007-05-21 20:14:23 -040074
Jeff Garzika73984a2007-03-09 08:37:46 -050075static int artop6260_cable_detect(struct ata_port *ap)
76{
77 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
78 u8 tmp;
Jeff Garzik669a5db2006-08-29 18:12:40 -040079 pci_read_config_byte(pdev, 0x49, &tmp);
Alexey Dobriyan3f9dd272006-11-10 22:52:46 +030080 if (tmp & (1 << ap->port_no))
Jeff Garzika73984a2007-03-09 08:37:46 -050081 return ATA_CBL_PATA40;
82 return ATA_CBL_PATA80;
Jeff Garzik669a5db2006-08-29 18:12:40 -040083}
84
85/**
Jeff Garzik669a5db2006-08-29 18:12:40 -040086 * artop6210_load_piomode - Load a set of PATA PIO timings
87 * @ap: Port whose timings we are configuring
88 * @adev: Device
89 * @pio: PIO mode
90 *
91 * Set PIO mode for device, in host controller PCI config space. This
92 * is used both to set PIO timings in PIO mode and also to set the
93 * matching PIO clocking for UDMA, as well as the MWDMA timings.
94 *
95 * LOCKING:
96 * None (inherited from caller).
97 */
98
99static void artop6210_load_piomode(struct ata_port *ap, struct ata_device *adev, unsigned int pio)
100{
101 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
102 int dn = adev->devno + 2 * ap->port_no;
103 const u16 timing[2][5] = {
104 { 0x0000, 0x000A, 0x0008, 0x0303, 0x0301 },
105 { 0x0700, 0x070A, 0x0708, 0x0403, 0x0401 }
106
107 };
108 /* Load the PIO timing active/recovery bits */
109 pci_write_config_word(pdev, 0x40 + 2 * dn, timing[clock][pio]);
110}
111
112/**
113 * artop6210_set_piomode - Initialize host controller PATA PIO timings
114 * @ap: Port whose timings we are configuring
115 * @adev: Device we are configuring
116 *
117 * Set PIO mode for device, in host controller PCI config space. For
118 * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
119 * the event UDMA is used the later call to set_dmamode will set the
120 * bits as required.
121 *
122 * LOCKING:
123 * None (inherited from caller).
124 */
125
126static void artop6210_set_piomode(struct ata_port *ap, struct ata_device *adev)
127{
128 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
129 int dn = adev->devno + 2 * ap->port_no;
130 u8 ultra;
131
132 artop6210_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
133
134 /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
135 pci_read_config_byte(pdev, 0x54, &ultra);
136 ultra &= ~(3 << (2 * dn));
137 pci_write_config_byte(pdev, 0x54, ultra);
138}
139
140/**
141 * artop6260_load_piomode - Initialize host controller PATA PIO timings
142 * @ap: Port whose timings we are configuring
143 * @adev: Device we are configuring
144 * @pio: PIO mode
145 *
146 * Set PIO mode for device, in host controller PCI config space. The
147 * ARTOP6260 and relatives store the timing data differently.
148 *
149 * LOCKING:
150 * None (inherited from caller).
151 */
152
153static void artop6260_load_piomode (struct ata_port *ap, struct ata_device *adev, unsigned int pio)
154{
155 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
156 int dn = adev->devno + 2 * ap->port_no;
157 const u8 timing[2][5] = {
158 { 0x00, 0x0A, 0x08, 0x33, 0x31 },
159 { 0x70, 0x7A, 0x78, 0x43, 0x41 }
160
161 };
162 /* Load the PIO timing active/recovery bits */
163 pci_write_config_byte(pdev, 0x40 + dn, timing[clock][pio]);
164}
165
166/**
167 * artop6260_set_piomode - Initialize host controller PATA PIO timings
168 * @ap: Port whose timings we are configuring
169 * @adev: Device we are configuring
170 *
171 * Set PIO mode for device, in host controller PCI config space. For
172 * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
173 * the event UDMA is used the later call to set_dmamode will set the
174 * bits as required.
175 *
176 * LOCKING:
177 * None (inherited from caller).
178 */
179
180static void artop6260_set_piomode(struct ata_port *ap, struct ata_device *adev)
181{
182 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
183 u8 ultra;
184
185 artop6260_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
186
187 /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
188 pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
189 ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
190 pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
191}
192
193/**
194 * artop6210_set_dmamode - Initialize host controller PATA PIO timings
195 * @ap: Port whose timings we are configuring
Jeff Garzika73984a2007-03-09 08:37:46 -0500196 * @adev: Device whose timings we are configuring
Jeff Garzik669a5db2006-08-29 18:12:40 -0400197 *
198 * Set DMA mode for device, in host controller PCI config space.
199 *
200 * LOCKING:
201 * None (inherited from caller).
202 */
203
204static void artop6210_set_dmamode (struct ata_port *ap, struct ata_device *adev)
205{
206 unsigned int pio;
207 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
208 int dn = adev->devno + 2 * ap->port_no;
209 u8 ultra;
210
211 if (adev->dma_mode == XFER_MW_DMA_0)
212 pio = 1;
213 else
214 pio = 4;
215
216 /* Load the PIO timing active/recovery bits */
217 artop6210_load_piomode(ap, adev, pio);
218
219 pci_read_config_byte(pdev, 0x54, &ultra);
220 ultra &= ~(3 << (2 * dn));
221
222 /* Add ultra DMA bits if in UDMA mode */
223 if (adev->dma_mode >= XFER_UDMA_0) {
224 u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1 - clock;
225 if (mode == 0)
226 mode = 1;
227 ultra |= (mode << (2 * dn));
228 }
229 pci_write_config_byte(pdev, 0x54, ultra);
230}
231
232/**
233 * artop6260_set_dmamode - Initialize host controller PATA PIO timings
234 * @ap: Port whose timings we are configuring
235 * @adev: Device we are configuring
236 *
237 * Set DMA mode for device, in host controller PCI config space. The
238 * ARTOP6260 and relatives store the timing data differently.
239 *
240 * LOCKING:
241 * None (inherited from caller).
242 */
243
244static void artop6260_set_dmamode (struct ata_port *ap, struct ata_device *adev)
245{
246 unsigned int pio = adev->pio_mode - XFER_PIO_0;
247 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
248 u8 ultra;
249
250 if (adev->dma_mode == XFER_MW_DMA_0)
251 pio = 1;
252 else
253 pio = 4;
254
255 /* Load the PIO timing active/recovery bits */
256 artop6260_load_piomode(ap, adev, pio);
257
258 /* Add ultra DMA bits if in UDMA mode */
259 pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
260 ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
261 if (adev->dma_mode >= XFER_UDMA_0) {
262 u8 mode = adev->dma_mode - XFER_UDMA_0 + 1 - clock;
263 if (mode == 0)
264 mode = 1;
265 ultra |= (mode << (4 * adev->devno));
266 }
267 pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
268}
269
Alan Cox140d6fe2009-03-24 10:21:49 +0000270/**
271 * artop_6210_qc_defer - implement serialization
272 * @qc: command
273 *
274 * Issue commands per host on this chip.
275 */
276
277static int artop6210_qc_defer(struct ata_queued_cmd *qc)
278{
279 struct ata_host *host = qc->ap->host;
280 struct ata_port *alt = host->ports[1 ^ qc->ap->port_no];
281 int rc;
282
283 /* First apply the usual rules */
284 rc = ata_std_qc_defer(qc);
285 if (rc != 0)
286 return rc;
287
288 /* Now apply serialization rules. Only allow a command if the
289 other channel state machine is idle */
290 if (alt && alt->qc_active)
291 return ATA_DEFER_PORT;
292 return 0;
293}
294
Jeff Garzik669a5db2006-08-29 18:12:40 -0400295static struct scsi_host_template artop_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900296 ATA_BMDMA_SHT(DRV_NAME),
Jeff Garzik669a5db2006-08-29 18:12:40 -0400297};
298
Tejun Heo029cfd62008-03-25 12:22:49 +0900299static struct ata_port_operations artop6210_ops = {
300 .inherits = &ata_bmdma_port_ops,
301 .cable_detect = ata_cable_40wire,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400302 .set_piomode = artop6210_set_piomode,
303 .set_dmamode = artop6210_set_dmamode,
Bartlomiej Zolnierkiewiczf6b56692011-10-11 19:45:52 +0200304 .prereset = artop62x0_pre_reset,
Alan Cox140d6fe2009-03-24 10:21:49 +0000305 .qc_defer = artop6210_qc_defer,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400306};
307
Tejun Heo029cfd62008-03-25 12:22:49 +0900308static struct ata_port_operations artop6260_ops = {
309 .inherits = &ata_bmdma_port_ops,
310 .cable_detect = artop6260_cable_detect,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400311 .set_piomode = artop6260_set_piomode,
312 .set_dmamode = artop6260_set_dmamode,
Bartlomiej Zolnierkiewiczf6b56692011-10-11 19:45:52 +0200313 .prereset = artop62x0_pre_reset,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400314};
315
Bartlomiej Zolnierkiewicz067f8c72011-10-13 12:59:35 +0200316static void atp8xx_fixup(struct pci_dev *pdev)
317{
318 if (pdev->device == 0x0005)
319 /* BIOS may have left us in UDMA, clear it before libata probe */
320 pci_write_config_byte(pdev, 0x54, 0);
321 else if (pdev->device == 0x0008 || pdev->device == 0x0009) {
322 u8 reg;
323
324 /* Mac systems come up with some registers not set as we
325 will need them */
326
327 /* Clear reset & test bits */
328 pci_read_config_byte(pdev, 0x49, &reg);
329 pci_write_config_byte(pdev, 0x49, reg & ~0x30);
330
331 /* PCI latency must be > 0x80 for burst mode, tweak it
332 * if required.
333 */
334 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &reg);
335 if (reg <= 0x80)
336 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x90);
337
338 /* Enable IRQ output and burst mode */
339 pci_read_config_byte(pdev, 0x4a, &reg);
340 pci_write_config_byte(pdev, 0x4a, (reg & ~0x01) | 0x80);
341 }
342}
Jeff Garzik669a5db2006-08-29 18:12:40 -0400343
344/**
345 * artop_init_one - Register ARTOP ATA PCI device with kernel services
346 * @pdev: PCI device to register
347 * @ent: Entry in artop_pci_tbl matching with @pdev
348 *
349 * Called from kernel PCI layer.
350 *
351 * LOCKING:
352 * Inherited from PCI layer (may sleep).
353 *
354 * RETURNS:
355 * Zero on success, or -ERRNO value.
356 */
357
358static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
359{
Tejun Heo1626aeb2007-05-04 12:43:58 +0200360 static const struct ata_port_info info_6210 = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400361 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100362 .pio_mask = ATA_PIO4,
363 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400364 .udma_mask = ATA_UDMA2,
365 .port_ops = &artop6210_ops,
366 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200367 static const struct ata_port_info info_626x = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400368 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100369 .pio_mask = ATA_PIO4,
370 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400371 .udma_mask = ATA_UDMA4,
372 .port_ops = &artop6260_ops,
373 };
Bartlomiej Zolnierkiewiczbe456b72007-08-09 23:19:34 +0200374 static const struct ata_port_info info_628x = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400375 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100376 .pio_mask = ATA_PIO4,
377 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400378 .udma_mask = ATA_UDMA5,
379 .port_ops = &artop6260_ops,
380 };
Bartlomiej Zolnierkiewiczbe456b72007-08-09 23:19:34 +0200381 static const struct ata_port_info info_628x_fast = {
Bartlomiej Zolnierkiewiczbe456b72007-08-09 23:19:34 +0200382 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100383 .pio_mask = ATA_PIO4,
384 .mwdma_mask = ATA_MWDMA2,
Bartlomiej Zolnierkiewiczbe456b72007-08-09 23:19:34 +0200385 .udma_mask = ATA_UDMA6,
386 .port_ops = &artop6260_ops,
387 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200388 const struct ata_port_info *ppi[] = { NULL, NULL };
Tejun Heof08048e2008-03-25 12:22:47 +0900389 int rc;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400390
Joe Perches06296a12011-04-15 15:52:00 -0700391 ata_print_version_once(&pdev->dev, DRV_VERSION);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400392
Tejun Heof08048e2008-03-25 12:22:47 +0900393 rc = pcim_enable_device(pdev);
394 if (rc)
395 return rc;
396
Bartlomiej Zolnierkiewicz067f8c72011-10-13 12:59:35 +0200397 if (id->driver_data == 0) /* 6210 variant */
Tejun Heo1626aeb2007-05-04 12:43:58 +0200398 ppi[0] = &info_6210;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400399 else if (id->driver_data == 1) /* 6260 */
Tejun Heo1626aeb2007-05-04 12:43:58 +0200400 ppi[0] = &info_626x;
Bartlomiej Zolnierkiewiczbe456b72007-08-09 23:19:34 +0200401 else if (id->driver_data == 2) { /* 6280 or 6280 + fast */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400402 unsigned long io = pci_resource_start(pdev, 4);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400403
Bartlomiej Zolnierkiewiczbe456b72007-08-09 23:19:34 +0200404 ppi[0] = &info_628x;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400405 if (inb(io) & 0x10)
Bartlomiej Zolnierkiewiczbe456b72007-08-09 23:19:34 +0200406 ppi[0] = &info_628x_fast;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400407 }
Jeff Garzik15a7c3b2006-10-01 10:38:22 -0400408
Tejun Heo1626aeb2007-05-04 12:43:58 +0200409 BUG_ON(ppi[0] == NULL);
Jeff Garzik15a7c3b2006-10-01 10:38:22 -0400410
Bartlomiej Zolnierkiewicz067f8c72011-10-13 12:59:35 +0200411 atp8xx_fixup(pdev);
412
Tejun Heo1c5afdf2010-05-19 22:10:22 +0200413 return ata_pci_bmdma_init_one(pdev, ppi, &artop_sht, NULL, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400414}
415
416static const struct pci_device_id artop_pci_tbl[] = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400417 { PCI_VDEVICE(ARTOP, 0x0005), 0 },
418 { PCI_VDEVICE(ARTOP, 0x0006), 1 },
419 { PCI_VDEVICE(ARTOP, 0x0007), 1 },
420 { PCI_VDEVICE(ARTOP, 0x0008), 2 },
421 { PCI_VDEVICE(ARTOP, 0x0009), 2 },
422
Jeff Garzik669a5db2006-08-29 18:12:40 -0400423 { } /* terminate list */
424};
425
Bartlomiej Zolnierkiewicz067f8c72011-10-13 12:59:35 +0200426#ifdef CONFIG_PM
427static int atp8xx_reinit_one(struct pci_dev *pdev)
428{
Jingoo Han0a86e1c2013-06-03 14:05:36 +0900429 struct ata_host *host = pci_get_drvdata(pdev);
Bartlomiej Zolnierkiewicz067f8c72011-10-13 12:59:35 +0200430 int rc;
431
432 rc = ata_pci_device_do_resume(pdev);
433 if (rc)
434 return rc;
435
436 atp8xx_fixup(pdev);
437
438 ata_host_resume(host);
439 return 0;
440}
441#endif
442
Jeff Garzik669a5db2006-08-29 18:12:40 -0400443static struct pci_driver artop_pci_driver = {
444 .name = DRV_NAME,
445 .id_table = artop_pci_tbl,
446 .probe = artop_init_one,
447 .remove = ata_pci_remove_one,
Bartlomiej Zolnierkiewicz067f8c72011-10-13 12:59:35 +0200448#ifdef CONFIG_PM
449 .suspend = ata_pci_device_suspend,
450 .resume = atp8xx_reinit_one,
451#endif
Jeff Garzik669a5db2006-08-29 18:12:40 -0400452};
453
Axel Lin2fc75da2012-04-19 13:43:05 +0800454module_pci_driver(artop_pci_driver);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400455
Bartlomiej Zolnierkiewicz067f8c72011-10-13 12:59:35 +0200456MODULE_AUTHOR("Alan Cox, Bartlomiej Zolnierkiewicz");
Jeff Garzik669a5db2006-08-29 18:12:40 -0400457MODULE_DESCRIPTION("SCSI low-level driver for ARTOP PATA");
458MODULE_LICENSE("GPL");
459MODULE_DEVICE_TABLE(pci, artop_pci_tbl);
460MODULE_VERSION(DRV_VERSION);