Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 1 | /* |
Zhicheng Fan | c141b38 | 2012-02-22 13:44:07 +0800 | [diff] [blame] | 2 | * Copyright (C) 2006-2010, 2012 Freescale Semicondutor, Inc. |
| 3 | * All rights reserved. |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 4 | * |
| 5 | * Author: Andy Fleming <afleming@freescale.com> |
| 6 | * |
| 7 | * Based on 83xx/mpc8360e_pb.c by: |
| 8 | * Li Yang <LeoLi@freescale.com> |
| 9 | * Yin Olivia <Hong-hua.Yin@freescale.com> |
| 10 | * |
| 11 | * Description: |
Kumar Gala | 23f510b | 2007-02-17 16:29:36 -0600 | [diff] [blame] | 12 | * MPC85xx MDS board specific routines. |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 13 | * |
| 14 | * This program is free software; you can redistribute it and/or modify it |
| 15 | * under the terms of the GNU General Public License as published by the |
| 16 | * Free Software Foundation; either version 2 of the License, or (at your |
| 17 | * option) any later version. |
| 18 | */ |
| 19 | |
| 20 | #include <linux/stddef.h> |
| 21 | #include <linux/kernel.h> |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/errno.h> |
| 24 | #include <linux/reboot.h> |
| 25 | #include <linux/pci.h> |
| 26 | #include <linux/kdev_t.h> |
| 27 | #include <linux/major.h> |
| 28 | #include <linux/console.h> |
| 29 | #include <linux/delay.h> |
| 30 | #include <linux/seq_file.h> |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 31 | #include <linux/initrd.h> |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 32 | #include <linux/fsl_devices.h> |
Jon Loeliger | 882407b | 2007-11-06 12:11:13 -0600 | [diff] [blame] | 33 | #include <linux/of_platform.h> |
| 34 | #include <linux/of_device.h> |
Andy Fleming | 94833a4 | 2008-05-02 18:56:41 -0500 | [diff] [blame] | 35 | #include <linux/phy.h> |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 36 | #include <linux/memblock.h> |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 37 | |
Arun Sharma | 60063497 | 2011-07-26 16:09:06 -0700 | [diff] [blame] | 38 | #include <linux/atomic.h> |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 39 | #include <asm/time.h> |
| 40 | #include <asm/io.h> |
| 41 | #include <asm/machdep.h> |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 42 | #include <asm/pci-bridge.h> |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 43 | #include <asm/irq.h> |
| 44 | #include <mm/mmu_decl.h> |
| 45 | #include <asm/prom.h> |
| 46 | #include <asm/udbg.h> |
| 47 | #include <sysdev/fsl_soc.h> |
Roy Zang | 3f6c5da | 2007-07-10 18:47:06 +0800 | [diff] [blame] | 48 | #include <sysdev/fsl_pci.h> |
Anton Vorontsov | 9b9d401 | 2009-08-19 03:28:21 +0400 | [diff] [blame] | 49 | #include <sysdev/simple_gpio.h> |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 50 | #include <asm/qe.h> |
| 51 | #include <asm/qe_ic.h> |
| 52 | #include <asm/mpic.h> |
Kumar Gala | 152d018 | 2009-05-15 00:37:35 -0500 | [diff] [blame] | 53 | #include <asm/swiotlb.h> |
Zhicheng Fan | c141b38 | 2012-02-22 13:44:07 +0800 | [diff] [blame] | 54 | #include <asm/fsl_guts.h> |
Kyle Moffett | 582d3e0 | 2011-12-02 06:27:58 +0000 | [diff] [blame] | 55 | #include "smp.h" |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 56 | |
Dmitry Eremin-Solenikov | 543a07b | 2011-11-17 21:56:16 +0400 | [diff] [blame] | 57 | #include "mpc85xx.h" |
| 58 | |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 59 | #undef DEBUG |
| 60 | #ifdef DEBUG |
| 61 | #define DBG(fmt...) udbg_printf(fmt) |
| 62 | #else |
| 63 | #define DBG(fmt...) |
| 64 | #endif |
| 65 | |
Andy Fleming | 94833a4 | 2008-05-02 18:56:41 -0500 | [diff] [blame] | 66 | #define MV88E1111_SCR 0x10 |
| 67 | #define MV88E1111_SCR_125CLK 0x0010 |
| 68 | static int mpc8568_fixup_125_clock(struct phy_device *phydev) |
| 69 | { |
| 70 | int scr; |
| 71 | int err; |
| 72 | |
| 73 | /* Workaround for the 125 CLK Toggle */ |
| 74 | scr = phy_read(phydev, MV88E1111_SCR); |
| 75 | |
| 76 | if (scr < 0) |
| 77 | return scr; |
| 78 | |
| 79 | err = phy_write(phydev, MV88E1111_SCR, scr & ~(MV88E1111_SCR_125CLK)); |
| 80 | |
| 81 | if (err) |
| 82 | return err; |
| 83 | |
| 84 | err = phy_write(phydev, MII_BMCR, BMCR_RESET); |
| 85 | |
| 86 | if (err) |
| 87 | return err; |
| 88 | |
| 89 | scr = phy_read(phydev, MV88E1111_SCR); |
| 90 | |
| 91 | if (scr < 0) |
Roel Kluin | 29827b0 | 2009-12-17 14:45:15 +0000 | [diff] [blame] | 92 | return scr; |
Andy Fleming | 94833a4 | 2008-05-02 18:56:41 -0500 | [diff] [blame] | 93 | |
| 94 | err = phy_write(phydev, MV88E1111_SCR, scr | 0x0008); |
| 95 | |
| 96 | return err; |
| 97 | } |
| 98 | |
| 99 | static int mpc8568_mds_phy_fixups(struct phy_device *phydev) |
| 100 | { |
| 101 | int temp; |
| 102 | int err; |
| 103 | |
| 104 | /* Errata */ |
| 105 | err = phy_write(phydev,29, 0x0006); |
| 106 | |
| 107 | if (err) |
| 108 | return err; |
| 109 | |
| 110 | temp = phy_read(phydev, 30); |
| 111 | |
| 112 | if (temp < 0) |
| 113 | return temp; |
| 114 | |
| 115 | temp = (temp & (~0x8000)) | 0x4000; |
| 116 | err = phy_write(phydev,30, temp); |
| 117 | |
| 118 | if (err) |
| 119 | return err; |
| 120 | |
| 121 | err = phy_write(phydev,29, 0x000a); |
| 122 | |
| 123 | if (err) |
| 124 | return err; |
| 125 | |
| 126 | temp = phy_read(phydev, 30); |
| 127 | |
| 128 | if (temp < 0) |
| 129 | return temp; |
| 130 | |
| 131 | temp = phy_read(phydev, 30); |
| 132 | |
| 133 | if (temp < 0) |
| 134 | return temp; |
| 135 | |
| 136 | temp &= ~0x0020; |
| 137 | |
| 138 | err = phy_write(phydev,30,temp); |
| 139 | |
| 140 | if (err) |
| 141 | return err; |
| 142 | |
| 143 | /* Disable automatic MDI/MDIX selection */ |
| 144 | temp = phy_read(phydev, 16); |
| 145 | |
| 146 | if (temp < 0) |
| 147 | return temp; |
| 148 | |
| 149 | temp &= ~0x0060; |
| 150 | err = phy_write(phydev,16,temp); |
| 151 | |
| 152 | return err; |
| 153 | } |
| 154 | |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 155 | /* ************************************************************************ |
| 156 | * |
| 157 | * Setup the architecture |
| 158 | * |
| 159 | */ |
Anton Vorontsov | dee9ad7 | 2010-06-08 09:55:50 +0000 | [diff] [blame] | 160 | #ifdef CONFIG_QUICC_ENGINE |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 161 | static void __init mpc85xx_mds_reset_ucc_phys(void) |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 162 | { |
| 163 | struct device_node *np; |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 164 | static u8 __iomem *bcsr_regs; |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 165 | |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 166 | /* Map BCSR area */ |
| 167 | np = of_find_node_by_name(NULL, "bcsr"); |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 168 | if (!np) |
| 169 | return; |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 170 | |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 171 | bcsr_regs = of_iomap(np, 0); |
| 172 | of_node_put(np); |
| 173 | if (!bcsr_regs) |
| 174 | return; |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 175 | |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 176 | if (machine_is(mpc8568_mds)) { |
| 177 | #define BCSR_UCC1_GETH_EN (0x1 << 7) |
| 178 | #define BCSR_UCC2_GETH_EN (0x1 << 7) |
| 179 | #define BCSR_UCC1_MODE_MSK (0x3 << 4) |
| 180 | #define BCSR_UCC2_MODE_MSK (0x3 << 0) |
Kumar Gala | 152d018 | 2009-05-15 00:37:35 -0500 | [diff] [blame] | 181 | |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 182 | /* Turn off UCC1 & UCC2 */ |
| 183 | clrbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); |
| 184 | clrbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); |
| 185 | |
| 186 | /* Mode is RGMII, all bits clear */ |
| 187 | clrbits8(&bcsr_regs[11], BCSR_UCC1_MODE_MSK | |
| 188 | BCSR_UCC2_MODE_MSK); |
| 189 | |
| 190 | /* Turn UCC1 & UCC2 on */ |
| 191 | setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); |
| 192 | setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); |
| 193 | } else if (machine_is(mpc8569_mds)) { |
| 194 | #define BCSR7_UCC12_GETHnRST (0x1 << 2) |
| 195 | #define BCSR8_UEM_MARVELL_RST (0x1 << 1) |
| 196 | #define BCSR_UCC_RGMII (0x1 << 6) |
| 197 | #define BCSR_UCC_RTBI (0x1 << 5) |
| 198 | /* |
| 199 | * U-Boot mangles interrupt polarity for Marvell PHYs, |
| 200 | * so reset built-in and UEM Marvell PHYs, this puts |
| 201 | * the PHYs into their normal state. |
| 202 | */ |
| 203 | clrbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); |
| 204 | setbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); |
| 205 | |
| 206 | setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); |
| 207 | clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); |
| 208 | |
| 209 | for (np = NULL; (np = of_find_compatible_node(np, |
| 210 | "network", |
| 211 | "ucc_geth")) != NULL;) { |
| 212 | const unsigned int *prop; |
| 213 | int ucc_num; |
| 214 | |
| 215 | prop = of_get_property(np, "cell-index", NULL); |
| 216 | if (prop == NULL) |
| 217 | continue; |
| 218 | |
| 219 | ucc_num = *prop - 1; |
| 220 | |
| 221 | prop = of_get_property(np, "phy-connection-type", NULL); |
| 222 | if (prop == NULL) |
| 223 | continue; |
| 224 | |
| 225 | if (strcmp("rtbi", (const char *)prop) == 0) |
| 226 | clrsetbits_8(&bcsr_regs[7 + ucc_num], |
| 227 | BCSR_UCC_RGMII, BCSR_UCC_RTBI); |
Kumar Gala | c9438af | 2007-10-04 00:28:43 -0500 | [diff] [blame] | 228 | } |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 229 | } else if (machine_is(p1021_mds)) { |
| 230 | #define BCSR11_ENET_MICRST (0x1 << 5) |
| 231 | /* Reset Micrel PHY */ |
| 232 | clrbits8(&bcsr_regs[11], BCSR11_ENET_MICRST); |
| 233 | setbits8(&bcsr_regs[11], BCSR11_ENET_MICRST); |
Kumar Gala | c9438af | 2007-10-04 00:28:43 -0500 | [diff] [blame] | 234 | } |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 235 | |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 236 | iounmap(bcsr_regs); |
| 237 | } |
Haiying Wang | 48936a08 | 2010-05-21 10:16:12 -0400 | [diff] [blame] | 238 | |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 239 | static void __init mpc85xx_mds_qe_init(void) |
| 240 | { |
| 241 | struct device_node *np; |
Anton Vorontsov | bb863e8 | 2010-06-08 09:55:40 +0000 | [diff] [blame] | 242 | |
Anton Vorontsov | a2dd70a | 2008-01-24 18:39:59 +0300 | [diff] [blame] | 243 | np = of_find_compatible_node(NULL, NULL, "fsl,qe"); |
| 244 | if (!np) { |
| 245 | np = of_find_node_by_name(NULL, "qe"); |
| 246 | if (!np) |
| 247 | return; |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 248 | } |
| 249 | |
Anton Vorontsov | dee9ad7 | 2010-06-08 09:55:50 +0000 | [diff] [blame] | 250 | if (!of_device_is_available(np)) { |
| 251 | of_node_put(np); |
| 252 | return; |
| 253 | } |
| 254 | |
Anton Vorontsov | a2dd70a | 2008-01-24 18:39:59 +0300 | [diff] [blame] | 255 | qe_reset(); |
| 256 | of_node_put(np); |
| 257 | |
| 258 | np = of_find_node_by_name(NULL, "par_io"); |
| 259 | if (np) { |
| 260 | struct device_node *ucc; |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 261 | |
| 262 | par_io_init(np); |
| 263 | of_node_put(np); |
| 264 | |
Anton Vorontsov | a2dd70a | 2008-01-24 18:39:59 +0300 | [diff] [blame] | 265 | for_each_node_by_name(ucc, "ucc") |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 266 | par_io_of_config(ucc); |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 267 | } |
| 268 | |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 269 | mpc85xx_mds_reset_ucc_phys(); |
Haiying Wang | 48936a08 | 2010-05-21 10:16:12 -0400 | [diff] [blame] | 270 | |
| 271 | if (machine_is(p1021_mds)) { |
Zhicheng Fan | c141b38 | 2012-02-22 13:44:07 +0800 | [diff] [blame] | 272 | |
Timur Tabi | 9cb6abc | 2012-03-19 11:06:39 -0500 | [diff] [blame] | 273 | struct ccsr_guts __iomem *guts; |
Haiying Wang | 48936a08 | 2010-05-21 10:16:12 -0400 | [diff] [blame] | 274 | |
| 275 | np = of_find_node_by_name(NULL, "global-utilities"); |
Haiying Wang | 48936a08 | 2010-05-21 10:16:12 -0400 | [diff] [blame] | 276 | if (np) { |
Zhicheng Fan | c141b38 | 2012-02-22 13:44:07 +0800 | [diff] [blame] | 277 | guts = of_iomap(np, 0); |
| 278 | if (!guts) |
| 279 | pr_err("mpc85xx-rdb: could not map global utilities register\n"); |
| 280 | else{ |
Haiying Wang | 48936a08 | 2010-05-21 10:16:12 -0400 | [diff] [blame] | 281 | /* P1021 has pins muxed for QE and other functions. To |
| 282 | * enable QE UEC mode, we need to set bit QE0 for UCC1 |
| 283 | * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9 |
Justin P. Mattock | 8dd11f8 | 2010-12-30 16:09:40 -0800 | [diff] [blame] | 284 | * and QE12 for QE MII management signals in PMUXCR |
Haiying Wang | 48936a08 | 2010-05-21 10:16:12 -0400 | [diff] [blame] | 285 | * register. |
| 286 | */ |
Zhicheng Fan | c141b38 | 2012-02-22 13:44:07 +0800 | [diff] [blame] | 287 | setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) | |
| 288 | MPC85xx_PMUXCR_QE(3) | |
| 289 | MPC85xx_PMUXCR_QE(9) | |
| 290 | MPC85xx_PMUXCR_QE(12)); |
| 291 | iounmap(guts); |
| 292 | } |
Haiying Wang | 48936a08 | 2010-05-21 10:16:12 -0400 | [diff] [blame] | 293 | of_node_put(np); |
| 294 | } |
| 295 | |
| 296 | } |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 297 | } |
| 298 | |
| 299 | static void __init mpc85xx_mds_qeic_init(void) |
| 300 | { |
| 301 | struct device_node *np; |
| 302 | |
| 303 | np = of_find_compatible_node(NULL, NULL, "fsl,qe"); |
| 304 | if (!of_device_is_available(np)) { |
| 305 | of_node_put(np); |
| 306 | return; |
| 307 | } |
| 308 | |
| 309 | np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic"); |
| 310 | if (!np) { |
| 311 | np = of_find_node_by_type(NULL, "qeic"); |
| 312 | if (!np) |
| 313 | return; |
| 314 | } |
| 315 | |
| 316 | if (machine_is(p1021_mds)) |
| 317 | qe_ic_init(np, 0, qe_ic_cascade_low_mpic, |
| 318 | qe_ic_cascade_high_mpic); |
| 319 | else |
| 320 | qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL); |
| 321 | of_node_put(np); |
| 322 | } |
| 323 | #else |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 324 | static void __init mpc85xx_mds_qe_init(void) { } |
| 325 | static void __init mpc85xx_mds_qeic_init(void) { } |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 326 | #endif /* CONFIG_QUICC_ENGINE */ |
Kumar Gala | 152d018 | 2009-05-15 00:37:35 -0500 | [diff] [blame] | 327 | |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 328 | static void __init mpc85xx_mds_setup_arch(void) |
| 329 | { |
| 330 | #ifdef CONFIG_PCI |
| 331 | struct pci_controller *hose; |
Alexander Graf | 6d4f2fb | 2010-08-31 04:15:22 +0200 | [diff] [blame] | 332 | struct device_node *np; |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 333 | #endif |
| 334 | dma_addr_t max = 0xffffffff; |
| 335 | |
| 336 | if (ppc_md.progress) |
| 337 | ppc_md.progress("mpc85xx_mds_setup_arch()", 0); |
| 338 | |
| 339 | #ifdef CONFIG_PCI |
| 340 | for_each_node_by_type(np, "pci") { |
| 341 | if (of_device_is_compatible(np, "fsl,mpc8540-pci") || |
| 342 | of_device_is_compatible(np, "fsl,mpc8548-pcie")) { |
| 343 | struct resource rsrc; |
| 344 | of_address_to_resource(np, 0, &rsrc); |
| 345 | if ((rsrc.start & 0xfffff) == 0x8000) |
| 346 | fsl_add_bridge(np, 1); |
| 347 | else |
| 348 | fsl_add_bridge(np, 0); |
| 349 | |
| 350 | hose = pci_find_hose_for_OF_device(np); |
| 351 | max = min(max, hose->dma_window_base_cur + |
| 352 | hose->dma_window_size); |
| 353 | } |
| 354 | } |
| 355 | #endif |
| 356 | |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 357 | mpc85xx_smp_init(); |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 358 | |
| 359 | mpc85xx_mds_qe_init(); |
| 360 | |
Kumar Gala | 152d018 | 2009-05-15 00:37:35 -0500 | [diff] [blame] | 361 | #ifdef CONFIG_SWIOTLB |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 362 | if (memblock_end_of_DRAM() > max) { |
Kumar Gala | 152d018 | 2009-05-15 00:37:35 -0500 | [diff] [blame] | 363 | ppc_swiotlb_enable = 1; |
FUJITA Tomonori | 3702977 | 2009-08-04 19:08:23 +0000 | [diff] [blame] | 364 | set_pci_dma_ops(&swiotlb_dma_ops); |
FUJITA Tomonori | 762afb7 | 2009-08-04 19:08:22 +0000 | [diff] [blame] | 365 | ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; |
Kumar Gala | 152d018 | 2009-05-15 00:37:35 -0500 | [diff] [blame] | 366 | } |
| 367 | #endif |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 368 | } |
| 369 | |
Andy Fleming | 94833a4 | 2008-05-02 18:56:41 -0500 | [diff] [blame] | 370 | |
| 371 | static int __init board_fixups(void) |
| 372 | { |
Kay Sievers | aab0d37 | 2008-12-04 10:02:56 -0800 | [diff] [blame] | 373 | char phy_id[20]; |
Andy Fleming | 94833a4 | 2008-05-02 18:56:41 -0500 | [diff] [blame] | 374 | char *compstrs[2] = {"fsl,gianfar-mdio", "fsl,ucc-mdio"}; |
| 375 | struct device_node *mdio; |
| 376 | struct resource res; |
| 377 | int i; |
| 378 | |
| 379 | for (i = 0; i < ARRAY_SIZE(compstrs); i++) { |
| 380 | mdio = of_find_compatible_node(NULL, NULL, compstrs[i]); |
| 381 | |
| 382 | of_address_to_resource(mdio, 0, &res); |
Kay Sievers | aab0d37 | 2008-12-04 10:02:56 -0800 | [diff] [blame] | 383 | snprintf(phy_id, sizeof(phy_id), "%llx:%02x", |
Kumar Gala | 24a9959 | 2008-12-03 09:31:35 -0600 | [diff] [blame] | 384 | (unsigned long long)res.start, 1); |
Andy Fleming | 94833a4 | 2008-05-02 18:56:41 -0500 | [diff] [blame] | 385 | |
| 386 | phy_register_fixup_for_id(phy_id, mpc8568_fixup_125_clock); |
| 387 | phy_register_fixup_for_id(phy_id, mpc8568_mds_phy_fixups); |
| 388 | |
| 389 | /* Register a workaround for errata */ |
Kay Sievers | aab0d37 | 2008-12-04 10:02:56 -0800 | [diff] [blame] | 390 | snprintf(phy_id, sizeof(phy_id), "%llx:%02x", |
Kumar Gala | 24a9959 | 2008-12-03 09:31:35 -0600 | [diff] [blame] | 391 | (unsigned long long)res.start, 7); |
Andy Fleming | 94833a4 | 2008-05-02 18:56:41 -0500 | [diff] [blame] | 392 | phy_register_fixup_for_id(phy_id, mpc8568_mds_phy_fixups); |
| 393 | |
| 394 | of_node_put(mdio); |
| 395 | } |
| 396 | |
| 397 | return 0; |
| 398 | } |
Haiying Wang | ea5130d | 2009-04-29 14:14:33 -0400 | [diff] [blame] | 399 | machine_arch_initcall(mpc8568_mds, board_fixups); |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 400 | machine_arch_initcall(mpc8569_mds, board_fixups); |
Andy Fleming | 94833a4 | 2008-05-02 18:56:41 -0500 | [diff] [blame] | 401 | |
Kumar Gala | 23f510b | 2007-02-17 16:29:36 -0600 | [diff] [blame] | 402 | static int __init mpc85xx_publish_devices(void) |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 403 | { |
Anton Vorontsov | e98efaf | 2010-02-06 00:06:26 +0300 | [diff] [blame] | 404 | if (machine_is(mpc8568_mds)) |
| 405 | simple_gpiochip_init("fsl,mpc8568mds-bcsr-gpio"); |
Anton Vorontsov | 9b9d401 | 2009-08-19 03:28:21 +0400 | [diff] [blame] | 406 | if (machine_is(mpc8569_mds)) |
| 407 | simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio"); |
| 408 | |
Timur Tabi | 8a95bc8 | 2011-11-30 10:19:17 -0600 | [diff] [blame] | 409 | return mpc85xx_common_publish_devices(); |
Haiying Wang | 48936a08 | 2010-05-21 10:16:12 -0400 | [diff] [blame] | 410 | } |
| 411 | |
Haiying Wang | ea5130d | 2009-04-29 14:14:33 -0400 | [diff] [blame] | 412 | machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices); |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 413 | machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices); |
Dmitry Eremin-Solenikov | 46d026a | 2011-11-17 21:56:17 +0400 | [diff] [blame] | 414 | machine_device_initcall(p1021_mds, mpc85xx_common_publish_devices); |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 415 | |
Kumar Gala | 152d018 | 2009-05-15 00:37:35 -0500 | [diff] [blame] | 416 | machine_arch_initcall(mpc8568_mds, swiotlb_setup_bus_notifier); |
| 417 | machine_arch_initcall(mpc8569_mds, swiotlb_setup_bus_notifier); |
Haiying Wang | 48936a08 | 2010-05-21 10:16:12 -0400 | [diff] [blame] | 418 | machine_arch_initcall(p1021_mds, swiotlb_setup_bus_notifier); |
Kumar Gala | 152d018 | 2009-05-15 00:37:35 -0500 | [diff] [blame] | 419 | |
Kumar Gala | 23f510b | 2007-02-17 16:29:36 -0600 | [diff] [blame] | 420 | static void __init mpc85xx_mds_pic_init(void) |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 421 | { |
Kyle Moffett | e55d7f7 | 2011-12-22 10:19:14 +0000 | [diff] [blame] | 422 | struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | |
Kyle Moffett | 5019609 | 2011-12-22 10:19:12 +0000 | [diff] [blame] | 423 | MPIC_SINGLE_DEST_CPU, |
Kumar Gala | b533f8a | 2007-07-03 02:35:35 -0500 | [diff] [blame] | 424 | 0, 256, " OpenPIC "); |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 425 | BUG_ON(mpic == NULL); |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 426 | |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 427 | mpic_init(mpic); |
Anton Vorontsov | 99d8238f | 2010-06-08 09:55:57 +0000 | [diff] [blame] | 428 | mpc85xx_mds_qeic_init(); |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 429 | } |
| 430 | |
Kumar Gala | 23f510b | 2007-02-17 16:29:36 -0600 | [diff] [blame] | 431 | static int __init mpc85xx_mds_probe(void) |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 432 | { |
Kumar Gala | 6936c62 | 2007-02-17 16:19:34 -0600 | [diff] [blame] | 433 | unsigned long root = of_get_flat_dt_root(); |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 434 | |
Kumar Gala | 6936c62 | 2007-02-17 16:19:34 -0600 | [diff] [blame] | 435 | return of_flat_dt_is_compatible(root, "MPC85xxMDS"); |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 436 | } |
| 437 | |
Haiying Wang | ea5130d | 2009-04-29 14:14:33 -0400 | [diff] [blame] | 438 | define_machine(mpc8568_mds) { |
| 439 | .name = "MPC8568 MDS", |
Kumar Gala | 23f510b | 2007-02-17 16:29:36 -0600 | [diff] [blame] | 440 | .probe = mpc85xx_mds_probe, |
| 441 | .setup_arch = mpc85xx_mds_setup_arch, |
| 442 | .init_IRQ = mpc85xx_mds_pic_init, |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 443 | .get_irq = mpic_get_irq, |
Kumar Gala | e1c1575 | 2007-10-04 01:04:57 -0500 | [diff] [blame] | 444 | .restart = fsl_rstcr_restart, |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 445 | .calibrate_decr = generic_calibrate_decr, |
| 446 | .progress = udbg_progress, |
Kumar Gala | 2af8569 | 2007-09-10 14:30:33 -0500 | [diff] [blame] | 447 | #ifdef CONFIG_PCI |
Kumar Gala | aa3c112 | 2007-07-16 10:45:07 -0500 | [diff] [blame] | 448 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
Kumar Gala | 2af8569 | 2007-09-10 14:30:33 -0500 | [diff] [blame] | 449 | #endif |
Andy Fleming | c2882bb | 2007-02-09 17:28:31 -0600 | [diff] [blame] | 450 | }; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 451 | |
| 452 | static int __init mpc8569_mds_probe(void) |
| 453 | { |
| 454 | unsigned long root = of_get_flat_dt_root(); |
| 455 | |
| 456 | return of_flat_dt_is_compatible(root, "fsl,MPC8569EMDS"); |
| 457 | } |
| 458 | |
| 459 | define_machine(mpc8569_mds) { |
| 460 | .name = "MPC8569 MDS", |
| 461 | .probe = mpc8569_mds_probe, |
| 462 | .setup_arch = mpc85xx_mds_setup_arch, |
| 463 | .init_IRQ = mpc85xx_mds_pic_init, |
| 464 | .get_irq = mpic_get_irq, |
| 465 | .restart = fsl_rstcr_restart, |
| 466 | .calibrate_decr = generic_calibrate_decr, |
| 467 | .progress = udbg_progress, |
| 468 | #ifdef CONFIG_PCI |
| 469 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
| 470 | #endif |
| 471 | }; |
Haiying Wang | 48936a08 | 2010-05-21 10:16:12 -0400 | [diff] [blame] | 472 | |
| 473 | static int __init p1021_mds_probe(void) |
| 474 | { |
| 475 | unsigned long root = of_get_flat_dt_root(); |
| 476 | |
| 477 | return of_flat_dt_is_compatible(root, "fsl,P1021MDS"); |
| 478 | |
| 479 | } |
| 480 | |
| 481 | define_machine(p1021_mds) { |
| 482 | .name = "P1021 MDS", |
| 483 | .probe = p1021_mds_probe, |
| 484 | .setup_arch = mpc85xx_mds_setup_arch, |
| 485 | .init_IRQ = mpc85xx_mds_pic_init, |
| 486 | .get_irq = mpic_get_irq, |
| 487 | .restart = fsl_rstcr_restart, |
| 488 | .calibrate_decr = generic_calibrate_decr, |
| 489 | .progress = udbg_progress, |
| 490 | #ifdef CONFIG_PCI |
| 491 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
| 492 | #endif |
| 493 | }; |
| 494 | |