Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1 | /* |
Haiying Wang | 047584c | 2009-06-02 04:04:15 +0000 | [diff] [blame] | 2 | * Copyright (C) 2006-2009 Freescale Semicondutor, Inc. All rights reserved. |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3 | * |
| 4 | * Author: Shlomi Gridish <gridish@freescale.com> |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 5 | * Li Yang <leoli@freescale.com> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 6 | * |
| 7 | * Description: |
| 8 | * QE UCC Gigabit Ethernet Driver |
| 9 | * |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 10 | * This program is free software; you can redistribute it and/or modify it |
| 11 | * under the terms of the GNU General Public License as published by the |
| 12 | * Free Software Foundation; either version 2 of the License, or (at your |
| 13 | * option) any later version. |
| 14 | */ |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/errno.h> |
| 18 | #include <linux/slab.h> |
| 19 | #include <linux/stddef.h> |
Paul Gortmaker | 9d9779e | 2011-07-03 15:21:01 -0400 | [diff] [blame] | 20 | #include <linux/module.h> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 21 | #include <linux/interrupt.h> |
| 22 | #include <linux/netdevice.h> |
| 23 | #include <linux/etherdevice.h> |
| 24 | #include <linux/skbuff.h> |
| 25 | #include <linux/spinlock.h> |
| 26 | #include <linux/mm.h> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 27 | #include <linux/dma-mapping.h> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 28 | #include <linux/mii.h> |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 29 | #include <linux/phy.h> |
Timur Tabi | df19b6b | 2007-01-09 12:31:38 -0600 | [diff] [blame] | 30 | #include <linux/workqueue.h> |
Grant Likely | 0b9da33 | 2009-04-25 12:53:23 +0000 | [diff] [blame] | 31 | #include <linux/of_mdio.h> |
David Daney | 4b6ba8a | 2010-10-26 15:07:13 -0700 | [diff] [blame] | 32 | #include <linux/of_net.h> |
Stephen Rothwell | 55b6c8e | 2008-05-23 16:28:54 +1000 | [diff] [blame] | 33 | #include <linux/of_platform.h> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 34 | |
| 35 | #include <asm/uaccess.h> |
| 36 | #include <asm/irq.h> |
| 37 | #include <asm/io.h> |
| 38 | #include <asm/immap_qe.h> |
| 39 | #include <asm/qe.h> |
| 40 | #include <asm/ucc.h> |
| 41 | #include <asm/ucc_fast.h> |
Liu Yu-B13201 | 81abb43 | 2010-01-13 22:13:18 +0000 | [diff] [blame] | 42 | #include <asm/machdep.h> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 43 | |
| 44 | #include "ucc_geth.h" |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 45 | #include "fsl_pq_mdio.h" |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 46 | |
| 47 | #undef DEBUG |
| 48 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 49 | #define ugeth_printk(level, format, arg...) \ |
| 50 | printk(level format "\n", ## arg) |
| 51 | |
| 52 | #define ugeth_dbg(format, arg...) \ |
| 53 | ugeth_printk(KERN_DEBUG , format , ## arg) |
| 54 | #define ugeth_err(format, arg...) \ |
| 55 | ugeth_printk(KERN_ERR , format , ## arg) |
| 56 | #define ugeth_info(format, arg...) \ |
| 57 | ugeth_printk(KERN_INFO , format , ## arg) |
| 58 | #define ugeth_warn(format, arg...) \ |
| 59 | ugeth_printk(KERN_WARNING , format , ## arg) |
| 60 | |
| 61 | #ifdef UGETH_VERBOSE_DEBUG |
| 62 | #define ugeth_vdbg ugeth_dbg |
| 63 | #else |
| 64 | #define ugeth_vdbg(fmt, args...) do { } while (0) |
| 65 | #endif /* UGETH_VERBOSE_DEBUG */ |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 66 | #define UGETH_MSG_DEFAULT (NETIF_MSG_IFUP << 1 ) - 1 |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 67 | |
Emil Medve | 88a15f2 | 2007-10-15 08:43:50 -0500 | [diff] [blame] | 68 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 69 | static DEFINE_SPINLOCK(ugeth_lock); |
| 70 | |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 71 | static struct { |
| 72 | u32 msg_enable; |
| 73 | } debug = { -1 }; |
| 74 | |
| 75 | module_param_named(debug, debug.msg_enable, int, 0); |
| 76 | MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 0xffff=all)"); |
| 77 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 78 | static struct ucc_geth_info ugeth_primary_info = { |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 79 | .uf_info = { |
| 80 | .bd_mem_part = MEM_PART_SYSTEM, |
| 81 | .rtsm = UCC_FAST_SEND_IDLES_BETWEEN_FRAMES, |
| 82 | .max_rx_buf_length = 1536, |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 83 | /* adjusted at startup if max-speed 1000 */ |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 84 | .urfs = UCC_GETH_URFS_INIT, |
| 85 | .urfet = UCC_GETH_URFET_INIT, |
| 86 | .urfset = UCC_GETH_URFSET_INIT, |
| 87 | .utfs = UCC_GETH_UTFS_INIT, |
| 88 | .utfet = UCC_GETH_UTFET_INIT, |
| 89 | .utftt = UCC_GETH_UTFTT_INIT, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 90 | .ufpt = 256, |
| 91 | .mode = UCC_FAST_PROTOCOL_MODE_ETHERNET, |
| 92 | .ttx_trx = UCC_FAST_GUMR_TRANSPARENT_TTX_TRX_NORMAL, |
| 93 | .tenc = UCC_FAST_TX_ENCODING_NRZ, |
| 94 | .renc = UCC_FAST_RX_ENCODING_NRZ, |
| 95 | .tcrc = UCC_FAST_16_BIT_CRC, |
| 96 | .synl = UCC_FAST_SYNC_LEN_NOT_USED, |
| 97 | }, |
| 98 | .numQueuesTx = 1, |
| 99 | .numQueuesRx = 1, |
| 100 | .extendedFilteringChainPointer = ((uint32_t) NULL), |
| 101 | .typeorlen = 3072 /*1536 */ , |
| 102 | .nonBackToBackIfgPart1 = 0x40, |
| 103 | .nonBackToBackIfgPart2 = 0x60, |
| 104 | .miminumInterFrameGapEnforcement = 0x50, |
| 105 | .backToBackInterFrameGap = 0x60, |
| 106 | .mblinterval = 128, |
| 107 | .nortsrbytetime = 5, |
| 108 | .fracsiz = 1, |
| 109 | .strictpriorityq = 0xff, |
| 110 | .altBebTruncation = 0xa, |
| 111 | .excessDefer = 1, |
| 112 | .maxRetransmission = 0xf, |
| 113 | .collisionWindow = 0x37, |
| 114 | .receiveFlowControl = 1, |
Li Yang | ac42185 | 2007-07-19 11:47:47 +0800 | [diff] [blame] | 115 | .transmitFlowControl = 1, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 116 | .maxGroupAddrInHash = 4, |
| 117 | .maxIndAddrInHash = 4, |
| 118 | .prel = 7, |
Joakim Tjernlund | 70f8002 | 2012-04-29 22:36:55 +0000 | [diff] [blame] | 119 | .maxFrameLength = 1518+16, /* Add extra bytes for VLANs etc. */ |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 120 | .minFrameLength = 64, |
Joakim Tjernlund | 70f8002 | 2012-04-29 22:36:55 +0000 | [diff] [blame] | 121 | .maxD1Length = 1520+16, /* Add extra bytes for VLANs etc. */ |
| 122 | .maxD2Length = 1520+16, /* Add extra bytes for VLANs etc. */ |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 123 | .vlantype = 0x8100, |
| 124 | .ecamptr = ((uint32_t) NULL), |
| 125 | .eventRegMask = UCCE_OTHER, |
| 126 | .pausePeriod = 0xf000, |
| 127 | .interruptcoalescingmaxvalue = {1, 1, 1, 1, 1, 1, 1, 1}, |
| 128 | .bdRingLenTx = { |
| 129 | TX_BD_RING_LEN, |
| 130 | TX_BD_RING_LEN, |
| 131 | TX_BD_RING_LEN, |
| 132 | TX_BD_RING_LEN, |
| 133 | TX_BD_RING_LEN, |
| 134 | TX_BD_RING_LEN, |
| 135 | TX_BD_RING_LEN, |
| 136 | TX_BD_RING_LEN}, |
| 137 | |
| 138 | .bdRingLenRx = { |
| 139 | RX_BD_RING_LEN, |
| 140 | RX_BD_RING_LEN, |
| 141 | RX_BD_RING_LEN, |
| 142 | RX_BD_RING_LEN, |
| 143 | RX_BD_RING_LEN, |
| 144 | RX_BD_RING_LEN, |
| 145 | RX_BD_RING_LEN, |
| 146 | RX_BD_RING_LEN}, |
| 147 | |
| 148 | .numStationAddresses = UCC_GETH_NUM_OF_STATION_ADDRESSES_1, |
| 149 | .largestexternallookupkeysize = |
| 150 | QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_NONE, |
Li Yang | ac42185 | 2007-07-19 11:47:47 +0800 | [diff] [blame] | 151 | .statisticsMode = UCC_GETH_STATISTICS_GATHERING_MODE_HARDWARE | |
| 152 | UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_TX | |
| 153 | UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_RX, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 154 | .vlanOperationTagged = UCC_GETH_VLAN_OPERATION_TAGGED_NOP, |
| 155 | .vlanOperationNonTagged = UCC_GETH_VLAN_OPERATION_NON_TAGGED_NOP, |
| 156 | .rxQoSMode = UCC_GETH_QOS_MODE_DEFAULT, |
| 157 | .aufc = UPSMR_AUTOMATIC_FLOW_CONTROL_MODE_NONE, |
| 158 | .padAndCrc = MACCFG2_PAD_AND_CRC_MODE_PAD_AND_CRC, |
Joakim Tjernlund | ffea31e | 2008-03-06 18:48:46 +0800 | [diff] [blame] | 159 | .numThreadsTx = UCC_GETH_NUM_OF_THREADS_1, |
| 160 | .numThreadsRx = UCC_GETH_NUM_OF_THREADS_1, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 161 | .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, |
| 162 | .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, |
| 163 | }; |
| 164 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 165 | static struct ucc_geth_info ugeth_info[8]; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 166 | |
| 167 | #ifdef DEBUG |
| 168 | static void mem_disp(u8 *addr, int size) |
| 169 | { |
| 170 | u8 *i; |
| 171 | int size16Aling = (size >> 4) << 4; |
| 172 | int size4Aling = (size >> 2) << 2; |
| 173 | int notAlign = 0; |
| 174 | if (size % 16) |
| 175 | notAlign = 1; |
| 176 | |
| 177 | for (i = addr; (u32) i < (u32) addr + size16Aling; i += 16) |
| 178 | printk("0x%08x: %08x %08x %08x %08x\r\n", |
| 179 | (u32) i, |
| 180 | *((u32 *) (i)), |
| 181 | *((u32 *) (i + 4)), |
| 182 | *((u32 *) (i + 8)), *((u32 *) (i + 12))); |
| 183 | if (notAlign == 1) |
| 184 | printk("0x%08x: ", (u32) i); |
| 185 | for (; (u32) i < (u32) addr + size4Aling; i += 4) |
| 186 | printk("%08x ", *((u32 *) (i))); |
| 187 | for (; (u32) i < (u32) addr + size; i++) |
| 188 | printk("%02x", *((u8 *) (i))); |
| 189 | if (notAlign == 1) |
| 190 | printk("\r\n"); |
| 191 | } |
| 192 | #endif /* DEBUG */ |
| 193 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 194 | static struct list_head *dequeue(struct list_head *lh) |
| 195 | { |
| 196 | unsigned long flags; |
| 197 | |
Scott Wood | 1083cfe | 2006-12-07 13:31:07 -0600 | [diff] [blame] | 198 | spin_lock_irqsave(&ugeth_lock, flags); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 199 | if (!list_empty(lh)) { |
| 200 | struct list_head *node = lh->next; |
| 201 | list_del(node); |
Scott Wood | 1083cfe | 2006-12-07 13:31:07 -0600 | [diff] [blame] | 202 | spin_unlock_irqrestore(&ugeth_lock, flags); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 203 | return node; |
| 204 | } else { |
Scott Wood | 1083cfe | 2006-12-07 13:31:07 -0600 | [diff] [blame] | 205 | spin_unlock_irqrestore(&ugeth_lock, flags); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 206 | return NULL; |
| 207 | } |
| 208 | } |
| 209 | |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 210 | static struct sk_buff *get_new_skb(struct ucc_geth_private *ugeth, |
| 211 | u8 __iomem *bd) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 212 | { |
| 213 | struct sk_buff *skb = NULL; |
| 214 | |
Anton Vorontsov | 50f238f | 2009-07-07 08:38:42 +0000 | [diff] [blame] | 215 | skb = __skb_dequeue(&ugeth->rx_recycle); |
| 216 | if (!skb) |
Pradeep A Dalvi | 21a4e46 | 2012-02-05 02:50:10 +0000 | [diff] [blame] | 217 | skb = netdev_alloc_skb(ugeth->ndev, |
| 218 | ugeth->ug_info->uf_info.max_rx_buf_length + |
| 219 | UCC_GETH_RX_DATA_BUF_ALIGNMENT); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 220 | if (skb == NULL) |
| 221 | return NULL; |
| 222 | |
| 223 | /* We need the data buffer to be aligned properly. We will reserve |
| 224 | * as many bytes as needed to align the data properly |
| 225 | */ |
| 226 | skb_reserve(skb, |
| 227 | UCC_GETH_RX_DATA_BUF_ALIGNMENT - |
| 228 | (((unsigned)skb->data) & (UCC_GETH_RX_DATA_BUF_ALIGNMENT - |
| 229 | 1))); |
| 230 | |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 231 | out_be32(&((struct qe_bd __iomem *)bd)->buf, |
Anton Vorontsov | da1aa63 | 2009-04-02 01:26:07 -0700 | [diff] [blame] | 232 | dma_map_single(ugeth->dev, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 233 | skb->data, |
| 234 | ugeth->ug_info->uf_info.max_rx_buf_length + |
| 235 | UCC_GETH_RX_DATA_BUF_ALIGNMENT, |
| 236 | DMA_FROM_DEVICE)); |
| 237 | |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 238 | out_be32((u32 __iomem *)bd, |
| 239 | (R_E | R_I | (in_be32((u32 __iomem*)bd) & R_W))); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 240 | |
| 241 | return skb; |
| 242 | } |
| 243 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 244 | static int rx_bd_buffer_set(struct ucc_geth_private *ugeth, u8 rxQ) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 245 | { |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 246 | u8 __iomem *bd; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 247 | u32 bd_status; |
| 248 | struct sk_buff *skb; |
| 249 | int i; |
| 250 | |
| 251 | bd = ugeth->p_rx_bd_ring[rxQ]; |
| 252 | i = 0; |
| 253 | |
| 254 | do { |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 255 | bd_status = in_be32((u32 __iomem *)bd); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 256 | skb = get_new_skb(ugeth, bd); |
| 257 | |
| 258 | if (!skb) /* If can not allocate data buffer, |
| 259 | abort. Cleanup will be elsewhere */ |
| 260 | return -ENOMEM; |
| 261 | |
| 262 | ugeth->rx_skbuff[rxQ][i] = skb; |
| 263 | |
| 264 | /* advance the BD pointer */ |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 265 | bd += sizeof(struct qe_bd); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 266 | i++; |
| 267 | } while (!(bd_status & R_W)); |
| 268 | |
| 269 | return 0; |
| 270 | } |
| 271 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 272 | static int fill_init_enet_entries(struct ucc_geth_private *ugeth, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 273 | u32 *p_start, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 274 | u8 num_entries, |
| 275 | u32 thread_size, |
| 276 | u32 thread_alignment, |
Haiying Wang | 345f842 | 2009-04-29 14:14:35 -0400 | [diff] [blame] | 277 | unsigned int risc, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 278 | int skip_page_for_first_entry) |
| 279 | { |
| 280 | u32 init_enet_offset; |
| 281 | u8 i; |
| 282 | int snum; |
| 283 | |
| 284 | for (i = 0; i < num_entries; i++) { |
| 285 | if ((snum = qe_get_snum()) < 0) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 286 | if (netif_msg_ifup(ugeth)) |
| 287 | ugeth_err("fill_init_enet_entries: Can not get SNUM."); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 288 | return snum; |
| 289 | } |
| 290 | if ((i == 0) && skip_page_for_first_entry) |
| 291 | /* First entry of Rx does not have page */ |
| 292 | init_enet_offset = 0; |
| 293 | else { |
| 294 | init_enet_offset = |
| 295 | qe_muram_alloc(thread_size, thread_alignment); |
Timur Tabi | 4c35630 | 2007-05-08 14:46:36 -0500 | [diff] [blame] | 296 | if (IS_ERR_VALUE(init_enet_offset)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 297 | if (netif_msg_ifup(ugeth)) |
| 298 | ugeth_err("fill_init_enet_entries: Can not allocate DPRAM memory."); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 299 | qe_put_snum((u8) snum); |
| 300 | return -ENOMEM; |
| 301 | } |
| 302 | } |
| 303 | *(p_start++) = |
| 304 | ((u8) snum << ENET_INIT_PARAM_SNUM_SHIFT) | init_enet_offset |
| 305 | | risc; |
| 306 | } |
| 307 | |
| 308 | return 0; |
| 309 | } |
| 310 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 311 | static int return_init_enet_entries(struct ucc_geth_private *ugeth, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 312 | u32 *p_start, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 313 | u8 num_entries, |
Haiying Wang | 345f842 | 2009-04-29 14:14:35 -0400 | [diff] [blame] | 314 | unsigned int risc, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 315 | int skip_page_for_first_entry) |
| 316 | { |
| 317 | u32 init_enet_offset; |
| 318 | u8 i; |
| 319 | int snum; |
| 320 | |
| 321 | for (i = 0; i < num_entries; i++) { |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 322 | u32 val = *p_start; |
| 323 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 324 | /* Check that this entry was actually valid -- |
| 325 | needed in case failed in allocations */ |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 326 | if ((val & ENET_INIT_PARAM_RISC_MASK) == risc) { |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 327 | snum = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 328 | (u32) (val & ENET_INIT_PARAM_SNUM_MASK) >> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 329 | ENET_INIT_PARAM_SNUM_SHIFT; |
| 330 | qe_put_snum((u8) snum); |
| 331 | if (!((i == 0) && skip_page_for_first_entry)) { |
| 332 | /* First entry of Rx does not have page */ |
| 333 | init_enet_offset = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 334 | (val & ENET_INIT_PARAM_PTR_MASK); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 335 | qe_muram_free(init_enet_offset); |
| 336 | } |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 337 | *p_start++ = 0; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 338 | } |
| 339 | } |
| 340 | |
| 341 | return 0; |
| 342 | } |
| 343 | |
| 344 | #ifdef DEBUG |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 345 | static int dump_init_enet_entries(struct ucc_geth_private *ugeth, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 346 | u32 __iomem *p_start, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 347 | u8 num_entries, |
| 348 | u32 thread_size, |
Haiying Wang | 345f842 | 2009-04-29 14:14:35 -0400 | [diff] [blame] | 349 | unsigned int risc, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 350 | int skip_page_for_first_entry) |
| 351 | { |
| 352 | u32 init_enet_offset; |
| 353 | u8 i; |
| 354 | int snum; |
| 355 | |
| 356 | for (i = 0; i < num_entries; i++) { |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 357 | u32 val = in_be32(p_start); |
| 358 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 359 | /* Check that this entry was actually valid -- |
| 360 | needed in case failed in allocations */ |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 361 | if ((val & ENET_INIT_PARAM_RISC_MASK) == risc) { |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 362 | snum = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 363 | (u32) (val & ENET_INIT_PARAM_SNUM_MASK) >> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 364 | ENET_INIT_PARAM_SNUM_SHIFT; |
| 365 | qe_put_snum((u8) snum); |
| 366 | if (!((i == 0) && skip_page_for_first_entry)) { |
| 367 | /* First entry of Rx does not have page */ |
| 368 | init_enet_offset = |
| 369 | (in_be32(p_start) & |
| 370 | ENET_INIT_PARAM_PTR_MASK); |
| 371 | ugeth_info("Init enet entry %d:", i); |
| 372 | ugeth_info("Base address: 0x%08x", |
| 373 | (u32) |
| 374 | qe_muram_addr(init_enet_offset)); |
| 375 | mem_disp(qe_muram_addr(init_enet_offset), |
| 376 | thread_size); |
| 377 | } |
| 378 | p_start++; |
| 379 | } |
| 380 | } |
| 381 | |
| 382 | return 0; |
| 383 | } |
| 384 | #endif |
| 385 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 386 | static void put_enet_addr_container(struct enet_addr_container *enet_addr_cont) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 387 | { |
| 388 | kfree(enet_addr_cont); |
| 389 | } |
| 390 | |
Timur Tabi | df19b6b | 2007-01-09 12:31:38 -0600 | [diff] [blame] | 391 | static void set_mac_addr(__be16 __iomem *reg, u8 *mac) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 392 | { |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 393 | out_be16(®[0], ((u16)mac[5] << 8) | mac[4]); |
| 394 | out_be16(®[1], ((u16)mac[3] << 8) | mac[2]); |
| 395 | out_be16(®[2], ((u16)mac[1] << 8) | mac[0]); |
| 396 | } |
| 397 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 398 | static int hw_clear_addr_in_paddr(struct ucc_geth_private *ugeth, u8 paddr_num) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 399 | { |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 400 | struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 401 | |
| 402 | if (!(paddr_num < NUM_OF_PADDRS)) { |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 403 | ugeth_warn("%s: Illagel paddr_num.", __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 404 | return -EINVAL; |
| 405 | } |
| 406 | |
| 407 | p_82xx_addr_filt = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 408 | (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth->p_rx_glbl_pram-> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 409 | addressfiltering; |
| 410 | |
| 411 | /* Writing address ff.ff.ff.ff.ff.ff disables address |
| 412 | recognition for this register */ |
| 413 | out_be16(&p_82xx_addr_filt->paddr[paddr_num].h, 0xffff); |
| 414 | out_be16(&p_82xx_addr_filt->paddr[paddr_num].m, 0xffff); |
| 415 | out_be16(&p_82xx_addr_filt->paddr[paddr_num].l, 0xffff); |
| 416 | |
| 417 | return 0; |
| 418 | } |
| 419 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 420 | static void hw_add_addr_in_hash(struct ucc_geth_private *ugeth, |
| 421 | u8 *p_enet_addr) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 422 | { |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 423 | struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 424 | u32 cecr_subblock; |
| 425 | |
| 426 | p_82xx_addr_filt = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 427 | (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth->p_rx_glbl_pram-> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 428 | addressfiltering; |
| 429 | |
| 430 | cecr_subblock = |
| 431 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); |
| 432 | |
| 433 | /* Ethernet frames are defined in Little Endian mode, |
Daniel Mack | 3ad2f3f | 2010-02-03 08:01:28 +0800 | [diff] [blame] | 434 | therefore to insert */ |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 435 | /* the address to the hash (Big Endian mode), we reverse the bytes.*/ |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 436 | |
| 437 | set_mac_addr(&p_82xx_addr_filt->taddr.h, p_enet_addr); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 438 | |
| 439 | qe_issue_cmd(QE_SET_GROUP_ADDRESS, cecr_subblock, |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 440 | QE_CR_PROTOCOL_ETHERNET, 0); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 441 | } |
| 442 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 443 | static inline int compare_addr(u8 **addr1, u8 **addr2) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 444 | { |
Joe Perches | b721e25 | 2011-11-16 09:38:06 +0000 | [diff] [blame] | 445 | return memcmp(addr1, addr2, ETH_ALEN); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 446 | } |
| 447 | |
| 448 | #ifdef DEBUG |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 449 | static void get_statistics(struct ucc_geth_private *ugeth, |
| 450 | struct ucc_geth_tx_firmware_statistics * |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 451 | tx_firmware_statistics, |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 452 | struct ucc_geth_rx_firmware_statistics * |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 453 | rx_firmware_statistics, |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 454 | struct ucc_geth_hardware_statistics *hardware_statistics) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 455 | { |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 456 | struct ucc_fast __iomem *uf_regs; |
| 457 | struct ucc_geth __iomem *ug_regs; |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 458 | struct ucc_geth_tx_firmware_statistics_pram *p_tx_fw_statistics_pram; |
| 459 | struct ucc_geth_rx_firmware_statistics_pram *p_rx_fw_statistics_pram; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 460 | |
| 461 | ug_regs = ugeth->ug_regs; |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 462 | uf_regs = (struct ucc_fast __iomem *) ug_regs; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 463 | p_tx_fw_statistics_pram = ugeth->p_tx_fw_statistics_pram; |
| 464 | p_rx_fw_statistics_pram = ugeth->p_rx_fw_statistics_pram; |
| 465 | |
| 466 | /* Tx firmware only if user handed pointer and driver actually |
| 467 | gathers Tx firmware statistics */ |
| 468 | if (tx_firmware_statistics && p_tx_fw_statistics_pram) { |
| 469 | tx_firmware_statistics->sicoltx = |
| 470 | in_be32(&p_tx_fw_statistics_pram->sicoltx); |
| 471 | tx_firmware_statistics->mulcoltx = |
| 472 | in_be32(&p_tx_fw_statistics_pram->mulcoltx); |
| 473 | tx_firmware_statistics->latecoltxfr = |
| 474 | in_be32(&p_tx_fw_statistics_pram->latecoltxfr); |
| 475 | tx_firmware_statistics->frabortduecol = |
| 476 | in_be32(&p_tx_fw_statistics_pram->frabortduecol); |
| 477 | tx_firmware_statistics->frlostinmactxer = |
| 478 | in_be32(&p_tx_fw_statistics_pram->frlostinmactxer); |
| 479 | tx_firmware_statistics->carriersenseertx = |
| 480 | in_be32(&p_tx_fw_statistics_pram->carriersenseertx); |
| 481 | tx_firmware_statistics->frtxok = |
| 482 | in_be32(&p_tx_fw_statistics_pram->frtxok); |
| 483 | tx_firmware_statistics->txfrexcessivedefer = |
| 484 | in_be32(&p_tx_fw_statistics_pram->txfrexcessivedefer); |
| 485 | tx_firmware_statistics->txpkts256 = |
| 486 | in_be32(&p_tx_fw_statistics_pram->txpkts256); |
| 487 | tx_firmware_statistics->txpkts512 = |
| 488 | in_be32(&p_tx_fw_statistics_pram->txpkts512); |
| 489 | tx_firmware_statistics->txpkts1024 = |
| 490 | in_be32(&p_tx_fw_statistics_pram->txpkts1024); |
| 491 | tx_firmware_statistics->txpktsjumbo = |
| 492 | in_be32(&p_tx_fw_statistics_pram->txpktsjumbo); |
| 493 | } |
| 494 | |
| 495 | /* Rx firmware only if user handed pointer and driver actually |
| 496 | * gathers Rx firmware statistics */ |
| 497 | if (rx_firmware_statistics && p_rx_fw_statistics_pram) { |
| 498 | int i; |
| 499 | rx_firmware_statistics->frrxfcser = |
| 500 | in_be32(&p_rx_fw_statistics_pram->frrxfcser); |
| 501 | rx_firmware_statistics->fraligner = |
| 502 | in_be32(&p_rx_fw_statistics_pram->fraligner); |
| 503 | rx_firmware_statistics->inrangelenrxer = |
| 504 | in_be32(&p_rx_fw_statistics_pram->inrangelenrxer); |
| 505 | rx_firmware_statistics->outrangelenrxer = |
| 506 | in_be32(&p_rx_fw_statistics_pram->outrangelenrxer); |
| 507 | rx_firmware_statistics->frtoolong = |
| 508 | in_be32(&p_rx_fw_statistics_pram->frtoolong); |
| 509 | rx_firmware_statistics->runt = |
| 510 | in_be32(&p_rx_fw_statistics_pram->runt); |
| 511 | rx_firmware_statistics->verylongevent = |
| 512 | in_be32(&p_rx_fw_statistics_pram->verylongevent); |
| 513 | rx_firmware_statistics->symbolerror = |
| 514 | in_be32(&p_rx_fw_statistics_pram->symbolerror); |
| 515 | rx_firmware_statistics->dropbsy = |
| 516 | in_be32(&p_rx_fw_statistics_pram->dropbsy); |
| 517 | for (i = 0; i < 0x8; i++) |
| 518 | rx_firmware_statistics->res0[i] = |
| 519 | p_rx_fw_statistics_pram->res0[i]; |
| 520 | rx_firmware_statistics->mismatchdrop = |
| 521 | in_be32(&p_rx_fw_statistics_pram->mismatchdrop); |
| 522 | rx_firmware_statistics->underpkts = |
| 523 | in_be32(&p_rx_fw_statistics_pram->underpkts); |
| 524 | rx_firmware_statistics->pkts256 = |
| 525 | in_be32(&p_rx_fw_statistics_pram->pkts256); |
| 526 | rx_firmware_statistics->pkts512 = |
| 527 | in_be32(&p_rx_fw_statistics_pram->pkts512); |
| 528 | rx_firmware_statistics->pkts1024 = |
| 529 | in_be32(&p_rx_fw_statistics_pram->pkts1024); |
| 530 | rx_firmware_statistics->pktsjumbo = |
| 531 | in_be32(&p_rx_fw_statistics_pram->pktsjumbo); |
| 532 | rx_firmware_statistics->frlossinmacer = |
| 533 | in_be32(&p_rx_fw_statistics_pram->frlossinmacer); |
| 534 | rx_firmware_statistics->pausefr = |
| 535 | in_be32(&p_rx_fw_statistics_pram->pausefr); |
| 536 | for (i = 0; i < 0x4; i++) |
| 537 | rx_firmware_statistics->res1[i] = |
| 538 | p_rx_fw_statistics_pram->res1[i]; |
| 539 | rx_firmware_statistics->removevlan = |
| 540 | in_be32(&p_rx_fw_statistics_pram->removevlan); |
| 541 | rx_firmware_statistics->replacevlan = |
| 542 | in_be32(&p_rx_fw_statistics_pram->replacevlan); |
| 543 | rx_firmware_statistics->insertvlan = |
| 544 | in_be32(&p_rx_fw_statistics_pram->insertvlan); |
| 545 | } |
| 546 | |
| 547 | /* Hardware only if user handed pointer and driver actually |
| 548 | gathers hardware statistics */ |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 549 | if (hardware_statistics && |
| 550 | (in_be32(&uf_regs->upsmr) & UCC_GETH_UPSMR_HSE)) { |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 551 | hardware_statistics->tx64 = in_be32(&ug_regs->tx64); |
| 552 | hardware_statistics->tx127 = in_be32(&ug_regs->tx127); |
| 553 | hardware_statistics->tx255 = in_be32(&ug_regs->tx255); |
| 554 | hardware_statistics->rx64 = in_be32(&ug_regs->rx64); |
| 555 | hardware_statistics->rx127 = in_be32(&ug_regs->rx127); |
| 556 | hardware_statistics->rx255 = in_be32(&ug_regs->rx255); |
| 557 | hardware_statistics->txok = in_be32(&ug_regs->txok); |
| 558 | hardware_statistics->txcf = in_be16(&ug_regs->txcf); |
| 559 | hardware_statistics->tmca = in_be32(&ug_regs->tmca); |
| 560 | hardware_statistics->tbca = in_be32(&ug_regs->tbca); |
| 561 | hardware_statistics->rxfok = in_be32(&ug_regs->rxfok); |
| 562 | hardware_statistics->rxbok = in_be32(&ug_regs->rxbok); |
| 563 | hardware_statistics->rbyt = in_be32(&ug_regs->rbyt); |
| 564 | hardware_statistics->rmca = in_be32(&ug_regs->rmca); |
| 565 | hardware_statistics->rbca = in_be32(&ug_regs->rbca); |
| 566 | } |
| 567 | } |
| 568 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 569 | static void dump_bds(struct ucc_geth_private *ugeth) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 570 | { |
| 571 | int i; |
| 572 | int length; |
| 573 | |
| 574 | for (i = 0; i < ugeth->ug_info->numQueuesTx; i++) { |
| 575 | if (ugeth->p_tx_bd_ring[i]) { |
| 576 | length = |
| 577 | (ugeth->ug_info->bdRingLenTx[i] * |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 578 | sizeof(struct qe_bd)); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 579 | ugeth_info("TX BDs[%d]", i); |
| 580 | mem_disp(ugeth->p_tx_bd_ring[i], length); |
| 581 | } |
| 582 | } |
| 583 | for (i = 0; i < ugeth->ug_info->numQueuesRx; i++) { |
| 584 | if (ugeth->p_rx_bd_ring[i]) { |
| 585 | length = |
| 586 | (ugeth->ug_info->bdRingLenRx[i] * |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 587 | sizeof(struct qe_bd)); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 588 | ugeth_info("RX BDs[%d]", i); |
| 589 | mem_disp(ugeth->p_rx_bd_ring[i], length); |
| 590 | } |
| 591 | } |
| 592 | } |
| 593 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 594 | static void dump_regs(struct ucc_geth_private *ugeth) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 595 | { |
| 596 | int i; |
| 597 | |
Sergey Matyukevich | 3ac3774 | 2010-07-28 08:05:21 +0000 | [diff] [blame] | 598 | ugeth_info("UCC%d Geth registers:", ugeth->ug_info->uf_info.ucc_num + 1); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 599 | ugeth_info("Base address: 0x%08x", (u32) ugeth->ug_regs); |
| 600 | |
| 601 | ugeth_info("maccfg1 : addr - 0x%08x, val - 0x%08x", |
| 602 | (u32) & ugeth->ug_regs->maccfg1, |
| 603 | in_be32(&ugeth->ug_regs->maccfg1)); |
| 604 | ugeth_info("maccfg2 : addr - 0x%08x, val - 0x%08x", |
| 605 | (u32) & ugeth->ug_regs->maccfg2, |
| 606 | in_be32(&ugeth->ug_regs->maccfg2)); |
| 607 | ugeth_info("ipgifg : addr - 0x%08x, val - 0x%08x", |
| 608 | (u32) & ugeth->ug_regs->ipgifg, |
| 609 | in_be32(&ugeth->ug_regs->ipgifg)); |
| 610 | ugeth_info("hafdup : addr - 0x%08x, val - 0x%08x", |
| 611 | (u32) & ugeth->ug_regs->hafdup, |
| 612 | in_be32(&ugeth->ug_regs->hafdup)); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 613 | ugeth_info("ifctl : addr - 0x%08x, val - 0x%08x", |
| 614 | (u32) & ugeth->ug_regs->ifctl, |
| 615 | in_be32(&ugeth->ug_regs->ifctl)); |
| 616 | ugeth_info("ifstat : addr - 0x%08x, val - 0x%08x", |
| 617 | (u32) & ugeth->ug_regs->ifstat, |
| 618 | in_be32(&ugeth->ug_regs->ifstat)); |
| 619 | ugeth_info("macstnaddr1: addr - 0x%08x, val - 0x%08x", |
| 620 | (u32) & ugeth->ug_regs->macstnaddr1, |
| 621 | in_be32(&ugeth->ug_regs->macstnaddr1)); |
| 622 | ugeth_info("macstnaddr2: addr - 0x%08x, val - 0x%08x", |
| 623 | (u32) & ugeth->ug_regs->macstnaddr2, |
| 624 | in_be32(&ugeth->ug_regs->macstnaddr2)); |
| 625 | ugeth_info("uempr : addr - 0x%08x, val - 0x%08x", |
| 626 | (u32) & ugeth->ug_regs->uempr, |
| 627 | in_be32(&ugeth->ug_regs->uempr)); |
| 628 | ugeth_info("utbipar : addr - 0x%08x, val - 0x%08x", |
| 629 | (u32) & ugeth->ug_regs->utbipar, |
| 630 | in_be32(&ugeth->ug_regs->utbipar)); |
| 631 | ugeth_info("uescr : addr - 0x%08x, val - 0x%04x", |
| 632 | (u32) & ugeth->ug_regs->uescr, |
| 633 | in_be16(&ugeth->ug_regs->uescr)); |
| 634 | ugeth_info("tx64 : addr - 0x%08x, val - 0x%08x", |
| 635 | (u32) & ugeth->ug_regs->tx64, |
| 636 | in_be32(&ugeth->ug_regs->tx64)); |
| 637 | ugeth_info("tx127 : addr - 0x%08x, val - 0x%08x", |
| 638 | (u32) & ugeth->ug_regs->tx127, |
| 639 | in_be32(&ugeth->ug_regs->tx127)); |
| 640 | ugeth_info("tx255 : addr - 0x%08x, val - 0x%08x", |
| 641 | (u32) & ugeth->ug_regs->tx255, |
| 642 | in_be32(&ugeth->ug_regs->tx255)); |
| 643 | ugeth_info("rx64 : addr - 0x%08x, val - 0x%08x", |
| 644 | (u32) & ugeth->ug_regs->rx64, |
| 645 | in_be32(&ugeth->ug_regs->rx64)); |
| 646 | ugeth_info("rx127 : addr - 0x%08x, val - 0x%08x", |
| 647 | (u32) & ugeth->ug_regs->rx127, |
| 648 | in_be32(&ugeth->ug_regs->rx127)); |
| 649 | ugeth_info("rx255 : addr - 0x%08x, val - 0x%08x", |
| 650 | (u32) & ugeth->ug_regs->rx255, |
| 651 | in_be32(&ugeth->ug_regs->rx255)); |
| 652 | ugeth_info("txok : addr - 0x%08x, val - 0x%08x", |
| 653 | (u32) & ugeth->ug_regs->txok, |
| 654 | in_be32(&ugeth->ug_regs->txok)); |
| 655 | ugeth_info("txcf : addr - 0x%08x, val - 0x%04x", |
| 656 | (u32) & ugeth->ug_regs->txcf, |
| 657 | in_be16(&ugeth->ug_regs->txcf)); |
| 658 | ugeth_info("tmca : addr - 0x%08x, val - 0x%08x", |
| 659 | (u32) & ugeth->ug_regs->tmca, |
| 660 | in_be32(&ugeth->ug_regs->tmca)); |
| 661 | ugeth_info("tbca : addr - 0x%08x, val - 0x%08x", |
| 662 | (u32) & ugeth->ug_regs->tbca, |
| 663 | in_be32(&ugeth->ug_regs->tbca)); |
| 664 | ugeth_info("rxfok : addr - 0x%08x, val - 0x%08x", |
| 665 | (u32) & ugeth->ug_regs->rxfok, |
| 666 | in_be32(&ugeth->ug_regs->rxfok)); |
| 667 | ugeth_info("rxbok : addr - 0x%08x, val - 0x%08x", |
| 668 | (u32) & ugeth->ug_regs->rxbok, |
| 669 | in_be32(&ugeth->ug_regs->rxbok)); |
| 670 | ugeth_info("rbyt : addr - 0x%08x, val - 0x%08x", |
| 671 | (u32) & ugeth->ug_regs->rbyt, |
| 672 | in_be32(&ugeth->ug_regs->rbyt)); |
| 673 | ugeth_info("rmca : addr - 0x%08x, val - 0x%08x", |
| 674 | (u32) & ugeth->ug_regs->rmca, |
| 675 | in_be32(&ugeth->ug_regs->rmca)); |
| 676 | ugeth_info("rbca : addr - 0x%08x, val - 0x%08x", |
| 677 | (u32) & ugeth->ug_regs->rbca, |
| 678 | in_be32(&ugeth->ug_regs->rbca)); |
| 679 | ugeth_info("scar : addr - 0x%08x, val - 0x%08x", |
| 680 | (u32) & ugeth->ug_regs->scar, |
| 681 | in_be32(&ugeth->ug_regs->scar)); |
| 682 | ugeth_info("scam : addr - 0x%08x, val - 0x%08x", |
| 683 | (u32) & ugeth->ug_regs->scam, |
| 684 | in_be32(&ugeth->ug_regs->scam)); |
| 685 | |
| 686 | if (ugeth->p_thread_data_tx) { |
| 687 | int numThreadsTxNumerical; |
| 688 | switch (ugeth->ug_info->numThreadsTx) { |
| 689 | case UCC_GETH_NUM_OF_THREADS_1: |
| 690 | numThreadsTxNumerical = 1; |
| 691 | break; |
| 692 | case UCC_GETH_NUM_OF_THREADS_2: |
| 693 | numThreadsTxNumerical = 2; |
| 694 | break; |
| 695 | case UCC_GETH_NUM_OF_THREADS_4: |
| 696 | numThreadsTxNumerical = 4; |
| 697 | break; |
| 698 | case UCC_GETH_NUM_OF_THREADS_6: |
| 699 | numThreadsTxNumerical = 6; |
| 700 | break; |
| 701 | case UCC_GETH_NUM_OF_THREADS_8: |
| 702 | numThreadsTxNumerical = 8; |
| 703 | break; |
| 704 | default: |
| 705 | numThreadsTxNumerical = 0; |
| 706 | break; |
| 707 | } |
| 708 | |
| 709 | ugeth_info("Thread data TXs:"); |
| 710 | ugeth_info("Base address: 0x%08x", |
| 711 | (u32) ugeth->p_thread_data_tx); |
| 712 | for (i = 0; i < numThreadsTxNumerical; i++) { |
| 713 | ugeth_info("Thread data TX[%d]:", i); |
| 714 | ugeth_info("Base address: 0x%08x", |
| 715 | (u32) & ugeth->p_thread_data_tx[i]); |
| 716 | mem_disp((u8 *) & ugeth->p_thread_data_tx[i], |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 717 | sizeof(struct ucc_geth_thread_data_tx)); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 718 | } |
| 719 | } |
| 720 | if (ugeth->p_thread_data_rx) { |
| 721 | int numThreadsRxNumerical; |
| 722 | switch (ugeth->ug_info->numThreadsRx) { |
| 723 | case UCC_GETH_NUM_OF_THREADS_1: |
| 724 | numThreadsRxNumerical = 1; |
| 725 | break; |
| 726 | case UCC_GETH_NUM_OF_THREADS_2: |
| 727 | numThreadsRxNumerical = 2; |
| 728 | break; |
| 729 | case UCC_GETH_NUM_OF_THREADS_4: |
| 730 | numThreadsRxNumerical = 4; |
| 731 | break; |
| 732 | case UCC_GETH_NUM_OF_THREADS_6: |
| 733 | numThreadsRxNumerical = 6; |
| 734 | break; |
| 735 | case UCC_GETH_NUM_OF_THREADS_8: |
| 736 | numThreadsRxNumerical = 8; |
| 737 | break; |
| 738 | default: |
| 739 | numThreadsRxNumerical = 0; |
| 740 | break; |
| 741 | } |
| 742 | |
| 743 | ugeth_info("Thread data RX:"); |
| 744 | ugeth_info("Base address: 0x%08x", |
| 745 | (u32) ugeth->p_thread_data_rx); |
| 746 | for (i = 0; i < numThreadsRxNumerical; i++) { |
| 747 | ugeth_info("Thread data RX[%d]:", i); |
| 748 | ugeth_info("Base address: 0x%08x", |
| 749 | (u32) & ugeth->p_thread_data_rx[i]); |
| 750 | mem_disp((u8 *) & ugeth->p_thread_data_rx[i], |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 751 | sizeof(struct ucc_geth_thread_data_rx)); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 752 | } |
| 753 | } |
| 754 | if (ugeth->p_exf_glbl_param) { |
| 755 | ugeth_info("EXF global param:"); |
| 756 | ugeth_info("Base address: 0x%08x", |
| 757 | (u32) ugeth->p_exf_glbl_param); |
| 758 | mem_disp((u8 *) ugeth->p_exf_glbl_param, |
| 759 | sizeof(*ugeth->p_exf_glbl_param)); |
| 760 | } |
| 761 | if (ugeth->p_tx_glbl_pram) { |
| 762 | ugeth_info("TX global param:"); |
| 763 | ugeth_info("Base address: 0x%08x", (u32) ugeth->p_tx_glbl_pram); |
| 764 | ugeth_info("temoder : addr - 0x%08x, val - 0x%04x", |
| 765 | (u32) & ugeth->p_tx_glbl_pram->temoder, |
| 766 | in_be16(&ugeth->p_tx_glbl_pram->temoder)); |
| 767 | ugeth_info("sqptr : addr - 0x%08x, val - 0x%08x", |
| 768 | (u32) & ugeth->p_tx_glbl_pram->sqptr, |
| 769 | in_be32(&ugeth->p_tx_glbl_pram->sqptr)); |
| 770 | ugeth_info("schedulerbasepointer: addr - 0x%08x, val - 0x%08x", |
| 771 | (u32) & ugeth->p_tx_glbl_pram->schedulerbasepointer, |
| 772 | in_be32(&ugeth->p_tx_glbl_pram-> |
| 773 | schedulerbasepointer)); |
| 774 | ugeth_info("txrmonbaseptr: addr - 0x%08x, val - 0x%08x", |
| 775 | (u32) & ugeth->p_tx_glbl_pram->txrmonbaseptr, |
| 776 | in_be32(&ugeth->p_tx_glbl_pram->txrmonbaseptr)); |
| 777 | ugeth_info("tstate : addr - 0x%08x, val - 0x%08x", |
| 778 | (u32) & ugeth->p_tx_glbl_pram->tstate, |
| 779 | in_be32(&ugeth->p_tx_glbl_pram->tstate)); |
| 780 | ugeth_info("iphoffset[0] : addr - 0x%08x, val - 0x%02x", |
| 781 | (u32) & ugeth->p_tx_glbl_pram->iphoffset[0], |
| 782 | ugeth->p_tx_glbl_pram->iphoffset[0]); |
| 783 | ugeth_info("iphoffset[1] : addr - 0x%08x, val - 0x%02x", |
| 784 | (u32) & ugeth->p_tx_glbl_pram->iphoffset[1], |
| 785 | ugeth->p_tx_glbl_pram->iphoffset[1]); |
| 786 | ugeth_info("iphoffset[2] : addr - 0x%08x, val - 0x%02x", |
| 787 | (u32) & ugeth->p_tx_glbl_pram->iphoffset[2], |
| 788 | ugeth->p_tx_glbl_pram->iphoffset[2]); |
| 789 | ugeth_info("iphoffset[3] : addr - 0x%08x, val - 0x%02x", |
| 790 | (u32) & ugeth->p_tx_glbl_pram->iphoffset[3], |
| 791 | ugeth->p_tx_glbl_pram->iphoffset[3]); |
| 792 | ugeth_info("iphoffset[4] : addr - 0x%08x, val - 0x%02x", |
| 793 | (u32) & ugeth->p_tx_glbl_pram->iphoffset[4], |
| 794 | ugeth->p_tx_glbl_pram->iphoffset[4]); |
| 795 | ugeth_info("iphoffset[5] : addr - 0x%08x, val - 0x%02x", |
| 796 | (u32) & ugeth->p_tx_glbl_pram->iphoffset[5], |
| 797 | ugeth->p_tx_glbl_pram->iphoffset[5]); |
| 798 | ugeth_info("iphoffset[6] : addr - 0x%08x, val - 0x%02x", |
| 799 | (u32) & ugeth->p_tx_glbl_pram->iphoffset[6], |
| 800 | ugeth->p_tx_glbl_pram->iphoffset[6]); |
| 801 | ugeth_info("iphoffset[7] : addr - 0x%08x, val - 0x%02x", |
| 802 | (u32) & ugeth->p_tx_glbl_pram->iphoffset[7], |
| 803 | ugeth->p_tx_glbl_pram->iphoffset[7]); |
| 804 | ugeth_info("vtagtable[0] : addr - 0x%08x, val - 0x%08x", |
| 805 | (u32) & ugeth->p_tx_glbl_pram->vtagtable[0], |
| 806 | in_be32(&ugeth->p_tx_glbl_pram->vtagtable[0])); |
| 807 | ugeth_info("vtagtable[1] : addr - 0x%08x, val - 0x%08x", |
| 808 | (u32) & ugeth->p_tx_glbl_pram->vtagtable[1], |
| 809 | in_be32(&ugeth->p_tx_glbl_pram->vtagtable[1])); |
| 810 | ugeth_info("vtagtable[2] : addr - 0x%08x, val - 0x%08x", |
| 811 | (u32) & ugeth->p_tx_glbl_pram->vtagtable[2], |
| 812 | in_be32(&ugeth->p_tx_glbl_pram->vtagtable[2])); |
| 813 | ugeth_info("vtagtable[3] : addr - 0x%08x, val - 0x%08x", |
| 814 | (u32) & ugeth->p_tx_glbl_pram->vtagtable[3], |
| 815 | in_be32(&ugeth->p_tx_glbl_pram->vtagtable[3])); |
| 816 | ugeth_info("vtagtable[4] : addr - 0x%08x, val - 0x%08x", |
| 817 | (u32) & ugeth->p_tx_glbl_pram->vtagtable[4], |
| 818 | in_be32(&ugeth->p_tx_glbl_pram->vtagtable[4])); |
| 819 | ugeth_info("vtagtable[5] : addr - 0x%08x, val - 0x%08x", |
| 820 | (u32) & ugeth->p_tx_glbl_pram->vtagtable[5], |
| 821 | in_be32(&ugeth->p_tx_glbl_pram->vtagtable[5])); |
| 822 | ugeth_info("vtagtable[6] : addr - 0x%08x, val - 0x%08x", |
| 823 | (u32) & ugeth->p_tx_glbl_pram->vtagtable[6], |
| 824 | in_be32(&ugeth->p_tx_glbl_pram->vtagtable[6])); |
| 825 | ugeth_info("vtagtable[7] : addr - 0x%08x, val - 0x%08x", |
| 826 | (u32) & ugeth->p_tx_glbl_pram->vtagtable[7], |
| 827 | in_be32(&ugeth->p_tx_glbl_pram->vtagtable[7])); |
| 828 | ugeth_info("tqptr : addr - 0x%08x, val - 0x%08x", |
| 829 | (u32) & ugeth->p_tx_glbl_pram->tqptr, |
| 830 | in_be32(&ugeth->p_tx_glbl_pram->tqptr)); |
| 831 | } |
| 832 | if (ugeth->p_rx_glbl_pram) { |
| 833 | ugeth_info("RX global param:"); |
| 834 | ugeth_info("Base address: 0x%08x", (u32) ugeth->p_rx_glbl_pram); |
| 835 | ugeth_info("remoder : addr - 0x%08x, val - 0x%08x", |
| 836 | (u32) & ugeth->p_rx_glbl_pram->remoder, |
| 837 | in_be32(&ugeth->p_rx_glbl_pram->remoder)); |
| 838 | ugeth_info("rqptr : addr - 0x%08x, val - 0x%08x", |
| 839 | (u32) & ugeth->p_rx_glbl_pram->rqptr, |
| 840 | in_be32(&ugeth->p_rx_glbl_pram->rqptr)); |
| 841 | ugeth_info("typeorlen : addr - 0x%08x, val - 0x%04x", |
| 842 | (u32) & ugeth->p_rx_glbl_pram->typeorlen, |
| 843 | in_be16(&ugeth->p_rx_glbl_pram->typeorlen)); |
| 844 | ugeth_info("rxgstpack : addr - 0x%08x, val - 0x%02x", |
| 845 | (u32) & ugeth->p_rx_glbl_pram->rxgstpack, |
| 846 | ugeth->p_rx_glbl_pram->rxgstpack); |
| 847 | ugeth_info("rxrmonbaseptr : addr - 0x%08x, val - 0x%08x", |
| 848 | (u32) & ugeth->p_rx_glbl_pram->rxrmonbaseptr, |
| 849 | in_be32(&ugeth->p_rx_glbl_pram->rxrmonbaseptr)); |
| 850 | ugeth_info("intcoalescingptr: addr - 0x%08x, val - 0x%08x", |
| 851 | (u32) & ugeth->p_rx_glbl_pram->intcoalescingptr, |
| 852 | in_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr)); |
| 853 | ugeth_info("rstate : addr - 0x%08x, val - 0x%02x", |
| 854 | (u32) & ugeth->p_rx_glbl_pram->rstate, |
| 855 | ugeth->p_rx_glbl_pram->rstate); |
| 856 | ugeth_info("mrblr : addr - 0x%08x, val - 0x%04x", |
| 857 | (u32) & ugeth->p_rx_glbl_pram->mrblr, |
| 858 | in_be16(&ugeth->p_rx_glbl_pram->mrblr)); |
| 859 | ugeth_info("rbdqptr : addr - 0x%08x, val - 0x%08x", |
| 860 | (u32) & ugeth->p_rx_glbl_pram->rbdqptr, |
| 861 | in_be32(&ugeth->p_rx_glbl_pram->rbdqptr)); |
| 862 | ugeth_info("mflr : addr - 0x%08x, val - 0x%04x", |
| 863 | (u32) & ugeth->p_rx_glbl_pram->mflr, |
| 864 | in_be16(&ugeth->p_rx_glbl_pram->mflr)); |
| 865 | ugeth_info("minflr : addr - 0x%08x, val - 0x%04x", |
| 866 | (u32) & ugeth->p_rx_glbl_pram->minflr, |
| 867 | in_be16(&ugeth->p_rx_glbl_pram->minflr)); |
| 868 | ugeth_info("maxd1 : addr - 0x%08x, val - 0x%04x", |
| 869 | (u32) & ugeth->p_rx_glbl_pram->maxd1, |
| 870 | in_be16(&ugeth->p_rx_glbl_pram->maxd1)); |
| 871 | ugeth_info("maxd2 : addr - 0x%08x, val - 0x%04x", |
| 872 | (u32) & ugeth->p_rx_glbl_pram->maxd2, |
| 873 | in_be16(&ugeth->p_rx_glbl_pram->maxd2)); |
| 874 | ugeth_info("ecamptr : addr - 0x%08x, val - 0x%08x", |
| 875 | (u32) & ugeth->p_rx_glbl_pram->ecamptr, |
| 876 | in_be32(&ugeth->p_rx_glbl_pram->ecamptr)); |
| 877 | ugeth_info("l2qt : addr - 0x%08x, val - 0x%08x", |
| 878 | (u32) & ugeth->p_rx_glbl_pram->l2qt, |
| 879 | in_be32(&ugeth->p_rx_glbl_pram->l2qt)); |
| 880 | ugeth_info("l3qt[0] : addr - 0x%08x, val - 0x%08x", |
| 881 | (u32) & ugeth->p_rx_glbl_pram->l3qt[0], |
| 882 | in_be32(&ugeth->p_rx_glbl_pram->l3qt[0])); |
| 883 | ugeth_info("l3qt[1] : addr - 0x%08x, val - 0x%08x", |
| 884 | (u32) & ugeth->p_rx_glbl_pram->l3qt[1], |
| 885 | in_be32(&ugeth->p_rx_glbl_pram->l3qt[1])); |
| 886 | ugeth_info("l3qt[2] : addr - 0x%08x, val - 0x%08x", |
| 887 | (u32) & ugeth->p_rx_glbl_pram->l3qt[2], |
| 888 | in_be32(&ugeth->p_rx_glbl_pram->l3qt[2])); |
| 889 | ugeth_info("l3qt[3] : addr - 0x%08x, val - 0x%08x", |
| 890 | (u32) & ugeth->p_rx_glbl_pram->l3qt[3], |
| 891 | in_be32(&ugeth->p_rx_glbl_pram->l3qt[3])); |
| 892 | ugeth_info("l3qt[4] : addr - 0x%08x, val - 0x%08x", |
| 893 | (u32) & ugeth->p_rx_glbl_pram->l3qt[4], |
| 894 | in_be32(&ugeth->p_rx_glbl_pram->l3qt[4])); |
| 895 | ugeth_info("l3qt[5] : addr - 0x%08x, val - 0x%08x", |
| 896 | (u32) & ugeth->p_rx_glbl_pram->l3qt[5], |
| 897 | in_be32(&ugeth->p_rx_glbl_pram->l3qt[5])); |
| 898 | ugeth_info("l3qt[6] : addr - 0x%08x, val - 0x%08x", |
| 899 | (u32) & ugeth->p_rx_glbl_pram->l3qt[6], |
| 900 | in_be32(&ugeth->p_rx_glbl_pram->l3qt[6])); |
| 901 | ugeth_info("l3qt[7] : addr - 0x%08x, val - 0x%08x", |
| 902 | (u32) & ugeth->p_rx_glbl_pram->l3qt[7], |
| 903 | in_be32(&ugeth->p_rx_glbl_pram->l3qt[7])); |
| 904 | ugeth_info("vlantype : addr - 0x%08x, val - 0x%04x", |
| 905 | (u32) & ugeth->p_rx_glbl_pram->vlantype, |
| 906 | in_be16(&ugeth->p_rx_glbl_pram->vlantype)); |
| 907 | ugeth_info("vlantci : addr - 0x%08x, val - 0x%04x", |
| 908 | (u32) & ugeth->p_rx_glbl_pram->vlantci, |
| 909 | in_be16(&ugeth->p_rx_glbl_pram->vlantci)); |
| 910 | for (i = 0; i < 64; i++) |
| 911 | ugeth_info |
| 912 | ("addressfiltering[%d]: addr - 0x%08x, val - 0x%02x", |
| 913 | i, |
| 914 | (u32) & ugeth->p_rx_glbl_pram->addressfiltering[i], |
| 915 | ugeth->p_rx_glbl_pram->addressfiltering[i]); |
| 916 | ugeth_info("exfGlobalParam : addr - 0x%08x, val - 0x%08x", |
| 917 | (u32) & ugeth->p_rx_glbl_pram->exfGlobalParam, |
| 918 | in_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam)); |
| 919 | } |
| 920 | if (ugeth->p_send_q_mem_reg) { |
| 921 | ugeth_info("Send Q memory registers:"); |
| 922 | ugeth_info("Base address: 0x%08x", |
| 923 | (u32) ugeth->p_send_q_mem_reg); |
| 924 | for (i = 0; i < ugeth->ug_info->numQueuesTx; i++) { |
| 925 | ugeth_info("SQQD[%d]:", i); |
| 926 | ugeth_info("Base address: 0x%08x", |
| 927 | (u32) & ugeth->p_send_q_mem_reg->sqqd[i]); |
| 928 | mem_disp((u8 *) & ugeth->p_send_q_mem_reg->sqqd[i], |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 929 | sizeof(struct ucc_geth_send_queue_qd)); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 930 | } |
| 931 | } |
| 932 | if (ugeth->p_scheduler) { |
| 933 | ugeth_info("Scheduler:"); |
| 934 | ugeth_info("Base address: 0x%08x", (u32) ugeth->p_scheduler); |
| 935 | mem_disp((u8 *) ugeth->p_scheduler, |
| 936 | sizeof(*ugeth->p_scheduler)); |
| 937 | } |
| 938 | if (ugeth->p_tx_fw_statistics_pram) { |
| 939 | ugeth_info("TX FW statistics pram:"); |
| 940 | ugeth_info("Base address: 0x%08x", |
| 941 | (u32) ugeth->p_tx_fw_statistics_pram); |
| 942 | mem_disp((u8 *) ugeth->p_tx_fw_statistics_pram, |
| 943 | sizeof(*ugeth->p_tx_fw_statistics_pram)); |
| 944 | } |
| 945 | if (ugeth->p_rx_fw_statistics_pram) { |
| 946 | ugeth_info("RX FW statistics pram:"); |
| 947 | ugeth_info("Base address: 0x%08x", |
| 948 | (u32) ugeth->p_rx_fw_statistics_pram); |
| 949 | mem_disp((u8 *) ugeth->p_rx_fw_statistics_pram, |
| 950 | sizeof(*ugeth->p_rx_fw_statistics_pram)); |
| 951 | } |
| 952 | if (ugeth->p_rx_irq_coalescing_tbl) { |
| 953 | ugeth_info("RX IRQ coalescing tables:"); |
| 954 | ugeth_info("Base address: 0x%08x", |
| 955 | (u32) ugeth->p_rx_irq_coalescing_tbl); |
| 956 | for (i = 0; i < ugeth->ug_info->numQueuesRx; i++) { |
| 957 | ugeth_info("RX IRQ coalescing table entry[%d]:", i); |
| 958 | ugeth_info("Base address: 0x%08x", |
| 959 | (u32) & ugeth->p_rx_irq_coalescing_tbl-> |
| 960 | coalescingentry[i]); |
| 961 | ugeth_info |
| 962 | ("interruptcoalescingmaxvalue: addr - 0x%08x, val - 0x%08x", |
| 963 | (u32) & ugeth->p_rx_irq_coalescing_tbl-> |
| 964 | coalescingentry[i].interruptcoalescingmaxvalue, |
| 965 | in_be32(&ugeth->p_rx_irq_coalescing_tbl-> |
| 966 | coalescingentry[i]. |
| 967 | interruptcoalescingmaxvalue)); |
| 968 | ugeth_info |
| 969 | ("interruptcoalescingcounter : addr - 0x%08x, val - 0x%08x", |
| 970 | (u32) & ugeth->p_rx_irq_coalescing_tbl-> |
| 971 | coalescingentry[i].interruptcoalescingcounter, |
| 972 | in_be32(&ugeth->p_rx_irq_coalescing_tbl-> |
| 973 | coalescingentry[i]. |
| 974 | interruptcoalescingcounter)); |
| 975 | } |
| 976 | } |
| 977 | if (ugeth->p_rx_bd_qs_tbl) { |
| 978 | ugeth_info("RX BD QS tables:"); |
| 979 | ugeth_info("Base address: 0x%08x", (u32) ugeth->p_rx_bd_qs_tbl); |
| 980 | for (i = 0; i < ugeth->ug_info->numQueuesRx; i++) { |
| 981 | ugeth_info("RX BD QS table[%d]:", i); |
| 982 | ugeth_info("Base address: 0x%08x", |
| 983 | (u32) & ugeth->p_rx_bd_qs_tbl[i]); |
| 984 | ugeth_info |
| 985 | ("bdbaseptr : addr - 0x%08x, val - 0x%08x", |
| 986 | (u32) & ugeth->p_rx_bd_qs_tbl[i].bdbaseptr, |
| 987 | in_be32(&ugeth->p_rx_bd_qs_tbl[i].bdbaseptr)); |
| 988 | ugeth_info |
| 989 | ("bdptr : addr - 0x%08x, val - 0x%08x", |
| 990 | (u32) & ugeth->p_rx_bd_qs_tbl[i].bdptr, |
| 991 | in_be32(&ugeth->p_rx_bd_qs_tbl[i].bdptr)); |
| 992 | ugeth_info |
| 993 | ("externalbdbaseptr: addr - 0x%08x, val - 0x%08x", |
| 994 | (u32) & ugeth->p_rx_bd_qs_tbl[i].externalbdbaseptr, |
| 995 | in_be32(&ugeth->p_rx_bd_qs_tbl[i]. |
| 996 | externalbdbaseptr)); |
| 997 | ugeth_info |
| 998 | ("externalbdptr : addr - 0x%08x, val - 0x%08x", |
| 999 | (u32) & ugeth->p_rx_bd_qs_tbl[i].externalbdptr, |
| 1000 | in_be32(&ugeth->p_rx_bd_qs_tbl[i].externalbdptr)); |
| 1001 | ugeth_info("ucode RX Prefetched BDs:"); |
| 1002 | ugeth_info("Base address: 0x%08x", |
| 1003 | (u32) |
| 1004 | qe_muram_addr(in_be32 |
| 1005 | (&ugeth->p_rx_bd_qs_tbl[i]. |
| 1006 | bdbaseptr))); |
| 1007 | mem_disp((u8 *) |
| 1008 | qe_muram_addr(in_be32 |
| 1009 | (&ugeth->p_rx_bd_qs_tbl[i]. |
| 1010 | bdbaseptr)), |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 1011 | sizeof(struct ucc_geth_rx_prefetched_bds)); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1012 | } |
| 1013 | } |
| 1014 | if (ugeth->p_init_enet_param_shadow) { |
| 1015 | int size; |
| 1016 | ugeth_info("Init enet param shadow:"); |
| 1017 | ugeth_info("Base address: 0x%08x", |
| 1018 | (u32) ugeth->p_init_enet_param_shadow); |
| 1019 | mem_disp((u8 *) ugeth->p_init_enet_param_shadow, |
| 1020 | sizeof(*ugeth->p_init_enet_param_shadow)); |
| 1021 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 1022 | size = sizeof(struct ucc_geth_thread_rx_pram); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1023 | if (ugeth->ug_info->rxExtendedFiltering) { |
| 1024 | size += |
| 1025 | THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING; |
| 1026 | if (ugeth->ug_info->largestexternallookupkeysize == |
| 1027 | QE_FLTR_TABLE_LOOKUP_KEY_SIZE_8_BYTES) |
| 1028 | size += |
| 1029 | THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_8; |
| 1030 | if (ugeth->ug_info->largestexternallookupkeysize == |
| 1031 | QE_FLTR_TABLE_LOOKUP_KEY_SIZE_16_BYTES) |
| 1032 | size += |
| 1033 | THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_16; |
| 1034 | } |
| 1035 | |
| 1036 | dump_init_enet_entries(ugeth, |
| 1037 | &(ugeth->p_init_enet_param_shadow-> |
| 1038 | txthread[0]), |
| 1039 | ENET_INIT_PARAM_MAX_ENTRIES_TX, |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 1040 | sizeof(struct ucc_geth_thread_tx_pram), |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1041 | ugeth->ug_info->riscTx, 0); |
| 1042 | dump_init_enet_entries(ugeth, |
| 1043 | &(ugeth->p_init_enet_param_shadow-> |
| 1044 | rxthread[0]), |
| 1045 | ENET_INIT_PARAM_MAX_ENTRIES_RX, size, |
| 1046 | ugeth->ug_info->riscRx, 1); |
| 1047 | } |
| 1048 | } |
| 1049 | #endif /* DEBUG */ |
| 1050 | |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1051 | static void init_default_reg_vals(u32 __iomem *upsmr_register, |
| 1052 | u32 __iomem *maccfg1_register, |
| 1053 | u32 __iomem *maccfg2_register) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1054 | { |
| 1055 | out_be32(upsmr_register, UCC_GETH_UPSMR_INIT); |
| 1056 | out_be32(maccfg1_register, UCC_GETH_MACCFG1_INIT); |
| 1057 | out_be32(maccfg2_register, UCC_GETH_MACCFG2_INIT); |
| 1058 | } |
| 1059 | |
| 1060 | static int init_half_duplex_params(int alt_beb, |
| 1061 | int back_pressure_no_backoff, |
| 1062 | int no_backoff, |
| 1063 | int excess_defer, |
| 1064 | u8 alt_beb_truncation, |
| 1065 | u8 max_retransmissions, |
| 1066 | u8 collision_window, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1067 | u32 __iomem *hafdup_register) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1068 | { |
| 1069 | u32 value = 0; |
| 1070 | |
| 1071 | if ((alt_beb_truncation > HALFDUP_ALT_BEB_TRUNCATION_MAX) || |
| 1072 | (max_retransmissions > HALFDUP_MAX_RETRANSMISSION_MAX) || |
| 1073 | (collision_window > HALFDUP_COLLISION_WINDOW_MAX)) |
| 1074 | return -EINVAL; |
| 1075 | |
| 1076 | value = (u32) (alt_beb_truncation << HALFDUP_ALT_BEB_TRUNCATION_SHIFT); |
| 1077 | |
| 1078 | if (alt_beb) |
| 1079 | value |= HALFDUP_ALT_BEB; |
| 1080 | if (back_pressure_no_backoff) |
| 1081 | value |= HALFDUP_BACK_PRESSURE_NO_BACKOFF; |
| 1082 | if (no_backoff) |
| 1083 | value |= HALFDUP_NO_BACKOFF; |
| 1084 | if (excess_defer) |
| 1085 | value |= HALFDUP_EXCESSIVE_DEFER; |
| 1086 | |
| 1087 | value |= (max_retransmissions << HALFDUP_MAX_RETRANSMISSION_SHIFT); |
| 1088 | |
| 1089 | value |= collision_window; |
| 1090 | |
| 1091 | out_be32(hafdup_register, value); |
| 1092 | return 0; |
| 1093 | } |
| 1094 | |
| 1095 | static int init_inter_frame_gap_params(u8 non_btb_cs_ipg, |
| 1096 | u8 non_btb_ipg, |
| 1097 | u8 min_ifg, |
| 1098 | u8 btb_ipg, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1099 | u32 __iomem *ipgifg_register) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1100 | { |
| 1101 | u32 value = 0; |
| 1102 | |
| 1103 | /* Non-Back-to-back IPG part 1 should be <= Non-Back-to-back |
| 1104 | IPG part 2 */ |
| 1105 | if (non_btb_cs_ipg > non_btb_ipg) |
| 1106 | return -EINVAL; |
| 1107 | |
| 1108 | if ((non_btb_cs_ipg > IPGIFG_NON_BACK_TO_BACK_IFG_PART1_MAX) || |
| 1109 | (non_btb_ipg > IPGIFG_NON_BACK_TO_BACK_IFG_PART2_MAX) || |
| 1110 | /*(min_ifg > IPGIFG_MINIMUM_IFG_ENFORCEMENT_MAX) || */ |
| 1111 | (btb_ipg > IPGIFG_BACK_TO_BACK_IFG_MAX)) |
| 1112 | return -EINVAL; |
| 1113 | |
| 1114 | value |= |
| 1115 | ((non_btb_cs_ipg << IPGIFG_NON_BACK_TO_BACK_IFG_PART1_SHIFT) & |
| 1116 | IPGIFG_NBTB_CS_IPG_MASK); |
| 1117 | value |= |
| 1118 | ((non_btb_ipg << IPGIFG_NON_BACK_TO_BACK_IFG_PART2_SHIFT) & |
| 1119 | IPGIFG_NBTB_IPG_MASK); |
| 1120 | value |= |
| 1121 | ((min_ifg << IPGIFG_MINIMUM_IFG_ENFORCEMENT_SHIFT) & |
| 1122 | IPGIFG_MIN_IFG_MASK); |
| 1123 | value |= (btb_ipg & IPGIFG_BTB_IPG_MASK); |
| 1124 | |
| 1125 | out_be32(ipgifg_register, value); |
| 1126 | return 0; |
| 1127 | } |
| 1128 | |
Li Yang | ac42185 | 2007-07-19 11:47:47 +0800 | [diff] [blame] | 1129 | int init_flow_control_params(u32 automatic_flow_control_mode, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1130 | int rx_flow_control_enable, |
| 1131 | int tx_flow_control_enable, |
| 1132 | u16 pause_period, |
| 1133 | u16 extension_field, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1134 | u32 __iomem *upsmr_register, |
| 1135 | u32 __iomem *uempr_register, |
| 1136 | u32 __iomem *maccfg1_register) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1137 | { |
| 1138 | u32 value = 0; |
| 1139 | |
| 1140 | /* Set UEMPR register */ |
| 1141 | value = (u32) pause_period << UEMPR_PAUSE_TIME_VALUE_SHIFT; |
| 1142 | value |= (u32) extension_field << UEMPR_EXTENDED_PAUSE_TIME_VALUE_SHIFT; |
| 1143 | out_be32(uempr_register, value); |
| 1144 | |
| 1145 | /* Set UPSMR register */ |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1146 | setbits32(upsmr_register, automatic_flow_control_mode); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1147 | |
| 1148 | value = in_be32(maccfg1_register); |
| 1149 | if (rx_flow_control_enable) |
| 1150 | value |= MACCFG1_FLOW_RX; |
| 1151 | if (tx_flow_control_enable) |
| 1152 | value |= MACCFG1_FLOW_TX; |
| 1153 | out_be32(maccfg1_register, value); |
| 1154 | |
| 1155 | return 0; |
| 1156 | } |
| 1157 | |
| 1158 | static int init_hw_statistics_gathering_mode(int enable_hardware_statistics, |
| 1159 | int auto_zero_hardware_statistics, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1160 | u32 __iomem *upsmr_register, |
| 1161 | u16 __iomem *uescr_register) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1162 | { |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1163 | u16 uescr_value = 0; |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1164 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1165 | /* Enable hardware statistics gathering if requested */ |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1166 | if (enable_hardware_statistics) |
| 1167 | setbits32(upsmr_register, UCC_GETH_UPSMR_HSE); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1168 | |
| 1169 | /* Clear hardware statistics counters */ |
| 1170 | uescr_value = in_be16(uescr_register); |
| 1171 | uescr_value |= UESCR_CLRCNT; |
| 1172 | /* Automatically zero hardware statistics counters on read, |
| 1173 | if requested */ |
| 1174 | if (auto_zero_hardware_statistics) |
| 1175 | uescr_value |= UESCR_AUTOZ; |
| 1176 | out_be16(uescr_register, uescr_value); |
| 1177 | |
| 1178 | return 0; |
| 1179 | } |
| 1180 | |
| 1181 | static int init_firmware_statistics_gathering_mode(int |
| 1182 | enable_tx_firmware_statistics, |
| 1183 | int enable_rx_firmware_statistics, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1184 | u32 __iomem *tx_rmon_base_ptr, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1185 | u32 tx_firmware_statistics_structure_address, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1186 | u32 __iomem *rx_rmon_base_ptr, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1187 | u32 rx_firmware_statistics_structure_address, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1188 | u16 __iomem *temoder_register, |
| 1189 | u32 __iomem *remoder_register) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1190 | { |
| 1191 | /* Note: this function does not check if */ |
| 1192 | /* the parameters it receives are NULL */ |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1193 | |
| 1194 | if (enable_tx_firmware_statistics) { |
| 1195 | out_be32(tx_rmon_base_ptr, |
| 1196 | tx_firmware_statistics_structure_address); |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1197 | setbits16(temoder_register, TEMODER_TX_RMON_STATISTICS_ENABLE); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1198 | } |
| 1199 | |
| 1200 | if (enable_rx_firmware_statistics) { |
| 1201 | out_be32(rx_rmon_base_ptr, |
| 1202 | rx_firmware_statistics_structure_address); |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1203 | setbits32(remoder_register, REMODER_RX_RMON_STATISTICS_ENABLE); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1204 | } |
| 1205 | |
| 1206 | return 0; |
| 1207 | } |
| 1208 | |
| 1209 | static int init_mac_station_addr_regs(u8 address_byte_0, |
| 1210 | u8 address_byte_1, |
| 1211 | u8 address_byte_2, |
| 1212 | u8 address_byte_3, |
| 1213 | u8 address_byte_4, |
| 1214 | u8 address_byte_5, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1215 | u32 __iomem *macstnaddr1_register, |
| 1216 | u32 __iomem *macstnaddr2_register) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1217 | { |
| 1218 | u32 value = 0; |
| 1219 | |
| 1220 | /* Example: for a station address of 0x12345678ABCD, */ |
| 1221 | /* 0x12 is byte 0, 0x34 is byte 1 and so on and 0xCD is byte 5 */ |
| 1222 | |
| 1223 | /* MACSTNADDR1 Register: */ |
| 1224 | |
| 1225 | /* 0 7 8 15 */ |
| 1226 | /* station address byte 5 station address byte 4 */ |
| 1227 | /* 16 23 24 31 */ |
| 1228 | /* station address byte 3 station address byte 2 */ |
| 1229 | value |= (u32) ((address_byte_2 << 0) & 0x000000FF); |
| 1230 | value |= (u32) ((address_byte_3 << 8) & 0x0000FF00); |
| 1231 | value |= (u32) ((address_byte_4 << 16) & 0x00FF0000); |
| 1232 | value |= (u32) ((address_byte_5 << 24) & 0xFF000000); |
| 1233 | |
| 1234 | out_be32(macstnaddr1_register, value); |
| 1235 | |
| 1236 | /* MACSTNADDR2 Register: */ |
| 1237 | |
| 1238 | /* 0 7 8 15 */ |
| 1239 | /* station address byte 1 station address byte 0 */ |
| 1240 | /* 16 23 24 31 */ |
| 1241 | /* reserved reserved */ |
| 1242 | value = 0; |
| 1243 | value |= (u32) ((address_byte_0 << 16) & 0x00FF0000); |
| 1244 | value |= (u32) ((address_byte_1 << 24) & 0xFF000000); |
| 1245 | |
| 1246 | out_be32(macstnaddr2_register, value); |
| 1247 | |
| 1248 | return 0; |
| 1249 | } |
| 1250 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1251 | static int init_check_frame_length_mode(int length_check, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1252 | u32 __iomem *maccfg2_register) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1253 | { |
| 1254 | u32 value = 0; |
| 1255 | |
| 1256 | value = in_be32(maccfg2_register); |
| 1257 | |
| 1258 | if (length_check) |
| 1259 | value |= MACCFG2_LC; |
| 1260 | else |
| 1261 | value &= ~MACCFG2_LC; |
| 1262 | |
| 1263 | out_be32(maccfg2_register, value); |
| 1264 | return 0; |
| 1265 | } |
| 1266 | |
| 1267 | static int init_preamble_length(u8 preamble_length, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1268 | u32 __iomem *maccfg2_register) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1269 | { |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1270 | if ((preamble_length < 3) || (preamble_length > 7)) |
| 1271 | return -EINVAL; |
| 1272 | |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1273 | clrsetbits_be32(maccfg2_register, MACCFG2_PREL_MASK, |
| 1274 | preamble_length << MACCFG2_PREL_SHIFT); |
| 1275 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1276 | return 0; |
| 1277 | } |
| 1278 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1279 | static int init_rx_parameters(int reject_broadcast, |
| 1280 | int receive_short_frames, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1281 | int promiscuous, u32 __iomem *upsmr_register) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1282 | { |
| 1283 | u32 value = 0; |
| 1284 | |
| 1285 | value = in_be32(upsmr_register); |
| 1286 | |
| 1287 | if (reject_broadcast) |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1288 | value |= UCC_GETH_UPSMR_BRO; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1289 | else |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1290 | value &= ~UCC_GETH_UPSMR_BRO; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1291 | |
| 1292 | if (receive_short_frames) |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1293 | value |= UCC_GETH_UPSMR_RSH; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1294 | else |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1295 | value &= ~UCC_GETH_UPSMR_RSH; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1296 | |
| 1297 | if (promiscuous) |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1298 | value |= UCC_GETH_UPSMR_PRO; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1299 | else |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1300 | value &= ~UCC_GETH_UPSMR_PRO; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1301 | |
| 1302 | out_be32(upsmr_register, value); |
| 1303 | |
| 1304 | return 0; |
| 1305 | } |
| 1306 | |
| 1307 | static int init_max_rx_buff_len(u16 max_rx_buf_len, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1308 | u16 __iomem *mrblr_register) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1309 | { |
| 1310 | /* max_rx_buf_len value must be a multiple of 128 */ |
Joe Perches | 8e95a20 | 2009-12-03 07:58:21 +0000 | [diff] [blame] | 1311 | if ((max_rx_buf_len == 0) || |
| 1312 | (max_rx_buf_len % UCC_GETH_MRBLR_ALIGNMENT)) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1313 | return -EINVAL; |
| 1314 | |
| 1315 | out_be16(mrblr_register, max_rx_buf_len); |
| 1316 | return 0; |
| 1317 | } |
| 1318 | |
| 1319 | static int init_min_frame_len(u16 min_frame_length, |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1320 | u16 __iomem *minflr_register, |
| 1321 | u16 __iomem *mrblr_register) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1322 | { |
| 1323 | u16 mrblr_value = 0; |
| 1324 | |
| 1325 | mrblr_value = in_be16(mrblr_register); |
| 1326 | if (min_frame_length >= (mrblr_value - 4)) |
| 1327 | return -EINVAL; |
| 1328 | |
| 1329 | out_be16(minflr_register, min_frame_length); |
| 1330 | return 0; |
| 1331 | } |
| 1332 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 1333 | static int adjust_enet_interface(struct ucc_geth_private *ugeth) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1334 | { |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 1335 | struct ucc_geth_info *ug_info; |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1336 | struct ucc_geth __iomem *ug_regs; |
| 1337 | struct ucc_fast __iomem *uf_regs; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1338 | int ret_val; |
Liu Yu-B13201 | 81abb43 | 2010-01-13 22:13:18 +0000 | [diff] [blame] | 1339 | u32 upsmr, maccfg2; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1340 | u16 value; |
| 1341 | |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 1342 | ugeth_vdbg("%s: IN", __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1343 | |
| 1344 | ug_info = ugeth->ug_info; |
| 1345 | ug_regs = ugeth->ug_regs; |
| 1346 | uf_regs = ugeth->uccf->uf_regs; |
| 1347 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1348 | /* Set MACCFG2 */ |
| 1349 | maccfg2 = in_be32(&ug_regs->maccfg2); |
| 1350 | maccfg2 &= ~MACCFG2_INTERFACE_MODE_MASK; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1351 | if ((ugeth->max_speed == SPEED_10) || |
| 1352 | (ugeth->max_speed == SPEED_100)) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1353 | maccfg2 |= MACCFG2_INTERFACE_MODE_NIBBLE; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1354 | else if (ugeth->max_speed == SPEED_1000) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1355 | maccfg2 |= MACCFG2_INTERFACE_MODE_BYTE; |
| 1356 | maccfg2 |= ug_info->padAndCrc; |
| 1357 | out_be32(&ug_regs->maccfg2, maccfg2); |
| 1358 | |
| 1359 | /* Set UPSMR */ |
| 1360 | upsmr = in_be32(&uf_regs->upsmr); |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1361 | upsmr &= ~(UCC_GETH_UPSMR_RPM | UCC_GETH_UPSMR_R10M | |
| 1362 | UCC_GETH_UPSMR_TBIM | UCC_GETH_UPSMR_RMM); |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1363 | if ((ugeth->phy_interface == PHY_INTERFACE_MODE_RMII) || |
| 1364 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII) || |
| 1365 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) || |
Kim Phillips | bd0ceaa | 2007-11-26 16:17:58 -0600 | [diff] [blame] | 1366 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID) || |
| 1367 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) || |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1368 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { |
Heiko Schocher | cef309c | 2009-04-20 22:36:43 +0000 | [diff] [blame] | 1369 | if (ugeth->phy_interface != PHY_INTERFACE_MODE_RMII) |
| 1370 | upsmr |= UCC_GETH_UPSMR_RPM; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1371 | switch (ugeth->max_speed) { |
| 1372 | case SPEED_10: |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1373 | upsmr |= UCC_GETH_UPSMR_R10M; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1374 | /* FALLTHROUGH */ |
| 1375 | case SPEED_100: |
| 1376 | if (ugeth->phy_interface != PHY_INTERFACE_MODE_RTBI) |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1377 | upsmr |= UCC_GETH_UPSMR_RMM; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1378 | } |
| 1379 | } |
| 1380 | if ((ugeth->phy_interface == PHY_INTERFACE_MODE_TBI) || |
| 1381 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1382 | upsmr |= UCC_GETH_UPSMR_TBIM; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1383 | } |
Haiying Wang | 047584c | 2009-06-02 04:04:15 +0000 | [diff] [blame] | 1384 | if ((ugeth->phy_interface == PHY_INTERFACE_MODE_SGMII)) |
| 1385 | upsmr |= UCC_GETH_UPSMR_SGMM; |
| 1386 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1387 | out_be32(&uf_regs->upsmr, upsmr); |
| 1388 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1389 | /* Disable autonegotiation in tbi mode, because by default it |
| 1390 | comes up in autonegotiation mode. */ |
| 1391 | /* Note that this depends on proper setting in utbipar register. */ |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1392 | if ((ugeth->phy_interface == PHY_INTERFACE_MODE_TBI) || |
| 1393 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { |
Liu Yu-B13201 | 81abb43 | 2010-01-13 22:13:18 +0000 | [diff] [blame] | 1394 | struct ucc_geth_info *ug_info = ugeth->ug_info; |
| 1395 | struct phy_device *tbiphy; |
| 1396 | |
| 1397 | if (!ug_info->tbi_node) |
| 1398 | ugeth_warn("TBI mode requires that the device " |
| 1399 | "tree specify a tbi-handle\n"); |
| 1400 | |
| 1401 | tbiphy = of_phy_find_device(ug_info->tbi_node); |
| 1402 | if (!tbiphy) |
| 1403 | ugeth_warn("Could not get TBI device\n"); |
| 1404 | |
| 1405 | value = phy_read(tbiphy, ENET_TBI_MII_CR); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1406 | value &= ~0x1000; /* Turn off autonegotiation */ |
Liu Yu-B13201 | 81abb43 | 2010-01-13 22:13:18 +0000 | [diff] [blame] | 1407 | phy_write(tbiphy, ENET_TBI_MII_CR, value); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1408 | } |
| 1409 | |
| 1410 | init_check_frame_length_mode(ug_info->lengthCheckRx, &ug_regs->maccfg2); |
| 1411 | |
| 1412 | ret_val = init_preamble_length(ug_info->prel, &ug_regs->maccfg2); |
| 1413 | if (ret_val != 0) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 1414 | if (netif_msg_probe(ugeth)) |
| 1415 | ugeth_err("%s: Preamble length must be between 3 and 7 inclusive.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 1416 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1417 | return ret_val; |
| 1418 | } |
| 1419 | |
| 1420 | return 0; |
| 1421 | } |
| 1422 | |
Anton Vorontsov | 7de8ee7 | 2009-09-09 16:01:40 +0000 | [diff] [blame] | 1423 | static int ugeth_graceful_stop_tx(struct ucc_geth_private *ugeth) |
| 1424 | { |
| 1425 | struct ucc_fast_private *uccf; |
| 1426 | u32 cecr_subblock; |
| 1427 | u32 temp; |
| 1428 | int i = 10; |
| 1429 | |
| 1430 | uccf = ugeth->uccf; |
| 1431 | |
| 1432 | /* Mask GRACEFUL STOP TX interrupt bit and clear it */ |
| 1433 | clrbits32(uccf->p_uccm, UCC_GETH_UCCE_GRA); |
| 1434 | out_be32(uccf->p_ucce, UCC_GETH_UCCE_GRA); /* clear by writing 1 */ |
| 1435 | |
| 1436 | /* Issue host command */ |
| 1437 | cecr_subblock = |
| 1438 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); |
| 1439 | qe_issue_cmd(QE_GRACEFUL_STOP_TX, cecr_subblock, |
| 1440 | QE_CR_PROTOCOL_ETHERNET, 0); |
| 1441 | |
| 1442 | /* Wait for command to complete */ |
| 1443 | do { |
| 1444 | msleep(10); |
| 1445 | temp = in_be32(uccf->p_ucce); |
| 1446 | } while (!(temp & UCC_GETH_UCCE_GRA) && --i); |
| 1447 | |
| 1448 | uccf->stopped_tx = 1; |
| 1449 | |
| 1450 | return 0; |
| 1451 | } |
| 1452 | |
| 1453 | static int ugeth_graceful_stop_rx(struct ucc_geth_private *ugeth) |
| 1454 | { |
| 1455 | struct ucc_fast_private *uccf; |
| 1456 | u32 cecr_subblock; |
| 1457 | u8 temp; |
| 1458 | int i = 10; |
| 1459 | |
| 1460 | uccf = ugeth->uccf; |
| 1461 | |
| 1462 | /* Clear acknowledge bit */ |
| 1463 | temp = in_8(&ugeth->p_rx_glbl_pram->rxgstpack); |
| 1464 | temp &= ~GRACEFUL_STOP_ACKNOWLEDGE_RX; |
| 1465 | out_8(&ugeth->p_rx_glbl_pram->rxgstpack, temp); |
| 1466 | |
| 1467 | /* Keep issuing command and checking acknowledge bit until |
| 1468 | it is asserted, according to spec */ |
| 1469 | do { |
| 1470 | /* Issue host command */ |
| 1471 | cecr_subblock = |
| 1472 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info. |
| 1473 | ucc_num); |
| 1474 | qe_issue_cmd(QE_GRACEFUL_STOP_RX, cecr_subblock, |
| 1475 | QE_CR_PROTOCOL_ETHERNET, 0); |
| 1476 | msleep(10); |
| 1477 | temp = in_8(&ugeth->p_rx_glbl_pram->rxgstpack); |
| 1478 | } while (!(temp & GRACEFUL_STOP_ACKNOWLEDGE_RX) && --i); |
| 1479 | |
| 1480 | uccf->stopped_rx = 1; |
| 1481 | |
| 1482 | return 0; |
| 1483 | } |
| 1484 | |
| 1485 | static int ugeth_restart_tx(struct ucc_geth_private *ugeth) |
| 1486 | { |
| 1487 | struct ucc_fast_private *uccf; |
| 1488 | u32 cecr_subblock; |
| 1489 | |
| 1490 | uccf = ugeth->uccf; |
| 1491 | |
| 1492 | cecr_subblock = |
| 1493 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); |
| 1494 | qe_issue_cmd(QE_RESTART_TX, cecr_subblock, QE_CR_PROTOCOL_ETHERNET, 0); |
| 1495 | uccf->stopped_tx = 0; |
| 1496 | |
| 1497 | return 0; |
| 1498 | } |
| 1499 | |
| 1500 | static int ugeth_restart_rx(struct ucc_geth_private *ugeth) |
| 1501 | { |
| 1502 | struct ucc_fast_private *uccf; |
| 1503 | u32 cecr_subblock; |
| 1504 | |
| 1505 | uccf = ugeth->uccf; |
| 1506 | |
| 1507 | cecr_subblock = |
| 1508 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); |
| 1509 | qe_issue_cmd(QE_RESTART_RX, cecr_subblock, QE_CR_PROTOCOL_ETHERNET, |
| 1510 | 0); |
| 1511 | uccf->stopped_rx = 0; |
| 1512 | |
| 1513 | return 0; |
| 1514 | } |
| 1515 | |
| 1516 | static int ugeth_enable(struct ucc_geth_private *ugeth, enum comm_dir mode) |
| 1517 | { |
| 1518 | struct ucc_fast_private *uccf; |
| 1519 | int enabled_tx, enabled_rx; |
| 1520 | |
| 1521 | uccf = ugeth->uccf; |
| 1522 | |
| 1523 | /* check if the UCC number is in range. */ |
| 1524 | if (ugeth->ug_info->uf_info.ucc_num >= UCC_MAX_NUM) { |
| 1525 | if (netif_msg_probe(ugeth)) |
| 1526 | ugeth_err("%s: ucc_num out of range.", __func__); |
| 1527 | return -EINVAL; |
| 1528 | } |
| 1529 | |
| 1530 | enabled_tx = uccf->enabled_tx; |
| 1531 | enabled_rx = uccf->enabled_rx; |
| 1532 | |
| 1533 | /* Get Tx and Rx going again, in case this channel was actively |
| 1534 | disabled. */ |
| 1535 | if ((mode & COMM_DIR_TX) && (!enabled_tx) && uccf->stopped_tx) |
| 1536 | ugeth_restart_tx(ugeth); |
| 1537 | if ((mode & COMM_DIR_RX) && (!enabled_rx) && uccf->stopped_rx) |
| 1538 | ugeth_restart_rx(ugeth); |
| 1539 | |
| 1540 | ucc_fast_enable(uccf, mode); /* OK to do even if not disabled */ |
| 1541 | |
| 1542 | return 0; |
| 1543 | |
| 1544 | } |
| 1545 | |
| 1546 | static int ugeth_disable(struct ucc_geth_private *ugeth, enum comm_dir mode) |
| 1547 | { |
| 1548 | struct ucc_fast_private *uccf; |
| 1549 | |
| 1550 | uccf = ugeth->uccf; |
| 1551 | |
| 1552 | /* check if the UCC number is in range. */ |
| 1553 | if (ugeth->ug_info->uf_info.ucc_num >= UCC_MAX_NUM) { |
| 1554 | if (netif_msg_probe(ugeth)) |
| 1555 | ugeth_err("%s: ucc_num out of range.", __func__); |
| 1556 | return -EINVAL; |
| 1557 | } |
| 1558 | |
| 1559 | /* Stop any transmissions */ |
| 1560 | if ((mode & COMM_DIR_TX) && uccf->enabled_tx && !uccf->stopped_tx) |
| 1561 | ugeth_graceful_stop_tx(ugeth); |
| 1562 | |
| 1563 | /* Stop any receptions */ |
| 1564 | if ((mode & COMM_DIR_RX) && uccf->enabled_rx && !uccf->stopped_rx) |
| 1565 | ugeth_graceful_stop_rx(ugeth); |
| 1566 | |
| 1567 | ucc_fast_disable(ugeth->uccf, mode); /* OK to do even if not enabled */ |
| 1568 | |
| 1569 | return 0; |
| 1570 | } |
| 1571 | |
Anton Vorontsov | 864fdf8 | 2009-09-10 11:48:12 +0000 | [diff] [blame] | 1572 | static void ugeth_quiesce(struct ucc_geth_private *ugeth) |
| 1573 | { |
Anton Vorontsov | 08b5e1c | 2009-12-24 05:31:05 +0000 | [diff] [blame] | 1574 | /* Prevent any further xmits, plus detach the device. */ |
| 1575 | netif_device_detach(ugeth->ndev); |
| 1576 | |
| 1577 | /* Wait for any current xmits to finish. */ |
Anton Vorontsov | 864fdf8 | 2009-09-10 11:48:12 +0000 | [diff] [blame] | 1578 | netif_tx_disable(ugeth->ndev); |
| 1579 | |
| 1580 | /* Disable the interrupt to avoid NAPI rescheduling. */ |
| 1581 | disable_irq(ugeth->ug_info->uf_info.irq); |
| 1582 | |
| 1583 | /* Stop NAPI, and possibly wait for its completion. */ |
| 1584 | napi_disable(&ugeth->napi); |
| 1585 | } |
| 1586 | |
| 1587 | static void ugeth_activate(struct ucc_geth_private *ugeth) |
| 1588 | { |
| 1589 | napi_enable(&ugeth->napi); |
| 1590 | enable_irq(ugeth->ug_info->uf_info.irq); |
Anton Vorontsov | 08b5e1c | 2009-12-24 05:31:05 +0000 | [diff] [blame] | 1591 | netif_device_attach(ugeth->ndev); |
Anton Vorontsov | 864fdf8 | 2009-09-10 11:48:12 +0000 | [diff] [blame] | 1592 | } |
| 1593 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1594 | /* Called every time the controller might need to be made |
| 1595 | * aware of new link state. The PHY code conveys this |
| 1596 | * information through variables in the ugeth structure, and this |
| 1597 | * function converts those variables into the appropriate |
| 1598 | * register values, and can bring down the device if needed. |
| 1599 | */ |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1600 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1601 | static void adjust_link(struct net_device *dev) |
| 1602 | { |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 1603 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1604 | struct ucc_geth __iomem *ug_regs; |
| 1605 | struct ucc_fast __iomem *uf_regs; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1606 | struct phy_device *phydev = ugeth->phydev; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1607 | int new_state = 0; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1608 | |
| 1609 | ug_regs = ugeth->ug_regs; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1610 | uf_regs = ugeth->uccf->uf_regs; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1611 | |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1612 | if (phydev->link) { |
| 1613 | u32 tempval = in_be32(&ug_regs->maccfg2); |
| 1614 | u32 upsmr = in_be32(&uf_regs->upsmr); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1615 | /* Now we make sure that we can be in full duplex mode. |
| 1616 | * If not, we operate in half-duplex mode. */ |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1617 | if (phydev->duplex != ugeth->oldduplex) { |
| 1618 | new_state = 1; |
| 1619 | if (!(phydev->duplex)) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1620 | tempval &= ~(MACCFG2_FDX); |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1621 | else |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1622 | tempval |= MACCFG2_FDX; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1623 | ugeth->oldduplex = phydev->duplex; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1624 | } |
| 1625 | |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1626 | if (phydev->speed != ugeth->oldspeed) { |
| 1627 | new_state = 1; |
| 1628 | switch (phydev->speed) { |
| 1629 | case SPEED_1000: |
| 1630 | tempval = ((tempval & |
| 1631 | ~(MACCFG2_INTERFACE_MODE_MASK)) | |
| 1632 | MACCFG2_INTERFACE_MODE_BYTE); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1633 | break; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1634 | case SPEED_100: |
| 1635 | case SPEED_10: |
| 1636 | tempval = ((tempval & |
| 1637 | ~(MACCFG2_INTERFACE_MODE_MASK)) | |
| 1638 | MACCFG2_INTERFACE_MODE_NIBBLE); |
| 1639 | /* if reduced mode, re-set UPSMR.R10M */ |
| 1640 | if ((ugeth->phy_interface == PHY_INTERFACE_MODE_RMII) || |
| 1641 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII) || |
| 1642 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) || |
Kim Phillips | bd0ceaa | 2007-11-26 16:17:58 -0600 | [diff] [blame] | 1643 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID) || |
| 1644 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) || |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1645 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { |
| 1646 | if (phydev->speed == SPEED_10) |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1647 | upsmr |= UCC_GETH_UPSMR_R10M; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1648 | else |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 1649 | upsmr &= ~UCC_GETH_UPSMR_R10M; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1650 | } |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1651 | break; |
| 1652 | default: |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1653 | if (netif_msg_link(ugeth)) |
| 1654 | ugeth_warn( |
| 1655 | "%s: Ack! Speed (%d) is not 10/100/1000!", |
| 1656 | dev->name, phydev->speed); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1657 | break; |
| 1658 | } |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1659 | ugeth->oldspeed = phydev->speed; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1660 | } |
| 1661 | |
| 1662 | if (!ugeth->oldlink) { |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1663 | new_state = 1; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1664 | ugeth->oldlink = 1; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1665 | } |
Anton Vorontsov | 08fafd8 | 2009-12-24 05:31:20 +0000 | [diff] [blame] | 1666 | |
| 1667 | if (new_state) { |
| 1668 | /* |
| 1669 | * To change the MAC configuration we need to disable |
| 1670 | * the controller. To do so, we have to either grab |
| 1671 | * ugeth->lock, which is a bad idea since 'graceful |
| 1672 | * stop' commands might take quite a while, or we can |
| 1673 | * quiesce driver's activity. |
| 1674 | */ |
| 1675 | ugeth_quiesce(ugeth); |
| 1676 | ugeth_disable(ugeth, COMM_DIR_RX_AND_TX); |
| 1677 | |
| 1678 | out_be32(&ug_regs->maccfg2, tempval); |
| 1679 | out_be32(&uf_regs->upsmr, upsmr); |
| 1680 | |
| 1681 | ugeth_enable(ugeth, COMM_DIR_RX_AND_TX); |
| 1682 | ugeth_activate(ugeth); |
| 1683 | } |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1684 | } else if (ugeth->oldlink) { |
| 1685 | new_state = 1; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1686 | ugeth->oldlink = 0; |
| 1687 | ugeth->oldspeed = 0; |
| 1688 | ugeth->oldduplex = -1; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1689 | } |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1690 | |
| 1691 | if (new_state && netif_msg_link(ugeth)) |
| 1692 | phy_print_status(phydev); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1693 | } |
| 1694 | |
Haiying Wang | fb1001f | 2009-06-17 13:16:10 +0000 | [diff] [blame] | 1695 | /* Initialize TBI PHY interface for communicating with the |
| 1696 | * SERDES lynx PHY on the chip. We communicate with this PHY |
| 1697 | * through the MDIO bus on each controller, treating it as a |
| 1698 | * "normal" PHY at the address found in the UTBIPA register. We assume |
| 1699 | * that the UTBIPA register is valid. Either the MDIO bus code will set |
| 1700 | * it to a value that doesn't conflict with other PHYs on the bus, or the |
| 1701 | * value doesn't matter, as there are no other PHYs on the bus. |
| 1702 | */ |
| 1703 | static void uec_configure_serdes(struct net_device *dev) |
| 1704 | { |
| 1705 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
| 1706 | struct ucc_geth_info *ug_info = ugeth->ug_info; |
| 1707 | struct phy_device *tbiphy; |
| 1708 | |
| 1709 | if (!ug_info->tbi_node) { |
| 1710 | dev_warn(&dev->dev, "SGMII mode requires that the device " |
| 1711 | "tree specify a tbi-handle\n"); |
| 1712 | return; |
| 1713 | } |
| 1714 | |
| 1715 | tbiphy = of_phy_find_device(ug_info->tbi_node); |
| 1716 | if (!tbiphy) { |
| 1717 | dev_err(&dev->dev, "error: Could not get TBI device\n"); |
| 1718 | return; |
| 1719 | } |
| 1720 | |
| 1721 | /* |
| 1722 | * If the link is already up, we must already be ok, and don't need to |
| 1723 | * configure and reset the TBI<->SerDes link. Maybe U-Boot configured |
| 1724 | * everything for us? Resetting it takes the link down and requires |
| 1725 | * several seconds for it to come back. |
| 1726 | */ |
| 1727 | if (phy_read(tbiphy, ENET_TBI_MII_SR) & TBISR_LSTATUS) |
| 1728 | return; |
| 1729 | |
| 1730 | /* Single clk mode, mii mode off(for serdes communication) */ |
| 1731 | phy_write(tbiphy, ENET_TBI_MII_ANA, TBIANA_SETTINGS); |
| 1732 | |
| 1733 | phy_write(tbiphy, ENET_TBI_MII_TBICON, TBICON_CLK_SELECT); |
| 1734 | |
| 1735 | phy_write(tbiphy, ENET_TBI_MII_CR, TBICR_SETTINGS); |
| 1736 | } |
| 1737 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1738 | /* Configure the PHY for dev. |
| 1739 | * returns 0 if success. -1 if failure |
| 1740 | */ |
| 1741 | static int init_phy(struct net_device *dev) |
| 1742 | { |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1743 | struct ucc_geth_private *priv = netdev_priv(dev); |
Anton Vorontsov | 61fa9dc | 2009-03-22 21:30:52 -0700 | [diff] [blame] | 1744 | struct ucc_geth_info *ug_info = priv->ug_info; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1745 | struct phy_device *phydev; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1746 | |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1747 | priv->oldlink = 0; |
| 1748 | priv->oldspeed = 0; |
| 1749 | priv->oldduplex = -1; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1750 | |
Grant Likely | 0b9da33 | 2009-04-25 12:53:23 +0000 | [diff] [blame] | 1751 | phydev = of_phy_connect(dev, ug_info->phy_node, &adjust_link, 0, |
| 1752 | priv->phy_interface); |
Anton Vorontsov | 3104a6f | 2009-07-16 21:31:47 +0000 | [diff] [blame] | 1753 | if (!phydev) |
| 1754 | phydev = of_phy_connect_fixed_link(dev, &adjust_link, |
| 1755 | priv->phy_interface); |
Grant Likely | 0b9da33 | 2009-04-25 12:53:23 +0000 | [diff] [blame] | 1756 | if (!phydev) { |
Anton Vorontsov | 3104a6f | 2009-07-16 21:31:47 +0000 | [diff] [blame] | 1757 | dev_err(&dev->dev, "Could not attach to PHY\n"); |
Grant Likely | 0b9da33 | 2009-04-25 12:53:23 +0000 | [diff] [blame] | 1758 | return -ENODEV; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1759 | } |
| 1760 | |
Haiying Wang | 047584c | 2009-06-02 04:04:15 +0000 | [diff] [blame] | 1761 | if (priv->phy_interface == PHY_INTERFACE_MODE_SGMII) |
| 1762 | uec_configure_serdes(dev); |
| 1763 | |
Joakim Tjernlund | bb24fd6 | 2011-08-04 03:19:45 +0000 | [diff] [blame] | 1764 | phydev->supported &= (SUPPORTED_MII | |
| 1765 | SUPPORTED_Autoneg | |
| 1766 | ADVERTISED_10baseT_Half | |
| 1767 | ADVERTISED_10baseT_Full | |
| 1768 | ADVERTISED_100baseT_Half | |
| 1769 | ADVERTISED_100baseT_Full); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1770 | |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1771 | if (priv->max_speed == SPEED_1000) |
| 1772 | phydev->supported |= ADVERTISED_1000baseT_Full; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1773 | |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1774 | phydev->advertising = phydev->supported; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1775 | |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 1776 | priv->phydev = phydev; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1777 | |
| 1778 | return 0; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1779 | } |
| 1780 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 1781 | static void ugeth_dump_regs(struct ucc_geth_private *ugeth) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1782 | { |
| 1783 | #ifdef DEBUG |
| 1784 | ucc_fast_dump_regs(ugeth->uccf); |
| 1785 | dump_regs(ugeth); |
| 1786 | dump_bds(ugeth); |
| 1787 | #endif |
| 1788 | } |
| 1789 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 1790 | static int ugeth_82xx_filtering_clear_all_addr_in_hash(struct ucc_geth_private * |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1791 | ugeth, |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 1792 | enum enet_addr_type |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1793 | enet_addr_type) |
| 1794 | { |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1795 | struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt; |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 1796 | struct ucc_fast_private *uccf; |
| 1797 | enum comm_dir comm_dir; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1798 | struct list_head *p_lh; |
| 1799 | u16 i, num; |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1800 | u32 __iomem *addr_h; |
| 1801 | u32 __iomem *addr_l; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1802 | u8 *p_counter; |
| 1803 | |
| 1804 | uccf = ugeth->uccf; |
| 1805 | |
| 1806 | p_82xx_addr_filt = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1807 | (struct ucc_geth_82xx_address_filtering_pram __iomem *) |
| 1808 | ugeth->p_rx_glbl_pram->addressfiltering; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1809 | |
| 1810 | if (enet_addr_type == ENET_ADDR_TYPE_GROUP) { |
| 1811 | addr_h = &(p_82xx_addr_filt->gaddr_h); |
| 1812 | addr_l = &(p_82xx_addr_filt->gaddr_l); |
| 1813 | p_lh = &ugeth->group_hash_q; |
| 1814 | p_counter = &(ugeth->numGroupAddrInHash); |
| 1815 | } else if (enet_addr_type == ENET_ADDR_TYPE_INDIVIDUAL) { |
| 1816 | addr_h = &(p_82xx_addr_filt->iaddr_h); |
| 1817 | addr_l = &(p_82xx_addr_filt->iaddr_l); |
| 1818 | p_lh = &ugeth->ind_hash_q; |
| 1819 | p_counter = &(ugeth->numIndAddrInHash); |
| 1820 | } else |
| 1821 | return -EINVAL; |
| 1822 | |
| 1823 | comm_dir = 0; |
| 1824 | if (uccf->enabled_tx) |
| 1825 | comm_dir |= COMM_DIR_TX; |
| 1826 | if (uccf->enabled_rx) |
| 1827 | comm_dir |= COMM_DIR_RX; |
| 1828 | if (comm_dir) |
| 1829 | ugeth_disable(ugeth, comm_dir); |
| 1830 | |
| 1831 | /* Clear the hash table. */ |
| 1832 | out_be32(addr_h, 0x00000000); |
| 1833 | out_be32(addr_l, 0x00000000); |
| 1834 | |
| 1835 | if (!p_lh) |
| 1836 | return 0; |
| 1837 | |
| 1838 | num = *p_counter; |
| 1839 | |
| 1840 | /* Delete all remaining CQ elements */ |
| 1841 | for (i = 0; i < num; i++) |
| 1842 | put_enet_addr_container(ENET_ADDR_CONT_ENTRY(dequeue(p_lh))); |
| 1843 | |
| 1844 | *p_counter = 0; |
| 1845 | |
| 1846 | if (comm_dir) |
| 1847 | ugeth_enable(ugeth, comm_dir); |
| 1848 | |
| 1849 | return 0; |
| 1850 | } |
| 1851 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 1852 | static int ugeth_82xx_filtering_clear_addr_in_paddr(struct ucc_geth_private *ugeth, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1853 | u8 paddr_num) |
| 1854 | { |
| 1855 | ugeth->indAddrRegUsed[paddr_num] = 0; /* mark this paddr as not used */ |
| 1856 | return hw_clear_addr_in_paddr(ugeth, paddr_num);/* clear in hardware */ |
| 1857 | } |
| 1858 | |
Paul Gortmaker | e19a82c | 2012-02-27 02:36:29 +0000 | [diff] [blame] | 1859 | static void ucc_geth_free_rx(struct ucc_geth_private *ugeth) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1860 | { |
Paul Gortmaker | e19a82c | 2012-02-27 02:36:29 +0000 | [diff] [blame] | 1861 | struct ucc_geth_info *ug_info; |
| 1862 | struct ucc_fast_info *uf_info; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1863 | u16 i, j; |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 1864 | u8 __iomem *bd; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1865 | |
Paul Gortmaker | e19a82c | 2012-02-27 02:36:29 +0000 | [diff] [blame] | 1866 | |
| 1867 | ug_info = ugeth->ug_info; |
| 1868 | uf_info = &ug_info->uf_info; |
| 1869 | |
| 1870 | for (i = 0; i < ugeth->ug_info->numQueuesRx; i++) { |
| 1871 | if (ugeth->p_rx_bd_ring[i]) { |
| 1872 | /* Return existing data buffers in ring */ |
| 1873 | bd = ugeth->p_rx_bd_ring[i]; |
| 1874 | for (j = 0; j < ugeth->ug_info->bdRingLenRx[i]; j++) { |
| 1875 | if (ugeth->rx_skbuff[i][j]) { |
| 1876 | dma_unmap_single(ugeth->dev, |
| 1877 | in_be32(&((struct qe_bd __iomem *)bd)->buf), |
| 1878 | ugeth->ug_info-> |
| 1879 | uf_info.max_rx_buf_length + |
| 1880 | UCC_GETH_RX_DATA_BUF_ALIGNMENT, |
| 1881 | DMA_FROM_DEVICE); |
| 1882 | dev_kfree_skb_any( |
| 1883 | ugeth->rx_skbuff[i][j]); |
| 1884 | ugeth->rx_skbuff[i][j] = NULL; |
| 1885 | } |
| 1886 | bd += sizeof(struct qe_bd); |
| 1887 | } |
| 1888 | |
| 1889 | kfree(ugeth->rx_skbuff[i]); |
| 1890 | |
| 1891 | if (ugeth->ug_info->uf_info.bd_mem_part == |
| 1892 | MEM_PART_SYSTEM) |
| 1893 | kfree((void *)ugeth->rx_bd_ring_offset[i]); |
| 1894 | else if (ugeth->ug_info->uf_info.bd_mem_part == |
| 1895 | MEM_PART_MURAM) |
| 1896 | qe_muram_free(ugeth->rx_bd_ring_offset[i]); |
| 1897 | ugeth->p_rx_bd_ring[i] = NULL; |
| 1898 | } |
| 1899 | } |
| 1900 | |
| 1901 | } |
| 1902 | |
| 1903 | static void ucc_geth_free_tx(struct ucc_geth_private *ugeth) |
| 1904 | { |
| 1905 | struct ucc_geth_info *ug_info; |
| 1906 | struct ucc_fast_info *uf_info; |
| 1907 | u16 i, j; |
| 1908 | u8 __iomem *bd; |
| 1909 | |
| 1910 | ug_info = ugeth->ug_info; |
| 1911 | uf_info = &ug_info->uf_info; |
| 1912 | |
| 1913 | for (i = 0; i < ugeth->ug_info->numQueuesTx; i++) { |
| 1914 | bd = ugeth->p_tx_bd_ring[i]; |
| 1915 | if (!bd) |
| 1916 | continue; |
| 1917 | for (j = 0; j < ugeth->ug_info->bdRingLenTx[i]; j++) { |
| 1918 | if (ugeth->tx_skbuff[i][j]) { |
| 1919 | dma_unmap_single(ugeth->dev, |
| 1920 | in_be32(&((struct qe_bd __iomem *)bd)->buf), |
| 1921 | (in_be32((u32 __iomem *)bd) & |
| 1922 | BD_LENGTH_MASK), |
| 1923 | DMA_TO_DEVICE); |
| 1924 | dev_kfree_skb_any(ugeth->tx_skbuff[i][j]); |
| 1925 | ugeth->tx_skbuff[i][j] = NULL; |
| 1926 | } |
| 1927 | } |
| 1928 | |
| 1929 | kfree(ugeth->tx_skbuff[i]); |
| 1930 | |
| 1931 | if (ugeth->p_tx_bd_ring[i]) { |
| 1932 | if (ugeth->ug_info->uf_info.bd_mem_part == |
| 1933 | MEM_PART_SYSTEM) |
| 1934 | kfree((void *)ugeth->tx_bd_ring_offset[i]); |
| 1935 | else if (ugeth->ug_info->uf_info.bd_mem_part == |
| 1936 | MEM_PART_MURAM) |
| 1937 | qe_muram_free(ugeth->tx_bd_ring_offset[i]); |
| 1938 | ugeth->p_tx_bd_ring[i] = NULL; |
| 1939 | } |
| 1940 | } |
| 1941 | |
| 1942 | } |
| 1943 | |
| 1944 | static void ucc_geth_memclean(struct ucc_geth_private *ugeth) |
| 1945 | { |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1946 | if (!ugeth) |
| 1947 | return; |
| 1948 | |
Anton Vorontsov | 80a9fad | 2008-02-01 16:22:48 +0300 | [diff] [blame] | 1949 | if (ugeth->uccf) { |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1950 | ucc_fast_free(ugeth->uccf); |
Anton Vorontsov | 80a9fad | 2008-02-01 16:22:48 +0300 | [diff] [blame] | 1951 | ugeth->uccf = NULL; |
| 1952 | } |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 1953 | |
| 1954 | if (ugeth->p_thread_data_tx) { |
| 1955 | qe_muram_free(ugeth->thread_dat_tx_offset); |
| 1956 | ugeth->p_thread_data_tx = NULL; |
| 1957 | } |
| 1958 | if (ugeth->p_thread_data_rx) { |
| 1959 | qe_muram_free(ugeth->thread_dat_rx_offset); |
| 1960 | ugeth->p_thread_data_rx = NULL; |
| 1961 | } |
| 1962 | if (ugeth->p_exf_glbl_param) { |
| 1963 | qe_muram_free(ugeth->exf_glbl_param_offset); |
| 1964 | ugeth->p_exf_glbl_param = NULL; |
| 1965 | } |
| 1966 | if (ugeth->p_rx_glbl_pram) { |
| 1967 | qe_muram_free(ugeth->rx_glbl_pram_offset); |
| 1968 | ugeth->p_rx_glbl_pram = NULL; |
| 1969 | } |
| 1970 | if (ugeth->p_tx_glbl_pram) { |
| 1971 | qe_muram_free(ugeth->tx_glbl_pram_offset); |
| 1972 | ugeth->p_tx_glbl_pram = NULL; |
| 1973 | } |
| 1974 | if (ugeth->p_send_q_mem_reg) { |
| 1975 | qe_muram_free(ugeth->send_q_mem_reg_offset); |
| 1976 | ugeth->p_send_q_mem_reg = NULL; |
| 1977 | } |
| 1978 | if (ugeth->p_scheduler) { |
| 1979 | qe_muram_free(ugeth->scheduler_offset); |
| 1980 | ugeth->p_scheduler = NULL; |
| 1981 | } |
| 1982 | if (ugeth->p_tx_fw_statistics_pram) { |
| 1983 | qe_muram_free(ugeth->tx_fw_statistics_pram_offset); |
| 1984 | ugeth->p_tx_fw_statistics_pram = NULL; |
| 1985 | } |
| 1986 | if (ugeth->p_rx_fw_statistics_pram) { |
| 1987 | qe_muram_free(ugeth->rx_fw_statistics_pram_offset); |
| 1988 | ugeth->p_rx_fw_statistics_pram = NULL; |
| 1989 | } |
| 1990 | if (ugeth->p_rx_irq_coalescing_tbl) { |
| 1991 | qe_muram_free(ugeth->rx_irq_coalescing_tbl_offset); |
| 1992 | ugeth->p_rx_irq_coalescing_tbl = NULL; |
| 1993 | } |
| 1994 | if (ugeth->p_rx_bd_qs_tbl) { |
| 1995 | qe_muram_free(ugeth->rx_bd_qs_tbl_offset); |
| 1996 | ugeth->p_rx_bd_qs_tbl = NULL; |
| 1997 | } |
| 1998 | if (ugeth->p_init_enet_param_shadow) { |
| 1999 | return_init_enet_entries(ugeth, |
| 2000 | &(ugeth->p_init_enet_param_shadow-> |
| 2001 | rxthread[0]), |
| 2002 | ENET_INIT_PARAM_MAX_ENTRIES_RX, |
| 2003 | ugeth->ug_info->riscRx, 1); |
| 2004 | return_init_enet_entries(ugeth, |
| 2005 | &(ugeth->p_init_enet_param_shadow-> |
| 2006 | txthread[0]), |
| 2007 | ENET_INIT_PARAM_MAX_ENTRIES_TX, |
| 2008 | ugeth->ug_info->riscTx, 0); |
| 2009 | kfree(ugeth->p_init_enet_param_shadow); |
| 2010 | ugeth->p_init_enet_param_shadow = NULL; |
| 2011 | } |
Paul Gortmaker | e19a82c | 2012-02-27 02:36:29 +0000 | [diff] [blame] | 2012 | ucc_geth_free_tx(ugeth); |
| 2013 | ucc_geth_free_rx(ugeth); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2014 | while (!list_empty(&ugeth->group_hash_q)) |
| 2015 | put_enet_addr_container(ENET_ADDR_CONT_ENTRY |
| 2016 | (dequeue(&ugeth->group_hash_q))); |
| 2017 | while (!list_empty(&ugeth->ind_hash_q)) |
| 2018 | put_enet_addr_container(ENET_ADDR_CONT_ENTRY |
| 2019 | (dequeue(&ugeth->ind_hash_q))); |
Anton Vorontsov | 3e73fc9 | 2008-12-18 08:23:33 +0000 | [diff] [blame] | 2020 | if (ugeth->ug_regs) { |
| 2021 | iounmap(ugeth->ug_regs); |
| 2022 | ugeth->ug_regs = NULL; |
| 2023 | } |
Anton Vorontsov | 50f238f | 2009-07-07 08:38:42 +0000 | [diff] [blame] | 2024 | |
| 2025 | skb_queue_purge(&ugeth->rx_recycle); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2026 | } |
| 2027 | |
| 2028 | static void ucc_geth_set_multi(struct net_device *dev) |
| 2029 | { |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2030 | struct ucc_geth_private *ugeth; |
Jiri Pirko | 22bedad3 | 2010-04-01 21:22:57 +0000 | [diff] [blame] | 2031 | struct netdev_hw_addr *ha; |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2032 | struct ucc_fast __iomem *uf_regs; |
| 2033 | struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2034 | |
| 2035 | ugeth = netdev_priv(dev); |
| 2036 | |
| 2037 | uf_regs = ugeth->uccf->uf_regs; |
| 2038 | |
| 2039 | if (dev->flags & IFF_PROMISC) { |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 2040 | setbits32(&uf_regs->upsmr, UCC_GETH_UPSMR_PRO); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2041 | } else { |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 2042 | clrbits32(&uf_regs->upsmr, UCC_GETH_UPSMR_PRO); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2043 | |
| 2044 | p_82xx_addr_filt = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2045 | (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth-> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2046 | p_rx_glbl_pram->addressfiltering; |
| 2047 | |
| 2048 | if (dev->flags & IFF_ALLMULTI) { |
| 2049 | /* Catch all multicast addresses, so set the |
| 2050 | * filter to all 1's. |
| 2051 | */ |
| 2052 | out_be32(&p_82xx_addr_filt->gaddr_h, 0xffffffff); |
| 2053 | out_be32(&p_82xx_addr_filt->gaddr_l, 0xffffffff); |
| 2054 | } else { |
| 2055 | /* Clear filter and add the addresses in the list. |
| 2056 | */ |
| 2057 | out_be32(&p_82xx_addr_filt->gaddr_h, 0x0); |
| 2058 | out_be32(&p_82xx_addr_filt->gaddr_l, 0x0); |
| 2059 | |
Jiri Pirko | 22bedad3 | 2010-04-01 21:22:57 +0000 | [diff] [blame] | 2060 | netdev_for_each_mc_addr(ha, dev) { |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2061 | /* Ask CPM to run CRC and set bit in |
| 2062 | * filter mask. |
| 2063 | */ |
Jiri Pirko | 22bedad3 | 2010-04-01 21:22:57 +0000 | [diff] [blame] | 2064 | hw_add_addr_in_hash(ugeth, ha->addr); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2065 | } |
| 2066 | } |
| 2067 | } |
| 2068 | } |
| 2069 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2070 | static void ucc_geth_stop(struct ucc_geth_private *ugeth) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2071 | { |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2072 | struct ucc_geth __iomem *ug_regs = ugeth->ug_regs; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 2073 | struct phy_device *phydev = ugeth->phydev; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2074 | |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2075 | ugeth_vdbg("%s: IN", __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2076 | |
Joakim Tjernlund | 75e6047 | 2010-11-12 03:55:09 +0000 | [diff] [blame] | 2077 | /* |
| 2078 | * Tell the kernel the link is down. |
| 2079 | * Must be done before disabling the controller |
| 2080 | * or deadlock may happen. |
| 2081 | */ |
| 2082 | phy_stop(phydev); |
| 2083 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2084 | /* Disable the controller */ |
| 2085 | ugeth_disable(ugeth, COMM_DIR_RX_AND_TX); |
| 2086 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2087 | /* Mask all interrupts */ |
Timur Tabi | c6f5047 | 2007-07-10 07:51:11 -0500 | [diff] [blame] | 2088 | out_be32(ugeth->uccf->p_uccm, 0x00000000); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2089 | |
| 2090 | /* Clear all interrupts */ |
| 2091 | out_be32(ugeth->uccf->p_ucce, 0xffffffff); |
| 2092 | |
| 2093 | /* Disable Rx and Tx */ |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 2094 | clrbits32(&ug_regs->maccfg1, MACCFG1_ENABLE_RX | MACCFG1_ENABLE_TX); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2095 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2096 | ucc_geth_memclean(ugeth); |
| 2097 | } |
| 2098 | |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 2099 | static int ucc_struct_init(struct ucc_geth_private *ugeth) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2100 | { |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2101 | struct ucc_geth_info *ug_info; |
| 2102 | struct ucc_fast_info *uf_info; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 2103 | int i; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2104 | |
| 2105 | ug_info = ugeth->ug_info; |
| 2106 | uf_info = &ug_info->uf_info; |
| 2107 | |
| 2108 | if (!((uf_info->bd_mem_part == MEM_PART_SYSTEM) || |
| 2109 | (uf_info->bd_mem_part == MEM_PART_MURAM))) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2110 | if (netif_msg_probe(ugeth)) |
| 2111 | ugeth_err("%s: Bad memory partition value.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2112 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2113 | return -EINVAL; |
| 2114 | } |
| 2115 | |
| 2116 | /* Rx BD lengths */ |
| 2117 | for (i = 0; i < ug_info->numQueuesRx; i++) { |
| 2118 | if ((ug_info->bdRingLenRx[i] < UCC_GETH_RX_BD_RING_SIZE_MIN) || |
| 2119 | (ug_info->bdRingLenRx[i] % |
| 2120 | UCC_GETH_RX_BD_RING_SIZE_ALIGNMENT)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2121 | if (netif_msg_probe(ugeth)) |
| 2122 | ugeth_err |
| 2123 | ("%s: Rx BD ring length must be multiple of 4, no smaller than 8.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2124 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2125 | return -EINVAL; |
| 2126 | } |
| 2127 | } |
| 2128 | |
| 2129 | /* Tx BD lengths */ |
| 2130 | for (i = 0; i < ug_info->numQueuesTx; i++) { |
| 2131 | if (ug_info->bdRingLenTx[i] < UCC_GETH_TX_BD_RING_SIZE_MIN) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2132 | if (netif_msg_probe(ugeth)) |
| 2133 | ugeth_err |
| 2134 | ("%s: Tx BD ring length must be no smaller than 2.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2135 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2136 | return -EINVAL; |
| 2137 | } |
| 2138 | } |
| 2139 | |
| 2140 | /* mrblr */ |
| 2141 | if ((uf_info->max_rx_buf_length == 0) || |
| 2142 | (uf_info->max_rx_buf_length % UCC_GETH_MRBLR_ALIGNMENT)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2143 | if (netif_msg_probe(ugeth)) |
| 2144 | ugeth_err |
| 2145 | ("%s: max_rx_buf_length must be non-zero multiple of 128.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2146 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2147 | return -EINVAL; |
| 2148 | } |
| 2149 | |
| 2150 | /* num Tx queues */ |
| 2151 | if (ug_info->numQueuesTx > NUM_TX_QUEUES) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2152 | if (netif_msg_probe(ugeth)) |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2153 | ugeth_err("%s: number of tx queues too large.", __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2154 | return -EINVAL; |
| 2155 | } |
| 2156 | |
| 2157 | /* num Rx queues */ |
| 2158 | if (ug_info->numQueuesRx > NUM_RX_QUEUES) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2159 | if (netif_msg_probe(ugeth)) |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2160 | ugeth_err("%s: number of rx queues too large.", __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2161 | return -EINVAL; |
| 2162 | } |
| 2163 | |
| 2164 | /* l2qt */ |
| 2165 | for (i = 0; i < UCC_GETH_VLAN_PRIORITY_MAX; i++) { |
| 2166 | if (ug_info->l2qt[i] >= ug_info->numQueuesRx) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2167 | if (netif_msg_probe(ugeth)) |
| 2168 | ugeth_err |
| 2169 | ("%s: VLAN priority table entry must not be" |
| 2170 | " larger than number of Rx queues.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2171 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2172 | return -EINVAL; |
| 2173 | } |
| 2174 | } |
| 2175 | |
| 2176 | /* l3qt */ |
| 2177 | for (i = 0; i < UCC_GETH_IP_PRIORITY_MAX; i++) { |
| 2178 | if (ug_info->l3qt[i] >= ug_info->numQueuesRx) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2179 | if (netif_msg_probe(ugeth)) |
| 2180 | ugeth_err |
| 2181 | ("%s: IP priority table entry must not be" |
| 2182 | " larger than number of Rx queues.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2183 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2184 | return -EINVAL; |
| 2185 | } |
| 2186 | } |
| 2187 | |
| 2188 | if (ug_info->cam && !ug_info->ecamptr) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2189 | if (netif_msg_probe(ugeth)) |
| 2190 | ugeth_err("%s: If cam mode is chosen, must supply cam ptr.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2191 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2192 | return -EINVAL; |
| 2193 | } |
| 2194 | |
| 2195 | if ((ug_info->numStationAddresses != |
Joe Perches | 8e95a20 | 2009-12-03 07:58:21 +0000 | [diff] [blame] | 2196 | UCC_GETH_NUM_OF_STATION_ADDRESSES_1) && |
| 2197 | ug_info->rxExtendedFiltering) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2198 | if (netif_msg_probe(ugeth)) |
| 2199 | ugeth_err("%s: Number of station addresses greater than 1 " |
| 2200 | "not allowed in extended parsing mode.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2201 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2202 | return -EINVAL; |
| 2203 | } |
| 2204 | |
| 2205 | /* Generate uccm_mask for receive */ |
| 2206 | uf_info->uccm_mask = ug_info->eventRegMask & UCCE_OTHER;/* Errors */ |
| 2207 | for (i = 0; i < ug_info->numQueuesRx; i++) |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 2208 | uf_info->uccm_mask |= (UCC_GETH_UCCE_RXF0 << i); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2209 | |
| 2210 | for (i = 0; i < ug_info->numQueuesTx; i++) |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 2211 | uf_info->uccm_mask |= (UCC_GETH_UCCE_TXB0 << i); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2212 | /* Initialize the general fast UCC block. */ |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 2213 | if (ucc_fast_init(uf_info, &ugeth->uccf)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2214 | if (netif_msg_probe(ugeth)) |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2215 | ugeth_err("%s: Failed to init uccf.", __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2216 | return -ENOMEM; |
| 2217 | } |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 2218 | |
Haiying Wang | 345f842 | 2009-04-29 14:14:35 -0400 | [diff] [blame] | 2219 | /* read the number of risc engines, update the riscTx and riscRx |
| 2220 | * if there are 4 riscs in QE |
| 2221 | */ |
| 2222 | if (qe_get_num_of_risc() == 4) { |
| 2223 | ug_info->riscTx = QE_RISC_ALLOCATION_FOUR_RISCS; |
| 2224 | ug_info->riscRx = QE_RISC_ALLOCATION_FOUR_RISCS; |
| 2225 | } |
| 2226 | |
Anton Vorontsov | 3e73fc9 | 2008-12-18 08:23:33 +0000 | [diff] [blame] | 2227 | ugeth->ug_regs = ioremap(uf_info->regs, sizeof(*ugeth->ug_regs)); |
| 2228 | if (!ugeth->ug_regs) { |
| 2229 | if (netif_msg_probe(ugeth)) |
| 2230 | ugeth_err("%s: Failed to ioremap regs.", __func__); |
| 2231 | return -ENOMEM; |
| 2232 | } |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 2233 | |
Anton Vorontsov | 50f238f | 2009-07-07 08:38:42 +0000 | [diff] [blame] | 2234 | skb_queue_head_init(&ugeth->rx_recycle); |
| 2235 | |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 2236 | return 0; |
| 2237 | } |
| 2238 | |
Paul Gortmaker | e19a82c | 2012-02-27 02:36:29 +0000 | [diff] [blame] | 2239 | static int ucc_geth_alloc_tx(struct ucc_geth_private *ugeth) |
| 2240 | { |
| 2241 | struct ucc_geth_info *ug_info; |
| 2242 | struct ucc_fast_info *uf_info; |
| 2243 | int length; |
| 2244 | u16 i, j; |
| 2245 | u8 __iomem *bd; |
| 2246 | |
| 2247 | ug_info = ugeth->ug_info; |
| 2248 | uf_info = &ug_info->uf_info; |
| 2249 | |
| 2250 | /* Allocate Tx bds */ |
| 2251 | for (j = 0; j < ug_info->numQueuesTx; j++) { |
| 2252 | /* Allocate in multiple of |
| 2253 | UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT, |
| 2254 | according to spec */ |
| 2255 | length = ((ug_info->bdRingLenTx[j] * sizeof(struct qe_bd)) |
| 2256 | / UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT) |
| 2257 | * UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT; |
| 2258 | if ((ug_info->bdRingLenTx[j] * sizeof(struct qe_bd)) % |
| 2259 | UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT) |
| 2260 | length += UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT; |
| 2261 | if (uf_info->bd_mem_part == MEM_PART_SYSTEM) { |
| 2262 | u32 align = 4; |
| 2263 | if (UCC_GETH_TX_BD_RING_ALIGNMENT > 4) |
| 2264 | align = UCC_GETH_TX_BD_RING_ALIGNMENT; |
| 2265 | ugeth->tx_bd_ring_offset[j] = |
| 2266 | (u32) kmalloc((u32) (length + align), GFP_KERNEL); |
| 2267 | |
| 2268 | if (ugeth->tx_bd_ring_offset[j] != 0) |
| 2269 | ugeth->p_tx_bd_ring[j] = |
| 2270 | (u8 __iomem *)((ugeth->tx_bd_ring_offset[j] + |
| 2271 | align) & ~(align - 1)); |
| 2272 | } else if (uf_info->bd_mem_part == MEM_PART_MURAM) { |
| 2273 | ugeth->tx_bd_ring_offset[j] = |
| 2274 | qe_muram_alloc(length, |
| 2275 | UCC_GETH_TX_BD_RING_ALIGNMENT); |
| 2276 | if (!IS_ERR_VALUE(ugeth->tx_bd_ring_offset[j])) |
| 2277 | ugeth->p_tx_bd_ring[j] = |
| 2278 | (u8 __iomem *) qe_muram_addr(ugeth-> |
| 2279 | tx_bd_ring_offset[j]); |
| 2280 | } |
| 2281 | if (!ugeth->p_tx_bd_ring[j]) { |
| 2282 | if (netif_msg_ifup(ugeth)) |
| 2283 | ugeth_err |
| 2284 | ("%s: Can not allocate memory for Tx bd rings.", |
| 2285 | __func__); |
| 2286 | return -ENOMEM; |
| 2287 | } |
| 2288 | /* Zero unused end of bd ring, according to spec */ |
| 2289 | memset_io((void __iomem *)(ugeth->p_tx_bd_ring[j] + |
| 2290 | ug_info->bdRingLenTx[j] * sizeof(struct qe_bd)), 0, |
| 2291 | length - ug_info->bdRingLenTx[j] * sizeof(struct qe_bd)); |
| 2292 | } |
| 2293 | |
| 2294 | /* Init Tx bds */ |
| 2295 | for (j = 0; j < ug_info->numQueuesTx; j++) { |
| 2296 | /* Setup the skbuff rings */ |
| 2297 | ugeth->tx_skbuff[j] = kmalloc(sizeof(struct sk_buff *) * |
| 2298 | ugeth->ug_info->bdRingLenTx[j], |
| 2299 | GFP_KERNEL); |
| 2300 | |
| 2301 | if (ugeth->tx_skbuff[j] == NULL) { |
| 2302 | if (netif_msg_ifup(ugeth)) |
| 2303 | ugeth_err("%s: Could not allocate tx_skbuff", |
| 2304 | __func__); |
| 2305 | return -ENOMEM; |
| 2306 | } |
| 2307 | |
| 2308 | for (i = 0; i < ugeth->ug_info->bdRingLenTx[j]; i++) |
| 2309 | ugeth->tx_skbuff[j][i] = NULL; |
| 2310 | |
| 2311 | ugeth->skb_curtx[j] = ugeth->skb_dirtytx[j] = 0; |
| 2312 | bd = ugeth->confBd[j] = ugeth->txBd[j] = ugeth->p_tx_bd_ring[j]; |
| 2313 | for (i = 0; i < ug_info->bdRingLenTx[j]; i++) { |
| 2314 | /* clear bd buffer */ |
| 2315 | out_be32(&((struct qe_bd __iomem *)bd)->buf, 0); |
| 2316 | /* set bd status and length */ |
| 2317 | out_be32((u32 __iomem *)bd, 0); |
| 2318 | bd += sizeof(struct qe_bd); |
| 2319 | } |
| 2320 | bd -= sizeof(struct qe_bd); |
| 2321 | /* set bd status and length */ |
| 2322 | out_be32((u32 __iomem *)bd, T_W); /* for last BD set Wrap bit */ |
| 2323 | } |
| 2324 | |
| 2325 | return 0; |
| 2326 | } |
| 2327 | |
| 2328 | static int ucc_geth_alloc_rx(struct ucc_geth_private *ugeth) |
| 2329 | { |
| 2330 | struct ucc_geth_info *ug_info; |
| 2331 | struct ucc_fast_info *uf_info; |
| 2332 | int length; |
| 2333 | u16 i, j; |
| 2334 | u8 __iomem *bd; |
| 2335 | |
| 2336 | ug_info = ugeth->ug_info; |
| 2337 | uf_info = &ug_info->uf_info; |
| 2338 | |
| 2339 | /* Allocate Rx bds */ |
| 2340 | for (j = 0; j < ug_info->numQueuesRx; j++) { |
| 2341 | length = ug_info->bdRingLenRx[j] * sizeof(struct qe_bd); |
| 2342 | if (uf_info->bd_mem_part == MEM_PART_SYSTEM) { |
| 2343 | u32 align = 4; |
| 2344 | if (UCC_GETH_RX_BD_RING_ALIGNMENT > 4) |
| 2345 | align = UCC_GETH_RX_BD_RING_ALIGNMENT; |
| 2346 | ugeth->rx_bd_ring_offset[j] = |
| 2347 | (u32) kmalloc((u32) (length + align), GFP_KERNEL); |
| 2348 | if (ugeth->rx_bd_ring_offset[j] != 0) |
| 2349 | ugeth->p_rx_bd_ring[j] = |
| 2350 | (u8 __iomem *)((ugeth->rx_bd_ring_offset[j] + |
| 2351 | align) & ~(align - 1)); |
| 2352 | } else if (uf_info->bd_mem_part == MEM_PART_MURAM) { |
| 2353 | ugeth->rx_bd_ring_offset[j] = |
| 2354 | qe_muram_alloc(length, |
| 2355 | UCC_GETH_RX_BD_RING_ALIGNMENT); |
| 2356 | if (!IS_ERR_VALUE(ugeth->rx_bd_ring_offset[j])) |
| 2357 | ugeth->p_rx_bd_ring[j] = |
| 2358 | (u8 __iomem *) qe_muram_addr(ugeth-> |
| 2359 | rx_bd_ring_offset[j]); |
| 2360 | } |
| 2361 | if (!ugeth->p_rx_bd_ring[j]) { |
| 2362 | if (netif_msg_ifup(ugeth)) |
| 2363 | ugeth_err |
| 2364 | ("%s: Can not allocate memory for Rx bd rings.", |
| 2365 | __func__); |
| 2366 | return -ENOMEM; |
| 2367 | } |
| 2368 | } |
| 2369 | |
| 2370 | /* Init Rx bds */ |
| 2371 | for (j = 0; j < ug_info->numQueuesRx; j++) { |
| 2372 | /* Setup the skbuff rings */ |
| 2373 | ugeth->rx_skbuff[j] = kmalloc(sizeof(struct sk_buff *) * |
| 2374 | ugeth->ug_info->bdRingLenRx[j], |
| 2375 | GFP_KERNEL); |
| 2376 | |
| 2377 | if (ugeth->rx_skbuff[j] == NULL) { |
| 2378 | if (netif_msg_ifup(ugeth)) |
| 2379 | ugeth_err("%s: Could not allocate rx_skbuff", |
| 2380 | __func__); |
| 2381 | return -ENOMEM; |
| 2382 | } |
| 2383 | |
| 2384 | for (i = 0; i < ugeth->ug_info->bdRingLenRx[j]; i++) |
| 2385 | ugeth->rx_skbuff[j][i] = NULL; |
| 2386 | |
| 2387 | ugeth->skb_currx[j] = 0; |
| 2388 | bd = ugeth->rxBd[j] = ugeth->p_rx_bd_ring[j]; |
| 2389 | for (i = 0; i < ug_info->bdRingLenRx[j]; i++) { |
| 2390 | /* set bd status and length */ |
| 2391 | out_be32((u32 __iomem *)bd, R_I); |
| 2392 | /* clear bd buffer */ |
| 2393 | out_be32(&((struct qe_bd __iomem *)bd)->buf, 0); |
| 2394 | bd += sizeof(struct qe_bd); |
| 2395 | } |
| 2396 | bd -= sizeof(struct qe_bd); |
| 2397 | /* set bd status and length */ |
| 2398 | out_be32((u32 __iomem *)bd, R_W); /* for last BD set Wrap bit */ |
| 2399 | } |
| 2400 | |
| 2401 | return 0; |
| 2402 | } |
| 2403 | |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 2404 | static int ucc_geth_startup(struct ucc_geth_private *ugeth) |
| 2405 | { |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2406 | struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt; |
| 2407 | struct ucc_geth_init_pram __iomem *p_init_enet_pram; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 2408 | struct ucc_fast_private *uccf; |
| 2409 | struct ucc_geth_info *ug_info; |
| 2410 | struct ucc_fast_info *uf_info; |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2411 | struct ucc_fast __iomem *uf_regs; |
| 2412 | struct ucc_geth __iomem *ug_regs; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 2413 | int ret_val = -EINVAL; |
| 2414 | u32 remoder = UCC_GETH_REMODER_INIT; |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 2415 | u32 init_enet_pram_offset, cecr_subblock, command; |
Paul Gortmaker | e19a82c | 2012-02-27 02:36:29 +0000 | [diff] [blame] | 2416 | u32 ifstat, i, j, size, l2qt, l3qt; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 2417 | u16 temoder = UCC_GETH_TEMODER_INIT; |
| 2418 | u16 test; |
| 2419 | u8 function_code = 0; |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2420 | u8 __iomem *endOfRing; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 2421 | u8 numThreadsRxNumerical, numThreadsTxNumerical; |
| 2422 | |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2423 | ugeth_vdbg("%s: IN", __func__); |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 2424 | uccf = ugeth->uccf; |
| 2425 | ug_info = ugeth->ug_info; |
| 2426 | uf_info = &ug_info->uf_info; |
| 2427 | uf_regs = uccf->uf_regs; |
| 2428 | ug_regs = ugeth->ug_regs; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2429 | |
| 2430 | switch (ug_info->numThreadsRx) { |
| 2431 | case UCC_GETH_NUM_OF_THREADS_1: |
| 2432 | numThreadsRxNumerical = 1; |
| 2433 | break; |
| 2434 | case UCC_GETH_NUM_OF_THREADS_2: |
| 2435 | numThreadsRxNumerical = 2; |
| 2436 | break; |
| 2437 | case UCC_GETH_NUM_OF_THREADS_4: |
| 2438 | numThreadsRxNumerical = 4; |
| 2439 | break; |
| 2440 | case UCC_GETH_NUM_OF_THREADS_6: |
| 2441 | numThreadsRxNumerical = 6; |
| 2442 | break; |
| 2443 | case UCC_GETH_NUM_OF_THREADS_8: |
| 2444 | numThreadsRxNumerical = 8; |
| 2445 | break; |
| 2446 | default: |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2447 | if (netif_msg_ifup(ugeth)) |
| 2448 | ugeth_err("%s: Bad number of Rx threads value.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2449 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2450 | return -EINVAL; |
| 2451 | break; |
| 2452 | } |
| 2453 | |
| 2454 | switch (ug_info->numThreadsTx) { |
| 2455 | case UCC_GETH_NUM_OF_THREADS_1: |
| 2456 | numThreadsTxNumerical = 1; |
| 2457 | break; |
| 2458 | case UCC_GETH_NUM_OF_THREADS_2: |
| 2459 | numThreadsTxNumerical = 2; |
| 2460 | break; |
| 2461 | case UCC_GETH_NUM_OF_THREADS_4: |
| 2462 | numThreadsTxNumerical = 4; |
| 2463 | break; |
| 2464 | case UCC_GETH_NUM_OF_THREADS_6: |
| 2465 | numThreadsTxNumerical = 6; |
| 2466 | break; |
| 2467 | case UCC_GETH_NUM_OF_THREADS_8: |
| 2468 | numThreadsTxNumerical = 8; |
| 2469 | break; |
| 2470 | default: |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2471 | if (netif_msg_ifup(ugeth)) |
| 2472 | ugeth_err("%s: Bad number of Tx threads value.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2473 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2474 | return -EINVAL; |
| 2475 | break; |
| 2476 | } |
| 2477 | |
| 2478 | /* Calculate rx_extended_features */ |
| 2479 | ugeth->rx_non_dynamic_extended_features = ug_info->ipCheckSumCheck || |
| 2480 | ug_info->ipAddressAlignment || |
| 2481 | (ug_info->numStationAddresses != |
| 2482 | UCC_GETH_NUM_OF_STATION_ADDRESSES_1); |
| 2483 | |
| 2484 | ugeth->rx_extended_features = ugeth->rx_non_dynamic_extended_features || |
Joe Perches | 8e95a20 | 2009-12-03 07:58:21 +0000 | [diff] [blame] | 2485 | (ug_info->vlanOperationTagged != UCC_GETH_VLAN_OPERATION_TAGGED_NOP) || |
| 2486 | (ug_info->vlanOperationNonTagged != |
| 2487 | UCC_GETH_VLAN_OPERATION_NON_TAGGED_NOP); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2488 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2489 | init_default_reg_vals(&uf_regs->upsmr, |
| 2490 | &ug_regs->maccfg1, &ug_regs->maccfg2); |
| 2491 | |
| 2492 | /* Set UPSMR */ |
| 2493 | /* For more details see the hardware spec. */ |
| 2494 | init_rx_parameters(ug_info->bro, |
| 2495 | ug_info->rsh, ug_info->pro, &uf_regs->upsmr); |
| 2496 | |
| 2497 | /* We're going to ignore other registers for now, */ |
| 2498 | /* except as needed to get up and running */ |
| 2499 | |
| 2500 | /* Set MACCFG1 */ |
| 2501 | /* For more details see the hardware spec. */ |
| 2502 | init_flow_control_params(ug_info->aufc, |
| 2503 | ug_info->receiveFlowControl, |
Li Yang | ac42185 | 2007-07-19 11:47:47 +0800 | [diff] [blame] | 2504 | ug_info->transmitFlowControl, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2505 | ug_info->pausePeriod, |
| 2506 | ug_info->extensionField, |
| 2507 | &uf_regs->upsmr, |
| 2508 | &ug_regs->uempr, &ug_regs->maccfg1); |
| 2509 | |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 2510 | setbits32(&ug_regs->maccfg1, MACCFG1_ENABLE_RX | MACCFG1_ENABLE_TX); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2511 | |
| 2512 | /* Set IPGIFG */ |
| 2513 | /* For more details see the hardware spec. */ |
| 2514 | ret_val = init_inter_frame_gap_params(ug_info->nonBackToBackIfgPart1, |
| 2515 | ug_info->nonBackToBackIfgPart2, |
| 2516 | ug_info-> |
| 2517 | miminumInterFrameGapEnforcement, |
| 2518 | ug_info->backToBackInterFrameGap, |
| 2519 | &ug_regs->ipgifg); |
| 2520 | if (ret_val != 0) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2521 | if (netif_msg_ifup(ugeth)) |
| 2522 | ugeth_err("%s: IPGIFG initialization parameter too large.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2523 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2524 | return ret_val; |
| 2525 | } |
| 2526 | |
| 2527 | /* Set HAFDUP */ |
| 2528 | /* For more details see the hardware spec. */ |
| 2529 | ret_val = init_half_duplex_params(ug_info->altBeb, |
| 2530 | ug_info->backPressureNoBackoff, |
| 2531 | ug_info->noBackoff, |
| 2532 | ug_info->excessDefer, |
| 2533 | ug_info->altBebTruncation, |
| 2534 | ug_info->maxRetransmission, |
| 2535 | ug_info->collisionWindow, |
| 2536 | &ug_regs->hafdup); |
| 2537 | if (ret_val != 0) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2538 | if (netif_msg_ifup(ugeth)) |
| 2539 | ugeth_err("%s: Half Duplex initialization parameter too large.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2540 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2541 | return ret_val; |
| 2542 | } |
| 2543 | |
| 2544 | /* Set IFSTAT */ |
| 2545 | /* For more details see the hardware spec. */ |
| 2546 | /* Read only - resets upon read */ |
| 2547 | ifstat = in_be32(&ug_regs->ifstat); |
| 2548 | |
| 2549 | /* Clear UEMPR */ |
| 2550 | /* For more details see the hardware spec. */ |
| 2551 | out_be32(&ug_regs->uempr, 0); |
| 2552 | |
| 2553 | /* Set UESCR */ |
| 2554 | /* For more details see the hardware spec. */ |
| 2555 | init_hw_statistics_gathering_mode((ug_info->statisticsMode & |
| 2556 | UCC_GETH_STATISTICS_GATHERING_MODE_HARDWARE), |
| 2557 | 0, &uf_regs->upsmr, &ug_regs->uescr); |
| 2558 | |
Paul Gortmaker | e19a82c | 2012-02-27 02:36:29 +0000 | [diff] [blame] | 2559 | ret_val = ucc_geth_alloc_tx(ugeth); |
| 2560 | if (ret_val != 0) |
| 2561 | return ret_val; |
Ahmed S. Darwish | 04b588d | 2007-01-27 00:00:02 -0800 | [diff] [blame] | 2562 | |
Paul Gortmaker | e19a82c | 2012-02-27 02:36:29 +0000 | [diff] [blame] | 2563 | ret_val = ucc_geth_alloc_rx(ugeth); |
| 2564 | if (ret_val != 0) |
| 2565 | return ret_val; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2566 | |
| 2567 | /* |
| 2568 | * Global PRAM |
| 2569 | */ |
| 2570 | /* Tx global PRAM */ |
| 2571 | /* Allocate global tx parameter RAM page */ |
| 2572 | ugeth->tx_glbl_pram_offset = |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2573 | qe_muram_alloc(sizeof(struct ucc_geth_tx_global_pram), |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2574 | UCC_GETH_TX_GLOBAL_PRAM_ALIGNMENT); |
Timur Tabi | 4c35630 | 2007-05-08 14:46:36 -0500 | [diff] [blame] | 2575 | if (IS_ERR_VALUE(ugeth->tx_glbl_pram_offset)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2576 | if (netif_msg_ifup(ugeth)) |
| 2577 | ugeth_err |
| 2578 | ("%s: Can not allocate DPRAM memory for p_tx_glbl_pram.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2579 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2580 | return -ENOMEM; |
| 2581 | } |
| 2582 | ugeth->p_tx_glbl_pram = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2583 | (struct ucc_geth_tx_global_pram __iomem *) qe_muram_addr(ugeth-> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2584 | tx_glbl_pram_offset); |
| 2585 | /* Zero out p_tx_glbl_pram */ |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2586 | memset_io((void __iomem *)ugeth->p_tx_glbl_pram, 0, sizeof(struct ucc_geth_tx_global_pram)); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2587 | |
| 2588 | /* Fill global PRAM */ |
| 2589 | |
| 2590 | /* TQPTR */ |
| 2591 | /* Size varies with number of Tx threads */ |
| 2592 | ugeth->thread_dat_tx_offset = |
| 2593 | qe_muram_alloc(numThreadsTxNumerical * |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2594 | sizeof(struct ucc_geth_thread_data_tx) + |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2595 | 32 * (numThreadsTxNumerical == 1), |
| 2596 | UCC_GETH_THREAD_DATA_ALIGNMENT); |
Timur Tabi | 4c35630 | 2007-05-08 14:46:36 -0500 | [diff] [blame] | 2597 | if (IS_ERR_VALUE(ugeth->thread_dat_tx_offset)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2598 | if (netif_msg_ifup(ugeth)) |
| 2599 | ugeth_err |
| 2600 | ("%s: Can not allocate DPRAM memory for p_thread_data_tx.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2601 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2602 | return -ENOMEM; |
| 2603 | } |
| 2604 | |
| 2605 | ugeth->p_thread_data_tx = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2606 | (struct ucc_geth_thread_data_tx __iomem *) qe_muram_addr(ugeth-> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2607 | thread_dat_tx_offset); |
| 2608 | out_be32(&ugeth->p_tx_glbl_pram->tqptr, ugeth->thread_dat_tx_offset); |
| 2609 | |
| 2610 | /* vtagtable */ |
| 2611 | for (i = 0; i < UCC_GETH_TX_VTAG_TABLE_ENTRY_MAX; i++) |
| 2612 | out_be32(&ugeth->p_tx_glbl_pram->vtagtable[i], |
| 2613 | ug_info->vtagtable[i]); |
| 2614 | |
| 2615 | /* iphoffset */ |
| 2616 | for (i = 0; i < TX_IP_OFFSET_ENTRY_MAX; i++) |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2617 | out_8(&ugeth->p_tx_glbl_pram->iphoffset[i], |
| 2618 | ug_info->iphoffset[i]); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2619 | |
| 2620 | /* SQPTR */ |
| 2621 | /* Size varies with number of Tx queues */ |
| 2622 | ugeth->send_q_mem_reg_offset = |
| 2623 | qe_muram_alloc(ug_info->numQueuesTx * |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2624 | sizeof(struct ucc_geth_send_queue_qd), |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2625 | UCC_GETH_SEND_QUEUE_QUEUE_DESCRIPTOR_ALIGNMENT); |
Timur Tabi | 4c35630 | 2007-05-08 14:46:36 -0500 | [diff] [blame] | 2626 | if (IS_ERR_VALUE(ugeth->send_q_mem_reg_offset)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2627 | if (netif_msg_ifup(ugeth)) |
| 2628 | ugeth_err |
| 2629 | ("%s: Can not allocate DPRAM memory for p_send_q_mem_reg.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2630 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2631 | return -ENOMEM; |
| 2632 | } |
| 2633 | |
| 2634 | ugeth->p_send_q_mem_reg = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2635 | (struct ucc_geth_send_queue_mem_region __iomem *) qe_muram_addr(ugeth-> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2636 | send_q_mem_reg_offset); |
| 2637 | out_be32(&ugeth->p_tx_glbl_pram->sqptr, ugeth->send_q_mem_reg_offset); |
| 2638 | |
| 2639 | /* Setup the table */ |
| 2640 | /* Assume BD rings are already established */ |
| 2641 | for (i = 0; i < ug_info->numQueuesTx; i++) { |
| 2642 | endOfRing = |
| 2643 | ugeth->p_tx_bd_ring[i] + (ug_info->bdRingLenTx[i] - |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2644 | 1) * sizeof(struct qe_bd); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2645 | if (ugeth->ug_info->uf_info.bd_mem_part == MEM_PART_SYSTEM) { |
| 2646 | out_be32(&ugeth->p_send_q_mem_reg->sqqd[i].bd_ring_base, |
| 2647 | (u32) virt_to_phys(ugeth->p_tx_bd_ring[i])); |
| 2648 | out_be32(&ugeth->p_send_q_mem_reg->sqqd[i]. |
| 2649 | last_bd_completed_address, |
| 2650 | (u32) virt_to_phys(endOfRing)); |
| 2651 | } else if (ugeth->ug_info->uf_info.bd_mem_part == |
| 2652 | MEM_PART_MURAM) { |
| 2653 | out_be32(&ugeth->p_send_q_mem_reg->sqqd[i].bd_ring_base, |
| 2654 | (u32) immrbar_virt_to_phys(ugeth-> |
| 2655 | p_tx_bd_ring[i])); |
| 2656 | out_be32(&ugeth->p_send_q_mem_reg->sqqd[i]. |
| 2657 | last_bd_completed_address, |
| 2658 | (u32) immrbar_virt_to_phys(endOfRing)); |
| 2659 | } |
| 2660 | } |
| 2661 | |
| 2662 | /* schedulerbasepointer */ |
| 2663 | |
| 2664 | if (ug_info->numQueuesTx > 1) { |
| 2665 | /* scheduler exists only if more than 1 tx queue */ |
| 2666 | ugeth->scheduler_offset = |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2667 | qe_muram_alloc(sizeof(struct ucc_geth_scheduler), |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2668 | UCC_GETH_SCHEDULER_ALIGNMENT); |
Timur Tabi | 4c35630 | 2007-05-08 14:46:36 -0500 | [diff] [blame] | 2669 | if (IS_ERR_VALUE(ugeth->scheduler_offset)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2670 | if (netif_msg_ifup(ugeth)) |
| 2671 | ugeth_err |
| 2672 | ("%s: Can not allocate DPRAM memory for p_scheduler.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2673 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2674 | return -ENOMEM; |
| 2675 | } |
| 2676 | |
| 2677 | ugeth->p_scheduler = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2678 | (struct ucc_geth_scheduler __iomem *) qe_muram_addr(ugeth-> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2679 | scheduler_offset); |
| 2680 | out_be32(&ugeth->p_tx_glbl_pram->schedulerbasepointer, |
| 2681 | ugeth->scheduler_offset); |
| 2682 | /* Zero out p_scheduler */ |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2683 | memset_io((void __iomem *)ugeth->p_scheduler, 0, sizeof(struct ucc_geth_scheduler)); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2684 | |
| 2685 | /* Set values in scheduler */ |
| 2686 | out_be32(&ugeth->p_scheduler->mblinterval, |
| 2687 | ug_info->mblinterval); |
| 2688 | out_be16(&ugeth->p_scheduler->nortsrbytetime, |
| 2689 | ug_info->nortsrbytetime); |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2690 | out_8(&ugeth->p_scheduler->fracsiz, ug_info->fracsiz); |
| 2691 | out_8(&ugeth->p_scheduler->strictpriorityq, |
| 2692 | ug_info->strictpriorityq); |
| 2693 | out_8(&ugeth->p_scheduler->txasap, ug_info->txasap); |
| 2694 | out_8(&ugeth->p_scheduler->extrabw, ug_info->extrabw); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2695 | for (i = 0; i < NUM_TX_QUEUES; i++) |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2696 | out_8(&ugeth->p_scheduler->weightfactor[i], |
| 2697 | ug_info->weightfactor[i]); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2698 | |
| 2699 | /* Set pointers to cpucount registers in scheduler */ |
| 2700 | ugeth->p_cpucount[0] = &(ugeth->p_scheduler->cpucount0); |
| 2701 | ugeth->p_cpucount[1] = &(ugeth->p_scheduler->cpucount1); |
| 2702 | ugeth->p_cpucount[2] = &(ugeth->p_scheduler->cpucount2); |
| 2703 | ugeth->p_cpucount[3] = &(ugeth->p_scheduler->cpucount3); |
| 2704 | ugeth->p_cpucount[4] = &(ugeth->p_scheduler->cpucount4); |
| 2705 | ugeth->p_cpucount[5] = &(ugeth->p_scheduler->cpucount5); |
| 2706 | ugeth->p_cpucount[6] = &(ugeth->p_scheduler->cpucount6); |
| 2707 | ugeth->p_cpucount[7] = &(ugeth->p_scheduler->cpucount7); |
| 2708 | } |
| 2709 | |
| 2710 | /* schedulerbasepointer */ |
| 2711 | /* TxRMON_PTR (statistics) */ |
| 2712 | if (ug_info-> |
| 2713 | statisticsMode & UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_TX) { |
| 2714 | ugeth->tx_fw_statistics_pram_offset = |
| 2715 | qe_muram_alloc(sizeof |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2716 | (struct ucc_geth_tx_firmware_statistics_pram), |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2717 | UCC_GETH_TX_STATISTICS_ALIGNMENT); |
Timur Tabi | 4c35630 | 2007-05-08 14:46:36 -0500 | [diff] [blame] | 2718 | if (IS_ERR_VALUE(ugeth->tx_fw_statistics_pram_offset)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2719 | if (netif_msg_ifup(ugeth)) |
| 2720 | ugeth_err |
| 2721 | ("%s: Can not allocate DPRAM memory for" |
| 2722 | " p_tx_fw_statistics_pram.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2723 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2724 | return -ENOMEM; |
| 2725 | } |
| 2726 | ugeth->p_tx_fw_statistics_pram = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2727 | (struct ucc_geth_tx_firmware_statistics_pram __iomem *) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2728 | qe_muram_addr(ugeth->tx_fw_statistics_pram_offset); |
| 2729 | /* Zero out p_tx_fw_statistics_pram */ |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2730 | memset_io((void __iomem *)ugeth->p_tx_fw_statistics_pram, |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2731 | 0, sizeof(struct ucc_geth_tx_firmware_statistics_pram)); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2732 | } |
| 2733 | |
| 2734 | /* temoder */ |
| 2735 | /* Already has speed set */ |
| 2736 | |
| 2737 | if (ug_info->numQueuesTx > 1) |
| 2738 | temoder |= TEMODER_SCHEDULER_ENABLE; |
| 2739 | if (ug_info->ipCheckSumGenerate) |
| 2740 | temoder |= TEMODER_IP_CHECKSUM_GENERATE; |
| 2741 | temoder |= ((ug_info->numQueuesTx - 1) << TEMODER_NUM_OF_QUEUES_SHIFT); |
| 2742 | out_be16(&ugeth->p_tx_glbl_pram->temoder, temoder); |
| 2743 | |
| 2744 | test = in_be16(&ugeth->p_tx_glbl_pram->temoder); |
| 2745 | |
| 2746 | /* Function code register value to be used later */ |
Timur Tabi | 6b0b594 | 2007-10-03 11:34:59 -0500 | [diff] [blame] | 2747 | function_code = UCC_BMR_BO_BE | UCC_BMR_GBL; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2748 | /* Required for QE */ |
| 2749 | |
| 2750 | /* function code register */ |
| 2751 | out_be32(&ugeth->p_tx_glbl_pram->tstate, ((u32) function_code) << 24); |
| 2752 | |
| 2753 | /* Rx global PRAM */ |
| 2754 | /* Allocate global rx parameter RAM page */ |
| 2755 | ugeth->rx_glbl_pram_offset = |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2756 | qe_muram_alloc(sizeof(struct ucc_geth_rx_global_pram), |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2757 | UCC_GETH_RX_GLOBAL_PRAM_ALIGNMENT); |
Timur Tabi | 4c35630 | 2007-05-08 14:46:36 -0500 | [diff] [blame] | 2758 | if (IS_ERR_VALUE(ugeth->rx_glbl_pram_offset)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2759 | if (netif_msg_ifup(ugeth)) |
| 2760 | ugeth_err |
| 2761 | ("%s: Can not allocate DPRAM memory for p_rx_glbl_pram.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2762 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2763 | return -ENOMEM; |
| 2764 | } |
| 2765 | ugeth->p_rx_glbl_pram = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2766 | (struct ucc_geth_rx_global_pram __iomem *) qe_muram_addr(ugeth-> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2767 | rx_glbl_pram_offset); |
| 2768 | /* Zero out p_rx_glbl_pram */ |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2769 | memset_io((void __iomem *)ugeth->p_rx_glbl_pram, 0, sizeof(struct ucc_geth_rx_global_pram)); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2770 | |
| 2771 | /* Fill global PRAM */ |
| 2772 | |
| 2773 | /* RQPTR */ |
| 2774 | /* Size varies with number of Rx threads */ |
| 2775 | ugeth->thread_dat_rx_offset = |
| 2776 | qe_muram_alloc(numThreadsRxNumerical * |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2777 | sizeof(struct ucc_geth_thread_data_rx), |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2778 | UCC_GETH_THREAD_DATA_ALIGNMENT); |
Timur Tabi | 4c35630 | 2007-05-08 14:46:36 -0500 | [diff] [blame] | 2779 | if (IS_ERR_VALUE(ugeth->thread_dat_rx_offset)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2780 | if (netif_msg_ifup(ugeth)) |
| 2781 | ugeth_err |
| 2782 | ("%s: Can not allocate DPRAM memory for p_thread_data_rx.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2783 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2784 | return -ENOMEM; |
| 2785 | } |
| 2786 | |
| 2787 | ugeth->p_thread_data_rx = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2788 | (struct ucc_geth_thread_data_rx __iomem *) qe_muram_addr(ugeth-> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2789 | thread_dat_rx_offset); |
| 2790 | out_be32(&ugeth->p_rx_glbl_pram->rqptr, ugeth->thread_dat_rx_offset); |
| 2791 | |
| 2792 | /* typeorlen */ |
| 2793 | out_be16(&ugeth->p_rx_glbl_pram->typeorlen, ug_info->typeorlen); |
| 2794 | |
| 2795 | /* rxrmonbaseptr (statistics) */ |
| 2796 | if (ug_info-> |
| 2797 | statisticsMode & UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_RX) { |
| 2798 | ugeth->rx_fw_statistics_pram_offset = |
| 2799 | qe_muram_alloc(sizeof |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2800 | (struct ucc_geth_rx_firmware_statistics_pram), |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2801 | UCC_GETH_RX_STATISTICS_ALIGNMENT); |
Timur Tabi | 4c35630 | 2007-05-08 14:46:36 -0500 | [diff] [blame] | 2802 | if (IS_ERR_VALUE(ugeth->rx_fw_statistics_pram_offset)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2803 | if (netif_msg_ifup(ugeth)) |
| 2804 | ugeth_err |
| 2805 | ("%s: Can not allocate DPRAM memory for" |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2806 | " p_rx_fw_statistics_pram.", __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2807 | return -ENOMEM; |
| 2808 | } |
| 2809 | ugeth->p_rx_fw_statistics_pram = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2810 | (struct ucc_geth_rx_firmware_statistics_pram __iomem *) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2811 | qe_muram_addr(ugeth->rx_fw_statistics_pram_offset); |
| 2812 | /* Zero out p_rx_fw_statistics_pram */ |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2813 | memset_io((void __iomem *)ugeth->p_rx_fw_statistics_pram, 0, |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2814 | sizeof(struct ucc_geth_rx_firmware_statistics_pram)); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2815 | } |
| 2816 | |
| 2817 | /* intCoalescingPtr */ |
| 2818 | |
| 2819 | /* Size varies with number of Rx queues */ |
| 2820 | ugeth->rx_irq_coalescing_tbl_offset = |
| 2821 | qe_muram_alloc(ug_info->numQueuesRx * |
Michael Barkowski | 7563907 | 2007-04-13 01:26:15 -0500 | [diff] [blame] | 2822 | sizeof(struct ucc_geth_rx_interrupt_coalescing_entry) |
| 2823 | + 4, UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT); |
Timur Tabi | 4c35630 | 2007-05-08 14:46:36 -0500 | [diff] [blame] | 2824 | if (IS_ERR_VALUE(ugeth->rx_irq_coalescing_tbl_offset)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2825 | if (netif_msg_ifup(ugeth)) |
| 2826 | ugeth_err |
| 2827 | ("%s: Can not allocate DPRAM memory for" |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2828 | " p_rx_irq_coalescing_tbl.", __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2829 | return -ENOMEM; |
| 2830 | } |
| 2831 | |
| 2832 | ugeth->p_rx_irq_coalescing_tbl = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2833 | (struct ucc_geth_rx_interrupt_coalescing_table __iomem *) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2834 | qe_muram_addr(ugeth->rx_irq_coalescing_tbl_offset); |
| 2835 | out_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr, |
| 2836 | ugeth->rx_irq_coalescing_tbl_offset); |
| 2837 | |
| 2838 | /* Fill interrupt coalescing table */ |
| 2839 | for (i = 0; i < ug_info->numQueuesRx; i++) { |
| 2840 | out_be32(&ugeth->p_rx_irq_coalescing_tbl->coalescingentry[i]. |
| 2841 | interruptcoalescingmaxvalue, |
| 2842 | ug_info->interruptcoalescingmaxvalue[i]); |
| 2843 | out_be32(&ugeth->p_rx_irq_coalescing_tbl->coalescingentry[i]. |
| 2844 | interruptcoalescingcounter, |
| 2845 | ug_info->interruptcoalescingmaxvalue[i]); |
| 2846 | } |
| 2847 | |
| 2848 | /* MRBLR */ |
| 2849 | init_max_rx_buff_len(uf_info->max_rx_buf_length, |
| 2850 | &ugeth->p_rx_glbl_pram->mrblr); |
| 2851 | /* MFLR */ |
| 2852 | out_be16(&ugeth->p_rx_glbl_pram->mflr, ug_info->maxFrameLength); |
| 2853 | /* MINFLR */ |
| 2854 | init_min_frame_len(ug_info->minFrameLength, |
| 2855 | &ugeth->p_rx_glbl_pram->minflr, |
| 2856 | &ugeth->p_rx_glbl_pram->mrblr); |
| 2857 | /* MAXD1 */ |
| 2858 | out_be16(&ugeth->p_rx_glbl_pram->maxd1, ug_info->maxD1Length); |
| 2859 | /* MAXD2 */ |
| 2860 | out_be16(&ugeth->p_rx_glbl_pram->maxd2, ug_info->maxD2Length); |
| 2861 | |
| 2862 | /* l2qt */ |
| 2863 | l2qt = 0; |
| 2864 | for (i = 0; i < UCC_GETH_VLAN_PRIORITY_MAX; i++) |
| 2865 | l2qt |= (ug_info->l2qt[i] << (28 - 4 * i)); |
| 2866 | out_be32(&ugeth->p_rx_glbl_pram->l2qt, l2qt); |
| 2867 | |
| 2868 | /* l3qt */ |
| 2869 | for (j = 0; j < UCC_GETH_IP_PRIORITY_MAX; j += 8) { |
| 2870 | l3qt = 0; |
| 2871 | for (i = 0; i < 8; i++) |
| 2872 | l3qt |= (ug_info->l3qt[j + i] << (28 - 4 * i)); |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2873 | out_be32(&ugeth->p_rx_glbl_pram->l3qt[j/8], l3qt); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2874 | } |
| 2875 | |
| 2876 | /* vlantype */ |
| 2877 | out_be16(&ugeth->p_rx_glbl_pram->vlantype, ug_info->vlantype); |
| 2878 | |
| 2879 | /* vlantci */ |
| 2880 | out_be16(&ugeth->p_rx_glbl_pram->vlantci, ug_info->vlantci); |
| 2881 | |
| 2882 | /* ecamptr */ |
| 2883 | out_be32(&ugeth->p_rx_glbl_pram->ecamptr, ug_info->ecamptr); |
| 2884 | |
| 2885 | /* RBDQPTR */ |
| 2886 | /* Size varies with number of Rx queues */ |
| 2887 | ugeth->rx_bd_qs_tbl_offset = |
| 2888 | qe_muram_alloc(ug_info->numQueuesRx * |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2889 | (sizeof(struct ucc_geth_rx_bd_queues_entry) + |
| 2890 | sizeof(struct ucc_geth_rx_prefetched_bds)), |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2891 | UCC_GETH_RX_BD_QUEUES_ALIGNMENT); |
Timur Tabi | 4c35630 | 2007-05-08 14:46:36 -0500 | [diff] [blame] | 2892 | if (IS_ERR_VALUE(ugeth->rx_bd_qs_tbl_offset)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2893 | if (netif_msg_ifup(ugeth)) |
| 2894 | ugeth_err |
| 2895 | ("%s: Can not allocate DPRAM memory for p_rx_bd_qs_tbl.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2896 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2897 | return -ENOMEM; |
| 2898 | } |
| 2899 | |
| 2900 | ugeth->p_rx_bd_qs_tbl = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2901 | (struct ucc_geth_rx_bd_queues_entry __iomem *) qe_muram_addr(ugeth-> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2902 | rx_bd_qs_tbl_offset); |
| 2903 | out_be32(&ugeth->p_rx_glbl_pram->rbdqptr, ugeth->rx_bd_qs_tbl_offset); |
| 2904 | /* Zero out p_rx_bd_qs_tbl */ |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2905 | memset_io((void __iomem *)ugeth->p_rx_bd_qs_tbl, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2906 | 0, |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2907 | ug_info->numQueuesRx * (sizeof(struct ucc_geth_rx_bd_queues_entry) + |
| 2908 | sizeof(struct ucc_geth_rx_prefetched_bds))); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2909 | |
| 2910 | /* Setup the table */ |
| 2911 | /* Assume BD rings are already established */ |
| 2912 | for (i = 0; i < ug_info->numQueuesRx; i++) { |
| 2913 | if (ugeth->ug_info->uf_info.bd_mem_part == MEM_PART_SYSTEM) { |
| 2914 | out_be32(&ugeth->p_rx_bd_qs_tbl[i].externalbdbaseptr, |
| 2915 | (u32) virt_to_phys(ugeth->p_rx_bd_ring[i])); |
| 2916 | } else if (ugeth->ug_info->uf_info.bd_mem_part == |
| 2917 | MEM_PART_MURAM) { |
| 2918 | out_be32(&ugeth->p_rx_bd_qs_tbl[i].externalbdbaseptr, |
| 2919 | (u32) immrbar_virt_to_phys(ugeth-> |
| 2920 | p_rx_bd_ring[i])); |
| 2921 | } |
| 2922 | /* rest of fields handled by QE */ |
| 2923 | } |
| 2924 | |
| 2925 | /* remoder */ |
| 2926 | /* Already has speed set */ |
| 2927 | |
| 2928 | if (ugeth->rx_extended_features) |
| 2929 | remoder |= REMODER_RX_EXTENDED_FEATURES; |
| 2930 | if (ug_info->rxExtendedFiltering) |
| 2931 | remoder |= REMODER_RX_EXTENDED_FILTERING; |
| 2932 | if (ug_info->dynamicMaxFrameLength) |
| 2933 | remoder |= REMODER_DYNAMIC_MAX_FRAME_LENGTH; |
| 2934 | if (ug_info->dynamicMinFrameLength) |
| 2935 | remoder |= REMODER_DYNAMIC_MIN_FRAME_LENGTH; |
| 2936 | remoder |= |
| 2937 | ug_info->vlanOperationTagged << REMODER_VLAN_OPERATION_TAGGED_SHIFT; |
| 2938 | remoder |= |
| 2939 | ug_info-> |
| 2940 | vlanOperationNonTagged << REMODER_VLAN_OPERATION_NON_TAGGED_SHIFT; |
| 2941 | remoder |= ug_info->rxQoSMode << REMODER_RX_QOS_MODE_SHIFT; |
| 2942 | remoder |= ((ug_info->numQueuesRx - 1) << REMODER_NUM_OF_QUEUES_SHIFT); |
| 2943 | if (ug_info->ipCheckSumCheck) |
| 2944 | remoder |= REMODER_IP_CHECKSUM_CHECK; |
| 2945 | if (ug_info->ipAddressAlignment) |
| 2946 | remoder |= REMODER_IP_ADDRESS_ALIGNMENT; |
| 2947 | out_be32(&ugeth->p_rx_glbl_pram->remoder, remoder); |
| 2948 | |
| 2949 | /* Note that this function must be called */ |
| 2950 | /* ONLY AFTER p_tx_fw_statistics_pram */ |
| 2951 | /* andp_UccGethRxFirmwareStatisticsPram are allocated ! */ |
| 2952 | init_firmware_statistics_gathering_mode((ug_info-> |
| 2953 | statisticsMode & |
| 2954 | UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_TX), |
| 2955 | (ug_info->statisticsMode & |
| 2956 | UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_RX), |
| 2957 | &ugeth->p_tx_glbl_pram->txrmonbaseptr, |
| 2958 | ugeth->tx_fw_statistics_pram_offset, |
| 2959 | &ugeth->p_rx_glbl_pram->rxrmonbaseptr, |
| 2960 | ugeth->rx_fw_statistics_pram_offset, |
| 2961 | &ugeth->p_tx_glbl_pram->temoder, |
| 2962 | &ugeth->p_rx_glbl_pram->remoder); |
| 2963 | |
| 2964 | /* function code register */ |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2965 | out_8(&ugeth->p_rx_glbl_pram->rstate, function_code); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2966 | |
| 2967 | /* initialize extended filtering */ |
| 2968 | if (ug_info->rxExtendedFiltering) { |
| 2969 | if (!ug_info->extendedFilteringChainPointer) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2970 | if (netif_msg_ifup(ugeth)) |
| 2971 | ugeth_err("%s: Null Extended Filtering Chain Pointer.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2972 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2973 | return -EINVAL; |
| 2974 | } |
| 2975 | |
| 2976 | /* Allocate memory for extended filtering Mode Global |
| 2977 | Parameters */ |
| 2978 | ugeth->exf_glbl_param_offset = |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 2979 | qe_muram_alloc(sizeof(struct ucc_geth_exf_global_pram), |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2980 | UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT); |
Timur Tabi | 4c35630 | 2007-05-08 14:46:36 -0500 | [diff] [blame] | 2981 | if (IS_ERR_VALUE(ugeth->exf_glbl_param_offset)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 2982 | if (netif_msg_ifup(ugeth)) |
| 2983 | ugeth_err |
| 2984 | ("%s: Can not allocate DPRAM memory for" |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 2985 | " p_exf_glbl_param.", __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2986 | return -ENOMEM; |
| 2987 | } |
| 2988 | |
| 2989 | ugeth->p_exf_glbl_param = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 2990 | (struct ucc_geth_exf_global_pram __iomem *) qe_muram_addr(ugeth-> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 2991 | exf_glbl_param_offset); |
| 2992 | out_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam, |
| 2993 | ugeth->exf_glbl_param_offset); |
| 2994 | out_be32(&ugeth->p_exf_glbl_param->l2pcdptr, |
| 2995 | (u32) ug_info->extendedFilteringChainPointer); |
| 2996 | |
| 2997 | } else { /* initialize 82xx style address filtering */ |
| 2998 | |
| 2999 | /* Init individual address recognition registers to disabled */ |
| 3000 | |
| 3001 | for (j = 0; j < NUM_OF_PADDRS; j++) |
| 3002 | ugeth_82xx_filtering_clear_addr_in_paddr(ugeth, (u8) j); |
| 3003 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3004 | p_82xx_addr_filt = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 3005 | (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth-> |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3006 | p_rx_glbl_pram->addressfiltering; |
| 3007 | |
| 3008 | ugeth_82xx_filtering_clear_all_addr_in_hash(ugeth, |
| 3009 | ENET_ADDR_TYPE_GROUP); |
| 3010 | ugeth_82xx_filtering_clear_all_addr_in_hash(ugeth, |
| 3011 | ENET_ADDR_TYPE_INDIVIDUAL); |
| 3012 | } |
| 3013 | |
| 3014 | /* |
| 3015 | * Initialize UCC at QE level |
| 3016 | */ |
| 3017 | |
| 3018 | command = QE_INIT_TX_RX; |
| 3019 | |
| 3020 | /* Allocate shadow InitEnet command parameter structure. |
| 3021 | * This is needed because after the InitEnet command is executed, |
| 3022 | * the structure in DPRAM is released, because DPRAM is a premium |
| 3023 | * resource. |
| 3024 | * This shadow structure keeps a copy of what was done so that the |
| 3025 | * allocated resources can be released when the channel is freed. |
| 3026 | */ |
| 3027 | if (!(ugeth->p_init_enet_param_shadow = |
Ahmed S. Darwish | 04b588d | 2007-01-27 00:00:02 -0800 | [diff] [blame] | 3028 | kmalloc(sizeof(struct ucc_geth_init_pram), GFP_KERNEL))) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3029 | if (netif_msg_ifup(ugeth)) |
| 3030 | ugeth_err |
| 3031 | ("%s: Can not allocate memory for" |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 3032 | " p_UccInitEnetParamShadows.", __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3033 | return -ENOMEM; |
| 3034 | } |
| 3035 | /* Zero out *p_init_enet_param_shadow */ |
| 3036 | memset((char *)ugeth->p_init_enet_param_shadow, |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3037 | 0, sizeof(struct ucc_geth_init_pram)); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3038 | |
| 3039 | /* Fill shadow InitEnet command parameter structure */ |
| 3040 | |
| 3041 | ugeth->p_init_enet_param_shadow->resinit1 = |
| 3042 | ENET_INIT_PARAM_MAGIC_RES_INIT1; |
| 3043 | ugeth->p_init_enet_param_shadow->resinit2 = |
| 3044 | ENET_INIT_PARAM_MAGIC_RES_INIT2; |
| 3045 | ugeth->p_init_enet_param_shadow->resinit3 = |
| 3046 | ENET_INIT_PARAM_MAGIC_RES_INIT3; |
| 3047 | ugeth->p_init_enet_param_shadow->resinit4 = |
| 3048 | ENET_INIT_PARAM_MAGIC_RES_INIT4; |
| 3049 | ugeth->p_init_enet_param_shadow->resinit5 = |
| 3050 | ENET_INIT_PARAM_MAGIC_RES_INIT5; |
| 3051 | ugeth->p_init_enet_param_shadow->rgftgfrxglobal |= |
| 3052 | ((u32) ug_info->numThreadsRx) << ENET_INIT_PARAM_RGF_SHIFT; |
| 3053 | ugeth->p_init_enet_param_shadow->rgftgfrxglobal |= |
| 3054 | ((u32) ug_info->numThreadsTx) << ENET_INIT_PARAM_TGF_SHIFT; |
| 3055 | |
| 3056 | ugeth->p_init_enet_param_shadow->rgftgfrxglobal |= |
| 3057 | ugeth->rx_glbl_pram_offset | ug_info->riscRx; |
| 3058 | if ((ug_info->largestexternallookupkeysize != |
Joe Perches | 8e95a20 | 2009-12-03 07:58:21 +0000 | [diff] [blame] | 3059 | QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_NONE) && |
| 3060 | (ug_info->largestexternallookupkeysize != |
| 3061 | QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_8_BYTES) && |
| 3062 | (ug_info->largestexternallookupkeysize != |
| 3063 | QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_16_BYTES)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3064 | if (netif_msg_ifup(ugeth)) |
| 3065 | ugeth_err("%s: Invalid largest External Lookup Key Size.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 3066 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3067 | return -EINVAL; |
| 3068 | } |
| 3069 | ugeth->p_init_enet_param_shadow->largestexternallookupkeysize = |
| 3070 | ug_info->largestexternallookupkeysize; |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3071 | size = sizeof(struct ucc_geth_thread_rx_pram); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3072 | if (ug_info->rxExtendedFiltering) { |
| 3073 | size += THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING; |
| 3074 | if (ug_info->largestexternallookupkeysize == |
| 3075 | QE_FLTR_TABLE_LOOKUP_KEY_SIZE_8_BYTES) |
| 3076 | size += |
| 3077 | THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_8; |
| 3078 | if (ug_info->largestexternallookupkeysize == |
| 3079 | QE_FLTR_TABLE_LOOKUP_KEY_SIZE_16_BYTES) |
| 3080 | size += |
| 3081 | THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_16; |
| 3082 | } |
| 3083 | |
| 3084 | if ((ret_val = fill_init_enet_entries(ugeth, &(ugeth-> |
| 3085 | p_init_enet_param_shadow->rxthread[0]), |
| 3086 | (u8) (numThreadsRxNumerical + 1) |
| 3087 | /* Rx needs one extra for terminator */ |
| 3088 | , size, UCC_GETH_THREAD_RX_PRAM_ALIGNMENT, |
| 3089 | ug_info->riscRx, 1)) != 0) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3090 | if (netif_msg_ifup(ugeth)) |
| 3091 | ugeth_err("%s: Can not fill p_init_enet_param_shadow.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 3092 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3093 | return ret_val; |
| 3094 | } |
| 3095 | |
| 3096 | ugeth->p_init_enet_param_shadow->txglobal = |
| 3097 | ugeth->tx_glbl_pram_offset | ug_info->riscTx; |
| 3098 | if ((ret_val = |
| 3099 | fill_init_enet_entries(ugeth, |
| 3100 | &(ugeth->p_init_enet_param_shadow-> |
| 3101 | txthread[0]), numThreadsTxNumerical, |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3102 | sizeof(struct ucc_geth_thread_tx_pram), |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3103 | UCC_GETH_THREAD_TX_PRAM_ALIGNMENT, |
| 3104 | ug_info->riscTx, 0)) != 0) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3105 | if (netif_msg_ifup(ugeth)) |
| 3106 | ugeth_err("%s: Can not fill p_init_enet_param_shadow.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 3107 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3108 | return ret_val; |
| 3109 | } |
| 3110 | |
| 3111 | /* Load Rx bds with buffers */ |
| 3112 | for (i = 0; i < ug_info->numQueuesRx; i++) { |
| 3113 | if ((ret_val = rx_bd_buffer_set(ugeth, (u8) i)) != 0) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3114 | if (netif_msg_ifup(ugeth)) |
| 3115 | ugeth_err("%s: Can not fill Rx bds with buffers.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 3116 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3117 | return ret_val; |
| 3118 | } |
| 3119 | } |
| 3120 | |
| 3121 | /* Allocate InitEnet command parameter structure */ |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3122 | init_enet_pram_offset = qe_muram_alloc(sizeof(struct ucc_geth_init_pram), 4); |
Timur Tabi | 4c35630 | 2007-05-08 14:46:36 -0500 | [diff] [blame] | 3123 | if (IS_ERR_VALUE(init_enet_pram_offset)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3124 | if (netif_msg_ifup(ugeth)) |
| 3125 | ugeth_err |
| 3126 | ("%s: Can not allocate DPRAM memory for p_init_enet_pram.", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 3127 | __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3128 | return -ENOMEM; |
| 3129 | } |
| 3130 | p_init_enet_pram = |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 3131 | (struct ucc_geth_init_pram __iomem *) qe_muram_addr(init_enet_pram_offset); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3132 | |
| 3133 | /* Copy shadow InitEnet command parameter structure into PRAM */ |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 3134 | out_8(&p_init_enet_pram->resinit1, |
| 3135 | ugeth->p_init_enet_param_shadow->resinit1); |
| 3136 | out_8(&p_init_enet_pram->resinit2, |
| 3137 | ugeth->p_init_enet_param_shadow->resinit2); |
| 3138 | out_8(&p_init_enet_pram->resinit3, |
| 3139 | ugeth->p_init_enet_param_shadow->resinit3); |
| 3140 | out_8(&p_init_enet_pram->resinit4, |
| 3141 | ugeth->p_init_enet_param_shadow->resinit4); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3142 | out_be16(&p_init_enet_pram->resinit5, |
| 3143 | ugeth->p_init_enet_param_shadow->resinit5); |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 3144 | out_8(&p_init_enet_pram->largestexternallookupkeysize, |
| 3145 | ugeth->p_init_enet_param_shadow->largestexternallookupkeysize); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3146 | out_be32(&p_init_enet_pram->rgftgfrxglobal, |
| 3147 | ugeth->p_init_enet_param_shadow->rgftgfrxglobal); |
| 3148 | for (i = 0; i < ENET_INIT_PARAM_MAX_ENTRIES_RX; i++) |
| 3149 | out_be32(&p_init_enet_pram->rxthread[i], |
| 3150 | ugeth->p_init_enet_param_shadow->rxthread[i]); |
| 3151 | out_be32(&p_init_enet_pram->txglobal, |
| 3152 | ugeth->p_init_enet_param_shadow->txglobal); |
| 3153 | for (i = 0; i < ENET_INIT_PARAM_MAX_ENTRIES_TX; i++) |
| 3154 | out_be32(&p_init_enet_pram->txthread[i], |
| 3155 | ugeth->p_init_enet_param_shadow->txthread[i]); |
| 3156 | |
| 3157 | /* Issue QE command */ |
| 3158 | cecr_subblock = |
| 3159 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3160 | qe_issue_cmd(command, cecr_subblock, QE_CR_PROTOCOL_ETHERNET, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3161 | init_enet_pram_offset); |
| 3162 | |
| 3163 | /* Free InitEnet command parameter */ |
| 3164 | qe_muram_free(init_enet_pram_offset); |
| 3165 | |
| 3166 | return 0; |
| 3167 | } |
| 3168 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3169 | /* This is called by the kernel when a frame is ready for transmission. */ |
| 3170 | /* It is pointed to by the dev->hard_start_xmit function pointer */ |
| 3171 | static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev) |
| 3172 | { |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3173 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
Michael Reiss | d5b9049 | 2007-04-13 01:26:19 -0500 | [diff] [blame] | 3174 | #ifdef CONFIG_UGETH_TX_ON_DEMAND |
| 3175 | struct ucc_fast_private *uccf; |
| 3176 | #endif |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 3177 | u8 __iomem *bd; /* BD pointer */ |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3178 | u32 bd_status; |
| 3179 | u8 txQ = 0; |
Dongdong Deng | 22580f8 | 2009-08-13 19:12:31 +0000 | [diff] [blame] | 3180 | unsigned long flags; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3181 | |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 3182 | ugeth_vdbg("%s: IN", __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3183 | |
Dongdong Deng | 22580f8 | 2009-08-13 19:12:31 +0000 | [diff] [blame] | 3184 | spin_lock_irqsave(&ugeth->lock, flags); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3185 | |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 3186 | dev->stats.tx_bytes += skb->len; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3187 | |
| 3188 | /* Start from the next BD that should be filled */ |
| 3189 | bd = ugeth->txBd[txQ]; |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 3190 | bd_status = in_be32((u32 __iomem *)bd); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3191 | /* Save the skb pointer so we can free it later */ |
| 3192 | ugeth->tx_skbuff[txQ][ugeth->skb_curtx[txQ]] = skb; |
| 3193 | |
| 3194 | /* Update the current skb pointer (wrapping if this was the last) */ |
| 3195 | ugeth->skb_curtx[txQ] = |
| 3196 | (ugeth->skb_curtx[txQ] + |
| 3197 | 1) & TX_RING_MOD_MASK(ugeth->ug_info->bdRingLenTx[txQ]); |
| 3198 | |
| 3199 | /* set up the buffer descriptor */ |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 3200 | out_be32(&((struct qe_bd __iomem *)bd)->buf, |
Anton Vorontsov | da1aa63 | 2009-04-02 01:26:07 -0700 | [diff] [blame] | 3201 | dma_map_single(ugeth->dev, skb->data, |
Andy Fleming | 7f80202 | 2008-05-15 17:00:21 -0500 | [diff] [blame] | 3202 | skb->len, DMA_TO_DEVICE)); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3203 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3204 | /* printk(KERN_DEBUG"skb->data is 0x%x\n",skb->data); */ |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3205 | |
| 3206 | bd_status = (bd_status & T_W) | T_R | T_I | T_L | skb->len; |
| 3207 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3208 | /* set bd status and length */ |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 3209 | out_be32((u32 __iomem *)bd, bd_status); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3210 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3211 | /* Move to next BD in the ring */ |
| 3212 | if (!(bd_status & T_W)) |
Li Yang | a394f01 | 2007-03-06 16:53:46 +0800 | [diff] [blame] | 3213 | bd += sizeof(struct qe_bd); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3214 | else |
Li Yang | a394f01 | 2007-03-06 16:53:46 +0800 | [diff] [blame] | 3215 | bd = ugeth->p_tx_bd_ring[txQ]; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3216 | |
| 3217 | /* If the next BD still needs to be cleaned up, then the bds |
| 3218 | are full. We need to tell the kernel to stop sending us stuff. */ |
| 3219 | if (bd == ugeth->confBd[txQ]) { |
| 3220 | if (!netif_queue_stopped(dev)) |
| 3221 | netif_stop_queue(dev); |
| 3222 | } |
| 3223 | |
Li Yang | a394f01 | 2007-03-06 16:53:46 +0800 | [diff] [blame] | 3224 | ugeth->txBd[txQ] = bd; |
| 3225 | |
Richard Cochran | d13d6bf | 2011-06-19 21:51:33 +0000 | [diff] [blame] | 3226 | skb_tx_timestamp(skb); |
| 3227 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3228 | if (ugeth->p_scheduler) { |
| 3229 | ugeth->cpucount[txQ]++; |
| 3230 | /* Indicate to QE that there are more Tx bds ready for |
| 3231 | transmission */ |
| 3232 | /* This is done by writing a running counter of the bd |
| 3233 | count to the scheduler PRAM. */ |
| 3234 | out_be16(ugeth->p_cpucount[txQ], ugeth->cpucount[txQ]); |
| 3235 | } |
| 3236 | |
Michael Reiss | d5b9049 | 2007-04-13 01:26:19 -0500 | [diff] [blame] | 3237 | #ifdef CONFIG_UGETH_TX_ON_DEMAND |
| 3238 | uccf = ugeth->uccf; |
| 3239 | out_be16(uccf->p_utodr, UCC_FAST_TOD); |
| 3240 | #endif |
Dongdong Deng | 22580f8 | 2009-08-13 19:12:31 +0000 | [diff] [blame] | 3241 | spin_unlock_irqrestore(&ugeth->lock, flags); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3242 | |
Patrick McHardy | 6ed1065 | 2009-06-23 06:03:08 +0000 | [diff] [blame] | 3243 | return NETDEV_TX_OK; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3244 | } |
| 3245 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3246 | static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3247 | { |
| 3248 | struct sk_buff *skb; |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 3249 | u8 __iomem *bd; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3250 | u16 length, howmany = 0; |
| 3251 | u32 bd_status; |
| 3252 | u8 *bdBuffer; |
Andrew Morton | 4b8fdef | 2007-12-13 16:02:55 -0800 | [diff] [blame] | 3253 | struct net_device *dev; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3254 | |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 3255 | ugeth_vdbg("%s: IN", __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3256 | |
Anton Vorontsov | da1aa63 | 2009-04-02 01:26:07 -0700 | [diff] [blame] | 3257 | dev = ugeth->ndev; |
Emil Medve | 88a15f2 | 2007-10-15 08:43:50 -0500 | [diff] [blame] | 3258 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3259 | /* collect received buffers */ |
| 3260 | bd = ugeth->rxBd[rxQ]; |
| 3261 | |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 3262 | bd_status = in_be32((u32 __iomem *)bd); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3263 | |
| 3264 | /* while there are received buffers and BD is full (~R_E) */ |
| 3265 | while (!((bd_status & (R_E)) || (--rx_work_limit < 0))) { |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 3266 | bdBuffer = (u8 *) in_be32(&((struct qe_bd __iomem *)bd)->buf); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3267 | length = (u16) ((bd_status & BD_LENGTH_MASK) - 4); |
| 3268 | skb = ugeth->rx_skbuff[rxQ][ugeth->skb_currx[rxQ]]; |
| 3269 | |
| 3270 | /* determine whether buffer is first, last, first and last |
| 3271 | (single buffer frame) or middle (not first and not last) */ |
| 3272 | if (!skb || |
| 3273 | (!(bd_status & (R_F | R_L))) || |
| 3274 | (bd_status & R_ERRORS_FATAL)) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3275 | if (netif_msg_rx_err(ugeth)) |
| 3276 | ugeth_err("%s, %d: ERROR!!! skb - 0x%08x", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 3277 | __func__, __LINE__, (u32) skb); |
Anton Vorontsov | 50f238f | 2009-07-07 08:38:42 +0000 | [diff] [blame] | 3278 | if (skb) { |
| 3279 | skb->data = skb->head + NET_SKB_PAD; |
Sergey Matyukevich | db176ed | 2010-06-14 06:35:20 +0000 | [diff] [blame] | 3280 | skb->len = 0; |
| 3281 | skb_reset_tail_pointer(skb); |
Anton Vorontsov | 50f238f | 2009-07-07 08:38:42 +0000 | [diff] [blame] | 3282 | __skb_queue_head(&ugeth->rx_recycle, skb); |
| 3283 | } |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3284 | |
| 3285 | ugeth->rx_skbuff[rxQ][ugeth->skb_currx[rxQ]] = NULL; |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 3286 | dev->stats.rx_dropped++; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3287 | } else { |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 3288 | dev->stats.rx_packets++; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3289 | howmany++; |
| 3290 | |
| 3291 | /* Prep the skb for the packet */ |
| 3292 | skb_put(skb, length); |
| 3293 | |
| 3294 | /* Tell the skb what kind of packet this is */ |
Anton Vorontsov | da1aa63 | 2009-04-02 01:26:07 -0700 | [diff] [blame] | 3295 | skb->protocol = eth_type_trans(skb, ugeth->ndev); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3296 | |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 3297 | dev->stats.rx_bytes += length; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3298 | /* Send the packet up the stack */ |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3299 | netif_receive_skb(skb); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3300 | } |
| 3301 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3302 | skb = get_new_skb(ugeth, bd); |
| 3303 | if (!skb) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3304 | if (netif_msg_rx_err(ugeth)) |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 3305 | ugeth_warn("%s: No Rx Data Buffer", __func__); |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 3306 | dev->stats.rx_dropped++; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3307 | break; |
| 3308 | } |
| 3309 | |
| 3310 | ugeth->rx_skbuff[rxQ][ugeth->skb_currx[rxQ]] = skb; |
| 3311 | |
| 3312 | /* update to point at the next skb */ |
| 3313 | ugeth->skb_currx[rxQ] = |
| 3314 | (ugeth->skb_currx[rxQ] + |
| 3315 | 1) & RX_RING_MOD_MASK(ugeth->ug_info->bdRingLenRx[rxQ]); |
| 3316 | |
| 3317 | if (bd_status & R_W) |
| 3318 | bd = ugeth->p_rx_bd_ring[rxQ]; |
| 3319 | else |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3320 | bd += sizeof(struct qe_bd); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3321 | |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 3322 | bd_status = in_be32((u32 __iomem *)bd); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3323 | } |
| 3324 | |
| 3325 | ugeth->rxBd[rxQ] = bd; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3326 | return howmany; |
| 3327 | } |
| 3328 | |
| 3329 | static int ucc_geth_tx(struct net_device *dev, u8 txQ) |
| 3330 | { |
| 3331 | /* Start from the next BD that should be filled */ |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3332 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 3333 | u8 __iomem *bd; /* BD pointer */ |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3334 | u32 bd_status; |
| 3335 | |
| 3336 | bd = ugeth->confBd[txQ]; |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 3337 | bd_status = in_be32((u32 __iomem *)bd); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3338 | |
| 3339 | /* Normal processing. */ |
| 3340 | while ((bd_status & T_R) == 0) { |
Anton Vorontsov | 50f238f | 2009-07-07 08:38:42 +0000 | [diff] [blame] | 3341 | struct sk_buff *skb; |
| 3342 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3343 | /* BD contains already transmitted buffer. */ |
| 3344 | /* Handle the transmitted buffer and release */ |
| 3345 | /* the BD to be used with the current frame */ |
| 3346 | |
Jiajun Wu | 3469242 | 2010-01-18 05:47:50 +0000 | [diff] [blame] | 3347 | skb = ugeth->tx_skbuff[txQ][ugeth->skb_dirtytx[txQ]]; |
| 3348 | if (!skb) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3349 | break; |
| 3350 | |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 3351 | dev->stats.tx_packets++; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3352 | |
Anton Vorontsov | 50f238f | 2009-07-07 08:38:42 +0000 | [diff] [blame] | 3353 | if (skb_queue_len(&ugeth->rx_recycle) < RX_BD_RING_LEN && |
| 3354 | skb_recycle_check(skb, |
| 3355 | ugeth->ug_info->uf_info.max_rx_buf_length + |
| 3356 | UCC_GETH_RX_DATA_BUF_ALIGNMENT)) |
| 3357 | __skb_queue_head(&ugeth->rx_recycle, skb); |
| 3358 | else |
| 3359 | dev_kfree_skb(skb); |
| 3360 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3361 | ugeth->tx_skbuff[txQ][ugeth->skb_dirtytx[txQ]] = NULL; |
| 3362 | ugeth->skb_dirtytx[txQ] = |
| 3363 | (ugeth->skb_dirtytx[txQ] + |
| 3364 | 1) & TX_RING_MOD_MASK(ugeth->ug_info->bdRingLenTx[txQ]); |
| 3365 | |
| 3366 | /* We freed a buffer, so now we can restart transmission */ |
| 3367 | if (netif_queue_stopped(dev)) |
| 3368 | netif_wake_queue(dev); |
| 3369 | |
| 3370 | /* Advance the confirmation BD pointer */ |
| 3371 | if (!(bd_status & T_W)) |
Li Yang | a394f01 | 2007-03-06 16:53:46 +0800 | [diff] [blame] | 3372 | bd += sizeof(struct qe_bd); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3373 | else |
Li Yang | a394f01 | 2007-03-06 16:53:46 +0800 | [diff] [blame] | 3374 | bd = ugeth->p_tx_bd_ring[txQ]; |
Andy Fleming | 6fee40e | 2008-05-02 13:01:23 -0500 | [diff] [blame] | 3375 | bd_status = in_be32((u32 __iomem *)bd); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3376 | } |
Li Yang | a394f01 | 2007-03-06 16:53:46 +0800 | [diff] [blame] | 3377 | ugeth->confBd[txQ] = bd; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3378 | return 0; |
| 3379 | } |
| 3380 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3381 | static int ucc_geth_poll(struct napi_struct *napi, int budget) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3382 | { |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3383 | struct ucc_geth_private *ugeth = container_of(napi, struct ucc_geth_private, napi); |
Michael Reiss | 702ff12 | 2007-04-13 01:26:11 -0500 | [diff] [blame] | 3384 | struct ucc_geth_info *ug_info; |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3385 | int howmany, i; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3386 | |
Michael Reiss | 702ff12 | 2007-04-13 01:26:11 -0500 | [diff] [blame] | 3387 | ug_info = ugeth->ug_info; |
| 3388 | |
Joakim Tjernlund | 0cededf | 2009-04-17 12:03:48 +0000 | [diff] [blame] | 3389 | /* Tx event processing */ |
| 3390 | spin_lock(&ugeth->lock); |
| 3391 | for (i = 0; i < ug_info->numQueuesTx; i++) |
| 3392 | ucc_geth_tx(ugeth->ndev, i); |
| 3393 | spin_unlock(&ugeth->lock); |
| 3394 | |
Anton Vorontsov | 50f238f | 2009-07-07 08:38:42 +0000 | [diff] [blame] | 3395 | howmany = 0; |
| 3396 | for (i = 0; i < ug_info->numQueuesRx; i++) |
| 3397 | howmany += ucc_geth_rx(ugeth, i, budget - howmany); |
| 3398 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3399 | if (howmany < budget) { |
Ben Hutchings | 288379f | 2009-01-19 16:43:59 -0800 | [diff] [blame] | 3400 | napi_complete(napi); |
Joakim Tjernlund | 0cededf | 2009-04-17 12:03:48 +0000 | [diff] [blame] | 3401 | setbits32(ugeth->uccf->p_uccm, UCCE_RX_EVENTS | UCCE_TX_EVENTS); |
Michael Reiss | 702ff12 | 2007-04-13 01:26:11 -0500 | [diff] [blame] | 3402 | } |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3403 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3404 | return howmany; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3405 | } |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3406 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3407 | static irqreturn_t ucc_geth_irq_handler(int irq, void *info) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3408 | { |
Jeff Garzik | 06efcad | 2007-10-19 03:10:11 -0400 | [diff] [blame] | 3409 | struct net_device *dev = info; |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3410 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
| 3411 | struct ucc_fast_private *uccf; |
| 3412 | struct ucc_geth_info *ug_info; |
Michael Reiss | 702ff12 | 2007-04-13 01:26:11 -0500 | [diff] [blame] | 3413 | register u32 ucce; |
| 3414 | register u32 uccm; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3415 | |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 3416 | ugeth_vdbg("%s: IN", __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3417 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3418 | uccf = ugeth->uccf; |
| 3419 | ug_info = ugeth->ug_info; |
| 3420 | |
Michael Reiss | 702ff12 | 2007-04-13 01:26:11 -0500 | [diff] [blame] | 3421 | /* read and clear events */ |
| 3422 | ucce = (u32) in_be32(uccf->p_ucce); |
| 3423 | uccm = (u32) in_be32(uccf->p_uccm); |
| 3424 | ucce &= uccm; |
| 3425 | out_be32(uccf->p_ucce, ucce); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3426 | |
Michael Reiss | 702ff12 | 2007-04-13 01:26:11 -0500 | [diff] [blame] | 3427 | /* check for receive events that require processing */ |
Joakim Tjernlund | 0cededf | 2009-04-17 12:03:48 +0000 | [diff] [blame] | 3428 | if (ucce & (UCCE_RX_EVENTS | UCCE_TX_EVENTS)) { |
Ben Hutchings | 288379f | 2009-01-19 16:43:59 -0800 | [diff] [blame] | 3429 | if (napi_schedule_prep(&ugeth->napi)) { |
Joakim Tjernlund | 0cededf | 2009-04-17 12:03:48 +0000 | [diff] [blame] | 3430 | uccm &= ~(UCCE_RX_EVENTS | UCCE_TX_EVENTS); |
Michael Reiss | 702ff12 | 2007-04-13 01:26:11 -0500 | [diff] [blame] | 3431 | out_be32(uccf->p_uccm, uccm); |
Ben Hutchings | 288379f | 2009-01-19 16:43:59 -0800 | [diff] [blame] | 3432 | __napi_schedule(&ugeth->napi); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3433 | } |
Michael Reiss | 702ff12 | 2007-04-13 01:26:11 -0500 | [diff] [blame] | 3434 | } |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3435 | |
Michael Reiss | 702ff12 | 2007-04-13 01:26:11 -0500 | [diff] [blame] | 3436 | /* Errors and other events */ |
| 3437 | if (ucce & UCCE_OTHER) { |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 3438 | if (ucce & UCC_GETH_UCCE_BSY) |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 3439 | dev->stats.rx_errors++; |
Timur Tabi | 3bc5342 | 2009-01-11 00:25:21 -0800 | [diff] [blame] | 3440 | if (ucce & UCC_GETH_UCCE_TXE) |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 3441 | dev->stats.tx_errors++; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3442 | } |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3443 | |
| 3444 | return IRQ_HANDLED; |
| 3445 | } |
| 3446 | |
Anton Vorontsov | 26d29ea | 2008-02-01 16:22:54 +0300 | [diff] [blame] | 3447 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 3448 | /* |
| 3449 | * Polling 'interrupt' - used by things like netconsole to send skbs |
| 3450 | * without having to re-enable interrupts. It's not called while |
| 3451 | * the interrupt routine is executing. |
| 3452 | */ |
| 3453 | static void ucc_netpoll(struct net_device *dev) |
| 3454 | { |
| 3455 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
| 3456 | int irq = ugeth->ug_info->uf_info.irq; |
| 3457 | |
| 3458 | disable_irq(irq); |
| 3459 | ucc_geth_irq_handler(irq, dev); |
| 3460 | enable_irq(irq); |
| 3461 | } |
| 3462 | #endif /* CONFIG_NET_POLL_CONTROLLER */ |
| 3463 | |
Kevin Hao | 3d6593e | 2009-05-26 20:49:03 -0700 | [diff] [blame] | 3464 | static int ucc_geth_set_mac_addr(struct net_device *dev, void *p) |
| 3465 | { |
| 3466 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
| 3467 | struct sockaddr *addr = p; |
| 3468 | |
| 3469 | if (!is_valid_ether_addr(addr->sa_data)) |
| 3470 | return -EADDRNOTAVAIL; |
| 3471 | |
| 3472 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); |
| 3473 | |
| 3474 | /* |
| 3475 | * If device is not running, we will set mac addr register |
| 3476 | * when opening the device. |
| 3477 | */ |
| 3478 | if (!netif_running(dev)) |
| 3479 | return 0; |
| 3480 | |
| 3481 | spin_lock_irq(&ugeth->lock); |
| 3482 | init_mac_station_addr_regs(dev->dev_addr[0], |
| 3483 | dev->dev_addr[1], |
| 3484 | dev->dev_addr[2], |
| 3485 | dev->dev_addr[3], |
| 3486 | dev->dev_addr[4], |
| 3487 | dev->dev_addr[5], |
| 3488 | &ugeth->ug_regs->macstnaddr1, |
| 3489 | &ugeth->ug_regs->macstnaddr2); |
| 3490 | spin_unlock_irq(&ugeth->lock); |
| 3491 | |
| 3492 | return 0; |
| 3493 | } |
| 3494 | |
Anton Vorontsov | 54b1598 | 2009-08-27 07:35:54 +0000 | [diff] [blame] | 3495 | static int ucc_geth_init_mac(struct ucc_geth_private *ugeth) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3496 | { |
Anton Vorontsov | 54b1598 | 2009-08-27 07:35:54 +0000 | [diff] [blame] | 3497 | struct net_device *dev = ugeth->ndev; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3498 | int err; |
| 3499 | |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3500 | err = ucc_struct_init(ugeth); |
| 3501 | if (err) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3502 | if (netif_msg_ifup(ugeth)) |
Anton Vorontsov | 54b1598 | 2009-08-27 07:35:54 +0000 | [diff] [blame] | 3503 | ugeth_err("%s: Cannot configure internal struct, " |
| 3504 | "aborting.", dev->name); |
| 3505 | goto err; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3506 | } |
| 3507 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3508 | err = ucc_geth_startup(ugeth); |
| 3509 | if (err) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3510 | if (netif_msg_ifup(ugeth)) |
| 3511 | ugeth_err("%s: Cannot configure net device, aborting.", |
| 3512 | dev->name); |
Anton Vorontsov | 54b1598 | 2009-08-27 07:35:54 +0000 | [diff] [blame] | 3513 | goto err; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3514 | } |
| 3515 | |
| 3516 | err = adjust_enet_interface(ugeth); |
| 3517 | if (err) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3518 | if (netif_msg_ifup(ugeth)) |
| 3519 | ugeth_err("%s: Cannot configure net device, aborting.", |
| 3520 | dev->name); |
Anton Vorontsov | 54b1598 | 2009-08-27 07:35:54 +0000 | [diff] [blame] | 3521 | goto err; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3522 | } |
| 3523 | |
| 3524 | /* Set MACSTNADDR1, MACSTNADDR2 */ |
| 3525 | /* For more details see the hardware spec. */ |
| 3526 | init_mac_station_addr_regs(dev->dev_addr[0], |
| 3527 | dev->dev_addr[1], |
| 3528 | dev->dev_addr[2], |
| 3529 | dev->dev_addr[3], |
| 3530 | dev->dev_addr[4], |
| 3531 | dev->dev_addr[5], |
| 3532 | &ugeth->ug_regs->macstnaddr1, |
| 3533 | &ugeth->ug_regs->macstnaddr2); |
| 3534 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3535 | err = ugeth_enable(ugeth, COMM_DIR_RX_AND_TX); |
| 3536 | if (err) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3537 | if (netif_msg_ifup(ugeth)) |
| 3538 | ugeth_err("%s: Cannot enable net device, aborting.", dev->name); |
Anton Vorontsov | 54b1598 | 2009-08-27 07:35:54 +0000 | [diff] [blame] | 3539 | goto err; |
| 3540 | } |
| 3541 | |
| 3542 | return 0; |
| 3543 | err: |
| 3544 | ucc_geth_stop(ugeth); |
| 3545 | return err; |
| 3546 | } |
| 3547 | |
| 3548 | /* Called when something needs to use the ethernet device */ |
| 3549 | /* Returns 0 for success. */ |
| 3550 | static int ucc_geth_open(struct net_device *dev) |
| 3551 | { |
| 3552 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
| 3553 | int err; |
| 3554 | |
| 3555 | ugeth_vdbg("%s: IN", __func__); |
| 3556 | |
| 3557 | /* Test station address */ |
| 3558 | if (dev->dev_addr[0] & ENET_GROUP_ADDR) { |
| 3559 | if (netif_msg_ifup(ugeth)) |
| 3560 | ugeth_err("%s: Multicast address used for station " |
| 3561 | "address - is this what you wanted?", |
| 3562 | __func__); |
| 3563 | return -EINVAL; |
| 3564 | } |
| 3565 | |
| 3566 | err = init_phy(dev); |
| 3567 | if (err) { |
| 3568 | if (netif_msg_ifup(ugeth)) |
| 3569 | ugeth_err("%s: Cannot initialize PHY, aborting.", |
| 3570 | dev->name); |
| 3571 | return err; |
| 3572 | } |
| 3573 | |
| 3574 | err = ucc_geth_init_mac(ugeth); |
| 3575 | if (err) { |
| 3576 | if (netif_msg_ifup(ugeth)) |
| 3577 | ugeth_err("%s: Cannot initialize MAC, aborting.", |
| 3578 | dev->name); |
| 3579 | goto err; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3580 | } |
| 3581 | |
Anton Vorontsov | 67c2fb8 | 2008-12-18 08:23:29 +0000 | [diff] [blame] | 3582 | err = request_irq(ugeth->ug_info->uf_info.irq, ucc_geth_irq_handler, |
| 3583 | 0, "UCC Geth", dev); |
| 3584 | if (err) { |
| 3585 | if (netif_msg_ifup(ugeth)) |
| 3586 | ugeth_err("%s: Cannot get IRQ for net device, aborting.", |
| 3587 | dev->name); |
Anton Vorontsov | 54b1598 | 2009-08-27 07:35:54 +0000 | [diff] [blame] | 3588 | goto err; |
Anton Vorontsov | 67c2fb8 | 2008-12-18 08:23:29 +0000 | [diff] [blame] | 3589 | } |
| 3590 | |
Anton Vorontsov | 54b1598 | 2009-08-27 07:35:54 +0000 | [diff] [blame] | 3591 | phy_start(ugeth->phydev); |
| 3592 | napi_enable(&ugeth->napi); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3593 | netif_start_queue(dev); |
| 3594 | |
Anton Vorontsov | 2394905 | 2009-08-27 07:35:57 +0000 | [diff] [blame] | 3595 | device_set_wakeup_capable(&dev->dev, |
| 3596 | qe_alive_during_sleep() || ugeth->phydev->irq); |
| 3597 | device_set_wakeup_enable(&dev->dev, ugeth->wol_en); |
| 3598 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3599 | return err; |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3600 | |
Anton Vorontsov | 54b1598 | 2009-08-27 07:35:54 +0000 | [diff] [blame] | 3601 | err: |
Anton Vorontsov | ba57469 | 2008-12-18 08:23:31 +0000 | [diff] [blame] | 3602 | ucc_geth_stop(ugeth); |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3603 | return err; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3604 | } |
| 3605 | |
| 3606 | /* Stops the kernel queue, and halts the controller */ |
| 3607 | static int ucc_geth_close(struct net_device *dev) |
| 3608 | { |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3609 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3610 | |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 3611 | ugeth_vdbg("%s: IN", __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3612 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3613 | napi_disable(&ugeth->napi); |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3614 | |
Joakim Tjernlund | 2040bd5 | 2010-11-12 03:55:08 +0000 | [diff] [blame] | 3615 | cancel_work_sync(&ugeth->timeout_work); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3616 | ucc_geth_stop(ugeth); |
Joakim Tjernlund | 2040bd5 | 2010-11-12 03:55:08 +0000 | [diff] [blame] | 3617 | phy_disconnect(ugeth->phydev); |
| 3618 | ugeth->phydev = NULL; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3619 | |
Anton Vorontsov | da1aa63 | 2009-04-02 01:26:07 -0700 | [diff] [blame] | 3620 | free_irq(ugeth->ug_info->uf_info.irq, ugeth->ndev); |
Anton Vorontsov | 67c2fb8 | 2008-12-18 08:23:29 +0000 | [diff] [blame] | 3621 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3622 | netif_stop_queue(dev); |
| 3623 | |
| 3624 | return 0; |
| 3625 | } |
| 3626 | |
Anton Vorontsov | fdb614c | 2008-12-23 06:59:25 +0000 | [diff] [blame] | 3627 | /* Reopen device. This will reset the MAC and PHY. */ |
| 3628 | static void ucc_geth_timeout_work(struct work_struct *work) |
| 3629 | { |
| 3630 | struct ucc_geth_private *ugeth; |
| 3631 | struct net_device *dev; |
| 3632 | |
| 3633 | ugeth = container_of(work, struct ucc_geth_private, timeout_work); |
Anton Vorontsov | da1aa63 | 2009-04-02 01:26:07 -0700 | [diff] [blame] | 3634 | dev = ugeth->ndev; |
Anton Vorontsov | fdb614c | 2008-12-23 06:59:25 +0000 | [diff] [blame] | 3635 | |
| 3636 | ugeth_vdbg("%s: IN", __func__); |
| 3637 | |
| 3638 | dev->stats.tx_errors++; |
| 3639 | |
| 3640 | ugeth_dump_regs(ugeth); |
| 3641 | |
| 3642 | if (dev->flags & IFF_UP) { |
| 3643 | /* |
| 3644 | * Must reset MAC *and* PHY. This is done by reopening |
| 3645 | * the device. |
| 3646 | */ |
Joakim Tjernlund | 2040bd5 | 2010-11-12 03:55:08 +0000 | [diff] [blame] | 3647 | netif_tx_stop_all_queues(dev); |
| 3648 | ucc_geth_stop(ugeth); |
| 3649 | ucc_geth_init_mac(ugeth); |
| 3650 | /* Must start PHY here */ |
| 3651 | phy_start(ugeth->phydev); |
| 3652 | netif_tx_start_all_queues(dev); |
Anton Vorontsov | fdb614c | 2008-12-23 06:59:25 +0000 | [diff] [blame] | 3653 | } |
| 3654 | |
| 3655 | netif_tx_schedule_all(dev); |
| 3656 | } |
| 3657 | |
| 3658 | /* |
| 3659 | * ucc_geth_timeout gets called when a packet has not been |
| 3660 | * transmitted after a set amount of time. |
| 3661 | */ |
| 3662 | static void ucc_geth_timeout(struct net_device *dev) |
| 3663 | { |
| 3664 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
| 3665 | |
Anton Vorontsov | fdb614c | 2008-12-23 06:59:25 +0000 | [diff] [blame] | 3666 | schedule_work(&ugeth->timeout_work); |
| 3667 | } |
| 3668 | |
Anton Vorontsov | 2394905 | 2009-08-27 07:35:57 +0000 | [diff] [blame] | 3669 | |
| 3670 | #ifdef CONFIG_PM |
| 3671 | |
Grant Likely | 2dc1158 | 2010-08-06 09:25:50 -0600 | [diff] [blame] | 3672 | static int ucc_geth_suspend(struct platform_device *ofdev, pm_message_t state) |
Anton Vorontsov | 2394905 | 2009-08-27 07:35:57 +0000 | [diff] [blame] | 3673 | { |
| 3674 | struct net_device *ndev = dev_get_drvdata(&ofdev->dev); |
| 3675 | struct ucc_geth_private *ugeth = netdev_priv(ndev); |
| 3676 | |
| 3677 | if (!netif_running(ndev)) |
| 3678 | return 0; |
| 3679 | |
Anton Vorontsov | 29fb00e | 2009-12-30 08:23:32 +0000 | [diff] [blame] | 3680 | netif_device_detach(ndev); |
Anton Vorontsov | 2394905 | 2009-08-27 07:35:57 +0000 | [diff] [blame] | 3681 | napi_disable(&ugeth->napi); |
| 3682 | |
| 3683 | /* |
| 3684 | * Disable the controller, otherwise we'll wakeup on any network |
| 3685 | * activity. |
| 3686 | */ |
| 3687 | ugeth_disable(ugeth, COMM_DIR_RX_AND_TX); |
| 3688 | |
| 3689 | if (ugeth->wol_en & WAKE_MAGIC) { |
| 3690 | setbits32(ugeth->uccf->p_uccm, UCC_GETH_UCCE_MPD); |
| 3691 | setbits32(&ugeth->ug_regs->maccfg2, MACCFG2_MPE); |
| 3692 | ucc_fast_enable(ugeth->uccf, COMM_DIR_RX_AND_TX); |
| 3693 | } else if (!(ugeth->wol_en & WAKE_PHY)) { |
| 3694 | phy_stop(ugeth->phydev); |
| 3695 | } |
| 3696 | |
| 3697 | return 0; |
| 3698 | } |
| 3699 | |
Grant Likely | 2dc1158 | 2010-08-06 09:25:50 -0600 | [diff] [blame] | 3700 | static int ucc_geth_resume(struct platform_device *ofdev) |
Anton Vorontsov | 2394905 | 2009-08-27 07:35:57 +0000 | [diff] [blame] | 3701 | { |
| 3702 | struct net_device *ndev = dev_get_drvdata(&ofdev->dev); |
| 3703 | struct ucc_geth_private *ugeth = netdev_priv(ndev); |
| 3704 | int err; |
| 3705 | |
| 3706 | if (!netif_running(ndev)) |
| 3707 | return 0; |
| 3708 | |
| 3709 | if (qe_alive_during_sleep()) { |
| 3710 | if (ugeth->wol_en & WAKE_MAGIC) { |
| 3711 | ucc_fast_disable(ugeth->uccf, COMM_DIR_RX_AND_TX); |
| 3712 | clrbits32(&ugeth->ug_regs->maccfg2, MACCFG2_MPE); |
| 3713 | clrbits32(ugeth->uccf->p_uccm, UCC_GETH_UCCE_MPD); |
| 3714 | } |
| 3715 | ugeth_enable(ugeth, COMM_DIR_RX_AND_TX); |
| 3716 | } else { |
| 3717 | /* |
| 3718 | * Full reinitialization is required if QE shuts down |
| 3719 | * during sleep. |
| 3720 | */ |
| 3721 | ucc_geth_memclean(ugeth); |
| 3722 | |
| 3723 | err = ucc_geth_init_mac(ugeth); |
| 3724 | if (err) { |
| 3725 | ugeth_err("%s: Cannot initialize MAC, aborting.", |
| 3726 | ndev->name); |
| 3727 | return err; |
| 3728 | } |
| 3729 | } |
| 3730 | |
| 3731 | ugeth->oldlink = 0; |
| 3732 | ugeth->oldspeed = 0; |
| 3733 | ugeth->oldduplex = -1; |
| 3734 | |
| 3735 | phy_stop(ugeth->phydev); |
| 3736 | phy_start(ugeth->phydev); |
| 3737 | |
| 3738 | napi_enable(&ugeth->napi); |
Anton Vorontsov | 29fb00e | 2009-12-30 08:23:32 +0000 | [diff] [blame] | 3739 | netif_device_attach(ndev); |
Anton Vorontsov | 2394905 | 2009-08-27 07:35:57 +0000 | [diff] [blame] | 3740 | |
| 3741 | return 0; |
| 3742 | } |
| 3743 | |
| 3744 | #else |
| 3745 | #define ucc_geth_suspend NULL |
| 3746 | #define ucc_geth_resume NULL |
| 3747 | #endif |
| 3748 | |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 3749 | static phy_interface_t to_phy_interface(const char *phy_connection_type) |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3750 | { |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 3751 | if (strcasecmp(phy_connection_type, "mii") == 0) |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3752 | return PHY_INTERFACE_MODE_MII; |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 3753 | if (strcasecmp(phy_connection_type, "gmii") == 0) |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3754 | return PHY_INTERFACE_MODE_GMII; |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 3755 | if (strcasecmp(phy_connection_type, "tbi") == 0) |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3756 | return PHY_INTERFACE_MODE_TBI; |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 3757 | if (strcasecmp(phy_connection_type, "rmii") == 0) |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3758 | return PHY_INTERFACE_MODE_RMII; |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 3759 | if (strcasecmp(phy_connection_type, "rgmii") == 0) |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3760 | return PHY_INTERFACE_MODE_RGMII; |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 3761 | if (strcasecmp(phy_connection_type, "rgmii-id") == 0) |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3762 | return PHY_INTERFACE_MODE_RGMII_ID; |
Kim Phillips | bd0ceaa | 2007-11-26 16:17:58 -0600 | [diff] [blame] | 3763 | if (strcasecmp(phy_connection_type, "rgmii-txid") == 0) |
| 3764 | return PHY_INTERFACE_MODE_RGMII_TXID; |
| 3765 | if (strcasecmp(phy_connection_type, "rgmii-rxid") == 0) |
| 3766 | return PHY_INTERFACE_MODE_RGMII_RXID; |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 3767 | if (strcasecmp(phy_connection_type, "rtbi") == 0) |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3768 | return PHY_INTERFACE_MODE_RTBI; |
Haiying Wang | 047584c | 2009-06-02 04:04:15 +0000 | [diff] [blame] | 3769 | if (strcasecmp(phy_connection_type, "sgmii") == 0) |
| 3770 | return PHY_INTERFACE_MODE_SGMII; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3771 | |
| 3772 | return PHY_INTERFACE_MODE_MII; |
| 3773 | } |
| 3774 | |
Sergey Matyukevich | d19b514 | 2010-06-07 08:38:13 +0000 | [diff] [blame] | 3775 | static int ucc_geth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
| 3776 | { |
| 3777 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
| 3778 | |
| 3779 | if (!netif_running(dev)) |
| 3780 | return -EINVAL; |
| 3781 | |
| 3782 | if (!ugeth->phydev) |
| 3783 | return -ENODEV; |
| 3784 | |
Richard Cochran | 28b0411 | 2010-07-17 08:48:55 +0000 | [diff] [blame] | 3785 | return phy_mii_ioctl(ugeth->phydev, rq, cmd); |
Sergey Matyukevich | d19b514 | 2010-06-07 08:38:13 +0000 | [diff] [blame] | 3786 | } |
| 3787 | |
Joakim Tjernlund | a9dbae7 | 2009-03-20 21:09:14 +0100 | [diff] [blame] | 3788 | static const struct net_device_ops ucc_geth_netdev_ops = { |
| 3789 | .ndo_open = ucc_geth_open, |
| 3790 | .ndo_stop = ucc_geth_close, |
| 3791 | .ndo_start_xmit = ucc_geth_start_xmit, |
| 3792 | .ndo_validate_addr = eth_validate_addr, |
Kevin Hao | 3d6593e | 2009-05-26 20:49:03 -0700 | [diff] [blame] | 3793 | .ndo_set_mac_address = ucc_geth_set_mac_addr, |
Joakim Tjernlund | a9dbae7 | 2009-03-20 21:09:14 +0100 | [diff] [blame] | 3794 | .ndo_change_mtu = eth_change_mtu, |
Jiri Pirko | afc4b13 | 2011-08-16 06:29:01 +0000 | [diff] [blame] | 3795 | .ndo_set_rx_mode = ucc_geth_set_multi, |
Joakim Tjernlund | a9dbae7 | 2009-03-20 21:09:14 +0100 | [diff] [blame] | 3796 | .ndo_tx_timeout = ucc_geth_timeout, |
Sergey Matyukevich | d19b514 | 2010-06-07 08:38:13 +0000 | [diff] [blame] | 3797 | .ndo_do_ioctl = ucc_geth_ioctl, |
Joakim Tjernlund | a9dbae7 | 2009-03-20 21:09:14 +0100 | [diff] [blame] | 3798 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 3799 | .ndo_poll_controller = ucc_netpoll, |
| 3800 | #endif |
| 3801 | }; |
| 3802 | |
Grant Likely | 7488876 | 2011-02-22 21:05:51 -0700 | [diff] [blame] | 3803 | static int ucc_geth_probe(struct platform_device* ofdev) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3804 | { |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3805 | struct device *device = &ofdev->dev; |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 3806 | struct device_node *np = ofdev->dev.of_node; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3807 | struct net_device *dev = NULL; |
| 3808 | struct ucc_geth_private *ugeth = NULL; |
| 3809 | struct ucc_geth_info *ug_info; |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3810 | struct resource res; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3811 | int err, ucc_num, max_speed = 0; |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3812 | const unsigned int *prop; |
Timur Tabi | 9fb1e35 | 2007-12-03 15:17:59 -0600 | [diff] [blame] | 3813 | const char *sprop; |
Li Yang | 9b4c7a4 | 2007-02-08 17:35:54 +0800 | [diff] [blame] | 3814 | const void *mac_addr; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3815 | phy_interface_t phy_interface; |
| 3816 | static const int enet_to_speed[] = { |
| 3817 | SPEED_10, SPEED_10, SPEED_10, |
| 3818 | SPEED_100, SPEED_100, SPEED_100, |
| 3819 | SPEED_1000, SPEED_1000, SPEED_1000, SPEED_1000, |
| 3820 | }; |
| 3821 | static const phy_interface_t enet_to_phy_interface[] = { |
| 3822 | PHY_INTERFACE_MODE_MII, PHY_INTERFACE_MODE_RMII, |
| 3823 | PHY_INTERFACE_MODE_RGMII, PHY_INTERFACE_MODE_MII, |
| 3824 | PHY_INTERFACE_MODE_RMII, PHY_INTERFACE_MODE_RGMII, |
| 3825 | PHY_INTERFACE_MODE_GMII, PHY_INTERFACE_MODE_RGMII, |
| 3826 | PHY_INTERFACE_MODE_TBI, PHY_INTERFACE_MODE_RTBI, |
Haiying Wang | 047584c | 2009-06-02 04:04:15 +0000 | [diff] [blame] | 3827 | PHY_INTERFACE_MODE_SGMII, |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3828 | }; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3829 | |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 3830 | ugeth_vdbg("%s: IN", __func__); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3831 | |
Anton Vorontsov | 56626f3 | 2008-04-11 20:06:54 +0400 | [diff] [blame] | 3832 | prop = of_get_property(np, "cell-index", NULL); |
| 3833 | if (!prop) { |
| 3834 | prop = of_get_property(np, "device-id", NULL); |
| 3835 | if (!prop) |
| 3836 | return -ENODEV; |
| 3837 | } |
| 3838 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3839 | ucc_num = *prop - 1; |
| 3840 | if ((ucc_num < 0) || (ucc_num > 7)) |
| 3841 | return -ENODEV; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3842 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3843 | ug_info = &ugeth_info[ucc_num]; |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3844 | if (ug_info == NULL) { |
| 3845 | if (netif_msg_probe(&debug)) |
| 3846 | ugeth_err("%s: [%d] Missing additional data!", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 3847 | __func__, ucc_num); |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3848 | return -ENODEV; |
| 3849 | } |
| 3850 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3851 | ug_info->uf_info.ucc_num = ucc_num; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3852 | |
Timur Tabi | 9fb1e35 | 2007-12-03 15:17:59 -0600 | [diff] [blame] | 3853 | sprop = of_get_property(np, "rx-clock-name", NULL); |
| 3854 | if (sprop) { |
| 3855 | ug_info->uf_info.rx_clock = qe_clock_source(sprop); |
| 3856 | if ((ug_info->uf_info.rx_clock < QE_CLK_NONE) || |
| 3857 | (ug_info->uf_info.rx_clock > QE_CLK24)) { |
| 3858 | printk(KERN_ERR |
| 3859 | "ucc_geth: invalid rx-clock-name property\n"); |
| 3860 | return -EINVAL; |
| 3861 | } |
| 3862 | } else { |
| 3863 | prop = of_get_property(np, "rx-clock", NULL); |
| 3864 | if (!prop) { |
| 3865 | /* If both rx-clock-name and rx-clock are missing, |
| 3866 | we want to tell people to use rx-clock-name. */ |
| 3867 | printk(KERN_ERR |
| 3868 | "ucc_geth: missing rx-clock-name property\n"); |
| 3869 | return -EINVAL; |
| 3870 | } |
| 3871 | if ((*prop < QE_CLK_NONE) || (*prop > QE_CLK24)) { |
| 3872 | printk(KERN_ERR |
| 3873 | "ucc_geth: invalid rx-clock propperty\n"); |
| 3874 | return -EINVAL; |
| 3875 | } |
| 3876 | ug_info->uf_info.rx_clock = *prop; |
| 3877 | } |
| 3878 | |
| 3879 | sprop = of_get_property(np, "tx-clock-name", NULL); |
| 3880 | if (sprop) { |
| 3881 | ug_info->uf_info.tx_clock = qe_clock_source(sprop); |
| 3882 | if ((ug_info->uf_info.tx_clock < QE_CLK_NONE) || |
| 3883 | (ug_info->uf_info.tx_clock > QE_CLK24)) { |
| 3884 | printk(KERN_ERR |
| 3885 | "ucc_geth: invalid tx-clock-name property\n"); |
| 3886 | return -EINVAL; |
| 3887 | } |
| 3888 | } else { |
Joakim Tjernlund | e410553 | 2008-04-29 13:03:57 +0200 | [diff] [blame] | 3889 | prop = of_get_property(np, "tx-clock", NULL); |
Timur Tabi | 9fb1e35 | 2007-12-03 15:17:59 -0600 | [diff] [blame] | 3890 | if (!prop) { |
| 3891 | printk(KERN_ERR |
André Goddard Rosa | af901ca | 2009-11-14 13:09:05 -0200 | [diff] [blame] | 3892 | "ucc_geth: missing tx-clock-name property\n"); |
Timur Tabi | 9fb1e35 | 2007-12-03 15:17:59 -0600 | [diff] [blame] | 3893 | return -EINVAL; |
| 3894 | } |
| 3895 | if ((*prop < QE_CLK_NONE) || (*prop > QE_CLK24)) { |
| 3896 | printk(KERN_ERR |
| 3897 | "ucc_geth: invalid tx-clock property\n"); |
| 3898 | return -EINVAL; |
| 3899 | } |
| 3900 | ug_info->uf_info.tx_clock = *prop; |
| 3901 | } |
| 3902 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 3903 | err = of_address_to_resource(np, 0, &res); |
| 3904 | if (err) |
| 3905 | return -EINVAL; |
| 3906 | |
| 3907 | ug_info->uf_info.regs = res.start; |
| 3908 | ug_info->uf_info.irq = irq_of_parse_and_map(np, 0); |
Anton Vorontsov | 3104a6f | 2009-07-16 21:31:47 +0000 | [diff] [blame] | 3909 | |
| 3910 | ug_info->phy_node = of_parse_phandle(np, "phy-handle", 0); |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3911 | |
Haiying Wang | fb1001f | 2009-06-17 13:16:10 +0000 | [diff] [blame] | 3912 | /* Find the TBI PHY node. If it's not there, we don't support SGMII */ |
| 3913 | ug_info->tbi_node = of_parse_phandle(np, "tbi-handle", 0); |
| 3914 | |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3915 | /* get the phy interface type, or default to MII */ |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 3916 | prop = of_get_property(np, "phy-connection-type", NULL); |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3917 | if (!prop) { |
| 3918 | /* handle interface property present in old trees */ |
Anton Vorontsov | 3104a6f | 2009-07-16 21:31:47 +0000 | [diff] [blame] | 3919 | prop = of_get_property(ug_info->phy_node, "interface", NULL); |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 3920 | if (prop != NULL) { |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3921 | phy_interface = enet_to_phy_interface[*prop]; |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 3922 | max_speed = enet_to_speed[*prop]; |
| 3923 | } else |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3924 | phy_interface = PHY_INTERFACE_MODE_MII; |
| 3925 | } else { |
| 3926 | phy_interface = to_phy_interface((const char *)prop); |
| 3927 | } |
| 3928 | |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 3929 | /* get speed, or derive from PHY interface */ |
| 3930 | if (max_speed == 0) |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3931 | switch (phy_interface) { |
| 3932 | case PHY_INTERFACE_MODE_GMII: |
| 3933 | case PHY_INTERFACE_MODE_RGMII: |
| 3934 | case PHY_INTERFACE_MODE_RGMII_ID: |
Kim Phillips | bd0ceaa | 2007-11-26 16:17:58 -0600 | [diff] [blame] | 3935 | case PHY_INTERFACE_MODE_RGMII_RXID: |
| 3936 | case PHY_INTERFACE_MODE_RGMII_TXID: |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3937 | case PHY_INTERFACE_MODE_TBI: |
| 3938 | case PHY_INTERFACE_MODE_RTBI: |
Haiying Wang | 047584c | 2009-06-02 04:04:15 +0000 | [diff] [blame] | 3939 | case PHY_INTERFACE_MODE_SGMII: |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3940 | max_speed = SPEED_1000; |
| 3941 | break; |
| 3942 | default: |
| 3943 | max_speed = SPEED_100; |
| 3944 | break; |
| 3945 | } |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3946 | |
| 3947 | if (max_speed == SPEED_1000) { |
Dave Liu | fa1b42b | 2010-01-12 00:04:03 +0000 | [diff] [blame] | 3948 | unsigned int snums = qe_get_num_of_snums(); |
| 3949 | |
Kim Phillips | 4e19b5c | 2007-05-11 18:25:07 -0500 | [diff] [blame] | 3950 | /* configure muram FIFOs for gigabit operation */ |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3951 | ug_info->uf_info.urfs = UCC_GETH_URFS_GIGA_INIT; |
| 3952 | ug_info->uf_info.urfet = UCC_GETH_URFET_GIGA_INIT; |
| 3953 | ug_info->uf_info.urfset = UCC_GETH_URFSET_GIGA_INIT; |
| 3954 | ug_info->uf_info.utfs = UCC_GETH_UTFS_GIGA_INIT; |
| 3955 | ug_info->uf_info.utfet = UCC_GETH_UTFET_GIGA_INIT; |
| 3956 | ug_info->uf_info.utftt = UCC_GETH_UTFTT_GIGA_INIT; |
Joakim Tjernlund | ffea31e | 2008-03-06 18:48:46 +0800 | [diff] [blame] | 3957 | ug_info->numThreadsTx = UCC_GETH_NUM_OF_THREADS_4; |
Haiying Wang | 674e4f9 | 2009-05-01 15:40:49 -0400 | [diff] [blame] | 3958 | |
Dave Liu | fa1b42b | 2010-01-12 00:04:03 +0000 | [diff] [blame] | 3959 | /* If QE's snum number is 46/76 which means we need to support |
Haiying Wang | 674e4f9 | 2009-05-01 15:40:49 -0400 | [diff] [blame] | 3960 | * 4 UECs at 1000Base-T simultaneously, we need to allocate |
| 3961 | * more Threads to Rx. |
| 3962 | */ |
Dave Liu | fa1b42b | 2010-01-12 00:04:03 +0000 | [diff] [blame] | 3963 | if ((snums == 76) || (snums == 46)) |
Haiying Wang | 674e4f9 | 2009-05-01 15:40:49 -0400 | [diff] [blame] | 3964 | ug_info->numThreadsRx = UCC_GETH_NUM_OF_THREADS_6; |
| 3965 | else |
| 3966 | ug_info->numThreadsRx = UCC_GETH_NUM_OF_THREADS_4; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 3967 | } |
| 3968 | |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3969 | if (netif_msg_probe(&debug)) |
Frans Pop | 2381a55 | 2010-03-24 07:57:36 +0000 | [diff] [blame] | 3970 | printk(KERN_INFO "ucc_geth: UCC%1d at 0x%8x (irq = %d)\n", |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 3971 | ug_info->uf_info.ucc_num + 1, ug_info->uf_info.regs, |
| 3972 | ug_info->uf_info.irq); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3973 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3974 | /* Create an ethernet device instance */ |
| 3975 | dev = alloc_etherdev(sizeof(*ugeth)); |
| 3976 | |
| 3977 | if (dev == NULL) |
| 3978 | return -ENOMEM; |
| 3979 | |
| 3980 | ugeth = netdev_priv(dev); |
| 3981 | spin_lock_init(&ugeth->lock); |
| 3982 | |
Anton Vorontsov | 80a9fad | 2008-02-01 16:22:48 +0300 | [diff] [blame] | 3983 | /* Create CQs for hash tables */ |
| 3984 | INIT_LIST_HEAD(&ugeth->group_hash_q); |
| 3985 | INIT_LIST_HEAD(&ugeth->ind_hash_q); |
| 3986 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3987 | dev_set_drvdata(device, dev); |
| 3988 | |
| 3989 | /* Set the dev->base_addr to the gfar reg region */ |
| 3990 | dev->base_addr = (unsigned long)(ug_info->uf_info.regs); |
| 3991 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3992 | SET_NETDEV_DEV(dev, device); |
| 3993 | |
| 3994 | /* Fill in the dev structure */ |
Li Yang | ac42185 | 2007-07-19 11:47:47 +0800 | [diff] [blame] | 3995 | uec_set_ethtool_ops(dev); |
Joakim Tjernlund | a9dbae7 | 2009-03-20 21:09:14 +0100 | [diff] [blame] | 3996 | dev->netdev_ops = &ucc_geth_netdev_ops; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 3997 | dev->watchdog_timeo = TX_TIMEOUT; |
Anton Vorontsov | 1762a29 | 2008-12-18 08:23:26 +0000 | [diff] [blame] | 3998 | INIT_WORK(&ugeth->timeout_work, ucc_geth_timeout_work); |
Joakim Tjernlund | 0cededf | 2009-04-17 12:03:48 +0000 | [diff] [blame] | 3999 | netif_napi_add(dev, &ugeth->napi, ucc_geth_poll, 64); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 4000 | dev->mtu = 1500; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 4001 | |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 4002 | ugeth->msg_enable = netif_msg_init(debug.msg_enable, UGETH_MSG_DEFAULT); |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 4003 | ugeth->phy_interface = phy_interface; |
| 4004 | ugeth->max_speed = max_speed; |
| 4005 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 4006 | err = register_netdev(dev); |
| 4007 | if (err) { |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 4008 | if (netif_msg_probe(ugeth)) |
| 4009 | ugeth_err("%s: Cannot register net device, aborting.", |
| 4010 | dev->name); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 4011 | free_netdev(dev); |
| 4012 | return err; |
| 4013 | } |
| 4014 | |
Timur Tabi | e9eb70c | 2007-02-21 14:40:12 -0600 | [diff] [blame] | 4015 | mac_addr = of_get_mac_address(np); |
Li Yang | 9b4c7a4 | 2007-02-08 17:35:54 +0800 | [diff] [blame] | 4016 | if (mac_addr) |
| 4017 | memcpy(dev->dev_addr, mac_addr, 6); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 4018 | |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 4019 | ugeth->ug_info = ug_info; |
Anton Vorontsov | da1aa63 | 2009-04-02 01:26:07 -0700 | [diff] [blame] | 4020 | ugeth->dev = device; |
| 4021 | ugeth->ndev = dev; |
Haiying Wang | b1c4a9dd | 2009-01-29 17:28:04 -0800 | [diff] [blame] | 4022 | ugeth->node = np; |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 4023 | |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 4024 | return 0; |
| 4025 | } |
| 4026 | |
Grant Likely | 2dc1158 | 2010-08-06 09:25:50 -0600 | [diff] [blame] | 4027 | static int ucc_geth_remove(struct platform_device* ofdev) |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 4028 | { |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 4029 | struct device *device = &ofdev->dev; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 4030 | struct net_device *dev = dev_get_drvdata(device); |
| 4031 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
| 4032 | |
Anton Vorontsov | 80a9fad | 2008-02-01 16:22:48 +0300 | [diff] [blame] | 4033 | unregister_netdev(dev); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 4034 | free_netdev(dev); |
Anton Vorontsov | 80a9fad | 2008-02-01 16:22:48 +0300 | [diff] [blame] | 4035 | ucc_geth_memclean(ugeth); |
| 4036 | dev_set_drvdata(device, NULL); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 4037 | |
| 4038 | return 0; |
| 4039 | } |
| 4040 | |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 4041 | static struct of_device_id ucc_geth_match[] = { |
| 4042 | { |
| 4043 | .type = "network", |
| 4044 | .compatible = "ucc_geth", |
| 4045 | }, |
| 4046 | {}, |
| 4047 | }; |
| 4048 | |
| 4049 | MODULE_DEVICE_TABLE(of, ucc_geth_match); |
| 4050 | |
Grant Likely | 7488876 | 2011-02-22 21:05:51 -0700 | [diff] [blame] | 4051 | static struct platform_driver ucc_geth_driver = { |
Grant Likely | 4018294 | 2010-04-13 16:13:02 -0700 | [diff] [blame] | 4052 | .driver = { |
| 4053 | .name = DRV_NAME, |
| 4054 | .owner = THIS_MODULE, |
| 4055 | .of_match_table = ucc_geth_match, |
| 4056 | }, |
Li Yang | 18a8e86 | 2006-10-19 21:07:34 -0500 | [diff] [blame] | 4057 | .probe = ucc_geth_probe, |
| 4058 | .remove = ucc_geth_remove, |
Anton Vorontsov | 2394905 | 2009-08-27 07:35:57 +0000 | [diff] [blame] | 4059 | .suspend = ucc_geth_suspend, |
| 4060 | .resume = ucc_geth_resume, |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 4061 | }; |
| 4062 | |
| 4063 | static int __init ucc_geth_init(void) |
| 4064 | { |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 4065 | int i, ret; |
| 4066 | |
Li Yang | 890de95 | 2007-07-19 11:48:29 +0800 | [diff] [blame] | 4067 | if (netif_msg_drv(&debug)) |
| 4068 | printk(KERN_INFO "ucc_geth: " DRV_DESC "\n"); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 4069 | for (i = 0; i < 8; i++) |
| 4070 | memcpy(&(ugeth_info[i]), &ugeth_primary_info, |
| 4071 | sizeof(ugeth_primary_info)); |
| 4072 | |
Grant Likely | 7488876 | 2011-02-22 21:05:51 -0700 | [diff] [blame] | 4073 | ret = platform_driver_register(&ucc_geth_driver); |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 4074 | |
Kim Phillips | 728de4c9 | 2007-04-13 01:26:03 -0500 | [diff] [blame] | 4075 | return ret; |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 4076 | } |
| 4077 | |
| 4078 | static void __exit ucc_geth_exit(void) |
| 4079 | { |
Grant Likely | 7488876 | 2011-02-22 21:05:51 -0700 | [diff] [blame] | 4080 | platform_driver_unregister(&ucc_geth_driver); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 4081 | } |
| 4082 | |
| 4083 | module_init(ucc_geth_init); |
| 4084 | module_exit(ucc_geth_exit); |
| 4085 | |
| 4086 | MODULE_AUTHOR("Freescale Semiconductor, Inc"); |
| 4087 | MODULE_DESCRIPTION(DRV_DESC); |
Kim Phillips | c2bcf00 | 2007-04-13 01:26:36 -0500 | [diff] [blame] | 4088 | MODULE_VERSION(DRV_VERSION); |
Li Yang | ce973b1 | 2006-08-14 23:00:11 -0700 | [diff] [blame] | 4089 | MODULE_LICENSE("GPL"); |