Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * PowerPC64 port by Mike Corrigan and Dave Engebretsen |
| 3 | * {mikejc|engebret}@us.ibm.com |
| 4 | * |
| 5 | * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com> |
| 6 | * |
| 7 | * SMP scalability work: |
| 8 | * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM |
| 9 | * |
| 10 | * Module name: htab.c |
| 11 | * |
| 12 | * Description: |
| 13 | * PowerPC Hashed Page Table functions |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or |
| 16 | * modify it under the terms of the GNU General Public License |
| 17 | * as published by the Free Software Foundation; either version |
| 18 | * 2 of the License, or (at your option) any later version. |
| 19 | */ |
| 20 | |
| 21 | #undef DEBUG |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 22 | #undef DEBUG_LOW |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | |
| 24 | #include <linux/config.h> |
| 25 | #include <linux/spinlock.h> |
| 26 | #include <linux/errno.h> |
| 27 | #include <linux/sched.h> |
| 28 | #include <linux/proc_fs.h> |
| 29 | #include <linux/stat.h> |
| 30 | #include <linux/sysctl.h> |
| 31 | #include <linux/ctype.h> |
| 32 | #include <linux/cache.h> |
| 33 | #include <linux/init.h> |
| 34 | #include <linux/signal.h> |
| 35 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | #include <asm/processor.h> |
| 37 | #include <asm/pgtable.h> |
| 38 | #include <asm/mmu.h> |
| 39 | #include <asm/mmu_context.h> |
| 40 | #include <asm/page.h> |
| 41 | #include <asm/types.h> |
| 42 | #include <asm/system.h> |
| 43 | #include <asm/uaccess.h> |
| 44 | #include <asm/machdep.h> |
| 45 | #include <asm/lmb.h> |
| 46 | #include <asm/abs_addr.h> |
| 47 | #include <asm/tlbflush.h> |
| 48 | #include <asm/io.h> |
| 49 | #include <asm/eeh.h> |
| 50 | #include <asm/tlb.h> |
| 51 | #include <asm/cacheflush.h> |
| 52 | #include <asm/cputable.h> |
| 53 | #include <asm/abs_addr.h> |
| 54 | #include <asm/sections.h> |
| 55 | |
| 56 | #ifdef DEBUG |
| 57 | #define DBG(fmt...) udbg_printf(fmt) |
| 58 | #else |
| 59 | #define DBG(fmt...) |
| 60 | #endif |
| 61 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 62 | #ifdef DEBUG_LOW |
| 63 | #define DBG_LOW(fmt...) udbg_printf(fmt) |
| 64 | #else |
| 65 | #define DBG_LOW(fmt...) |
| 66 | #endif |
| 67 | |
| 68 | #define KB (1024) |
| 69 | #define MB (1024*KB) |
| 70 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | /* |
| 72 | * Note: pte --> Linux PTE |
| 73 | * HPTE --> PowerPC Hashed Page Table Entry |
| 74 | * |
| 75 | * Execution context: |
| 76 | * htab_initialize is called with the MMU off (of course), but |
| 77 | * the kernel has been copied down to zero so it can directly |
| 78 | * reference global data. At this point it is very difficult |
| 79 | * to print debug info. |
| 80 | * |
| 81 | */ |
| 82 | |
| 83 | #ifdef CONFIG_U3_DART |
| 84 | extern unsigned long dart_tablebase; |
| 85 | #endif /* CONFIG_U3_DART */ |
| 86 | |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 87 | static unsigned long _SDR1; |
| 88 | struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; |
| 89 | |
David Gibson | 96e2844 | 2005-07-13 01:11:42 -0700 | [diff] [blame] | 90 | hpte_t *htab_address; |
Michael Ellerman | 337a712 | 2006-02-21 17:22:55 +1100 | [diff] [blame] | 91 | unsigned long htab_size_bytes; |
David Gibson | 96e2844 | 2005-07-13 01:11:42 -0700 | [diff] [blame] | 92 | unsigned long htab_hash_mask; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 93 | int mmu_linear_psize = MMU_PAGE_4K; |
| 94 | int mmu_virtual_psize = MMU_PAGE_4K; |
| 95 | #ifdef CONFIG_HUGETLB_PAGE |
| 96 | int mmu_huge_psize = MMU_PAGE_16M; |
| 97 | unsigned int HPAGE_SHIFT; |
| 98 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 99 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 100 | /* There are definitions of page sizes arrays to be used when none |
| 101 | * is provided by the firmware. |
| 102 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 103 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 104 | /* Pre-POWER4 CPUs (4k pages only) |
| 105 | */ |
| 106 | struct mmu_psize_def mmu_psize_defaults_old[] = { |
| 107 | [MMU_PAGE_4K] = { |
| 108 | .shift = 12, |
| 109 | .sllp = 0, |
| 110 | .penc = 0, |
| 111 | .avpnm = 0, |
| 112 | .tlbiel = 0, |
| 113 | }, |
| 114 | }; |
| 115 | |
| 116 | /* POWER4, GPUL, POWER5 |
| 117 | * |
| 118 | * Support for 16Mb large pages |
| 119 | */ |
| 120 | struct mmu_psize_def mmu_psize_defaults_gp[] = { |
| 121 | [MMU_PAGE_4K] = { |
| 122 | .shift = 12, |
| 123 | .sllp = 0, |
| 124 | .penc = 0, |
| 125 | .avpnm = 0, |
| 126 | .tlbiel = 1, |
| 127 | }, |
| 128 | [MMU_PAGE_16M] = { |
| 129 | .shift = 24, |
| 130 | .sllp = SLB_VSID_L, |
| 131 | .penc = 0, |
| 132 | .avpnm = 0x1UL, |
| 133 | .tlbiel = 0, |
| 134 | }, |
| 135 | }; |
| 136 | |
| 137 | |
| 138 | int htab_bolt_mapping(unsigned long vstart, unsigned long vend, |
| 139 | unsigned long pstart, unsigned long mode, int psize) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | { |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 141 | unsigned long vaddr, paddr; |
| 142 | unsigned int step, shift; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | unsigned long tmp_mode; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 144 | int ret = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 145 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 146 | shift = mmu_psize_defs[psize].shift; |
| 147 | step = 1 << shift; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 149 | for (vaddr = vstart, paddr = pstart; vaddr < vend; |
| 150 | vaddr += step, paddr += step) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | unsigned long vpn, hash, hpteg; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 152 | unsigned long vsid = get_kernel_vsid(vaddr); |
| 153 | unsigned long va = (vsid << 28) | (vaddr & 0x0fffffff); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 155 | vpn = va >> shift; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | tmp_mode = mode; |
| 157 | |
| 158 | /* Make non-kernel text non-executable */ |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 159 | if (!in_kernel_text(vaddr)) |
| 160 | tmp_mode = mode | HPTE_R_N; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 161 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 162 | hash = hpt_hash(va, shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 163 | hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP); |
| 164 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 165 | /* The crap below can be cleaned once ppd_md.probe() can |
| 166 | * set up the hash callbacks, thus we can just used the |
| 167 | * normal insert callback here. |
| 168 | */ |
Michael Ellerman | 4c55130 | 2005-09-23 14:47:58 +1000 | [diff] [blame] | 169 | #ifdef CONFIG_PPC_ISERIES |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 170 | if (_machine == PLATFORM_ISERIES_LPAR) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 171 | ret = iSeries_hpte_insert(hpteg, va, |
Michael Ellerman | caf80e5 | 2006-03-21 20:45:51 +1100 | [diff] [blame^] | 172 | paddr, |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 173 | tmp_mode, |
| 174 | HPTE_V_BOLTED, |
| 175 | psize); |
Michael Ellerman | 4c55130 | 2005-09-23 14:47:58 +1000 | [diff] [blame] | 176 | else |
| 177 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | #ifdef CONFIG_PPC_PSERIES |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 179 | if (_machine & PLATFORM_LPAR) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 180 | ret = pSeries_lpar_hpte_insert(hpteg, va, |
Michael Ellerman | caf80e5 | 2006-03-21 20:45:51 +1100 | [diff] [blame^] | 181 | paddr, |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 182 | tmp_mode, |
| 183 | HPTE_V_BOLTED, |
| 184 | psize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 185 | else |
Michael Ellerman | 4c55130 | 2005-09-23 14:47:58 +1000 | [diff] [blame] | 186 | #endif |
| 187 | #ifdef CONFIG_PPC_MULTIPLATFORM |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 188 | ret = native_hpte_insert(hpteg, va, |
Michael Ellerman | caf80e5 | 2006-03-21 20:45:51 +1100 | [diff] [blame^] | 189 | paddr, |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 190 | tmp_mode, HPTE_V_BOLTED, |
| 191 | psize); |
Michael Ellerman | 4c55130 | 2005-09-23 14:47:58 +1000 | [diff] [blame] | 192 | #endif |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 193 | if (ret < 0) |
| 194 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 195 | } |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 196 | return ret < 0 ? ret : 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | } |
| 198 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 199 | static int __init htab_dt_scan_page_sizes(unsigned long node, |
| 200 | const char *uname, int depth, |
| 201 | void *data) |
| 202 | { |
| 203 | char *type = of_get_flat_dt_prop(node, "device_type", NULL); |
| 204 | u32 *prop; |
| 205 | unsigned long size = 0; |
| 206 | |
| 207 | /* We are scanning "cpu" nodes only */ |
| 208 | if (type == NULL || strcmp(type, "cpu") != 0) |
| 209 | return 0; |
| 210 | |
| 211 | prop = (u32 *)of_get_flat_dt_prop(node, |
| 212 | "ibm,segment-page-sizes", &size); |
| 213 | if (prop != NULL) { |
| 214 | DBG("Page sizes from device-tree:\n"); |
| 215 | size /= 4; |
| 216 | cur_cpu_spec->cpu_features &= ~(CPU_FTR_16M_PAGE); |
| 217 | while(size > 0) { |
| 218 | unsigned int shift = prop[0]; |
| 219 | unsigned int slbenc = prop[1]; |
| 220 | unsigned int lpnum = prop[2]; |
| 221 | unsigned int lpenc = 0; |
| 222 | struct mmu_psize_def *def; |
| 223 | int idx = -1; |
| 224 | |
| 225 | size -= 3; prop += 3; |
| 226 | while(size > 0 && lpnum) { |
| 227 | if (prop[0] == shift) |
| 228 | lpenc = prop[1]; |
| 229 | prop += 2; size -= 2; |
| 230 | lpnum--; |
| 231 | } |
| 232 | switch(shift) { |
| 233 | case 0xc: |
| 234 | idx = MMU_PAGE_4K; |
| 235 | break; |
| 236 | case 0x10: |
| 237 | idx = MMU_PAGE_64K; |
| 238 | break; |
| 239 | case 0x14: |
| 240 | idx = MMU_PAGE_1M; |
| 241 | break; |
| 242 | case 0x18: |
| 243 | idx = MMU_PAGE_16M; |
| 244 | cur_cpu_spec->cpu_features |= CPU_FTR_16M_PAGE; |
| 245 | break; |
| 246 | case 0x22: |
| 247 | idx = MMU_PAGE_16G; |
| 248 | break; |
| 249 | } |
| 250 | if (idx < 0) |
| 251 | continue; |
| 252 | def = &mmu_psize_defs[idx]; |
| 253 | def->shift = shift; |
| 254 | if (shift <= 23) |
| 255 | def->avpnm = 0; |
| 256 | else |
| 257 | def->avpnm = (1 << (shift - 23)) - 1; |
| 258 | def->sllp = slbenc; |
| 259 | def->penc = lpenc; |
| 260 | /* We don't know for sure what's up with tlbiel, so |
| 261 | * for now we only set it for 4K and 64K pages |
| 262 | */ |
| 263 | if (idx == MMU_PAGE_4K || idx == MMU_PAGE_64K) |
| 264 | def->tlbiel = 1; |
| 265 | else |
| 266 | def->tlbiel = 0; |
| 267 | |
| 268 | DBG(" %d: shift=%02x, sllp=%04x, avpnm=%08x, " |
| 269 | "tlbiel=%d, penc=%d\n", |
| 270 | idx, shift, def->sllp, def->avpnm, def->tlbiel, |
| 271 | def->penc); |
| 272 | } |
| 273 | return 1; |
| 274 | } |
| 275 | return 0; |
| 276 | } |
| 277 | |
| 278 | |
| 279 | static void __init htab_init_page_sizes(void) |
| 280 | { |
| 281 | int rc; |
| 282 | |
| 283 | /* Default to 4K pages only */ |
| 284 | memcpy(mmu_psize_defs, mmu_psize_defaults_old, |
| 285 | sizeof(mmu_psize_defaults_old)); |
| 286 | |
| 287 | /* |
| 288 | * Try to find the available page sizes in the device-tree |
| 289 | */ |
| 290 | rc = of_scan_flat_dt(htab_dt_scan_page_sizes, NULL); |
| 291 | if (rc != 0) /* Found */ |
| 292 | goto found; |
| 293 | |
| 294 | /* |
| 295 | * Not in the device-tree, let's fallback on known size |
| 296 | * list for 16M capable GP & GR |
| 297 | */ |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 298 | if ((_machine != PLATFORM_ISERIES_LPAR) && |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 299 | cpu_has_feature(CPU_FTR_16M_PAGE)) |
| 300 | memcpy(mmu_psize_defs, mmu_psize_defaults_gp, |
| 301 | sizeof(mmu_psize_defaults_gp)); |
| 302 | found: |
| 303 | /* |
| 304 | * Pick a size for the linear mapping. Currently, we only support |
| 305 | * 16M, 1M and 4K which is the default |
| 306 | */ |
| 307 | if (mmu_psize_defs[MMU_PAGE_16M].shift) |
| 308 | mmu_linear_psize = MMU_PAGE_16M; |
| 309 | else if (mmu_psize_defs[MMU_PAGE_1M].shift) |
| 310 | mmu_linear_psize = MMU_PAGE_1M; |
| 311 | |
| 312 | /* |
| 313 | * Pick a size for the ordinary pages. Default is 4K, we support |
| 314 | * 64K if cache inhibited large pages are supported by the |
| 315 | * processor |
| 316 | */ |
| 317 | #ifdef CONFIG_PPC_64K_PAGES |
| 318 | if (mmu_psize_defs[MMU_PAGE_64K].shift && |
| 319 | cpu_has_feature(CPU_FTR_CI_LARGE_PAGE)) |
| 320 | mmu_virtual_psize = MMU_PAGE_64K; |
| 321 | #endif |
| 322 | |
| 323 | printk(KERN_INFO "Page orders: linear mapping = %d, others = %d\n", |
| 324 | mmu_psize_defs[mmu_linear_psize].shift, |
| 325 | mmu_psize_defs[mmu_virtual_psize].shift); |
| 326 | |
| 327 | #ifdef CONFIG_HUGETLB_PAGE |
| 328 | /* Init large page size. Currently, we pick 16M or 1M depending |
| 329 | * on what is available |
| 330 | */ |
| 331 | if (mmu_psize_defs[MMU_PAGE_16M].shift) |
| 332 | mmu_huge_psize = MMU_PAGE_16M; |
David Gibson | 7d24f0b | 2005-11-07 00:57:52 -0800 | [diff] [blame] | 333 | /* With 4k/4level pagetables, we can't (for now) cope with a |
| 334 | * huge page size < PMD_SIZE */ |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 335 | else if (mmu_psize_defs[MMU_PAGE_1M].shift) |
| 336 | mmu_huge_psize = MMU_PAGE_1M; |
| 337 | |
| 338 | /* Calculate HPAGE_SHIFT and sanity check it */ |
David Gibson | 7d24f0b | 2005-11-07 00:57:52 -0800 | [diff] [blame] | 339 | if (mmu_psize_defs[mmu_huge_psize].shift > MIN_HUGEPTE_SHIFT && |
| 340 | mmu_psize_defs[mmu_huge_psize].shift < SID_SHIFT) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 341 | HPAGE_SHIFT = mmu_psize_defs[mmu_huge_psize].shift; |
| 342 | else |
| 343 | HPAGE_SHIFT = 0; /* No huge pages dude ! */ |
| 344 | #endif /* CONFIG_HUGETLB_PAGE */ |
| 345 | } |
| 346 | |
| 347 | static int __init htab_dt_scan_pftsize(unsigned long node, |
| 348 | const char *uname, int depth, |
| 349 | void *data) |
| 350 | { |
| 351 | char *type = of_get_flat_dt_prop(node, "device_type", NULL); |
| 352 | u32 *prop; |
| 353 | |
| 354 | /* We are scanning "cpu" nodes only */ |
| 355 | if (type == NULL || strcmp(type, "cpu") != 0) |
| 356 | return 0; |
| 357 | |
| 358 | prop = (u32 *)of_get_flat_dt_prop(node, "ibm,pft-size", NULL); |
| 359 | if (prop != NULL) { |
| 360 | /* pft_size[0] is the NUMA CEC cookie */ |
| 361 | ppc64_pft_size = prop[1]; |
| 362 | return 1; |
| 363 | } |
| 364 | return 0; |
| 365 | } |
| 366 | |
| 367 | static unsigned long __init htab_get_table_size(void) |
Paul Mackerras | 3eac8c6 | 2005-10-12 16:58:53 +1000 | [diff] [blame] | 368 | { |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 369 | unsigned long mem_size, rnd_mem_size, pteg_count; |
Paul Mackerras | 3eac8c6 | 2005-10-12 16:58:53 +1000 | [diff] [blame] | 370 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 371 | /* If hash size isn't already provided by the platform, we try to |
Adrian Bunk | 943ffb5 | 2006-01-10 00:10:13 +0100 | [diff] [blame] | 372 | * retrieve it from the device-tree. If it's not there neither, we |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 373 | * calculate it now based on the total RAM size |
Paul Mackerras | 3eac8c6 | 2005-10-12 16:58:53 +1000 | [diff] [blame] | 374 | */ |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 375 | if (ppc64_pft_size == 0) |
| 376 | of_scan_flat_dt(htab_dt_scan_pftsize, NULL); |
Paul Mackerras | 3eac8c6 | 2005-10-12 16:58:53 +1000 | [diff] [blame] | 377 | if (ppc64_pft_size) |
| 378 | return 1UL << ppc64_pft_size; |
| 379 | |
| 380 | /* round mem_size up to next power of 2 */ |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 381 | mem_size = lmb_phys_mem_size(); |
| 382 | rnd_mem_size = 1UL << __ilog2(mem_size); |
| 383 | if (rnd_mem_size < mem_size) |
Paul Mackerras | 3eac8c6 | 2005-10-12 16:58:53 +1000 | [diff] [blame] | 384 | rnd_mem_size <<= 1; |
| 385 | |
| 386 | /* # pages / 2 */ |
| 387 | pteg_count = max(rnd_mem_size >> (12 + 1), 1UL << 11); |
| 388 | |
| 389 | return pteg_count << 7; |
| 390 | } |
| 391 | |
Mike Kravetz | 54b7924 | 2005-11-07 16:25:48 -0800 | [diff] [blame] | 392 | #ifdef CONFIG_MEMORY_HOTPLUG |
| 393 | void create_section_mapping(unsigned long start, unsigned long end) |
| 394 | { |
Michael Ellerman | caf80e5 | 2006-03-21 20:45:51 +1100 | [diff] [blame^] | 395 | BUG_ON(htab_bolt_mapping(start, end, __pa(start), |
Mike Kravetz | 54b7924 | 2005-11-07 16:25:48 -0800 | [diff] [blame] | 396 | _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_COHERENT | PP_RWXX, |
| 397 | mmu_linear_psize)); |
| 398 | } |
| 399 | #endif /* CONFIG_MEMORY_HOTPLUG */ |
| 400 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 401 | void __init htab_initialize(void) |
| 402 | { |
Michael Ellerman | 337a712 | 2006-02-21 17:22:55 +1100 | [diff] [blame] | 403 | unsigned long table; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 404 | unsigned long pteg_count; |
| 405 | unsigned long mode_rw; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 406 | unsigned long base = 0, size = 0; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 407 | int i; |
| 408 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 409 | extern unsigned long tce_alloc_start, tce_alloc_end; |
| 410 | |
| 411 | DBG(" -> htab_initialize()\n"); |
| 412 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 413 | /* Initialize page sizes */ |
| 414 | htab_init_page_sizes(); |
| 415 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 416 | /* |
| 417 | * Calculate the required size of the htab. We want the number of |
| 418 | * PTEGs to equal one half the number of real pages. |
| 419 | */ |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 420 | htab_size_bytes = htab_get_table_size(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 421 | pteg_count = htab_size_bytes >> 7; |
| 422 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 423 | htab_hash_mask = pteg_count - 1; |
| 424 | |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 425 | if (platform_is_lpar()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 426 | /* Using a hypervisor which owns the htab */ |
| 427 | htab_address = NULL; |
| 428 | _SDR1 = 0; |
| 429 | } else { |
| 430 | /* Find storage for the HPT. Must be contiguous in |
| 431 | * the absolute address space. |
| 432 | */ |
| 433 | table = lmb_alloc(htab_size_bytes, htab_size_bytes); |
| 434 | |
| 435 | DBG("Hash table allocated at %lx, size: %lx\n", table, |
| 436 | htab_size_bytes); |
| 437 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 438 | htab_address = abs_to_virt(table); |
| 439 | |
| 440 | /* htab absolute addr + encoded htabsize */ |
| 441 | _SDR1 = table + __ilog2(pteg_count) - 11; |
| 442 | |
| 443 | /* Initialize the HPT with no entries */ |
| 444 | memset((void *)table, 0, htab_size_bytes); |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 445 | |
| 446 | /* Set SDR1 */ |
| 447 | mtspr(SPRN_SDR1, _SDR1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 448 | } |
| 449 | |
Anton Blanchard | 515bae9 | 2005-06-21 17:15:55 -0700 | [diff] [blame] | 450 | mode_rw = _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_COHERENT | PP_RWXX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 451 | |
| 452 | /* On U3 based machines, we need to reserve the DART area and |
| 453 | * _NOT_ map it to avoid cache paradoxes as it's remapped non |
| 454 | * cacheable later on |
| 455 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 456 | |
| 457 | /* create bolted the linear mapping in the hash table */ |
| 458 | for (i=0; i < lmb.memory.cnt; i++) { |
Michael Ellerman | b5666f7 | 2005-12-05 10:24:33 -0600 | [diff] [blame] | 459 | base = (unsigned long)__va(lmb.memory.region[i].base); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 460 | size = lmb.memory.region[i].size; |
| 461 | |
| 462 | DBG("creating mapping for region: %lx : %lx\n", base, size); |
| 463 | |
| 464 | #ifdef CONFIG_U3_DART |
| 465 | /* Do not map the DART space. Fortunately, it will be aligned |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 466 | * in such a way that it will not cross two lmb regions and |
| 467 | * will fit within a single 16Mb page. |
| 468 | * The DART space is assumed to be a full 16Mb region even if |
| 469 | * we only use 2Mb of that space. We will use more of it later |
| 470 | * for AGP GART. We have to use a full 16Mb large page. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 471 | */ |
| 472 | DBG("DART base: %lx\n", dart_tablebase); |
| 473 | |
| 474 | if (dart_tablebase != 0 && dart_tablebase >= base |
| 475 | && dart_tablebase < (base + size)) { |
Michael Ellerman | caf80e5 | 2006-03-21 20:45:51 +1100 | [diff] [blame^] | 476 | unsigned long dart_table_end = dart_tablebase + 16 * MB; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 477 | if (base != dart_tablebase) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 478 | BUG_ON(htab_bolt_mapping(base, dart_tablebase, |
Michael Ellerman | caf80e5 | 2006-03-21 20:45:51 +1100 | [diff] [blame^] | 479 | __pa(base), mode_rw, |
| 480 | mmu_linear_psize)); |
| 481 | if ((base + size) > dart_table_end) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 482 | BUG_ON(htab_bolt_mapping(dart_tablebase+16*MB, |
Michael Ellerman | caf80e5 | 2006-03-21 20:45:51 +1100 | [diff] [blame^] | 483 | base + size, |
| 484 | __pa(dart_table_end), |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 485 | mode_rw, |
| 486 | mmu_linear_psize)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 487 | continue; |
| 488 | } |
| 489 | #endif /* CONFIG_U3_DART */ |
Michael Ellerman | caf80e5 | 2006-03-21 20:45:51 +1100 | [diff] [blame^] | 490 | BUG_ON(htab_bolt_mapping(base, base + size, __pa(base), |
| 491 | mode_rw, mmu_linear_psize)); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 492 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 493 | |
| 494 | /* |
| 495 | * If we have a memory_limit and we've allocated TCEs then we need to |
| 496 | * explicitly map the TCE area at the top of RAM. We also cope with the |
| 497 | * case that the TCEs start below memory_limit. |
| 498 | * tce_alloc_start/end are 16MB aligned so the mapping should work |
| 499 | * for either 4K or 16MB pages. |
| 500 | */ |
| 501 | if (tce_alloc_start) { |
Michael Ellerman | b5666f7 | 2005-12-05 10:24:33 -0600 | [diff] [blame] | 502 | tce_alloc_start = (unsigned long)__va(tce_alloc_start); |
| 503 | tce_alloc_end = (unsigned long)__va(tce_alloc_end); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 504 | |
| 505 | if (base + size >= tce_alloc_start) |
| 506 | tce_alloc_start = base + size + 1; |
| 507 | |
Michael Ellerman | caf80e5 | 2006-03-21 20:45:51 +1100 | [diff] [blame^] | 508 | BUG_ON(htab_bolt_mapping(tce_alloc_start, tce_alloc_end, |
| 509 | __pa(tce_alloc_start), mode_rw, |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 510 | mmu_linear_psize)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 511 | } |
| 512 | |
| 513 | DBG(" <- htab_initialize()\n"); |
| 514 | } |
| 515 | #undef KB |
| 516 | #undef MB |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 517 | |
Anton Blanchard | e597cb32 | 2005-12-29 10:46:29 +1100 | [diff] [blame] | 518 | void htab_initialize_secondary(void) |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 519 | { |
| 520 | if (!platform_is_lpar()) |
| 521 | mtspr(SPRN_SDR1, _SDR1); |
| 522 | } |
| 523 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | /* |
| 525 | * Called by asm hashtable.S for doing lazy icache flush |
| 526 | */ |
| 527 | unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap) |
| 528 | { |
| 529 | struct page *page; |
| 530 | |
Benjamin Herrenschmidt | 76c8e25 | 2005-11-08 11:21:05 +1100 | [diff] [blame] | 531 | if (!pfn_valid(pte_pfn(pte))) |
| 532 | return pp; |
| 533 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 534 | page = pte_page(pte); |
| 535 | |
| 536 | /* page is dirty */ |
| 537 | if (!test_bit(PG_arch_1, &page->flags) && !PageReserved(page)) { |
| 538 | if (trap == 0x400) { |
| 539 | __flush_dcache_icache(page_address(page)); |
| 540 | set_bit(PG_arch_1, &page->flags); |
| 541 | } else |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 542 | pp |= HPTE_R_N; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 543 | } |
| 544 | return pp; |
| 545 | } |
| 546 | |
| 547 | /* Result code is: |
| 548 | * 0 - handled |
| 549 | * 1 - normal page fault |
| 550 | * -1 - critical hash insertion error |
| 551 | */ |
| 552 | int hash_page(unsigned long ea, unsigned long access, unsigned long trap) |
| 553 | { |
| 554 | void *pgdir; |
| 555 | unsigned long vsid; |
| 556 | struct mm_struct *mm; |
| 557 | pte_t *ptep; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 558 | cpumask_t tmp; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 559 | int rc, user_region = 0, local = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 560 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 561 | DBG_LOW("hash_page(ea=%016lx, access=%lx, trap=%lx\n", |
| 562 | ea, access, trap); |
David Gibson | 1f8d419 | 2005-05-05 16:15:13 -0700 | [diff] [blame] | 563 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 564 | if ((ea & ~REGION_MASK) >= PGTABLE_RANGE) { |
| 565 | DBG_LOW(" out of pgtable range !\n"); |
| 566 | return 1; |
| 567 | } |
| 568 | |
| 569 | /* Get region & vsid */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 570 | switch (REGION_ID(ea)) { |
| 571 | case USER_REGION_ID: |
| 572 | user_region = 1; |
| 573 | mm = current->mm; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 574 | if (! mm) { |
| 575 | DBG_LOW(" user region with no mm !\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 576 | return 1; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 577 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 578 | vsid = get_vsid(mm->context.id, ea); |
| 579 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 580 | case VMALLOC_REGION_ID: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 581 | mm = &init_mm; |
| 582 | vsid = get_kernel_vsid(ea); |
| 583 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 584 | default: |
| 585 | /* Not a valid range |
| 586 | * Send the problem up to do_page_fault |
| 587 | */ |
| 588 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 589 | } |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 590 | DBG_LOW(" mm=%p, mm->pgdir=%p, vsid=%016lx\n", mm, mm->pgd, vsid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 591 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 592 | /* Get pgdir */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 593 | pgdir = mm->pgd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 594 | if (pgdir == NULL) |
| 595 | return 1; |
| 596 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 597 | /* Check CPU locality */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 598 | tmp = cpumask_of_cpu(smp_processor_id()); |
| 599 | if (user_region && cpus_equal(mm->cpu_vm_mask, tmp)) |
| 600 | local = 1; |
| 601 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 602 | /* Handle hugepage regions */ |
| 603 | if (unlikely(in_hugepage_area(mm->context, ea))) { |
| 604 | DBG_LOW(" -> huge page !\n"); |
David Gibson | cbf52af | 2005-12-09 14:20:52 +1100 | [diff] [blame] | 605 | return hash_huge_page(mm, access, ea, vsid, local, trap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 606 | } |
| 607 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 608 | /* Get PTE and page size from page tables */ |
| 609 | ptep = find_linux_pte(pgdir, ea); |
| 610 | if (ptep == NULL || !pte_present(*ptep)) { |
| 611 | DBG_LOW(" no PTE !\n"); |
| 612 | return 1; |
| 613 | } |
| 614 | |
| 615 | #ifndef CONFIG_PPC_64K_PAGES |
| 616 | DBG_LOW(" i-pte: %016lx\n", pte_val(*ptep)); |
| 617 | #else |
| 618 | DBG_LOW(" i-pte: %016lx %016lx\n", pte_val(*ptep), |
| 619 | pte_val(*(ptep + PTRS_PER_PTE))); |
| 620 | #endif |
| 621 | /* Pre-check access permissions (will be re-checked atomically |
| 622 | * in __hash_page_XX but this pre-check is a fast path |
| 623 | */ |
| 624 | if (access & ~pte_val(*ptep)) { |
| 625 | DBG_LOW(" no access !\n"); |
| 626 | return 1; |
| 627 | } |
| 628 | |
| 629 | /* Do actual hashing */ |
| 630 | #ifndef CONFIG_PPC_64K_PAGES |
| 631 | rc = __hash_page_4K(ea, access, vsid, ptep, trap, local); |
| 632 | #else |
| 633 | if (mmu_virtual_psize == MMU_PAGE_64K) |
| 634 | rc = __hash_page_64K(ea, access, vsid, ptep, trap, local); |
| 635 | else |
| 636 | rc = __hash_page_4K(ea, access, vsid, ptep, trap, local); |
| 637 | #endif /* CONFIG_PPC_64K_PAGES */ |
| 638 | |
| 639 | #ifndef CONFIG_PPC_64K_PAGES |
| 640 | DBG_LOW(" o-pte: %016lx\n", pte_val(*ptep)); |
| 641 | #else |
| 642 | DBG_LOW(" o-pte: %016lx %016lx\n", pte_val(*ptep), |
| 643 | pte_val(*(ptep + PTRS_PER_PTE))); |
| 644 | #endif |
| 645 | DBG_LOW(" -> rc=%d\n", rc); |
| 646 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 647 | } |
Arnd Bergmann | 67207b9 | 2005-11-15 15:53:48 -0500 | [diff] [blame] | 648 | EXPORT_SYMBOL_GPL(hash_page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 649 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 650 | void hash_preload(struct mm_struct *mm, unsigned long ea, |
| 651 | unsigned long access, unsigned long trap) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 652 | { |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 653 | unsigned long vsid; |
| 654 | void *pgdir; |
| 655 | pte_t *ptep; |
| 656 | cpumask_t mask; |
| 657 | unsigned long flags; |
| 658 | int local = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 659 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 660 | /* We don't want huge pages prefaulted for now |
| 661 | */ |
| 662 | if (unlikely(in_hugepage_area(mm->context, ea))) |
| 663 | return; |
| 664 | |
| 665 | DBG_LOW("hash_preload(mm=%p, mm->pgdir=%p, ea=%016lx, access=%lx," |
| 666 | " trap=%lx\n", mm, mm->pgd, ea, access, trap); |
| 667 | |
| 668 | /* Get PTE, VSID, access mask */ |
| 669 | pgdir = mm->pgd; |
| 670 | if (pgdir == NULL) |
| 671 | return; |
| 672 | ptep = find_linux_pte(pgdir, ea); |
| 673 | if (!ptep) |
| 674 | return; |
| 675 | vsid = get_vsid(mm->context.id, ea); |
| 676 | |
| 677 | /* Hash it in */ |
| 678 | local_irq_save(flags); |
| 679 | mask = cpumask_of_cpu(smp_processor_id()); |
| 680 | if (cpus_equal(mm->cpu_vm_mask, mask)) |
| 681 | local = 1; |
| 682 | #ifndef CONFIG_PPC_64K_PAGES |
| 683 | __hash_page_4K(ea, access, vsid, ptep, trap, local); |
| 684 | #else |
| 685 | if (mmu_virtual_psize == MMU_PAGE_64K) |
| 686 | __hash_page_64K(ea, access, vsid, ptep, trap, local); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 687 | else |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 688 | __hash_page_4K(ea, access, vsid, ptep, trap, local); |
| 689 | #endif /* CONFIG_PPC_64K_PAGES */ |
| 690 | local_irq_restore(flags); |
| 691 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 692 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 693 | void flush_hash_page(unsigned long va, real_pte_t pte, int psize, int local) |
| 694 | { |
| 695 | unsigned long hash, index, shift, hidx, slot; |
| 696 | |
| 697 | DBG_LOW("flush_hash_page(va=%016x)\n", va); |
| 698 | pte_iterate_hashed_subpages(pte, psize, va, index, shift) { |
| 699 | hash = hpt_hash(va, shift); |
| 700 | hidx = __rpte_to_hidx(pte, index); |
| 701 | if (hidx & _PTEIDX_SECONDARY) |
| 702 | hash = ~hash; |
| 703 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; |
| 704 | slot += hidx & _PTEIDX_GROUP_IX; |
| 705 | DBG_LOW(" sub %d: hash=%x, hidx=%x\n", index, slot, hidx); |
| 706 | ppc_md.hpte_invalidate(slot, va, psize, local); |
| 707 | } pte_iterate_hashed_end(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 708 | } |
| 709 | |
Benjamin Herrenschmidt | 61b1a94 | 2005-09-20 13:52:50 +1000 | [diff] [blame] | 710 | void flush_hash_range(unsigned long number, int local) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 711 | { |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 712 | if (ppc_md.flush_hash_range) |
Benjamin Herrenschmidt | 61b1a94 | 2005-09-20 13:52:50 +1000 | [diff] [blame] | 713 | ppc_md.flush_hash_range(number, local); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 714 | else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 715 | int i; |
Benjamin Herrenschmidt | 61b1a94 | 2005-09-20 13:52:50 +1000 | [diff] [blame] | 716 | struct ppc64_tlb_batch *batch = |
| 717 | &__get_cpu_var(ppc64_tlb_batch); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 718 | |
| 719 | for (i = 0; i < number; i++) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 720 | flush_hash_page(batch->vaddr[i], batch->pte[i], |
| 721 | batch->psize, local); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 722 | } |
| 723 | } |
| 724 | |
| 725 | static inline void make_bl(unsigned int *insn_addr, void *func) |
| 726 | { |
| 727 | unsigned long funcp = *((unsigned long *)func); |
| 728 | int offset = funcp - (unsigned long)insn_addr; |
| 729 | |
| 730 | *insn_addr = (unsigned int)(0x48000001 | (offset & 0x03fffffc)); |
| 731 | flush_icache_range((unsigned long)insn_addr, 4+ |
| 732 | (unsigned long)insn_addr); |
| 733 | } |
| 734 | |
| 735 | /* |
| 736 | * low_hash_fault is called when we the low level hash code failed |
| 737 | * to instert a PTE due to an hypervisor error |
| 738 | */ |
| 739 | void low_hash_fault(struct pt_regs *regs, unsigned long address) |
| 740 | { |
| 741 | if (user_mode(regs)) { |
| 742 | siginfo_t info; |
| 743 | |
| 744 | info.si_signo = SIGBUS; |
| 745 | info.si_errno = 0; |
| 746 | info.si_code = BUS_ADRERR; |
| 747 | info.si_addr = (void __user *)address; |
| 748 | force_sig_info(SIGBUS, &info, current); |
| 749 | return; |
| 750 | } |
| 751 | bad_page_fault(regs, address, SIGBUS); |
| 752 | } |
| 753 | |
| 754 | void __init htab_finish_init(void) |
| 755 | { |
| 756 | extern unsigned int *htab_call_hpte_insert1; |
| 757 | extern unsigned int *htab_call_hpte_insert2; |
| 758 | extern unsigned int *htab_call_hpte_remove; |
| 759 | extern unsigned int *htab_call_hpte_updatepp; |
| 760 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 761 | #ifdef CONFIG_PPC_64K_PAGES |
| 762 | extern unsigned int *ht64_call_hpte_insert1; |
| 763 | extern unsigned int *ht64_call_hpte_insert2; |
| 764 | extern unsigned int *ht64_call_hpte_remove; |
| 765 | extern unsigned int *ht64_call_hpte_updatepp; |
| 766 | |
| 767 | make_bl(ht64_call_hpte_insert1, ppc_md.hpte_insert); |
| 768 | make_bl(ht64_call_hpte_insert2, ppc_md.hpte_insert); |
| 769 | make_bl(ht64_call_hpte_remove, ppc_md.hpte_remove); |
| 770 | make_bl(ht64_call_hpte_updatepp, ppc_md.hpte_updatepp); |
| 771 | #endif /* CONFIG_PPC_64K_PAGES */ |
| 772 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 773 | make_bl(htab_call_hpte_insert1, ppc_md.hpte_insert); |
| 774 | make_bl(htab_call_hpte_insert2, ppc_md.hpte_insert); |
| 775 | make_bl(htab_call_hpte_remove, ppc_md.hpte_remove); |
| 776 | make_bl(htab_call_hpte_updatepp, ppc_md.hpte_updatepp); |
| 777 | } |