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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef __X86_64_MMU_CONTEXT_H
2#define __X86_64_MMU_CONTEXT_H
3
4#include <linux/config.h>
5#include <asm/desc.h>
6#include <asm/atomic.h>
7#include <asm/pgalloc.h>
8#include <asm/pda.h>
9#include <asm/pgtable.h>
10#include <asm/tlbflush.h>
11
12/*
13 * possibly do the LDT unload here?
14 */
15int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
16void destroy_context(struct mm_struct *mm);
17
18#ifdef CONFIG_SMP
19
20static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
21{
22 if (read_pda(mmu_state) == TLBSTATE_OK)
23 write_pda(mmu_state, TLBSTATE_LAZY);
24}
25#else
26static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
27{
28}
29#endif
30
31static inline void load_cr3(pgd_t *pgd)
32{
33 asm volatile("movq %0,%%cr3" :: "r" (__pa(pgd)) : "memory");
34}
35
36static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
37 struct task_struct *tsk)
38{
39 unsigned cpu = smp_processor_id();
40 if (likely(prev != next)) {
41 /* stop flush ipis for the previous mm */
42 clear_bit(cpu, &prev->cpu_vm_mask);
43#ifdef CONFIG_SMP
44 write_pda(mmu_state, TLBSTATE_OK);
45 write_pda(active_mm, next);
46#endif
47 set_bit(cpu, &next->cpu_vm_mask);
48 load_cr3(next->pgd);
49
50 if (unlikely(next->context.ldt != prev->context.ldt))
51 load_LDT_nolock(&next->context, cpu);
52 }
53#ifdef CONFIG_SMP
54 else {
55 write_pda(mmu_state, TLBSTATE_OK);
56 if (read_pda(active_mm) != next)
57 out_of_line_bug();
58 if(!test_and_set_bit(cpu, &next->cpu_vm_mask)) {
59 /* We were in lazy tlb mode and leave_mm disabled
60 * tlb flush IPI delivery. We must reload CR3
61 * to make sure to use no freed page tables.
62 */
63 load_cr3(next->pgd);
64 load_LDT_nolock(&next->context, cpu);
65 }
66 }
67#endif
68}
69
70#define deactivate_mm(tsk,mm) do { \
71 load_gs_index(0); \
72 asm volatile("movl %0,%%fs"::"r"(0)); \
73} while(0)
74
75#define activate_mm(prev, next) \
76 switch_mm((prev),(next),NULL)
77
78
79#endif