Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | # drivers/mtd/chips/Kconfig |
Thomas Gleixner | 1f948b4 | 2005-11-07 11:15:37 +0000 | [diff] [blame] | 2 | # $Id: Kconfig,v 1.18 2005/11/07 11:14:22 gleixner Exp $ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | |
| 4 | menu "RAM/ROM/Flash chip drivers" |
| 5 | depends on MTD!=n |
| 6 | |
| 7 | config MTD_CFI |
| 8 | tristate "Detect flash chips by Common Flash Interface (CFI) probe" |
| 9 | depends on MTD |
| 10 | select MTD_GEN_PROBE |
| 11 | help |
| 12 | The Common Flash Interface specification was developed by Intel, |
| 13 | AMD and other flash manufactures that provides a universal method |
| 14 | for probing the capabilities of flash devices. If you wish to |
| 15 | support any device that is CFI-compliant, you need to enable this |
| 16 | option. Visit <http://www.amd.com/products/nvd/overview/cfi.html> |
| 17 | for more information on CFI. |
| 18 | |
| 19 | config MTD_JEDECPROBE |
| 20 | tristate "Detect non-CFI AMD/JEDEC-compatible flash chips" |
| 21 | depends on MTD |
| 22 | select MTD_GEN_PROBE |
| 23 | help |
| 24 | This option enables JEDEC-style probing of flash chips which are not |
| 25 | compatible with the Common Flash Interface, but will use the common |
| 26 | CFI-targetted flash drivers for any chips which are identified which |
| 27 | are in fact compatible in all but the probe method. This actually |
Adrian Bunk | 8917f6f | 2006-03-26 19:15:03 +0200 | [diff] [blame] | 28 | covers most AMD/Fujitsu-compatible chips and also non-CFI |
| 29 | Intel chips. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | |
| 31 | config MTD_GEN_PROBE |
| 32 | tristate |
Adrian Bunk | fd27919 | 2006-01-16 22:13:59 -0800 | [diff] [blame] | 33 | select OBSOLETE_INTERMODULE |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | |
| 35 | config MTD_CFI_ADV_OPTIONS |
| 36 | bool "Flash chip driver advanced configuration options" |
| 37 | depends on MTD_GEN_PROBE |
| 38 | help |
| 39 | If you need to specify a specific endianness for access to flash |
| 40 | chips, or if you wish to reduce the size of the kernel by including |
| 41 | support for only specific arrangements of flash chips, say 'Y'. This |
Thomas Gleixner | 1f948b4 | 2005-11-07 11:15:37 +0000 | [diff] [blame] | 42 | option does not directly affect the code, but will enable other |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | configuration options which allow you to do so. |
| 44 | |
| 45 | If unsure, say 'N'. |
| 46 | |
| 47 | choice |
| 48 | prompt "Flash cmd/query data swapping" |
| 49 | depends on MTD_CFI_ADV_OPTIONS |
| 50 | default MTD_CFI_NOSWAP |
| 51 | |
| 52 | config MTD_CFI_NOSWAP |
| 53 | bool "NO" |
| 54 | ---help--- |
| 55 | This option defines the way in which the CPU attempts to arrange |
| 56 | data bits when writing the 'magic' commands to the chips. Saying |
| 57 | 'NO', which is the default when CONFIG_MTD_CFI_ADV_OPTIONS isn't |
| 58 | enabled, means that the CPU will not do any swapping; the chips |
Thomas Gleixner | 1f948b4 | 2005-11-07 11:15:37 +0000 | [diff] [blame] | 59 | are expected to be wired to the CPU in 'host-endian' form. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | Specific arrangements are possible with the BIG_ENDIAN_BYTE and |
| 61 | LITTLE_ENDIAN_BYTE, if the bytes are reversed. |
| 62 | |
| 63 | If you have a LART, on which the data (and address) lines were |
| 64 | connected in a fashion which ensured that the nets were as short |
| 65 | as possible, resulting in a bit-shuffling which seems utterly |
| 66 | random to the untrained eye, you need the LART_ENDIAN_BYTE option. |
| 67 | |
| 68 | Yes, there really exists something sicker than PDP-endian :) |
| 69 | |
| 70 | config MTD_CFI_BE_BYTE_SWAP |
| 71 | bool "BIG_ENDIAN_BYTE" |
| 72 | |
| 73 | config MTD_CFI_LE_BYTE_SWAP |
| 74 | bool "LITTLE_ENDIAN_BYTE" |
| 75 | |
| 76 | endchoice |
| 77 | |
| 78 | config MTD_CFI_GEOMETRY |
| 79 | bool "Specific CFI Flash geometry selection" |
| 80 | depends on MTD_CFI_ADV_OPTIONS |
| 81 | help |
Thomas Gleixner | 1f948b4 | 2005-11-07 11:15:37 +0000 | [diff] [blame] | 82 | This option does not affect the code directly, but will enable |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | some other configuration options which would allow you to reduce |
Thomas Gleixner | 1f948b4 | 2005-11-07 11:15:37 +0000 | [diff] [blame] | 84 | the size of the kernel by including support for only certain |
| 85 | arrangements of CFI chips. If unsure, say 'N' and all options |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | which are supported by the current code will be enabled. |
| 87 | |
| 88 | config MTD_MAP_BANK_WIDTH_1 |
| 89 | bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY |
| 90 | default y |
| 91 | help |
| 92 | If you wish to support CFI devices on a physical bus which is |
| 93 | 8 bits wide, say 'Y'. |
| 94 | |
| 95 | config MTD_MAP_BANK_WIDTH_2 |
| 96 | bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY |
| 97 | default y |
| 98 | help |
| 99 | If you wish to support CFI devices on a physical bus which is |
| 100 | 16 bits wide, say 'Y'. |
| 101 | |
| 102 | config MTD_MAP_BANK_WIDTH_4 |
| 103 | bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY |
| 104 | default y |
| 105 | help |
| 106 | If you wish to support CFI devices on a physical bus which is |
| 107 | 32 bits wide, say 'Y'. |
| 108 | |
| 109 | config MTD_MAP_BANK_WIDTH_8 |
| 110 | bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY |
| 111 | default n |
| 112 | help |
| 113 | If you wish to support CFI devices on a physical bus which is |
| 114 | 64 bits wide, say 'Y'. |
| 115 | |
| 116 | config MTD_MAP_BANK_WIDTH_16 |
| 117 | bool "Support 128-bit buswidth" if MTD_CFI_GEOMETRY |
| 118 | default n |
| 119 | help |
| 120 | If you wish to support CFI devices on a physical bus which is |
| 121 | 128 bits wide, say 'Y'. |
| 122 | |
| 123 | config MTD_MAP_BANK_WIDTH_32 |
| 124 | bool "Support 256-bit buswidth" if MTD_CFI_GEOMETRY |
| 125 | default n |
| 126 | help |
| 127 | If you wish to support CFI devices on a physical bus which is |
| 128 | 256 bits wide, say 'Y'. |
| 129 | |
| 130 | config MTD_CFI_I1 |
| 131 | bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY |
| 132 | default y |
| 133 | help |
| 134 | If your flash chips are not interleaved - i.e. you only have one |
| 135 | flash chip addressed by each bus cycle, then say 'Y'. |
| 136 | |
| 137 | config MTD_CFI_I2 |
| 138 | bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY |
| 139 | default y |
| 140 | help |
| 141 | If your flash chips are interleaved in pairs - i.e. you have two |
| 142 | flash chips addressed by each bus cycle, then say 'Y'. |
| 143 | |
| 144 | config MTD_CFI_I4 |
| 145 | bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY |
| 146 | default n |
| 147 | help |
| 148 | If your flash chips are interleaved in fours - i.e. you have four |
| 149 | flash chips addressed by each bus cycle, then say 'Y'. |
| 150 | |
| 151 | config MTD_CFI_I8 |
| 152 | bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY |
| 153 | default n |
| 154 | help |
| 155 | If your flash chips are interleaved in eights - i.e. you have eight |
| 156 | flash chips addressed by each bus cycle, then say 'Y'. |
| 157 | |
Nicolas Pitre | f77814d | 2005-02-08 17:11:19 +0000 | [diff] [blame] | 158 | config MTD_OTP |
| 159 | bool "Protection Registers aka one-time programmable (OTP) bits" |
| 160 | depends on MTD_CFI_ADV_OPTIONS |
| 161 | default n |
| 162 | help |
| 163 | This enables support for reading, writing and locking so called |
| 164 | "Protection Registers" present on some flash chips. |
| 165 | A subset of them are pre-programmed at the factory with a |
| 166 | unique set of values. The rest is user-programmable. |
| 167 | |
| 168 | The user-programmable Protection Registers contain one-time |
| 169 | programmable (OTP) bits; when programmed, register bits cannot be |
| 170 | erased. Each Protection Register can be accessed multiple times to |
| 171 | program individual bits, as long as the register remains unlocked. |
| 172 | |
| 173 | Each Protection Register has an associated Lock Register bit. When a |
| 174 | Lock Register bit is programmed, the associated Protection Register |
| 175 | can only be read; it can no longer be programmed. Additionally, |
| 176 | because the Lock Register bits themselves are OTP, when programmed, |
| 177 | Lock Register bits cannot be erased. Therefore, when a Protection |
| 178 | Register is locked, it cannot be unlocked. |
| 179 | |
| 180 | This feature should therefore be used with extreme care. Any mistake |
| 181 | in the programming of OTP bits will waste them. |
| 182 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 183 | config MTD_CFI_INTELEXT |
| 184 | tristate "Support for Intel/Sharp flash chips" |
| 185 | depends on MTD_GEN_PROBE |
| 186 | select MTD_CFI_UTIL |
| 187 | help |
| 188 | The Common Flash Interface defines a number of different command |
| 189 | sets which a CFI-compliant chip may claim to implement. This code |
| 190 | provides support for one of those command sets, used on Intel |
| 191 | StrataFlash and other parts. |
| 192 | |
| 193 | config MTD_CFI_AMDSTD |
| 194 | tristate "Support for AMD/Fujitsu flash chips" |
| 195 | depends on MTD_GEN_PROBE |
| 196 | select MTD_CFI_UTIL |
| 197 | help |
| 198 | The Common Flash Interface defines a number of different command |
| 199 | sets which a CFI-compliant chip may claim to implement. This code |
Thomas Gleixner | 1f948b4 | 2005-11-07 11:15:37 +0000 | [diff] [blame] | 200 | provides support for one of those command sets, used on chips |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 201 | including the AMD Am29LV320. |
| 202 | |
| 203 | config MTD_CFI_AMDSTD_RETRY |
| 204 | int "Retry failed commands (erase/program)" |
| 205 | depends on MTD_CFI_AMDSTD |
| 206 | default "0" |
| 207 | help |
| 208 | Some chips, when attached to a shared bus, don't properly filter |
| 209 | bus traffic that is destined to other devices. This broken |
| 210 | behavior causes erase and program sequences to be aborted when |
| 211 | the sequences are mixed with traffic for other devices. |
| 212 | |
| 213 | SST49LF040 (and related) chips are know to be broken. |
| 214 | |
| 215 | config MTD_CFI_AMDSTD_RETRY_MAX |
| 216 | int "Max retries of failed commands (erase/program)" |
| 217 | depends on MTD_CFI_AMDSTD_RETRY |
| 218 | default "0" |
| 219 | help |
| 220 | If you have an SST49LF040 (or related chip) then this value should |
| 221 | be set to at least 1. This can also be adjusted at driver load |
| 222 | time with the retry_cmd_max module parameter. |
| 223 | |
| 224 | config MTD_CFI_STAA |
| 225 | tristate "Support for ST (Advanced Architecture) flash chips" |
| 226 | depends on MTD_GEN_PROBE |
| 227 | select MTD_CFI_UTIL |
| 228 | help |
| 229 | The Common Flash Interface defines a number of different command |
| 230 | sets which a CFI-compliant chip may claim to implement. This code |
| 231 | provides support for one of those command sets. |
| 232 | |
| 233 | config MTD_CFI_UTIL |
| 234 | tristate |
| 235 | |
| 236 | config MTD_RAM |
| 237 | tristate "Support for RAM chips in bus mapping" |
| 238 | depends on MTD |
| 239 | help |
Thomas Gleixner | 1f948b4 | 2005-11-07 11:15:37 +0000 | [diff] [blame] | 240 | This option enables basic support for RAM chips accessed through |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 241 | a bus mapping driver. |
| 242 | |
| 243 | config MTD_ROM |
| 244 | tristate "Support for ROM chips in bus mapping" |
| 245 | depends on MTD |
| 246 | help |
Thomas Gleixner | 1f948b4 | 2005-11-07 11:15:37 +0000 | [diff] [blame] | 247 | This option enables basic support for ROM chips accessed through |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 248 | a bus mapping driver. |
| 249 | |
| 250 | config MTD_ABSENT |
| 251 | tristate "Support for absent chips in bus mapping" |
| 252 | depends on MTD |
| 253 | help |
| 254 | This option enables support for a dummy probing driver used to |
| 255 | allocated placeholder MTD devices on systems that have socketed |
| 256 | or removable media. Use of this driver as a fallback chip probe |
| 257 | preserves the expected registration order of MTD device nodes on |
| 258 | the system regardless of media presence. Device nodes created |
| 259 | with this driver will return -ENODEV upon access. |
| 260 | |
| 261 | config MTD_OBSOLETE_CHIPS |
Adrian Bunk | 3001aa8 | 2006-01-16 22:13:58 -0800 | [diff] [blame] | 262 | depends on MTD |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | bool "Older (theoretically obsoleted now) drivers for non-CFI chips" |
| 264 | help |
| 265 | This option does not enable any code directly, but will allow you to |
| 266 | select some other chip drivers which are now considered obsolete, |
| 267 | because the generic CONFIG_JEDECPROBE code above should now detect |
| 268 | the chips which are supported by these drivers, and allow the generic |
| 269 | CFI-compatible drivers to drive the chips. Say 'N' here unless you have |
| 270 | already tried the CONFIG_JEDECPROBE method and reported its failure |
| 271 | to the MTD mailing list at <linux-mtd@lists.infradead.org> |
| 272 | |
| 273 | config MTD_AMDSTD |
| 274 | tristate "AMD compatible flash chip support (non-CFI)" |
Adrian Bunk | 3001aa8 | 2006-01-16 22:13:58 -0800 | [diff] [blame] | 275 | depends on MTD && MTD_OBSOLETE_CHIPS && BROKEN |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 276 | help |
| 277 | This option enables support for flash chips using AMD-compatible |
Thomas Gleixner | 1f948b4 | 2005-11-07 11:15:37 +0000 | [diff] [blame] | 278 | commands, including some which are not CFI-compatible and hence |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 279 | cannot be used with the CONFIG_MTD_CFI_AMDSTD option. |
| 280 | |
| 281 | It also works on AMD compatible chips that do conform to CFI. |
| 282 | |
| 283 | config MTD_SHARP |
| 284 | tristate "pre-CFI Sharp chip support" |
| 285 | depends on MTD && MTD_OBSOLETE_CHIPS |
| 286 | help |
| 287 | This option enables support for flash chips using Sharp-compatible |
Thomas Gleixner | 1f948b4 | 2005-11-07 11:15:37 +0000 | [diff] [blame] | 288 | commands, including some which are not CFI-compatible and hence |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 289 | cannot be used with the CONFIG_MTD_CFI_INTELxxx options. |
| 290 | |
| 291 | config MTD_JEDEC |
| 292 | tristate "JEDEC device support" |
Adrian Bunk | 3001aa8 | 2006-01-16 22:13:58 -0800 | [diff] [blame] | 293 | depends on MTD && MTD_OBSOLETE_CHIPS && BROKEN |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 294 | help |
| 295 | Enable older older JEDEC flash interface devices for self |
| 296 | programming flash. It is commonly used in older AMD chips. It is |
| 297 | only called JEDEC because the JEDEC association |
| 298 | <http://www.jedec.org/> distributes the identification codes for the |
| 299 | chips. |
| 300 | |
| 301 | config MTD_XIP |
| 302 | bool "XIP aware MTD support" |
Al Viro | 034d2f5 | 2005-12-19 16:27:59 -0500 | [diff] [blame] | 303 | depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && EXPERIMENTAL && ARCH_MTD_XIP |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | default y if XIP_KERNEL |
| 305 | help |
| 306 | This allows MTD support to work with flash memory which is also |
| 307 | used for XIP purposes. If you're not sure what this is all about |
| 308 | then say N. |
| 309 | |
| 310 | endmenu |
| 311 | |