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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef __SPARC64_PCI_H
2#define __SPARC64_PCI_H
3
4#ifdef __KERNEL__
5
6#include <linux/fs.h>
7#include <linux/mm.h>
8
9/* Can be used to override the logic in pci_scan_bus for skipping
10 * already-configured bus numbers - to be used for buggy BIOSes
11 * or architectures with incomplete PCI setup by the loader.
12 */
13#define pcibios_assign_all_busses() 0
14#define pcibios_scan_all_fns(a, b) 0
15
16#define PCIBIOS_MIN_IO 0UL
17#define PCIBIOS_MIN_MEM 0UL
18
19#define PCI_IRQ_NONE 0xffffffff
20
21static inline void pcibios_set_master(struct pci_dev *dev)
22{
23 /* No special bus mastering setup handling */
24}
25
David Shaohua Lic9c3e452005-04-01 00:07:31 -050026static inline void pcibios_penalize_isa_irq(int irq, int active)
Linus Torvalds1da177e2005-04-16 15:20:36 -070027{
28 /* We don't do dynamic PCI IRQ allocation */
29}
30
31/* Dynamic DMA mapping stuff.
32 */
33
34/* The PCI address space does not equal the physical memory
35 * address space. The networking and block device layers use
36 * this boolean for bounce buffer decisions.
37 */
38#define PCI_DMA_BUS_IS_PHYS (0)
39
40#include <asm/scatterlist.h>
41
42struct pci_dev;
43
David S. Miller8f6a93a2006-02-09 21:32:07 -080044struct pci_iommu_ops {
45 void *(*alloc_consistent)(struct pci_dev *, size_t, dma_addr_t *);
46 void (*free_consistent)(struct pci_dev *, size_t, void *, dma_addr_t);
47 dma_addr_t (*map_single)(struct pci_dev *, void *, size_t, int);
48 void (*unmap_single)(struct pci_dev *, dma_addr_t, size_t, int);
49 int (*map_sg)(struct pci_dev *, struct scatterlist *, int, int);
50 void (*unmap_sg)(struct pci_dev *, struct scatterlist *, int, int);
51 void (*dma_sync_single_for_cpu)(struct pci_dev *, dma_addr_t, size_t, int);
52 void (*dma_sync_sg_for_cpu)(struct pci_dev *, struct scatterlist *, int, int);
53};
54
55extern struct pci_iommu_ops *pci_iommu_ops;
56
Linus Torvalds1da177e2005-04-16 15:20:36 -070057/* Allocate and map kernel buffer using consistent mode DMA for a device.
58 * hwdev should be valid struct pci_dev pointer for PCI devices.
59 */
David S. Miller8f6a93a2006-02-09 21:32:07 -080060static inline void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle)
61{
62 return pci_iommu_ops->alloc_consistent(hwdev, size, dma_handle);
63}
Linus Torvalds1da177e2005-04-16 15:20:36 -070064
65/* Free and unmap a consistent DMA buffer.
66 * cpu_addr is what was returned from pci_alloc_consistent,
67 * size must be the same as what as passed into pci_alloc_consistent,
68 * and likewise dma_addr must be the same as what *dma_addrp was set to.
69 *
70 * References to the memory and mappings associated with cpu_addr/dma_addr
71 * past this call are illegal.
72 */
David S. Miller8f6a93a2006-02-09 21:32:07 -080073static inline void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle)
74{
75 return pci_iommu_ops->free_consistent(hwdev, size, vaddr, dma_handle);
76}
Linus Torvalds1da177e2005-04-16 15:20:36 -070077
78/* Map a single buffer of the indicated size for DMA in streaming mode.
79 * The 32-bit bus address to use is returned.
80 *
81 * Once the device is given the dma address, the device owns this memory
82 * until either pci_unmap_single or pci_dma_sync_single_for_cpu is performed.
83 */
David S. Miller8f6a93a2006-02-09 21:32:07 -080084static inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction)
85{
86 return pci_iommu_ops->map_single(hwdev, ptr, size, direction);
87}
Linus Torvalds1da177e2005-04-16 15:20:36 -070088
89/* Unmap a single streaming mode DMA translation. The dma_addr and size
90 * must match what was provided for in a previous pci_map_single call. All
91 * other usages are undefined.
92 *
93 * After this call, reads by the cpu to the buffer are guaranteed to see
94 * whatever the device wrote there.
95 */
David S. Miller8f6a93a2006-02-09 21:32:07 -080096static inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction)
97{
98 pci_iommu_ops->unmap_single(hwdev, dma_addr, size, direction);
99}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700100
101/* No highmem on sparc64, plus we have an IOMMU, so mapping pages is easy. */
102#define pci_map_page(dev, page, off, size, dir) \
103 pci_map_single(dev, (page_address(page) + (off)), size, dir)
104#define pci_unmap_page(dev,addr,sz,dir) pci_unmap_single(dev,addr,sz,dir)
105
106/* pci_unmap_{single,page} is not a nop, thus... */
107#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
108 dma_addr_t ADDR_NAME;
109#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
110 __u32 LEN_NAME;
111#define pci_unmap_addr(PTR, ADDR_NAME) \
112 ((PTR)->ADDR_NAME)
113#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
114 (((PTR)->ADDR_NAME) = (VAL))
115#define pci_unmap_len(PTR, LEN_NAME) \
116 ((PTR)->LEN_NAME)
117#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
118 (((PTR)->LEN_NAME) = (VAL))
119
120/* Map a set of buffers described by scatterlist in streaming
121 * mode for DMA. This is the scatter-gather version of the
122 * above pci_map_single interface. Here the scatter gather list
123 * elements are each tagged with the appropriate dma address
124 * and length. They are obtained via sg_dma_{address,length}(SG).
125 *
126 * NOTE: An implementation may be able to use a smaller number of
127 * DMA address/length pairs than there are SG table elements.
128 * (for example via virtual mapping capabilities)
129 * The routine returns the number of addr/length pairs actually
130 * used, at most nents.
131 *
132 * Device ownership issues as mentioned above for pci_map_single are
133 * the same here.
134 */
David S. Miller8f6a93a2006-02-09 21:32:07 -0800135static inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction)
136{
137 return pci_iommu_ops->map_sg(hwdev, sg, nents, direction);
138}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139
140/* Unmap a set of streaming mode DMA translations.
141 * Again, cpu read rules concerning calls here are the same as for
142 * pci_unmap_single() above.
143 */
David S. Miller8f6a93a2006-02-09 21:32:07 -0800144static inline void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nhwents, int direction)
145{
146 pci_iommu_ops->unmap_sg(hwdev, sg, nhwents, direction);
147}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148
149/* Make physical memory consistent for a single
150 * streaming mode DMA translation after a transfer.
151 *
152 * If you perform a pci_map_single() but wish to interrogate the
153 * buffer using the cpu, yet do not wish to teardown the PCI dma
154 * mapping, you must call this function before doing so. At the
155 * next point you give the PCI dma address back to the card, you
156 * must first perform a pci_dma_sync_for_device, and then the
157 * device again owns the buffer.
158 */
David S. Miller8f6a93a2006-02-09 21:32:07 -0800159static inline void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction)
160{
161 pci_iommu_ops->dma_sync_single_for_cpu(hwdev, dma_handle, size, direction);
162}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163
164static inline void
165pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle,
166 size_t size, int direction)
167{
168 /* No flushing needed to sync cpu writes to the device. */
169 BUG_ON(direction == PCI_DMA_NONE);
170}
171
172/* Make physical memory consistent for a set of streaming
173 * mode DMA translations after a transfer.
174 *
175 * The same as pci_dma_sync_single_* but for a scatter-gather list,
176 * same rules and usage.
177 */
David S. Miller8f6a93a2006-02-09 21:32:07 -0800178static inline void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction)
179{
180 pci_iommu_ops->dma_sync_sg_for_cpu(hwdev, sg, nelems, direction);
181}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182
183static inline void
184pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg,
185 int nelems, int direction)
186{
187 /* No flushing needed to sync cpu writes to the device. */
188 BUG_ON(direction == PCI_DMA_NONE);
189}
190
191/* Return whether the given PCI device DMA address mask can
192 * be supported properly. For example, if your device can
193 * only drive the low 24-bits during PCI bus mastering, then
194 * you would pass 0x00ffffff as the mask to this function.
195 */
196extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask);
197
198/* PCI IOMMU mapping bypass support. */
199
200/* PCI 64-bit addressing works for all slots on all controller
201 * types on sparc64. However, it requires that the device
202 * can drive enough of the 64 bits.
203 */
204#define PCI64_REQUIRED_MASK (~(dma64_addr_t)0)
205#define PCI64_ADDR_BASE 0xfffc000000000000UL
206
207/* Usage of the pci_dac_foo interfaces is only valid if this
208 * test passes.
209 */
210#define pci_dac_dma_supported(pci_dev, mask) \
211 ((((mask) & PCI64_REQUIRED_MASK) == PCI64_REQUIRED_MASK) ? 1 : 0)
212
213static inline dma64_addr_t
214pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction)
215{
216 return (PCI64_ADDR_BASE +
217 __pa(page_address(page)) + offset);
218}
219
220static inline struct page *
221pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr)
222{
223 unsigned long paddr = (dma_addr & PAGE_MASK) - PCI64_ADDR_BASE;
224
225 return virt_to_page(__va(paddr));
226}
227
228static inline unsigned long
229pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr)
230{
231 return (dma_addr & ~PAGE_MASK);
232}
233
234static inline void
235pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
236{
237 /* DAC cycle addressing does not make use of the
238 * PCI controller's streaming cache, so nothing to do.
239 */
240}
241
242static inline void
243pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
244{
245 /* DAC cycle addressing does not make use of the
246 * PCI controller's streaming cache, so nothing to do.
247 */
248}
249
250#define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0)
251
252static inline int pci_dma_mapping_error(dma_addr_t dma_addr)
253{
254 return (dma_addr == PCI_DMA_ERROR_CODE);
255}
256
Andrew Mortonbb4a61b2005-06-06 23:07:46 -0700257#ifdef CONFIG_PCI
David S. Millere24c2d92005-06-02 12:55:50 -0700258static inline void pci_dma_burst_advice(struct pci_dev *pdev,
259 enum pci_dma_burst_strategy *strat,
260 unsigned long *strategy_parameter)
261{
262 unsigned long cacheline_size;
263 u8 byte;
264
265 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
266 if (byte == 0)
267 cacheline_size = 1024;
268 else
269 cacheline_size = (int) byte * 4;
270
271 *strat = PCI_DMA_BURST_BOUNDARY;
272 *strategy_parameter = cacheline_size;
273}
Andrew Mortonbb4a61b2005-06-06 23:07:46 -0700274#endif
David S. Millere24c2d92005-06-02 12:55:50 -0700275
Linus Torvalds1da177e2005-04-16 15:20:36 -0700276/* Return the index of the PCI controller for device PDEV. */
277
278extern int pci_domain_nr(struct pci_bus *bus);
279static inline int pci_proc_domain(struct pci_bus *bus)
280{
281 return 1;
282}
283
284/* Platform support for /proc/bus/pci/X/Y mmap()s. */
285
286#define HAVE_PCI_MMAP
287#define HAVE_ARCH_PCI_GET_UNMAPPED_AREA
288#define get_pci_unmapped_area get_fb_unmapped_area
289
290extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
291 enum pci_mmap_state mmap_state,
292 int write_combine);
293
294/* Platform specific MWI support. */
295#define HAVE_ARCH_PCI_MWI
296extern int pcibios_prep_mwi(struct pci_dev *dev);
297
298extern void
299pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
300 struct resource *res);
301
302extern void
303pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
304 struct pci_bus_region *region);
305
David S. Miller085ae412005-08-08 13:19:08 -0700306extern struct resource *pcibios_select_root(struct pci_dev *, struct resource *);
307
Linus Torvalds1da177e2005-04-16 15:20:36 -0700308static inline void pcibios_add_platform_entries(struct pci_dev *dev)
309{
310}
311
312static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
313{
314 return PCI_IRQ_NONE;
315}
316
317#endif /* __KERNEL__ */
318
319#endif /* __SPARC64_PCI_H */