Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef _ASM_IA64_SYSTEM_H |
| 2 | #define _ASM_IA64_SYSTEM_H |
| 3 | |
| 4 | /* |
| 5 | * System defines. Note that this is included both from .c and .S |
| 6 | * files, so it does only defines, not any C code. This is based |
| 7 | * on information published in the Processor Abstraction Layer |
| 8 | * and the System Abstraction Layer manual. |
| 9 | * |
| 10 | * Copyright (C) 1998-2003 Hewlett-Packard Co |
| 11 | * David Mosberger-Tang <davidm@hpl.hp.com> |
| 12 | * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com> |
| 13 | * Copyright (C) 1999 Don Dugger <don.dugger@intel.com> |
| 14 | */ |
| 15 | #include <linux/config.h> |
| 16 | |
| 17 | #include <asm/kregs.h> |
| 18 | #include <asm/page.h> |
| 19 | #include <asm/pal.h> |
| 20 | #include <asm/percpu.h> |
| 21 | |
Peter Chubb | 0a41e25 | 2005-08-16 19:54:00 -0700 | [diff] [blame] | 22 | #define GATE_ADDR RGN_BASE(RGN_GATE) |
| 23 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | /* |
| 25 | * 0xa000000000000000+2*PERCPU_PAGE_SIZE |
| 26 | * - 0xa000000000000000+3*PERCPU_PAGE_SIZE remain unmapped (guard page) |
| 27 | */ |
Peter Chubb | 0a41e25 | 2005-08-16 19:54:00 -0700 | [diff] [blame] | 28 | #define KERNEL_START (GATE_ADDR+0x100000000) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | #define PERCPU_ADDR (-PERCPU_PAGE_SIZE) |
| 30 | |
| 31 | #ifndef __ASSEMBLY__ |
| 32 | |
| 33 | #include <linux/kernel.h> |
| 34 | #include <linux/types.h> |
| 35 | |
| 36 | struct pci_vector_struct { |
| 37 | __u16 segment; /* PCI Segment number */ |
| 38 | __u16 bus; /* PCI Bus number */ |
| 39 | __u32 pci_id; /* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */ |
| 40 | __u8 pin; /* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */ |
| 41 | __u32 irq; /* IRQ assigned */ |
| 42 | }; |
| 43 | |
| 44 | extern struct ia64_boot_param { |
| 45 | __u64 command_line; /* physical address of command line arguments */ |
| 46 | __u64 efi_systab; /* physical address of EFI system table */ |
| 47 | __u64 efi_memmap; /* physical address of EFI memory map */ |
| 48 | __u64 efi_memmap_size; /* size of EFI memory map */ |
| 49 | __u64 efi_memdesc_size; /* size of an EFI memory map descriptor */ |
| 50 | __u32 efi_memdesc_version; /* memory descriptor version */ |
| 51 | struct { |
| 52 | __u16 num_cols; /* number of columns on console output device */ |
| 53 | __u16 num_rows; /* number of rows on console output device */ |
| 54 | __u16 orig_x; /* cursor's x position */ |
| 55 | __u16 orig_y; /* cursor's y position */ |
| 56 | } console_info; |
| 57 | __u64 fpswa; /* physical address of the fpswa interface */ |
| 58 | __u64 initrd_start; |
| 59 | __u64 initrd_size; |
| 60 | } *ia64_boot_param; |
| 61 | |
| 62 | /* |
| 63 | * Macros to force memory ordering. In these descriptions, "previous" |
| 64 | * and "subsequent" refer to program order; "visible" means that all |
| 65 | * architecturally visible effects of a memory access have occurred |
| 66 | * (at a minimum, this means the memory has been read or written). |
| 67 | * |
| 68 | * wmb(): Guarantees that all preceding stores to memory- |
| 69 | * like regions are visible before any subsequent |
| 70 | * stores and that all following stores will be |
| 71 | * visible only after all previous stores. |
| 72 | * rmb(): Like wmb(), but for reads. |
| 73 | * mb(): wmb()/rmb() combo, i.e., all previous memory |
| 74 | * accesses are visible before all subsequent |
| 75 | * accesses and vice versa. This is also known as |
| 76 | * a "fence." |
| 77 | * |
| 78 | * Note: "mb()" and its variants cannot be used as a fence to order |
| 79 | * accesses to memory mapped I/O registers. For that, mf.a needs to |
| 80 | * be used. However, we don't want to always use mf.a because (a) |
| 81 | * it's (presumably) much slower than mf and (b) mf.a is supported for |
| 82 | * sequential memory pages only. |
| 83 | */ |
| 84 | #define mb() ia64_mf() |
| 85 | #define rmb() mb() |
| 86 | #define wmb() mb() |
| 87 | #define read_barrier_depends() do { } while(0) |
| 88 | |
| 89 | #ifdef CONFIG_SMP |
| 90 | # define smp_mb() mb() |
| 91 | # define smp_rmb() rmb() |
| 92 | # define smp_wmb() wmb() |
| 93 | # define smp_read_barrier_depends() read_barrier_depends() |
| 94 | #else |
| 95 | # define smp_mb() barrier() |
| 96 | # define smp_rmb() barrier() |
| 97 | # define smp_wmb() barrier() |
| 98 | # define smp_read_barrier_depends() do { } while(0) |
| 99 | #endif |
| 100 | |
| 101 | /* |
| 102 | * XXX check on these---I suspect what Linus really wants here is |
| 103 | * acquire vs release semantics but we can't discuss this stuff with |
| 104 | * Linus just yet. Grrr... |
| 105 | */ |
| 106 | #define set_mb(var, value) do { (var) = (value); mb(); } while (0) |
| 107 | #define set_wmb(var, value) do { (var) = (value); mb(); } while (0) |
| 108 | |
| 109 | #define safe_halt() ia64_pal_halt_light() /* PAL_HALT_LIGHT */ |
| 110 | |
| 111 | /* |
| 112 | * The group barrier in front of the rsm & ssm are necessary to ensure |
| 113 | * that none of the previous instructions in the same group are |
| 114 | * affected by the rsm/ssm. |
| 115 | */ |
| 116 | /* For spinlocks etc */ |
| 117 | |
| 118 | /* |
| 119 | * - clearing psr.i is implicitly serialized (visible by next insn) |
| 120 | * - setting psr.i requires data serialization |
| 121 | * - we need a stop-bit before reading PSR because we sometimes |
| 122 | * write a floating-point register right before reading the PSR |
| 123 | * and that writes to PSR.mfl |
| 124 | */ |
| 125 | #define __local_irq_save(x) \ |
| 126 | do { \ |
| 127 | ia64_stop(); \ |
| 128 | (x) = ia64_getreg(_IA64_REG_PSR); \ |
| 129 | ia64_stop(); \ |
| 130 | ia64_rsm(IA64_PSR_I); \ |
| 131 | } while (0) |
| 132 | |
| 133 | #define __local_irq_disable() \ |
| 134 | do { \ |
| 135 | ia64_stop(); \ |
| 136 | ia64_rsm(IA64_PSR_I); \ |
| 137 | } while (0) |
| 138 | |
| 139 | #define __local_irq_restore(x) ia64_intrin_local_irq_restore((x) & IA64_PSR_I) |
| 140 | |
| 141 | #ifdef CONFIG_IA64_DEBUG_IRQ |
| 142 | |
| 143 | extern unsigned long last_cli_ip; |
| 144 | |
| 145 | # define __save_ip() last_cli_ip = ia64_getreg(_IA64_REG_IP) |
| 146 | |
| 147 | # define local_irq_save(x) \ |
| 148 | do { \ |
| 149 | unsigned long psr; \ |
| 150 | \ |
| 151 | __local_irq_save(psr); \ |
| 152 | if (psr & IA64_PSR_I) \ |
| 153 | __save_ip(); \ |
| 154 | (x) = psr; \ |
| 155 | } while (0) |
| 156 | |
| 157 | # define local_irq_disable() do { unsigned long x; local_irq_save(x); } while (0) |
| 158 | |
| 159 | # define local_irq_restore(x) \ |
| 160 | do { \ |
| 161 | unsigned long old_psr, psr = (x); \ |
| 162 | \ |
| 163 | local_save_flags(old_psr); \ |
| 164 | __local_irq_restore(psr); \ |
| 165 | if ((old_psr & IA64_PSR_I) && !(psr & IA64_PSR_I)) \ |
| 166 | __save_ip(); \ |
| 167 | } while (0) |
| 168 | |
| 169 | #else /* !CONFIG_IA64_DEBUG_IRQ */ |
| 170 | # define local_irq_save(x) __local_irq_save(x) |
| 171 | # define local_irq_disable() __local_irq_disable() |
| 172 | # define local_irq_restore(x) __local_irq_restore(x) |
| 173 | #endif /* !CONFIG_IA64_DEBUG_IRQ */ |
| 174 | |
| 175 | #define local_irq_enable() ({ ia64_stop(); ia64_ssm(IA64_PSR_I); ia64_srlz_d(); }) |
| 176 | #define local_save_flags(flags) ({ ia64_stop(); (flags) = ia64_getreg(_IA64_REG_PSR); }) |
| 177 | |
| 178 | #define irqs_disabled() \ |
| 179 | ({ \ |
| 180 | unsigned long __ia64_id_flags; \ |
| 181 | local_save_flags(__ia64_id_flags); \ |
| 182 | (__ia64_id_flags & IA64_PSR_I) == 0; \ |
| 183 | }) |
| 184 | |
| 185 | #ifdef __KERNEL__ |
| 186 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 187 | #ifdef CONFIG_IA32_SUPPORT |
| 188 | # define IS_IA32_PROCESS(regs) (ia64_psr(regs)->is != 0) |
| 189 | #else |
| 190 | # define IS_IA32_PROCESS(regs) 0 |
| 191 | struct task_struct; |
| 192 | static inline void ia32_save_state(struct task_struct *t __attribute__((unused))){} |
| 193 | static inline void ia32_load_state(struct task_struct *t __attribute__((unused))){} |
| 194 | #endif |
| 195 | |
| 196 | /* |
| 197 | * Context switch from one thread to another. If the two threads have |
| 198 | * different address spaces, schedule() has already taken care of |
| 199 | * switching to the new address space by calling switch_mm(). |
| 200 | * |
| 201 | * Disabling access to the fph partition and the debug-register |
| 202 | * context switch MUST be done before calling ia64_switch_to() since a |
| 203 | * newly created thread returns directly to |
| 204 | * ia64_ret_from_syscall_clear_r8. |
| 205 | */ |
| 206 | extern struct task_struct *ia64_switch_to (void *next_task); |
| 207 | |
| 208 | struct task_struct; |
| 209 | |
| 210 | extern void ia64_save_extra (struct task_struct *task); |
| 211 | extern void ia64_load_extra (struct task_struct *task); |
| 212 | |
| 213 | #ifdef CONFIG_PERFMON |
| 214 | DECLARE_PER_CPU(unsigned long, pfm_syst_info); |
| 215 | # define PERFMON_IS_SYSWIDE() (__get_cpu_var(pfm_syst_info) & 0x1) |
| 216 | #else |
| 217 | # define PERFMON_IS_SYSWIDE() (0) |
| 218 | #endif |
| 219 | |
| 220 | #define IA64_HAS_EXTRA_STATE(t) \ |
| 221 | ((t)->thread.flags & (IA64_THREAD_DBG_VALID|IA64_THREAD_PM_VALID) \ |
Al Viro | 6450578 | 2006-01-12 01:06:06 -0800 | [diff] [blame] | 222 | || IS_IA32_PROCESS(task_pt_regs(t)) || PERFMON_IS_SYSWIDE()) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 223 | |
| 224 | #define __switch_to(prev,next,last) do { \ |
| 225 | if (IA64_HAS_EXTRA_STATE(prev)) \ |
| 226 | ia64_save_extra(prev); \ |
| 227 | if (IA64_HAS_EXTRA_STATE(next)) \ |
| 228 | ia64_load_extra(next); \ |
Al Viro | 6450578 | 2006-01-12 01:06:06 -0800 | [diff] [blame] | 229 | ia64_psr(task_pt_regs(next))->dfh = !ia64_is_local_fpu_owner(next); \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | (last) = ia64_switch_to((next)); \ |
| 231 | } while (0) |
| 232 | |
| 233 | #ifdef CONFIG_SMP |
| 234 | /* |
| 235 | * In the SMP case, we save the fph state when context-switching away from a thread that |
| 236 | * modified fph. This way, when the thread gets scheduled on another CPU, the CPU can |
| 237 | * pick up the state from task->thread.fph, avoiding the complication of having to fetch |
| 238 | * the latest fph state from another CPU. In other words: eager save, lazy restore. |
| 239 | */ |
| 240 | # define switch_to(prev,next,last) do { \ |
Al Viro | 6450578 | 2006-01-12 01:06:06 -0800 | [diff] [blame] | 241 | if (ia64_psr(task_pt_regs(prev))->mfh && ia64_is_local_fpu_owner(prev)) { \ |
| 242 | ia64_psr(task_pt_regs(prev))->mfh = 0; \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | (prev)->thread.flags |= IA64_THREAD_FPH_VALID; \ |
| 244 | __ia64_save_fpu((prev)->thread.fph); \ |
| 245 | } \ |
| 246 | __switch_to(prev, next, last); \ |
Brent Casavant | e08e6c5 | 2006-01-26 15:55:52 -0800 | [diff] [blame] | 247 | /* "next" in old context is "current" in new context */ \ |
| 248 | if (unlikely((current->thread.flags & IA64_THREAD_MIGRATION) && \ |
| 249 | (task_cpu(current) != \ |
| 250 | task_thread_info(current)->last_cpu))) { \ |
| 251 | platform_migrate(current); \ |
| 252 | task_thread_info(current)->last_cpu = task_cpu(current); \ |
| 253 | } \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 254 | } while (0) |
| 255 | #else |
| 256 | # define switch_to(prev,next,last) __switch_to(prev, next, last) |
| 257 | #endif |
| 258 | |
Nick Piggin | 4866cde | 2005-06-25 14:57:23 -0700 | [diff] [blame] | 259 | #define __ARCH_WANT_UNLOCKED_CTXSW |
Chen, Kenneth W | 383f283 | 2005-09-09 13:02:02 -0700 | [diff] [blame] | 260 | #define ARCH_HAS_PREFETCH_SWITCH_STACK |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 261 | #define ia64_platform_is(x) (strcmp(x, platform_name) == 0) |
| 262 | |
| 263 | void cpu_idle_wait(void); |
Ingo Molnar | 4dc7a0b | 2006-01-12 01:05:27 -0800 | [diff] [blame] | 264 | void sched_cacheflush(void); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | |
| 266 | #define arch_align_stack(x) (x) |
| 267 | |
| 268 | #endif /* __KERNEL__ */ |
| 269 | |
| 270 | #endif /* __ASSEMBLY__ */ |
| 271 | |
| 272 | #endif /* _ASM_IA64_SYSTEM_H */ |