Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1 | /* |
Jack Morgenstein | 51a379d | 2008-07-25 10:32:52 -0700 | [diff] [blame] | 2 | * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved. |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 3 | * Copyright (c) 2005, 2006, 2007 Cisco Systems, Inc. All rights reserved. |
| 4 | * |
| 5 | * This software is available to you under a choice of one of two |
| 6 | * licenses. You may choose to be licensed under the terms of the GNU |
| 7 | * General Public License (GPL) Version 2, available from the file |
| 8 | * COPYING in the main directory of this source tree, or the |
| 9 | * OpenIB.org BSD license below: |
| 10 | * |
| 11 | * Redistribution and use in source and binary forms, with or |
| 12 | * without modification, are permitted provided that the following |
| 13 | * conditions are met: |
| 14 | * |
| 15 | * - Redistributions of source code must retain the above |
| 16 | * copyright notice, this list of conditions and the following |
| 17 | * disclaimer. |
| 18 | * |
| 19 | * - Redistributions in binary form must reproduce the above |
| 20 | * copyright notice, this list of conditions and the following |
| 21 | * disclaimer in the documentation and/or other materials |
| 22 | * provided with the distribution. |
| 23 | * |
| 24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 31 | * SOFTWARE. |
| 32 | */ |
| 33 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 34 | #include <linux/interrupt.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 35 | #include <linux/slab.h> |
Paul Gortmaker | ee40fa0 | 2011-05-27 16:14:23 -0400 | [diff] [blame] | 36 | #include <linux/export.h> |
Andrea Righi | 27ac792 | 2008-07-23 21:28:13 -0700 | [diff] [blame] | 37 | #include <linux/mm.h> |
Al Viro | 9cbe05c | 2007-05-15 20:36:30 +0100 | [diff] [blame] | 38 | #include <linux/dma-mapping.h> |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 39 | |
| 40 | #include <linux/mlx4/cmd.h> |
Amir Vadai | d9236c3 | 2012-07-18 22:33:51 +0000 | [diff] [blame] | 41 | #include <linux/cpu_rmap.h> |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 42 | |
| 43 | #include "mlx4.h" |
| 44 | #include "fw.h" |
| 45 | |
| 46 | enum { |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 47 | MLX4_IRQNAME_SIZE = 32 |
Arputham Benjamin | f5f5951 | 2009-09-05 20:24:50 -0700 | [diff] [blame] | 48 | }; |
| 49 | |
| 50 | enum { |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 51 | MLX4_NUM_ASYNC_EQE = 0x100, |
| 52 | MLX4_NUM_SPARE_EQE = 0x80, |
| 53 | MLX4_EQ_ENTRY_SIZE = 0x20 |
| 54 | }; |
| 55 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 56 | #define MLX4_EQ_STATUS_OK ( 0 << 28) |
| 57 | #define MLX4_EQ_STATUS_WRITE_FAIL (10 << 28) |
| 58 | #define MLX4_EQ_OWNER_SW ( 0 << 24) |
| 59 | #define MLX4_EQ_OWNER_HW ( 1 << 24) |
| 60 | #define MLX4_EQ_FLAG_EC ( 1 << 18) |
| 61 | #define MLX4_EQ_FLAG_OI ( 1 << 17) |
| 62 | #define MLX4_EQ_STATE_ARMED ( 9 << 8) |
| 63 | #define MLX4_EQ_STATE_FIRED (10 << 8) |
| 64 | #define MLX4_EQ_STATE_ALWAYS_ARMED (11 << 8) |
| 65 | |
| 66 | #define MLX4_ASYNC_EVENT_MASK ((1ull << MLX4_EVENT_TYPE_PATH_MIG) | \ |
| 67 | (1ull << MLX4_EVENT_TYPE_COMM_EST) | \ |
| 68 | (1ull << MLX4_EVENT_TYPE_SQ_DRAINED) | \ |
| 69 | (1ull << MLX4_EVENT_TYPE_CQ_ERROR) | \ |
| 70 | (1ull << MLX4_EVENT_TYPE_WQ_CATAS_ERROR) | \ |
| 71 | (1ull << MLX4_EVENT_TYPE_EEC_CATAS_ERROR) | \ |
| 72 | (1ull << MLX4_EVENT_TYPE_PATH_MIG_FAILED) | \ |
| 73 | (1ull << MLX4_EVENT_TYPE_WQ_INVAL_REQ_ERROR) | \ |
| 74 | (1ull << MLX4_EVENT_TYPE_WQ_ACCESS_ERROR) | \ |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 75 | (1ull << MLX4_EVENT_TYPE_PORT_CHANGE) | \ |
| 76 | (1ull << MLX4_EVENT_TYPE_ECC_DETECT) | \ |
| 77 | (1ull << MLX4_EVENT_TYPE_SRQ_CATAS_ERROR) | \ |
| 78 | (1ull << MLX4_EVENT_TYPE_SRQ_QP_LAST_WQE) | \ |
| 79 | (1ull << MLX4_EVENT_TYPE_SRQ_LIMIT) | \ |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 80 | (1ull << MLX4_EVENT_TYPE_CMD) | \ |
Yevgeny Petrilin | fe6f700 | 2013-07-28 18:54:21 +0300 | [diff] [blame] | 81 | (1ull << MLX4_EVENT_TYPE_OP_REQUIRED) | \ |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 82 | (1ull << MLX4_EVENT_TYPE_COMM_CHANNEL) | \ |
Jack Morgenstein | 5984be9 | 2012-03-06 15:50:49 +0200 | [diff] [blame] | 83 | (1ull << MLX4_EVENT_TYPE_FLR_EVENT) | \ |
| 84 | (1ull << MLX4_EVENT_TYPE_FATAL_WARNING)) |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 85 | |
Jack Morgenstein | 00f5ce9 | 2012-06-19 11:21:40 +0300 | [diff] [blame] | 86 | static u64 get_async_ev_mask(struct mlx4_dev *dev) |
| 87 | { |
| 88 | u64 async_ev_mask = MLX4_ASYNC_EVENT_MASK; |
| 89 | if (dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV) |
| 90 | async_ev_mask |= (1ull << MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT); |
Jack Morgenstein | be6a6b4 | 2015-01-27 15:57:59 +0200 | [diff] [blame] | 91 | if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RECOVERABLE_ERROR_EVENT) |
| 92 | async_ev_mask |= (1ull << MLX4_EVENT_TYPE_RECOVERABLE_ERROR_EVENT); |
Jack Morgenstein | 00f5ce9 | 2012-06-19 11:21:40 +0300 | [diff] [blame] | 93 | |
| 94 | return async_ev_mask; |
| 95 | } |
| 96 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 97 | static void eq_set_ci(struct mlx4_eq *eq, int req_not) |
| 98 | { |
| 99 | __raw_writel((__force u32) cpu_to_be32((eq->cons_index & 0xffffff) | |
| 100 | req_not << 31), |
| 101 | eq->doorbell); |
| 102 | /* We still want ordering, just not swabbing, so add a barrier */ |
| 103 | mb(); |
| 104 | } |
| 105 | |
Ido Shamay | 43c816c | 2014-09-18 11:51:00 +0300 | [diff] [blame] | 106 | static struct mlx4_eqe *get_eqe(struct mlx4_eq *eq, u32 entry, u8 eqe_factor, |
| 107 | u8 eqe_size) |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 108 | { |
Or Gerlitz | 08ff323 | 2012-10-21 14:59:24 +0000 | [diff] [blame] | 109 | /* (entry & (eq->nent - 1)) gives us a cyclic array */ |
Ido Shamay | 43c816c | 2014-09-18 11:51:00 +0300 | [diff] [blame] | 110 | unsigned long offset = (entry & (eq->nent - 1)) * eqe_size; |
| 111 | /* CX3 is capable of extending the EQE from 32 to 64 bytes with |
| 112 | * strides of 64B,128B and 256B. |
| 113 | * When 64B EQE is used, the first (in the lower addresses) |
Or Gerlitz | 08ff323 | 2012-10-21 14:59:24 +0000 | [diff] [blame] | 114 | * 32 bytes in the 64 byte EQE are reserved and the next 32 bytes |
| 115 | * contain the legacy EQE information. |
Ido Shamay | 43c816c | 2014-09-18 11:51:00 +0300 | [diff] [blame] | 116 | * In all other cases, the first 32B contains the legacy EQE info. |
Or Gerlitz | 08ff323 | 2012-10-21 14:59:24 +0000 | [diff] [blame] | 117 | */ |
| 118 | return eq->page_list[offset / PAGE_SIZE].buf + (offset + (eqe_factor ? MLX4_EQ_ENTRY_SIZE : 0)) % PAGE_SIZE; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 119 | } |
| 120 | |
Ido Shamay | 43c816c | 2014-09-18 11:51:00 +0300 | [diff] [blame] | 121 | static struct mlx4_eqe *next_eqe_sw(struct mlx4_eq *eq, u8 eqe_factor, u8 size) |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 122 | { |
Ido Shamay | 43c816c | 2014-09-18 11:51:00 +0300 | [diff] [blame] | 123 | struct mlx4_eqe *eqe = get_eqe(eq, eq->cons_index, eqe_factor, size); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 124 | return !!(eqe->owner & 0x80) ^ !!(eq->cons_index & eq->nent) ? NULL : eqe; |
| 125 | } |
| 126 | |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 127 | static struct mlx4_eqe *next_slave_event_eqe(struct mlx4_slave_event_eq *slave_eq) |
| 128 | { |
| 129 | struct mlx4_eqe *eqe = |
| 130 | &slave_eq->event_eqe[slave_eq->cons & (SLAVE_EVENT_EQ_SIZE - 1)]; |
| 131 | return (!!(eqe->owner & 0x80) ^ |
| 132 | !!(slave_eq->cons & SLAVE_EVENT_EQ_SIZE)) ? |
| 133 | eqe : NULL; |
| 134 | } |
| 135 | |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 136 | void mlx4_gen_slave_eqe(struct work_struct *work) |
| 137 | { |
| 138 | struct mlx4_mfunc_master_ctx *master = |
| 139 | container_of(work, struct mlx4_mfunc_master_ctx, |
| 140 | slave_event_work); |
| 141 | struct mlx4_mfunc *mfunc = |
| 142 | container_of(master, struct mlx4_mfunc, master); |
| 143 | struct mlx4_priv *priv = container_of(mfunc, struct mlx4_priv, mfunc); |
| 144 | struct mlx4_dev *dev = &priv->dev; |
| 145 | struct mlx4_slave_event_eq *slave_eq = &mfunc->master.slave_eq; |
| 146 | struct mlx4_eqe *eqe; |
| 147 | u8 slave; |
Or Gerlitz | 74d4943 | 2015-05-21 15:14:07 +0300 | [diff] [blame] | 148 | int i, phys_port, slave_port; |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 149 | |
| 150 | for (eqe = next_slave_event_eqe(slave_eq); eqe; |
| 151 | eqe = next_slave_event_eqe(slave_eq)) { |
| 152 | slave = eqe->slave_id; |
| 153 | |
Moni Shoua | 8d80d04 | 2015-12-06 18:07:39 +0200 | [diff] [blame] | 154 | if (eqe->type == MLX4_EVENT_TYPE_PORT_CHANGE && |
| 155 | eqe->subtype == MLX4_PORT_CHANGE_SUBTYPE_DOWN && |
| 156 | mlx4_is_bonded(dev)) { |
| 157 | struct mlx4_port_cap port_cap; |
| 158 | |
| 159 | if (!mlx4_QUERY_PORT(dev, 1, &port_cap) && port_cap.link_state) |
| 160 | goto consume; |
| 161 | |
| 162 | if (!mlx4_QUERY_PORT(dev, 2, &port_cap) && port_cap.link_state) |
| 163 | goto consume; |
| 164 | } |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 165 | /* All active slaves need to receive the event */ |
| 166 | if (slave == ALL_SLAVES) { |
Jack Morgenstein | bffb023 | 2015-03-24 15:18:39 +0200 | [diff] [blame] | 167 | for (i = 0; i <= dev->persist->num_vfs; i++) { |
Or Gerlitz | 74d4943 | 2015-05-21 15:14:07 +0300 | [diff] [blame] | 168 | phys_port = 0; |
| 169 | if (eqe->type == MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT && |
| 170 | eqe->subtype == MLX4_DEV_PMC_SUBTYPE_PORT_INFO) { |
| 171 | phys_port = eqe->event.port_mgmt_change.port; |
| 172 | slave_port = mlx4_phys_to_slave_port(dev, i, phys_port); |
| 173 | if (slave_port < 0) /* VF doesn't have this port */ |
| 174 | continue; |
| 175 | eqe->event.port_mgmt_change.port = slave_port; |
| 176 | } |
Jack Morgenstein | bffb023 | 2015-03-24 15:18:39 +0200 | [diff] [blame] | 177 | if (mlx4_GEN_EQE(dev, i, eqe)) |
| 178 | mlx4_warn(dev, "Failed to generate event for slave %d\n", |
| 179 | i); |
Or Gerlitz | 74d4943 | 2015-05-21 15:14:07 +0300 | [diff] [blame] | 180 | if (phys_port) |
| 181 | eqe->event.port_mgmt_change.port = phys_port; |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 182 | } |
| 183 | } else { |
| 184 | if (mlx4_GEN_EQE(dev, slave, eqe)) |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 185 | mlx4_warn(dev, "Failed to generate event for slave %d\n", |
| 186 | slave); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 187 | } |
Moni Shoua | 8d80d04 | 2015-12-06 18:07:39 +0200 | [diff] [blame] | 188 | consume: |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 189 | ++slave_eq->cons; |
| 190 | } |
| 191 | } |
| 192 | |
| 193 | |
| 194 | static void slave_event(struct mlx4_dev *dev, u8 slave, struct mlx4_eqe *eqe) |
| 195 | { |
| 196 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 197 | struct mlx4_slave_event_eq *slave_eq = &priv->mfunc.master.slave_eq; |
Jack Morgenstein | 992e8e6e | 2012-08-03 08:40:54 +0000 | [diff] [blame] | 198 | struct mlx4_eqe *s_eqe; |
| 199 | unsigned long flags; |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 200 | |
Jack Morgenstein | 992e8e6e | 2012-08-03 08:40:54 +0000 | [diff] [blame] | 201 | spin_lock_irqsave(&slave_eq->event_lock, flags); |
| 202 | s_eqe = &slave_eq->event_eqe[slave_eq->prod & (SLAVE_EVENT_EQ_SIZE - 1)]; |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 203 | if ((!!(s_eqe->owner & 0x80)) ^ |
| 204 | (!!(slave_eq->prod & SLAVE_EVENT_EQ_SIZE))) { |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 205 | mlx4_warn(dev, "Master failed to generate an EQE for slave: %d. No free EQE on slave events queue\n", |
| 206 | slave); |
Jack Morgenstein | 992e8e6e | 2012-08-03 08:40:54 +0000 | [diff] [blame] | 207 | spin_unlock_irqrestore(&slave_eq->event_lock, flags); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 208 | return; |
| 209 | } |
| 210 | |
Carol L Soto | c02b050 | 2015-10-27 17:36:20 +0200 | [diff] [blame] | 211 | memcpy(s_eqe, eqe, sizeof(struct mlx4_eqe) - 1); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 212 | s_eqe->slave_id = slave; |
| 213 | /* ensure all information is written before setting the ownersip bit */ |
Alexander Duyck | 12b3375 | 2015-04-08 18:49:36 -0700 | [diff] [blame] | 214 | dma_wmb(); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 215 | s_eqe->owner = !!(slave_eq->prod & SLAVE_EVENT_EQ_SIZE) ? 0x0 : 0x80; |
| 216 | ++slave_eq->prod; |
| 217 | |
| 218 | queue_work(priv->mfunc.master.comm_wq, |
| 219 | &priv->mfunc.master.slave_event_work); |
Jack Morgenstein | 992e8e6e | 2012-08-03 08:40:54 +0000 | [diff] [blame] | 220 | spin_unlock_irqrestore(&slave_eq->event_lock, flags); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 221 | } |
| 222 | |
| 223 | static void mlx4_slave_event(struct mlx4_dev *dev, int slave, |
| 224 | struct mlx4_eqe *eqe) |
| 225 | { |
| 226 | struct mlx4_priv *priv = mlx4_priv(dev); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 227 | |
Jack Morgenstein | bffb023 | 2015-03-24 15:18:39 +0200 | [diff] [blame] | 228 | if (slave < 0 || slave > dev->persist->num_vfs || |
| 229 | slave == dev->caps.function || |
| 230 | !priv->mfunc.master.slave_state[slave].active) |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 231 | return; |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 232 | |
| 233 | slave_event(dev, slave, eqe); |
| 234 | } |
| 235 | |
Or Gerlitz | db9777e | 2015-06-02 10:29:48 +0300 | [diff] [blame] | 236 | #if defined(CONFIG_SMP) |
Ido Shamay | de16180 | 2015-05-31 09:30:17 +0300 | [diff] [blame] | 237 | static void mlx4_set_eq_affinity_hint(struct mlx4_priv *priv, int vec) |
| 238 | { |
| 239 | int hint_err; |
| 240 | struct mlx4_dev *dev = &priv->dev; |
| 241 | struct mlx4_eq *eq = &priv->eq_table.eq[vec]; |
| 242 | |
| 243 | if (!eq->affinity_mask || cpumask_empty(eq->affinity_mask)) |
| 244 | return; |
| 245 | |
| 246 | hint_err = irq_set_affinity_hint(eq->irq, eq->affinity_mask); |
| 247 | if (hint_err) |
| 248 | mlx4_warn(dev, "irq_set_affinity_hint failed, err %d\n", hint_err); |
| 249 | } |
Or Gerlitz | db9777e | 2015-06-02 10:29:48 +0300 | [diff] [blame] | 250 | #endif |
Ido Shamay | de16180 | 2015-05-31 09:30:17 +0300 | [diff] [blame] | 251 | |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 252 | int mlx4_gen_pkey_eqe(struct mlx4_dev *dev, int slave, u8 port) |
| 253 | { |
| 254 | struct mlx4_eqe eqe; |
| 255 | |
| 256 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 257 | struct mlx4_slave_state *s_slave = &priv->mfunc.master.slave_state[slave]; |
| 258 | |
| 259 | if (!s_slave->active) |
| 260 | return 0; |
| 261 | |
| 262 | memset(&eqe, 0, sizeof eqe); |
| 263 | |
| 264 | eqe.type = MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT; |
| 265 | eqe.subtype = MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE; |
Or Gerlitz | 74d4943 | 2015-05-21 15:14:07 +0300 | [diff] [blame] | 266 | eqe.event.port_mgmt_change.port = mlx4_phys_to_slave_port(dev, slave, port); |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 267 | |
| 268 | return mlx4_GEN_EQE(dev, slave, &eqe); |
| 269 | } |
| 270 | EXPORT_SYMBOL(mlx4_gen_pkey_eqe); |
| 271 | |
| 272 | int mlx4_gen_guid_change_eqe(struct mlx4_dev *dev, int slave, u8 port) |
| 273 | { |
| 274 | struct mlx4_eqe eqe; |
| 275 | |
| 276 | /*don't send if we don't have the that slave */ |
Yishai Hadas | 872bf2f | 2015-01-25 16:59:35 +0200 | [diff] [blame] | 277 | if (dev->persist->num_vfs < slave) |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 278 | return 0; |
| 279 | memset(&eqe, 0, sizeof eqe); |
| 280 | |
| 281 | eqe.type = MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT; |
| 282 | eqe.subtype = MLX4_DEV_PMC_SUBTYPE_GUID_INFO; |
Or Gerlitz | 74d4943 | 2015-05-21 15:14:07 +0300 | [diff] [blame] | 283 | eqe.event.port_mgmt_change.port = mlx4_phys_to_slave_port(dev, slave, port); |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 284 | |
| 285 | return mlx4_GEN_EQE(dev, slave, &eqe); |
| 286 | } |
| 287 | EXPORT_SYMBOL(mlx4_gen_guid_change_eqe); |
| 288 | |
| 289 | int mlx4_gen_port_state_change_eqe(struct mlx4_dev *dev, int slave, u8 port, |
| 290 | u8 port_subtype_change) |
| 291 | { |
| 292 | struct mlx4_eqe eqe; |
Or Gerlitz | 74d4943 | 2015-05-21 15:14:07 +0300 | [diff] [blame] | 293 | u8 slave_port = mlx4_phys_to_slave_port(dev, slave, port); |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 294 | |
| 295 | /*don't send if we don't have the that slave */ |
Yishai Hadas | 872bf2f | 2015-01-25 16:59:35 +0200 | [diff] [blame] | 296 | if (dev->persist->num_vfs < slave) |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 297 | return 0; |
| 298 | memset(&eqe, 0, sizeof eqe); |
| 299 | |
| 300 | eqe.type = MLX4_EVENT_TYPE_PORT_CHANGE; |
| 301 | eqe.subtype = port_subtype_change; |
Or Gerlitz | 74d4943 | 2015-05-21 15:14:07 +0300 | [diff] [blame] | 302 | eqe.event.port_change.port = cpu_to_be32(slave_port << 28); |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 303 | |
| 304 | mlx4_dbg(dev, "%s: sending: %d to slave: %d on port: %d\n", __func__, |
| 305 | port_subtype_change, slave, port); |
| 306 | return mlx4_GEN_EQE(dev, slave, &eqe); |
| 307 | } |
| 308 | EXPORT_SYMBOL(mlx4_gen_port_state_change_eqe); |
| 309 | |
| 310 | enum slave_port_state mlx4_get_slave_port_state(struct mlx4_dev *dev, int slave, u8 port) |
| 311 | { |
| 312 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 313 | struct mlx4_slave_state *s_state = priv->mfunc.master.slave_state; |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 314 | struct mlx4_active_ports actv_ports = mlx4_get_active_ports(dev, slave); |
| 315 | |
| 316 | if (slave >= dev->num_slaves || port > dev->caps.num_ports || |
| 317 | port <= 0 || !test_bit(port - 1, actv_ports.ports)) { |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 318 | pr_err("%s: Error: asking for slave:%d, port:%d\n", |
| 319 | __func__, slave, port); |
| 320 | return SLAVE_PORT_DOWN; |
| 321 | } |
| 322 | return s_state[slave].port_state[port]; |
| 323 | } |
| 324 | EXPORT_SYMBOL(mlx4_get_slave_port_state); |
| 325 | |
| 326 | static int mlx4_set_slave_port_state(struct mlx4_dev *dev, int slave, u8 port, |
| 327 | enum slave_port_state state) |
| 328 | { |
| 329 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 330 | struct mlx4_slave_state *s_state = priv->mfunc.master.slave_state; |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 331 | struct mlx4_active_ports actv_ports = mlx4_get_active_ports(dev, slave); |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 332 | |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 333 | if (slave >= dev->num_slaves || port > dev->caps.num_ports || |
| 334 | port <= 0 || !test_bit(port - 1, actv_ports.ports)) { |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 335 | pr_err("%s: Error: asking for slave:%d, port:%d\n", |
| 336 | __func__, slave, port); |
| 337 | return -1; |
| 338 | } |
| 339 | s_state[slave].port_state[port] = state; |
| 340 | |
| 341 | return 0; |
| 342 | } |
| 343 | |
| 344 | static void set_all_slave_state(struct mlx4_dev *dev, u8 port, int event) |
| 345 | { |
| 346 | int i; |
| 347 | enum slave_port_gen_event gen_event; |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 348 | struct mlx4_slaves_pport slaves_pport = mlx4_phys_to_slaves_pport(dev, |
| 349 | port); |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 350 | |
Yishai Hadas | 872bf2f | 2015-01-25 16:59:35 +0200 | [diff] [blame] | 351 | for (i = 0; i < dev->persist->num_vfs + 1; i++) |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 352 | if (test_bit(i, slaves_pport.slaves)) |
| 353 | set_and_calc_slave_port_state(dev, i, port, |
| 354 | event, &gen_event); |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 355 | } |
| 356 | /************************************************************************** |
| 357 | The function get as input the new event to that port, |
| 358 | and according to the prev state change the slave's port state. |
| 359 | The events are: |
| 360 | MLX4_PORT_STATE_DEV_EVENT_PORT_DOWN, |
| 361 | MLX4_PORT_STATE_DEV_EVENT_PORT_UP |
| 362 | MLX4_PORT_STATE_IB_EVENT_GID_VALID |
| 363 | MLX4_PORT_STATE_IB_EVENT_GID_INVALID |
| 364 | ***************************************************************************/ |
| 365 | int set_and_calc_slave_port_state(struct mlx4_dev *dev, int slave, |
| 366 | u8 port, int event, |
| 367 | enum slave_port_gen_event *gen_event) |
| 368 | { |
| 369 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 370 | struct mlx4_slave_state *ctx = NULL; |
| 371 | unsigned long flags; |
| 372 | int ret = -1; |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 373 | struct mlx4_active_ports actv_ports = mlx4_get_active_ports(dev, slave); |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 374 | enum slave_port_state cur_state = |
| 375 | mlx4_get_slave_port_state(dev, slave, port); |
| 376 | |
| 377 | *gen_event = SLAVE_PORT_GEN_EVENT_NONE; |
| 378 | |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 379 | if (slave >= dev->num_slaves || port > dev->caps.num_ports || |
| 380 | port <= 0 || !test_bit(port - 1, actv_ports.ports)) { |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 381 | pr_err("%s: Error: asking for slave:%d, port:%d\n", |
| 382 | __func__, slave, port); |
| 383 | return ret; |
| 384 | } |
| 385 | |
| 386 | ctx = &priv->mfunc.master.slave_state[slave]; |
| 387 | spin_lock_irqsave(&ctx->lock, flags); |
| 388 | |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 389 | switch (cur_state) { |
| 390 | case SLAVE_PORT_DOWN: |
| 391 | if (MLX4_PORT_STATE_DEV_EVENT_PORT_UP == event) |
| 392 | mlx4_set_slave_port_state(dev, slave, port, |
| 393 | SLAVE_PENDING_UP); |
| 394 | break; |
| 395 | case SLAVE_PENDING_UP: |
| 396 | if (MLX4_PORT_STATE_DEV_EVENT_PORT_DOWN == event) |
| 397 | mlx4_set_slave_port_state(dev, slave, port, |
| 398 | SLAVE_PORT_DOWN); |
| 399 | else if (MLX4_PORT_STATE_IB_PORT_STATE_EVENT_GID_VALID == event) { |
| 400 | mlx4_set_slave_port_state(dev, slave, port, |
| 401 | SLAVE_PORT_UP); |
| 402 | *gen_event = SLAVE_PORT_GEN_EVENT_UP; |
| 403 | } |
| 404 | break; |
| 405 | case SLAVE_PORT_UP: |
| 406 | if (MLX4_PORT_STATE_DEV_EVENT_PORT_DOWN == event) { |
| 407 | mlx4_set_slave_port_state(dev, slave, port, |
| 408 | SLAVE_PORT_DOWN); |
| 409 | *gen_event = SLAVE_PORT_GEN_EVENT_DOWN; |
| 410 | } else if (MLX4_PORT_STATE_IB_EVENT_GID_INVALID == |
| 411 | event) { |
| 412 | mlx4_set_slave_port_state(dev, slave, port, |
| 413 | SLAVE_PENDING_UP); |
| 414 | *gen_event = SLAVE_PORT_GEN_EVENT_DOWN; |
| 415 | } |
| 416 | break; |
| 417 | default: |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 418 | pr_err("%s: BUG!!! UNKNOWN state: slave:%d, port:%d\n", |
| 419 | __func__, slave, port); |
| 420 | goto out; |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 421 | } |
| 422 | ret = mlx4_get_slave_port_state(dev, slave, port); |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 423 | |
| 424 | out: |
| 425 | spin_unlock_irqrestore(&ctx->lock, flags); |
| 426 | return ret; |
| 427 | } |
| 428 | |
| 429 | EXPORT_SYMBOL(set_and_calc_slave_port_state); |
| 430 | |
| 431 | int mlx4_gen_slaves_port_mgt_ev(struct mlx4_dev *dev, u8 port, int attr) |
| 432 | { |
| 433 | struct mlx4_eqe eqe; |
| 434 | |
| 435 | memset(&eqe, 0, sizeof eqe); |
| 436 | |
| 437 | eqe.type = MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT; |
| 438 | eqe.subtype = MLX4_DEV_PMC_SUBTYPE_PORT_INFO; |
| 439 | eqe.event.port_mgmt_change.port = port; |
| 440 | eqe.event.port_mgmt_change.params.port_info.changed_attr = |
| 441 | cpu_to_be32((u32) attr); |
| 442 | |
| 443 | slave_event(dev, ALL_SLAVES, &eqe); |
| 444 | return 0; |
| 445 | } |
| 446 | EXPORT_SYMBOL(mlx4_gen_slaves_port_mgt_ev); |
| 447 | |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 448 | void mlx4_master_handle_slave_flr(struct work_struct *work) |
| 449 | { |
| 450 | struct mlx4_mfunc_master_ctx *master = |
| 451 | container_of(work, struct mlx4_mfunc_master_ctx, |
| 452 | slave_flr_event_work); |
| 453 | struct mlx4_mfunc *mfunc = |
| 454 | container_of(master, struct mlx4_mfunc, master); |
| 455 | struct mlx4_priv *priv = |
| 456 | container_of(mfunc, struct mlx4_priv, mfunc); |
| 457 | struct mlx4_dev *dev = &priv->dev; |
| 458 | struct mlx4_slave_state *slave_state = priv->mfunc.master.slave_state; |
| 459 | int i; |
| 460 | int err; |
Jack Morgenstein | 311f813 | 2012-11-27 16:24:30 +0000 | [diff] [blame] | 461 | unsigned long flags; |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 462 | |
| 463 | mlx4_dbg(dev, "mlx4_handle_slave_flr\n"); |
| 464 | |
| 465 | for (i = 0 ; i < dev->num_slaves; i++) { |
| 466 | |
| 467 | if (MLX4_COMM_CMD_FLR == slave_state[i].last_cmd) { |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 468 | mlx4_dbg(dev, "mlx4_handle_slave_flr: clean slave: %d\n", |
| 469 | i); |
Yishai Hadas | 55ad359 | 2015-01-25 16:59:42 +0200 | [diff] [blame] | 470 | /* In case of 'Reset flow' FLR can be generated for |
| 471 | * a slave before mlx4_load_one is done. |
| 472 | * make sure interface is up before trying to delete |
| 473 | * slave resources which weren't allocated yet. |
| 474 | */ |
| 475 | if (dev->persist->interface_state & |
| 476 | MLX4_INTERFACE_STATE_UP) |
| 477 | mlx4_delete_all_resources_for_slave(dev, i); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 478 | /*return the slave to running mode*/ |
Jack Morgenstein | 311f813 | 2012-11-27 16:24:30 +0000 | [diff] [blame] | 479 | spin_lock_irqsave(&priv->mfunc.master.slave_state_lock, flags); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 480 | slave_state[i].last_cmd = MLX4_COMM_CMD_RESET; |
| 481 | slave_state[i].is_slave_going_down = 0; |
Jack Morgenstein | 311f813 | 2012-11-27 16:24:30 +0000 | [diff] [blame] | 482 | spin_unlock_irqrestore(&priv->mfunc.master.slave_state_lock, flags); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 483 | /*notify the FW:*/ |
| 484 | err = mlx4_cmd(dev, 0, i, 0, MLX4_CMD_INFORM_FLR_DONE, |
| 485 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); |
| 486 | if (err) |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 487 | mlx4_warn(dev, "Failed to notify FW on FLR done (slave:%d)\n", |
| 488 | i); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 489 | } |
| 490 | } |
| 491 | } |
| 492 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 493 | static int mlx4_eq_int(struct mlx4_dev *dev, struct mlx4_eq *eq) |
| 494 | { |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 495 | struct mlx4_priv *priv = mlx4_priv(dev); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 496 | struct mlx4_eqe *eqe; |
Matan Barak | 3dca0f42 | 2014-12-11 10:57:53 +0200 | [diff] [blame] | 497 | int cqn = -1; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 498 | int eqes_found = 0; |
| 499 | int set_ci = 0; |
Yevgeny Petrilin | 27bf91d | 2009-03-18 19:45:11 -0700 | [diff] [blame] | 500 | int port; |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 501 | int slave = 0; |
| 502 | int ret; |
| 503 | u32 flr_slave; |
| 504 | u8 update_slave_state; |
| 505 | int i; |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 506 | enum slave_port_gen_event gen_event; |
Jack Morgenstein | 311f813 | 2012-11-27 16:24:30 +0000 | [diff] [blame] | 507 | unsigned long flags; |
Rony Efraim | 948e306 | 2013-06-13 13:19:11 +0300 | [diff] [blame] | 508 | struct mlx4_vport_state *s_info; |
Ido Shamay | 43c816c | 2014-09-18 11:51:00 +0300 | [diff] [blame] | 509 | int eqe_size = dev->caps.eqe_size; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 510 | |
Ido Shamay | 43c816c | 2014-09-18 11:51:00 +0300 | [diff] [blame] | 511 | while ((eqe = next_eqe_sw(eq, dev->caps.eqe_factor, eqe_size))) { |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 512 | /* |
| 513 | * Make sure we read EQ entry contents after we've |
| 514 | * checked the ownership bit. |
| 515 | */ |
Alexander Duyck | 12b3375 | 2015-04-08 18:49:36 -0700 | [diff] [blame] | 516 | dma_rmb(); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 517 | |
| 518 | switch (eqe->type) { |
| 519 | case MLX4_EVENT_TYPE_COMP: |
| 520 | cqn = be32_to_cpu(eqe->event.comp.cqn) & 0xffffff; |
| 521 | mlx4_cq_completion(dev, cqn); |
| 522 | break; |
| 523 | |
| 524 | case MLX4_EVENT_TYPE_PATH_MIG: |
| 525 | case MLX4_EVENT_TYPE_COMM_EST: |
| 526 | case MLX4_EVENT_TYPE_SQ_DRAINED: |
| 527 | case MLX4_EVENT_TYPE_SRQ_QP_LAST_WQE: |
| 528 | case MLX4_EVENT_TYPE_WQ_CATAS_ERROR: |
| 529 | case MLX4_EVENT_TYPE_PATH_MIG_FAILED: |
| 530 | case MLX4_EVENT_TYPE_WQ_INVAL_REQ_ERROR: |
| 531 | case MLX4_EVENT_TYPE_WQ_ACCESS_ERROR: |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 532 | mlx4_dbg(dev, "event %d arrived\n", eqe->type); |
| 533 | if (mlx4_is_master(dev)) { |
| 534 | /* forward only to slave owning the QP */ |
| 535 | ret = mlx4_get_slave_from_resource_id(dev, |
| 536 | RES_QP, |
| 537 | be32_to_cpu(eqe->event.qp.qpn) |
| 538 | & 0xffffff, &slave); |
| 539 | if (ret && ret != -ENOENT) { |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 540 | mlx4_dbg(dev, "QP event %02x(%02x) on EQ %d at index %u: could not get slave id (%d)\n", |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 541 | eqe->type, eqe->subtype, |
| 542 | eq->eqn, eq->cons_index, ret); |
| 543 | break; |
| 544 | } |
| 545 | |
| 546 | if (!ret && slave != dev->caps.function) { |
| 547 | mlx4_slave_event(dev, slave, eqe); |
| 548 | break; |
| 549 | } |
| 550 | |
| 551 | } |
| 552 | mlx4_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & |
| 553 | 0xffffff, eqe->type); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 554 | break; |
| 555 | |
| 556 | case MLX4_EVENT_TYPE_SRQ_LIMIT: |
Jack Morgenstein | e0debf9 | 2013-04-21 15:09:59 +0000 | [diff] [blame] | 557 | mlx4_dbg(dev, "%s: MLX4_EVENT_TYPE_SRQ_LIMIT\n", |
| 558 | __func__); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 559 | case MLX4_EVENT_TYPE_SRQ_CATAS_ERROR: |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 560 | if (mlx4_is_master(dev)) { |
| 561 | /* forward only to slave owning the SRQ */ |
| 562 | ret = mlx4_get_slave_from_resource_id(dev, |
| 563 | RES_SRQ, |
| 564 | be32_to_cpu(eqe->event.srq.srqn) |
| 565 | & 0xffffff, |
| 566 | &slave); |
| 567 | if (ret && ret != -ENOENT) { |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 568 | mlx4_warn(dev, "SRQ event %02x(%02x) on EQ %d at index %u: could not get slave id (%d)\n", |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 569 | eqe->type, eqe->subtype, |
| 570 | eq->eqn, eq->cons_index, ret); |
| 571 | break; |
| 572 | } |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 573 | mlx4_warn(dev, "%s: slave:%d, srq_no:0x%x, event: %02x(%02x)\n", |
| 574 | __func__, slave, |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 575 | be32_to_cpu(eqe->event.srq.srqn), |
| 576 | eqe->type, eqe->subtype); |
| 577 | |
| 578 | if (!ret && slave != dev->caps.function) { |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 579 | mlx4_warn(dev, "%s: sending event %02x(%02x) to slave:%d\n", |
| 580 | __func__, eqe->type, |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 581 | eqe->subtype, slave); |
| 582 | mlx4_slave_event(dev, slave, eqe); |
| 583 | break; |
| 584 | } |
| 585 | } |
| 586 | mlx4_srq_event(dev, be32_to_cpu(eqe->event.srq.srqn) & |
| 587 | 0xffffff, eqe->type); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 588 | break; |
| 589 | |
| 590 | case MLX4_EVENT_TYPE_CMD: |
| 591 | mlx4_cmd_event(dev, |
| 592 | be16_to_cpu(eqe->event.cmd.token), |
| 593 | eqe->event.cmd.status, |
| 594 | be64_to_cpu(eqe->event.cmd.out_param)); |
| 595 | break; |
| 596 | |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 597 | case MLX4_EVENT_TYPE_PORT_CHANGE: { |
| 598 | struct mlx4_slaves_pport slaves_port; |
Yevgeny Petrilin | 27bf91d | 2009-03-18 19:45:11 -0700 | [diff] [blame] | 599 | port = be32_to_cpu(eqe->event.port_change.port) >> 28; |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 600 | slaves_port = mlx4_phys_to_slaves_pport(dev, port); |
Yevgeny Petrilin | 27bf91d | 2009-03-18 19:45:11 -0700 | [diff] [blame] | 601 | if (eqe->subtype == MLX4_PORT_CHANGE_SUBTYPE_DOWN) { |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 602 | mlx4_dispatch_event(dev, MLX4_DEV_EVENT_PORT_DOWN, |
Yevgeny Petrilin | 27bf91d | 2009-03-18 19:45:11 -0700 | [diff] [blame] | 603 | port); |
| 604 | mlx4_priv(dev)->sense.do_sense_port[port] = 1; |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 605 | if (!mlx4_is_master(dev)) |
| 606 | break; |
Yishai Hadas | 872bf2f | 2015-01-25 16:59:35 +0200 | [diff] [blame] | 607 | for (i = 0; i < dev->persist->num_vfs + 1; |
| 608 | i++) { |
Moni Shoua | 8d80d04 | 2015-12-06 18:07:39 +0200 | [diff] [blame] | 609 | int reported_port = mlx4_is_bonded(dev) ? 1 : mlx4_phys_to_slave_port(dev, i, port); |
| 610 | |
| 611 | if (!test_bit(i, slaves_port.slaves) && !mlx4_is_bonded(dev)) |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 612 | continue; |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 613 | if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) { |
| 614 | if (i == mlx4_master_func_num(dev)) |
| 615 | continue; |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 616 | mlx4_dbg(dev, "%s: Sending MLX4_PORT_CHANGE_SUBTYPE_DOWN to slave: %d, port:%d\n", |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 617 | __func__, i, port); |
Jack Morgenstein | 1c1bf34 | 2015-07-22 16:53:47 +0300 | [diff] [blame] | 618 | s_info = &priv->mfunc.master.vf_oper[i].vport[port].state; |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 619 | if (IFLA_VF_LINK_STATE_AUTO == s_info->link_state) { |
| 620 | eqe->event.port_change.port = |
| 621 | cpu_to_be32( |
| 622 | (be32_to_cpu(eqe->event.port_change.port) & 0xFFFFFFF) |
Moni Shoua | 8d80d04 | 2015-12-06 18:07:39 +0200 | [diff] [blame] | 623 | | (reported_port << 28)); |
Rony Efraim | 948e306 | 2013-06-13 13:19:11 +0300 | [diff] [blame] | 624 | mlx4_slave_event(dev, i, eqe); |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 625 | } |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 626 | } else { /* IB port */ |
| 627 | set_and_calc_slave_port_state(dev, i, port, |
| 628 | MLX4_PORT_STATE_DEV_EVENT_PORT_DOWN, |
| 629 | &gen_event); |
| 630 | /*we can be in pending state, then do not send port_down event*/ |
| 631 | if (SLAVE_PORT_GEN_EVENT_DOWN == gen_event) { |
| 632 | if (i == mlx4_master_func_num(dev)) |
| 633 | continue; |
Or Gerlitz | 74d4943 | 2015-05-21 15:14:07 +0300 | [diff] [blame] | 634 | eqe->event.port_change.port = |
| 635 | cpu_to_be32( |
| 636 | (be32_to_cpu(eqe->event.port_change.port) & 0xFFFFFFF) |
| 637 | | (mlx4_phys_to_slave_port(dev, i, port) << 28)); |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 638 | mlx4_slave_event(dev, i, eqe); |
| 639 | } |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 640 | } |
| 641 | } |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 642 | } else { |
| 643 | mlx4_dispatch_event(dev, MLX4_DEV_EVENT_PORT_UP, port); |
| 644 | |
| 645 | mlx4_priv(dev)->sense.do_sense_port[port] = 0; |
| 646 | |
| 647 | if (!mlx4_is_master(dev)) |
| 648 | break; |
| 649 | if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) |
Yishai Hadas | 872bf2f | 2015-01-25 16:59:35 +0200 | [diff] [blame] | 650 | for (i = 0; |
| 651 | i < dev->persist->num_vfs + 1; |
| 652 | i++) { |
Moni Shoua | 8d80d04 | 2015-12-06 18:07:39 +0200 | [diff] [blame] | 653 | int reported_port = mlx4_is_bonded(dev) ? 1 : mlx4_phys_to_slave_port(dev, i, port); |
| 654 | |
| 655 | if (!test_bit(i, slaves_port.slaves) && !mlx4_is_bonded(dev)) |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 656 | continue; |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 657 | if (i == mlx4_master_func_num(dev)) |
| 658 | continue; |
Jack Morgenstein | 1c1bf34 | 2015-07-22 16:53:47 +0300 | [diff] [blame] | 659 | s_info = &priv->mfunc.master.vf_oper[i].vport[port].state; |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 660 | if (IFLA_VF_LINK_STATE_AUTO == s_info->link_state) { |
| 661 | eqe->event.port_change.port = |
| 662 | cpu_to_be32( |
| 663 | (be32_to_cpu(eqe->event.port_change.port) & 0xFFFFFFF) |
Moni Shoua | 8d80d04 | 2015-12-06 18:07:39 +0200 | [diff] [blame] | 664 | | (reported_port << 28)); |
Rony Efraim | 948e306 | 2013-06-13 13:19:11 +0300 | [diff] [blame] | 665 | mlx4_slave_event(dev, i, eqe); |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 666 | } |
Jack Morgenstein | 993c401 | 2012-08-03 08:40:48 +0000 | [diff] [blame] | 667 | } |
| 668 | else /* IB port */ |
| 669 | /* port-up event will be sent to a slave when the |
| 670 | * slave's alias-guid is set. This is done in alias_GUID.c |
| 671 | */ |
| 672 | set_all_slave_state(dev, port, MLX4_DEV_EVENT_PORT_UP); |
Yevgeny Petrilin | 27bf91d | 2009-03-18 19:45:11 -0700 | [diff] [blame] | 673 | } |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 674 | break; |
Matan Barak | 449fc48 | 2014-03-19 18:11:52 +0200 | [diff] [blame] | 675 | } |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 676 | |
| 677 | case MLX4_EVENT_TYPE_CQ_ERROR: |
| 678 | mlx4_warn(dev, "CQ %s on CQN %06x\n", |
| 679 | eqe->event.cq_err.syndrome == 1 ? |
| 680 | "overrun" : "access violation", |
| 681 | be32_to_cpu(eqe->event.cq_err.cqn) & 0xffffff); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 682 | if (mlx4_is_master(dev)) { |
| 683 | ret = mlx4_get_slave_from_resource_id(dev, |
| 684 | RES_CQ, |
| 685 | be32_to_cpu(eqe->event.cq_err.cqn) |
| 686 | & 0xffffff, &slave); |
| 687 | if (ret && ret != -ENOENT) { |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 688 | mlx4_dbg(dev, "CQ event %02x(%02x) on EQ %d at index %u: could not get slave id (%d)\n", |
| 689 | eqe->type, eqe->subtype, |
| 690 | eq->eqn, eq->cons_index, ret); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 691 | break; |
| 692 | } |
| 693 | |
| 694 | if (!ret && slave != dev->caps.function) { |
| 695 | mlx4_slave_event(dev, slave, eqe); |
| 696 | break; |
| 697 | } |
| 698 | } |
| 699 | mlx4_cq_event(dev, |
| 700 | be32_to_cpu(eqe->event.cq_err.cqn) |
| 701 | & 0xffffff, |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 702 | eqe->type); |
| 703 | break; |
| 704 | |
| 705 | case MLX4_EVENT_TYPE_EQ_OVERFLOW: |
| 706 | mlx4_warn(dev, "EQ overrun on EQN %d\n", eq->eqn); |
| 707 | break; |
| 708 | |
Yevgeny Petrilin | fe6f700 | 2013-07-28 18:54:21 +0300 | [diff] [blame] | 709 | case MLX4_EVENT_TYPE_OP_REQUIRED: |
| 710 | atomic_inc(&priv->opreq_count); |
| 711 | /* FW commands can't be executed from interrupt context |
| 712 | * working in deferred task |
| 713 | */ |
| 714 | queue_work(mlx4_wq, &priv->opreq_task); |
| 715 | break; |
| 716 | |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 717 | case MLX4_EVENT_TYPE_COMM_CHANNEL: |
| 718 | if (!mlx4_is_master(dev)) { |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 719 | mlx4_warn(dev, "Received comm channel event for non master device\n"); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 720 | break; |
| 721 | } |
| 722 | memcpy(&priv->mfunc.master.comm_arm_bit_vector, |
| 723 | eqe->event.comm_channel_arm.bit_vec, |
| 724 | sizeof eqe->event.comm_channel_arm.bit_vec); |
| 725 | queue_work(priv->mfunc.master.comm_wq, |
| 726 | &priv->mfunc.master.comm_work); |
| 727 | break; |
| 728 | |
| 729 | case MLX4_EVENT_TYPE_FLR_EVENT: |
| 730 | flr_slave = be32_to_cpu(eqe->event.flr_event.slave_id); |
| 731 | if (!mlx4_is_master(dev)) { |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 732 | mlx4_warn(dev, "Non-master function received FLR event\n"); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 733 | break; |
| 734 | } |
| 735 | |
| 736 | mlx4_dbg(dev, "FLR event for slave: %d\n", flr_slave); |
| 737 | |
Jack Morgenstein | 30f7c73 | 2012-05-30 09:14:50 +0000 | [diff] [blame] | 738 | if (flr_slave >= dev->num_slaves) { |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 739 | mlx4_warn(dev, |
| 740 | "Got FLR for unknown function: %d\n", |
| 741 | flr_slave); |
| 742 | update_slave_state = 0; |
| 743 | } else |
| 744 | update_slave_state = 1; |
| 745 | |
Jack Morgenstein | 311f813 | 2012-11-27 16:24:30 +0000 | [diff] [blame] | 746 | spin_lock_irqsave(&priv->mfunc.master.slave_state_lock, flags); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 747 | if (update_slave_state) { |
| 748 | priv->mfunc.master.slave_state[flr_slave].active = false; |
| 749 | priv->mfunc.master.slave_state[flr_slave].last_cmd = MLX4_COMM_CMD_FLR; |
| 750 | priv->mfunc.master.slave_state[flr_slave].is_slave_going_down = 1; |
| 751 | } |
Jack Morgenstein | 311f813 | 2012-11-27 16:24:30 +0000 | [diff] [blame] | 752 | spin_unlock_irqrestore(&priv->mfunc.master.slave_state_lock, flags); |
Yishai Hadas | a0667a8 | 2015-03-18 14:56:04 +0200 | [diff] [blame] | 753 | mlx4_dispatch_event(dev, MLX4_DEV_EVENT_SLAVE_SHUTDOWN, |
| 754 | flr_slave); |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 755 | queue_work(priv->mfunc.master.comm_wq, |
| 756 | &priv->mfunc.master.slave_flr_event_work); |
| 757 | break; |
Jack Morgenstein | 5984be9 | 2012-03-06 15:50:49 +0200 | [diff] [blame] | 758 | |
| 759 | case MLX4_EVENT_TYPE_FATAL_WARNING: |
| 760 | if (eqe->subtype == MLX4_FATAL_WARNING_SUBTYPE_WARMING) { |
| 761 | if (mlx4_is_master(dev)) |
| 762 | for (i = 0; i < dev->num_slaves; i++) { |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 763 | mlx4_dbg(dev, "%s: Sending MLX4_FATAL_WARNING_SUBTYPE_WARMING to slave: %d\n", |
| 764 | __func__, i); |
Jack Morgenstein | 5984be9 | 2012-03-06 15:50:49 +0200 | [diff] [blame] | 765 | if (i == dev->caps.function) |
| 766 | continue; |
| 767 | mlx4_slave_event(dev, i, eqe); |
| 768 | } |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 769 | mlx4_err(dev, "Temperature Threshold was reached! Threshold: %d celsius degrees; Current Temperature: %d\n", |
| 770 | be16_to_cpu(eqe->event.warming.warning_threshold), |
| 771 | be16_to_cpu(eqe->event.warming.current_temperature)); |
Jack Morgenstein | 5984be9 | 2012-03-06 15:50:49 +0200 | [diff] [blame] | 772 | } else |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 773 | mlx4_warn(dev, "Unhandled event FATAL WARNING (%02x), subtype %02x on EQ %d at index %u. owner=%x, nent=0x%x, slave=%x, ownership=%s\n", |
Jack Morgenstein | 5984be9 | 2012-03-06 15:50:49 +0200 | [diff] [blame] | 774 | eqe->type, eqe->subtype, eq->eqn, |
| 775 | eq->cons_index, eqe->owner, eq->nent, |
| 776 | eqe->slave_id, |
| 777 | !!(eqe->owner & 0x80) ^ |
| 778 | !!(eq->cons_index & eq->nent) ? "HW" : "SW"); |
| 779 | |
| 780 | break; |
| 781 | |
Jack Morgenstein | 00f5ce9 | 2012-06-19 11:21:40 +0300 | [diff] [blame] | 782 | case MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT: |
| 783 | mlx4_dispatch_event(dev, MLX4_DEV_EVENT_PORT_MGMT_CHANGE, |
| 784 | (unsigned long) eqe); |
| 785 | break; |
| 786 | |
Jack Morgenstein | be6a6b4 | 2015-01-27 15:57:59 +0200 | [diff] [blame] | 787 | case MLX4_EVENT_TYPE_RECOVERABLE_ERROR_EVENT: |
| 788 | switch (eqe->subtype) { |
| 789 | case MLX4_RECOVERABLE_ERROR_EVENT_SUBTYPE_BAD_CABLE: |
| 790 | mlx4_warn(dev, "Bad cable detected on port %u\n", |
| 791 | eqe->event.bad_cable.port); |
| 792 | break; |
| 793 | case MLX4_RECOVERABLE_ERROR_EVENT_SUBTYPE_UNSUPPORTED_CABLE: |
| 794 | mlx4_warn(dev, "Unsupported cable detected\n"); |
| 795 | break; |
| 796 | default: |
| 797 | mlx4_dbg(dev, |
| 798 | "Unhandled recoverable error event detected: %02x(%02x) on EQ %d at index %u. owner=%x, nent=0x%x, ownership=%s\n", |
| 799 | eqe->type, eqe->subtype, eq->eqn, |
| 800 | eq->cons_index, eqe->owner, eq->nent, |
| 801 | !!(eqe->owner & 0x80) ^ |
| 802 | !!(eq->cons_index & eq->nent) ? "HW" : "SW"); |
| 803 | break; |
| 804 | } |
| 805 | break; |
| 806 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 807 | case MLX4_EVENT_TYPE_EEC_CATAS_ERROR: |
| 808 | case MLX4_EVENT_TYPE_ECC_DETECT: |
| 809 | default: |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 810 | mlx4_warn(dev, "Unhandled event %02x(%02x) on EQ %d at index %u. owner=%x, nent=0x%x, slave=%x, ownership=%s\n", |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 811 | eqe->type, eqe->subtype, eq->eqn, |
| 812 | eq->cons_index, eqe->owner, eq->nent, |
| 813 | eqe->slave_id, |
| 814 | !!(eqe->owner & 0x80) ^ |
| 815 | !!(eq->cons_index & eq->nent) ? "HW" : "SW"); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 816 | break; |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 817 | }; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 818 | |
| 819 | ++eq->cons_index; |
| 820 | eqes_found = 1; |
| 821 | ++set_ci; |
| 822 | |
| 823 | /* |
| 824 | * The HCA will think the queue has overflowed if we |
| 825 | * don't tell it we've been processing events. We |
| 826 | * create our EQs with MLX4_NUM_SPARE_EQE extra |
| 827 | * entries, so we must update our consumer index at |
| 828 | * least that often. |
| 829 | */ |
| 830 | if (unlikely(set_ci >= MLX4_NUM_SPARE_EQE)) { |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 831 | eq_set_ci(eq, 0); |
| 832 | set_ci = 0; |
| 833 | } |
| 834 | } |
| 835 | |
| 836 | eq_set_ci(eq, 1); |
| 837 | |
Matan Barak | 3dca0f42 | 2014-12-11 10:57:53 +0200 | [diff] [blame] | 838 | /* cqn is 24bit wide but is initialized such that its higher bits |
| 839 | * are ones too. Thus, if we got any event, cqn's high bits should be off |
| 840 | * and we need to schedule the tasklet. |
| 841 | */ |
| 842 | if (!(cqn & ~0xffffff)) |
| 843 | tasklet_schedule(&eq->tasklet_ctx.task); |
| 844 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 845 | return eqes_found; |
| 846 | } |
| 847 | |
| 848 | static irqreturn_t mlx4_interrupt(int irq, void *dev_ptr) |
| 849 | { |
| 850 | struct mlx4_dev *dev = dev_ptr; |
| 851 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 852 | int work = 0; |
| 853 | int i; |
| 854 | |
| 855 | writel(priv->eq_table.clr_mask, priv->eq_table.clr_int); |
| 856 | |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 857 | for (i = 0; i < dev->caps.num_comp_vectors + 1; ++i) |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 858 | work |= mlx4_eq_int(dev, &priv->eq_table.eq[i]); |
| 859 | |
| 860 | return IRQ_RETVAL(work); |
| 861 | } |
| 862 | |
| 863 | static irqreturn_t mlx4_msi_x_interrupt(int irq, void *eq_ptr) |
| 864 | { |
| 865 | struct mlx4_eq *eq = eq_ptr; |
| 866 | struct mlx4_dev *dev = eq->dev; |
| 867 | |
| 868 | mlx4_eq_int(dev, eq); |
| 869 | |
| 870 | /* MSI-X vectors always belong to us */ |
| 871 | return IRQ_HANDLED; |
| 872 | } |
| 873 | |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 874 | int mlx4_MAP_EQ_wrapper(struct mlx4_dev *dev, int slave, |
| 875 | struct mlx4_vhcr *vhcr, |
| 876 | struct mlx4_cmd_mailbox *inbox, |
| 877 | struct mlx4_cmd_mailbox *outbox, |
| 878 | struct mlx4_cmd_info *cmd) |
| 879 | { |
| 880 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 881 | struct mlx4_slave_event_eq_info *event_eq = |
Marcel Apfelbaum | 803143f | 2012-01-19 09:45:46 +0000 | [diff] [blame] | 882 | priv->mfunc.master.slave_state[slave].event_eq; |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 883 | u32 in_modifier = vhcr->in_modifier; |
Moshe Lazer | c101c81 | 2013-03-21 05:55:51 +0000 | [diff] [blame] | 884 | u32 eqn = in_modifier & 0x3FF; |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 885 | u64 in_param = vhcr->in_param; |
| 886 | int err = 0; |
Marcel Apfelbaum | 803143f | 2012-01-19 09:45:46 +0000 | [diff] [blame] | 887 | int i; |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 888 | |
| 889 | if (slave == dev->caps.function) |
| 890 | err = mlx4_cmd(dev, in_param, (in_modifier & 0x80000000) | eqn, |
| 891 | 0, MLX4_CMD_MAP_EQ, MLX4_CMD_TIME_CLASS_B, |
| 892 | MLX4_CMD_NATIVE); |
Marcel Apfelbaum | 803143f | 2012-01-19 09:45:46 +0000 | [diff] [blame] | 893 | if (!err) |
| 894 | for (i = 0; i < MLX4_EVENT_TYPES_NUM; ++i) |
| 895 | if (in_param & (1LL << i)) |
| 896 | event_eq[i].eqn = in_modifier >> 31 ? -1 : eqn; |
| 897 | |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 898 | return err; |
| 899 | } |
| 900 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 901 | static int mlx4_MAP_EQ(struct mlx4_dev *dev, u64 event_mask, int unmap, |
| 902 | int eq_num) |
| 903 | { |
| 904 | return mlx4_cmd(dev, event_mask, (unmap << 31) | eq_num, |
Jack Morgenstein | f9baff5 | 2011-12-13 04:10:51 +0000 | [diff] [blame] | 905 | 0, MLX4_CMD_MAP_EQ, MLX4_CMD_TIME_CLASS_B, |
| 906 | MLX4_CMD_WRAPPED); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 907 | } |
| 908 | |
| 909 | static int mlx4_SW2HW_EQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, |
| 910 | int eq_num) |
| 911 | { |
Marcel Apfelbaum | eb41049 | 2012-01-19 09:45:19 +0000 | [diff] [blame] | 912 | return mlx4_cmd(dev, mailbox->dma, eq_num, 0, |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 913 | MLX4_CMD_SW2HW_EQ, MLX4_CMD_TIME_CLASS_A, |
Jack Morgenstein | f9baff5 | 2011-12-13 04:10:51 +0000 | [diff] [blame] | 914 | MLX4_CMD_WRAPPED); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 915 | } |
| 916 | |
Jack Morgenstein | 30a5da5 | 2015-01-27 15:58:03 +0200 | [diff] [blame] | 917 | static int mlx4_HW2SW_EQ(struct mlx4_dev *dev, int eq_num) |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 918 | { |
Jack Morgenstein | 30a5da5 | 2015-01-27 15:58:03 +0200 | [diff] [blame] | 919 | return mlx4_cmd(dev, 0, eq_num, 1, MLX4_CMD_HW2SW_EQ, |
| 920 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 921 | } |
| 922 | |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 923 | static int mlx4_num_eq_uar(struct mlx4_dev *dev) |
| 924 | { |
| 925 | /* |
| 926 | * Each UAR holds 4 EQ doorbells. To figure out how many UARs |
| 927 | * we need to map, take the difference of highest index and |
| 928 | * the lowest index we'll use and add 1. |
| 929 | */ |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 930 | return (dev->caps.num_comp_vectors + 1 + dev->caps.reserved_eqs) / 4 - |
| 931 | dev->caps.reserved_eqs / 4 + 1; |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 932 | } |
| 933 | |
Roland Dreier | 3d73c28 | 2007-10-10 15:43:54 -0700 | [diff] [blame] | 934 | static void __iomem *mlx4_get_eq_uar(struct mlx4_dev *dev, struct mlx4_eq *eq) |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 935 | { |
| 936 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 937 | int index; |
| 938 | |
| 939 | index = eq->eqn / 4 - dev->caps.reserved_eqs / 4; |
| 940 | |
| 941 | if (!priv->eq_table.uar_map[index]) { |
| 942 | priv->eq_table.uar_map[index] = |
Huy Nguyen | 85743f1 | 2016-02-17 17:24:26 +0200 | [diff] [blame] | 943 | ioremap( |
| 944 | pci_resource_start(dev->persist->pdev, 2) + |
| 945 | ((eq->eqn / 4) << (dev->uar_page_shift)), |
| 946 | (1 << (dev->uar_page_shift))); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 947 | if (!priv->eq_table.uar_map[index]) { |
| 948 | mlx4_err(dev, "Couldn't map EQ doorbell for EQN 0x%06x\n", |
| 949 | eq->eqn); |
| 950 | return NULL; |
| 951 | } |
| 952 | } |
| 953 | |
| 954 | return priv->eq_table.uar_map[index] + 0x800 + 8 * (eq->eqn % 4); |
| 955 | } |
| 956 | |
Dotan Barak | bfc0d8c | 2012-10-25 01:12:49 +0000 | [diff] [blame] | 957 | static void mlx4_unmap_uar(struct mlx4_dev *dev) |
| 958 | { |
| 959 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 960 | int i; |
| 961 | |
| 962 | for (i = 0; i < mlx4_num_eq_uar(dev); ++i) |
| 963 | if (priv->eq_table.uar_map[i]) { |
| 964 | iounmap(priv->eq_table.uar_map[i]); |
| 965 | priv->eq_table.uar_map[i] = NULL; |
| 966 | } |
| 967 | } |
| 968 | |
Roland Dreier | 3d73c28 | 2007-10-10 15:43:54 -0700 | [diff] [blame] | 969 | static int mlx4_create_eq(struct mlx4_dev *dev, int nent, |
| 970 | u8 intr, struct mlx4_eq *eq) |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 971 | { |
| 972 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 973 | struct mlx4_cmd_mailbox *mailbox; |
| 974 | struct mlx4_eq_context *eq_context; |
| 975 | int npages; |
| 976 | u64 *dma_list = NULL; |
| 977 | dma_addr_t t; |
| 978 | u64 mtt_addr; |
| 979 | int err = -ENOMEM; |
| 980 | int i; |
| 981 | |
| 982 | eq->dev = dev; |
| 983 | eq->nent = roundup_pow_of_two(max(nent, 2)); |
Ido Shamay | 43c816c | 2014-09-18 11:51:00 +0300 | [diff] [blame] | 984 | /* CX3 is capable of extending the CQE/EQE from 32 to 64 bytes, with |
| 985 | * strides of 64B,128B and 256B. |
| 986 | */ |
| 987 | npages = PAGE_ALIGN(eq->nent * dev->caps.eqe_size) / PAGE_SIZE; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 988 | |
| 989 | eq->page_list = kmalloc(npages * sizeof *eq->page_list, |
| 990 | GFP_KERNEL); |
| 991 | if (!eq->page_list) |
| 992 | goto err_out; |
| 993 | |
| 994 | for (i = 0; i < npages; ++i) |
| 995 | eq->page_list[i].buf = NULL; |
| 996 | |
| 997 | dma_list = kmalloc(npages * sizeof *dma_list, GFP_KERNEL); |
| 998 | if (!dma_list) |
| 999 | goto err_out_free; |
| 1000 | |
| 1001 | mailbox = mlx4_alloc_cmd_mailbox(dev); |
| 1002 | if (IS_ERR(mailbox)) |
| 1003 | goto err_out_free; |
| 1004 | eq_context = mailbox->buf; |
| 1005 | |
| 1006 | for (i = 0; i < npages; ++i) { |
Yishai Hadas | 872bf2f | 2015-01-25 16:59:35 +0200 | [diff] [blame] | 1007 | eq->page_list[i].buf = dma_alloc_coherent(&dev->persist-> |
| 1008 | pdev->dev, |
| 1009 | PAGE_SIZE, &t, |
| 1010 | GFP_KERNEL); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1011 | if (!eq->page_list[i].buf) |
| 1012 | goto err_out_free_pages; |
| 1013 | |
| 1014 | dma_list[i] = t; |
| 1015 | eq->page_list[i].map = t; |
| 1016 | |
| 1017 | memset(eq->page_list[i].buf, 0, PAGE_SIZE); |
| 1018 | } |
| 1019 | |
| 1020 | eq->eqn = mlx4_bitmap_alloc(&priv->eq_table.bitmap); |
| 1021 | if (eq->eqn == -1) |
| 1022 | goto err_out_free_pages; |
| 1023 | |
| 1024 | eq->doorbell = mlx4_get_eq_uar(dev, eq); |
| 1025 | if (!eq->doorbell) { |
| 1026 | err = -ENOMEM; |
| 1027 | goto err_out_free_eq; |
| 1028 | } |
| 1029 | |
| 1030 | err = mlx4_mtt_init(dev, npages, PAGE_SHIFT, &eq->mtt); |
| 1031 | if (err) |
| 1032 | goto err_out_free_eq; |
| 1033 | |
| 1034 | err = mlx4_write_mtt(dev, &eq->mtt, 0, npages, dma_list); |
| 1035 | if (err) |
| 1036 | goto err_out_free_mtt; |
| 1037 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1038 | eq_context->flags = cpu_to_be32(MLX4_EQ_STATUS_OK | |
| 1039 | MLX4_EQ_STATE_ARMED); |
| 1040 | eq_context->log_eq_size = ilog2(eq->nent); |
| 1041 | eq_context->intr = intr; |
| 1042 | eq_context->log_page_size = PAGE_SHIFT - MLX4_ICM_PAGE_SHIFT; |
| 1043 | |
| 1044 | mtt_addr = mlx4_mtt_addr(dev, &eq->mtt); |
| 1045 | eq_context->mtt_base_addr_h = mtt_addr >> 32; |
| 1046 | eq_context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff); |
| 1047 | |
| 1048 | err = mlx4_SW2HW_EQ(dev, mailbox, eq->eqn); |
| 1049 | if (err) { |
| 1050 | mlx4_warn(dev, "SW2HW_EQ failed (%d)\n", err); |
| 1051 | goto err_out_free_mtt; |
| 1052 | } |
| 1053 | |
| 1054 | kfree(dma_list); |
| 1055 | mlx4_free_cmd_mailbox(dev, mailbox); |
| 1056 | |
| 1057 | eq->cons_index = 0; |
| 1058 | |
Matan Barak | 3dca0f42 | 2014-12-11 10:57:53 +0200 | [diff] [blame] | 1059 | INIT_LIST_HEAD(&eq->tasklet_ctx.list); |
| 1060 | INIT_LIST_HEAD(&eq->tasklet_ctx.process_list); |
| 1061 | spin_lock_init(&eq->tasklet_ctx.lock); |
| 1062 | tasklet_init(&eq->tasklet_ctx.task, mlx4_cq_tasklet_cb, |
| 1063 | (unsigned long)&eq->tasklet_ctx); |
| 1064 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1065 | return err; |
| 1066 | |
| 1067 | err_out_free_mtt: |
| 1068 | mlx4_mtt_cleanup(dev, &eq->mtt); |
| 1069 | |
| 1070 | err_out_free_eq: |
Jack Morgenstein | 7c6d74d | 2013-12-08 16:50:17 +0200 | [diff] [blame] | 1071 | mlx4_bitmap_free(&priv->eq_table.bitmap, eq->eqn, MLX4_USE_RR); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1072 | |
| 1073 | err_out_free_pages: |
| 1074 | for (i = 0; i < npages; ++i) |
| 1075 | if (eq->page_list[i].buf) |
Yishai Hadas | 872bf2f | 2015-01-25 16:59:35 +0200 | [diff] [blame] | 1076 | dma_free_coherent(&dev->persist->pdev->dev, PAGE_SIZE, |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1077 | eq->page_list[i].buf, |
| 1078 | eq->page_list[i].map); |
| 1079 | |
| 1080 | mlx4_free_cmd_mailbox(dev, mailbox); |
| 1081 | |
| 1082 | err_out_free: |
| 1083 | kfree(eq->page_list); |
| 1084 | kfree(dma_list); |
| 1085 | |
| 1086 | err_out: |
| 1087 | return err; |
| 1088 | } |
| 1089 | |
| 1090 | static void mlx4_free_eq(struct mlx4_dev *dev, |
| 1091 | struct mlx4_eq *eq) |
| 1092 | { |
| 1093 | struct mlx4_priv *priv = mlx4_priv(dev); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1094 | int err; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1095 | int i; |
Ido Shamay | 43c816c | 2014-09-18 11:51:00 +0300 | [diff] [blame] | 1096 | /* CX3 is capable of extending the CQE/EQE from 32 to 64 bytes, with |
| 1097 | * strides of 64B,128B and 256B |
| 1098 | */ |
| 1099 | int npages = PAGE_ALIGN(dev->caps.eqe_size * eq->nent) / PAGE_SIZE; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1100 | |
Jack Morgenstein | 30a5da5 | 2015-01-27 15:58:03 +0200 | [diff] [blame] | 1101 | err = mlx4_HW2SW_EQ(dev, eq->eqn); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1102 | if (err) |
| 1103 | mlx4_warn(dev, "HW2SW_EQ failed (%d)\n", err); |
| 1104 | |
Eli Cohen | bf1bac5 | 2014-10-23 15:57:27 +0300 | [diff] [blame] | 1105 | synchronize_irq(eq->irq); |
Matan Barak | 3dca0f42 | 2014-12-11 10:57:53 +0200 | [diff] [blame] | 1106 | tasklet_disable(&eq->tasklet_ctx.task); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1107 | |
| 1108 | mlx4_mtt_cleanup(dev, &eq->mtt); |
| 1109 | for (i = 0; i < npages; ++i) |
Yishai Hadas | 872bf2f | 2015-01-25 16:59:35 +0200 | [diff] [blame] | 1110 | dma_free_coherent(&dev->persist->pdev->dev, PAGE_SIZE, |
| 1111 | eq->page_list[i].buf, |
| 1112 | eq->page_list[i].map); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1113 | |
| 1114 | kfree(eq->page_list); |
Jack Morgenstein | 7c6d74d | 2013-12-08 16:50:17 +0200 | [diff] [blame] | 1115 | mlx4_bitmap_free(&priv->eq_table.bitmap, eq->eqn, MLX4_USE_RR); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1116 | } |
| 1117 | |
| 1118 | static void mlx4_free_irqs(struct mlx4_dev *dev) |
| 1119 | { |
| 1120 | struct mlx4_eq_table *eq_table = &mlx4_priv(dev)->eq_table; |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1121 | int i; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1122 | |
| 1123 | if (eq_table->have_irq) |
Yishai Hadas | 872bf2f | 2015-01-25 16:59:35 +0200 | [diff] [blame] | 1124 | free_irq(dev->persist->pdev->irq, dev); |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 1125 | |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 1126 | for (i = 0; i < dev->caps.num_comp_vectors + 1; ++i) |
Roland Dreier | d1fdf24 | 2009-06-14 13:30:45 -0700 | [diff] [blame] | 1127 | if (eq_table->eq[i].have_irq) { |
Ido Shamay | de16180 | 2015-05-31 09:30:17 +0300 | [diff] [blame] | 1128 | free_cpumask_var(eq_table->eq[i].affinity_mask); |
| 1129 | #if defined(CONFIG_SMP) |
| 1130 | irq_set_affinity_hint(eq_table->eq[i].irq, NULL); |
| 1131 | #endif |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1132 | free_irq(eq_table->eq[i].irq, eq_table->eq + i); |
Roland Dreier | d1fdf24 | 2009-06-14 13:30:45 -0700 | [diff] [blame] | 1133 | eq_table->eq[i].have_irq = 0; |
| 1134 | } |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 1135 | |
| 1136 | kfree(eq_table->irq_names); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1137 | } |
| 1138 | |
Roland Dreier | 3d73c28 | 2007-10-10 15:43:54 -0700 | [diff] [blame] | 1139 | static int mlx4_map_clr_int(struct mlx4_dev *dev) |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1140 | { |
| 1141 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 1142 | |
Yishai Hadas | 872bf2f | 2015-01-25 16:59:35 +0200 | [diff] [blame] | 1143 | priv->clr_base = ioremap(pci_resource_start(dev->persist->pdev, |
| 1144 | priv->fw.clr_int_bar) + |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1145 | priv->fw.clr_int_base, MLX4_CLR_INT_SIZE); |
| 1146 | if (!priv->clr_base) { |
Joe Perches | 1a91de2 | 2014-05-07 12:52:57 -0700 | [diff] [blame] | 1147 | mlx4_err(dev, "Couldn't map interrupt clear register, aborting\n"); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1148 | return -ENOMEM; |
| 1149 | } |
| 1150 | |
| 1151 | return 0; |
| 1152 | } |
| 1153 | |
| 1154 | static void mlx4_unmap_clr_int(struct mlx4_dev *dev) |
| 1155 | { |
| 1156 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 1157 | |
| 1158 | iounmap(priv->clr_base); |
| 1159 | } |
| 1160 | |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 1161 | int mlx4_alloc_eq_table(struct mlx4_dev *dev) |
| 1162 | { |
| 1163 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 1164 | |
| 1165 | priv->eq_table.eq = kcalloc(dev->caps.num_eqs - dev->caps.reserved_eqs, |
| 1166 | sizeof *priv->eq_table.eq, GFP_KERNEL); |
| 1167 | if (!priv->eq_table.eq) |
| 1168 | return -ENOMEM; |
| 1169 | |
| 1170 | return 0; |
| 1171 | } |
| 1172 | |
| 1173 | void mlx4_free_eq_table(struct mlx4_dev *dev) |
| 1174 | { |
| 1175 | kfree(mlx4_priv(dev)->eq_table.eq); |
| 1176 | } |
| 1177 | |
Roland Dreier | 3d73c28 | 2007-10-10 15:43:54 -0700 | [diff] [blame] | 1178 | int mlx4_init_eq_table(struct mlx4_dev *dev) |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1179 | { |
| 1180 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 1181 | int err; |
| 1182 | int i; |
| 1183 | |
Axel Lin | 758ff23 | 2012-02-12 15:14:39 +0000 | [diff] [blame] | 1184 | priv->eq_table.uar_map = kcalloc(mlx4_num_eq_uar(dev), |
| 1185 | sizeof *priv->eq_table.uar_map, |
| 1186 | GFP_KERNEL); |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 1187 | if (!priv->eq_table.uar_map) { |
| 1188 | err = -ENOMEM; |
| 1189 | goto err_out_free; |
| 1190 | } |
| 1191 | |
Matan Barak | 7ae0e40 | 2014-11-13 14:45:32 +0200 | [diff] [blame] | 1192 | err = mlx4_bitmap_init(&priv->eq_table.bitmap, |
| 1193 | roundup_pow_of_two(dev->caps.num_eqs), |
| 1194 | dev->caps.num_eqs - 1, |
| 1195 | dev->caps.reserved_eqs, |
| 1196 | roundup_pow_of_two(dev->caps.num_eqs) - |
| 1197 | dev->caps.num_eqs); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1198 | if (err) |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 1199 | goto err_out_free; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1200 | |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 1201 | for (i = 0; i < mlx4_num_eq_uar(dev); ++i) |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1202 | priv->eq_table.uar_map[i] = NULL; |
| 1203 | |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 1204 | if (!mlx4_is_slave(dev)) { |
| 1205 | err = mlx4_map_clr_int(dev); |
| 1206 | if (err) |
| 1207 | goto err_out_bitmap; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1208 | |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 1209 | priv->eq_table.clr_mask = |
| 1210 | swab32(1 << (priv->eq_table.inta_pin & 31)); |
| 1211 | priv->eq_table.clr_int = priv->clr_base + |
| 1212 | (priv->eq_table.inta_pin < 32 ? 4 : 0); |
| 1213 | } |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1214 | |
Arputham Benjamin | f5f5951 | 2009-09-05 20:24:50 -0700 | [diff] [blame] | 1215 | priv->eq_table.irq_names = |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1216 | kmalloc(MLX4_IRQNAME_SIZE * (dev->caps.num_comp_vectors + 1), |
Arputham Benjamin | f5f5951 | 2009-09-05 20:24:50 -0700 | [diff] [blame] | 1217 | GFP_KERNEL); |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 1218 | if (!priv->eq_table.irq_names) { |
| 1219 | err = -ENOMEM; |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1220 | goto err_out_clr_int; |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 1221 | } |
| 1222 | |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1223 | for (i = 0; i < dev->caps.num_comp_vectors + 1; ++i) { |
| 1224 | if (i == MLX4_EQ_ASYNC) { |
| 1225 | err = mlx4_create_eq(dev, |
| 1226 | MLX4_NUM_ASYNC_EQE + MLX4_NUM_SPARE_EQE, |
| 1227 | 0, &priv->eq_table.eq[MLX4_EQ_ASYNC]); |
| 1228 | } else { |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1229 | struct mlx4_eq *eq = &priv->eq_table.eq[i]; |
Or Gerlitz | db9777e | 2015-06-02 10:29:48 +0300 | [diff] [blame] | 1230 | #ifdef CONFIG_RFS_ACCEL |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1231 | int port = find_first_bit(eq->actv_ports.ports, |
| 1232 | dev->caps.num_ports) + 1; |
| 1233 | |
| 1234 | if (port <= dev->caps.num_ports) { |
| 1235 | struct mlx4_port_info *info = |
| 1236 | &mlx4_priv(dev)->port[port]; |
| 1237 | |
| 1238 | if (!info->rmap) { |
| 1239 | info->rmap = alloc_irq_cpu_rmap( |
| 1240 | mlx4_get_eqs_per_port(dev, port)); |
| 1241 | if (!info->rmap) { |
| 1242 | mlx4_warn(dev, "Failed to allocate cpu rmap\n"); |
| 1243 | err = -ENOMEM; |
| 1244 | goto err_out_unmap; |
| 1245 | } |
| 1246 | } |
| 1247 | |
| 1248 | err = irq_cpu_rmap_add( |
| 1249 | info->rmap, eq->irq); |
| 1250 | if (err) |
| 1251 | mlx4_warn(dev, "Failed adding irq rmap\n"); |
| 1252 | } |
| 1253 | #endif |
| 1254 | err = mlx4_create_eq(dev, dev->caps.num_cqs - |
| 1255 | dev->caps.reserved_cqs + |
| 1256 | MLX4_NUM_SPARE_EQE, |
| 1257 | (dev->flags & MLX4_FLAG_MSI_X) ? |
| 1258 | i + 1 - !!(i > MLX4_EQ_ASYNC) : 0, |
| 1259 | eq); |
Yevgeny Petrilin | a5b19b6 | 2009-06-08 00:39:58 -0700 | [diff] [blame] | 1260 | } |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1261 | if (err) |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 1262 | goto err_out_unmap; |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 1263 | } |
| 1264 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1265 | if (dev->flags & MLX4_FLAG_MSI_X) { |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 1266 | const char *eq_name; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1267 | |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1268 | snprintf(priv->eq_table.irq_names + |
| 1269 | MLX4_EQ_ASYNC * MLX4_IRQNAME_SIZE, |
| 1270 | MLX4_IRQNAME_SIZE, |
| 1271 | "mlx4-async@pci:%s", |
| 1272 | pci_name(dev->persist->pdev)); |
| 1273 | eq_name = priv->eq_table.irq_names + |
| 1274 | MLX4_EQ_ASYNC * MLX4_IRQNAME_SIZE; |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 1275 | |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1276 | err = request_irq(priv->eq_table.eq[MLX4_EQ_ASYNC].irq, |
| 1277 | mlx4_msi_x_interrupt, 0, eq_name, |
| 1278 | priv->eq_table.eq + MLX4_EQ_ASYNC); |
| 1279 | if (err) |
| 1280 | goto err_out_unmap; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1281 | |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1282 | priv->eq_table.eq[MLX4_EQ_ASYNC].have_irq = 1; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1283 | } else { |
Arputham Benjamin | f5f5951 | 2009-09-05 20:24:50 -0700 | [diff] [blame] | 1284 | snprintf(priv->eq_table.irq_names, |
| 1285 | MLX4_IRQNAME_SIZE, |
| 1286 | DRV_NAME "@pci:%s", |
Yishai Hadas | 872bf2f | 2015-01-25 16:59:35 +0200 | [diff] [blame] | 1287 | pci_name(dev->persist->pdev)); |
| 1288 | err = request_irq(dev->persist->pdev->irq, mlx4_interrupt, |
Arputham Benjamin | f5f5951 | 2009-09-05 20:24:50 -0700 | [diff] [blame] | 1289 | IRQF_SHARED, priv->eq_table.irq_names, dev); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1290 | if (err) |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1291 | goto err_out_unmap; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1292 | |
| 1293 | priv->eq_table.have_irq = 1; |
| 1294 | } |
| 1295 | |
Jack Morgenstein | 00f5ce9 | 2012-06-19 11:21:40 +0300 | [diff] [blame] | 1296 | err = mlx4_MAP_EQ(dev, get_async_ev_mask(dev), 0, |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1297 | priv->eq_table.eq[MLX4_EQ_ASYNC].eqn); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1298 | if (err) |
| 1299 | mlx4_warn(dev, "MAP_EQ for async EQ %d failed (%d)\n", |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1300 | priv->eq_table.eq[MLX4_EQ_ASYNC].eqn, err); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1301 | |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1302 | /* arm ASYNC eq */ |
| 1303 | eq_set_ci(&priv->eq_table.eq[MLX4_EQ_ASYNC], 1); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1304 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1305 | return 0; |
| 1306 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1307 | err_out_unmap: |
Sebastian Ott | 2a29282 | 2016-09-14 13:09:24 +0200 | [diff] [blame] | 1308 | while (i > 0) |
| 1309 | mlx4_free_eq(dev, &priv->eq_table.eq[--i]); |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1310 | #ifdef CONFIG_RFS_ACCEL |
| 1311 | for (i = 1; i <= dev->caps.num_ports; i++) { |
| 1312 | if (mlx4_priv(dev)->port[i].rmap) { |
| 1313 | free_irq_cpu_rmap(mlx4_priv(dev)->port[i].rmap); |
| 1314 | mlx4_priv(dev)->port[i].rmap = NULL; |
| 1315 | } |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 1316 | } |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1317 | #endif |
| 1318 | mlx4_free_irqs(dev); |
| 1319 | |
| 1320 | err_out_clr_int: |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 1321 | if (!mlx4_is_slave(dev)) |
| 1322 | mlx4_unmap_clr_int(dev); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1323 | |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 1324 | err_out_bitmap: |
Dotan Barak | bfc0d8c | 2012-10-25 01:12:49 +0000 | [diff] [blame] | 1325 | mlx4_unmap_uar(dev); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1326 | mlx4_bitmap_cleanup(&priv->eq_table.bitmap); |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 1327 | |
| 1328 | err_out_free: |
| 1329 | kfree(priv->eq_table.uar_map); |
| 1330 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1331 | return err; |
| 1332 | } |
| 1333 | |
| 1334 | void mlx4_cleanup_eq_table(struct mlx4_dev *dev) |
| 1335 | { |
| 1336 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 1337 | int i; |
| 1338 | |
Jack Morgenstein | 00f5ce9 | 2012-06-19 11:21:40 +0300 | [diff] [blame] | 1339 | mlx4_MAP_EQ(dev, get_async_ev_mask(dev), 1, |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1340 | priv->eq_table.eq[MLX4_EQ_ASYNC].eqn); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1341 | |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1342 | #ifdef CONFIG_RFS_ACCEL |
| 1343 | for (i = 1; i <= dev->caps.num_ports; i++) { |
| 1344 | if (mlx4_priv(dev)->port[i].rmap) { |
| 1345 | free_irq_cpu_rmap(mlx4_priv(dev)->port[i].rmap); |
| 1346 | mlx4_priv(dev)->port[i].rmap = NULL; |
| 1347 | } |
| 1348 | } |
| 1349 | #endif |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1350 | mlx4_free_irqs(dev); |
| 1351 | |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1352 | for (i = 0; i < dev->caps.num_comp_vectors + 1; ++i) |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1353 | mlx4_free_eq(dev, &priv->eq_table.eq[i]); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1354 | |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 1355 | if (!mlx4_is_slave(dev)) |
| 1356 | mlx4_unmap_clr_int(dev); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1357 | |
Dotan Barak | bfc0d8c | 2012-10-25 01:12:49 +0000 | [diff] [blame] | 1358 | mlx4_unmap_uar(dev); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1359 | mlx4_bitmap_cleanup(&priv->eq_table.bitmap); |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 1360 | |
| 1361 | kfree(priv->eq_table.uar_map); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1362 | } |
Yevgeny Petrilin | e7c1c2c4 | 2010-08-24 03:46:18 +0000 | [diff] [blame] | 1363 | |
| 1364 | /* A test that verifies that we can accept interrupts on all |
| 1365 | * the irq vectors of the device. |
| 1366 | * Interrupts are checked using the NOP command. |
| 1367 | */ |
| 1368 | int mlx4_test_interrupts(struct mlx4_dev *dev) |
| 1369 | { |
| 1370 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 1371 | int i; |
| 1372 | int err; |
| 1373 | |
| 1374 | err = mlx4_NOP(dev); |
| 1375 | /* When not in MSI_X, there is only one irq to check */ |
Jack Morgenstein | acba242 | 2011-12-13 04:13:58 +0000 | [diff] [blame] | 1376 | if (!(dev->flags & MLX4_FLAG_MSI_X) || mlx4_is_slave(dev)) |
Yevgeny Petrilin | e7c1c2c4 | 2010-08-24 03:46:18 +0000 | [diff] [blame] | 1377 | return err; |
| 1378 | |
| 1379 | /* A loop over all completion vectors, for each vector we will check |
| 1380 | * whether it works by mapping command completions to that vector |
| 1381 | * and performing a NOP command |
| 1382 | */ |
| 1383 | for(i = 0; !err && (i < dev->caps.num_comp_vectors); ++i) { |
Carol L Soto | 820d39f | 2015-10-08 15:26:15 +0300 | [diff] [blame] | 1384 | /* Make sure request_irq was called */ |
| 1385 | if (!priv->eq_table.eq[i].have_irq) |
| 1386 | continue; |
| 1387 | |
Yevgeny Petrilin | e7c1c2c4 | 2010-08-24 03:46:18 +0000 | [diff] [blame] | 1388 | /* Temporary use polling for command completions */ |
| 1389 | mlx4_cmd_use_polling(dev); |
| 1390 | |
Adam Buchbinder | b3834be | 2012-09-19 21:48:02 -0400 | [diff] [blame] | 1391 | /* Map the new eq to handle all asynchronous events */ |
Jack Morgenstein | 00f5ce9 | 2012-06-19 11:21:40 +0300 | [diff] [blame] | 1392 | err = mlx4_MAP_EQ(dev, get_async_ev_mask(dev), 0, |
Yevgeny Petrilin | e7c1c2c4 | 2010-08-24 03:46:18 +0000 | [diff] [blame] | 1393 | priv->eq_table.eq[i].eqn); |
| 1394 | if (err) { |
| 1395 | mlx4_warn(dev, "Failed mapping eq for interrupt test\n"); |
| 1396 | mlx4_cmd_use_events(dev); |
| 1397 | break; |
| 1398 | } |
| 1399 | |
| 1400 | /* Go back to using events */ |
| 1401 | mlx4_cmd_use_events(dev); |
| 1402 | err = mlx4_NOP(dev); |
| 1403 | } |
| 1404 | |
| 1405 | /* Return to default */ |
Jack Morgenstein | 00f5ce9 | 2012-06-19 11:21:40 +0300 | [diff] [blame] | 1406 | mlx4_MAP_EQ(dev, get_async_ev_mask(dev), 0, |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1407 | priv->eq_table.eq[MLX4_EQ_ASYNC].eqn); |
Yevgeny Petrilin | e7c1c2c4 | 2010-08-24 03:46:18 +0000 | [diff] [blame] | 1408 | return err; |
| 1409 | } |
| 1410 | EXPORT_SYMBOL(mlx4_test_interrupts); |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 1411 | |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1412 | bool mlx4_is_eq_vector_valid(struct mlx4_dev *dev, u8 port, int vector) |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 1413 | { |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 1414 | struct mlx4_priv *priv = mlx4_priv(dev); |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1415 | |
| 1416 | vector = MLX4_CQ_TO_EQ_VECTOR(vector); |
| 1417 | if (vector < 0 || (vector >= dev->caps.num_comp_vectors + 1) || |
| 1418 | (vector == MLX4_EQ_ASYNC)) |
| 1419 | return false; |
| 1420 | |
| 1421 | return test_bit(port - 1, priv->eq_table.eq[vector].actv_ports.ports); |
| 1422 | } |
| 1423 | EXPORT_SYMBOL(mlx4_is_eq_vector_valid); |
| 1424 | |
| 1425 | u32 mlx4_get_eqs_per_port(struct mlx4_dev *dev, u8 port) |
| 1426 | { |
| 1427 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 1428 | unsigned int i; |
| 1429 | unsigned int sum = 0; |
| 1430 | |
| 1431 | for (i = 0; i < dev->caps.num_comp_vectors + 1; i++) |
| 1432 | sum += !!test_bit(port - 1, |
| 1433 | priv->eq_table.eq[i].actv_ports.ports); |
| 1434 | |
| 1435 | return sum; |
| 1436 | } |
| 1437 | EXPORT_SYMBOL(mlx4_get_eqs_per_port); |
| 1438 | |
| 1439 | int mlx4_is_eq_shared(struct mlx4_dev *dev, int vector) |
| 1440 | { |
| 1441 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 1442 | |
| 1443 | vector = MLX4_CQ_TO_EQ_VECTOR(vector); |
| 1444 | if (vector <= 0 || (vector >= dev->caps.num_comp_vectors + 1)) |
| 1445 | return -EINVAL; |
| 1446 | |
| 1447 | return !!(bitmap_weight(priv->eq_table.eq[vector].actv_ports.ports, |
| 1448 | dev->caps.num_ports) > 1); |
| 1449 | } |
| 1450 | EXPORT_SYMBOL(mlx4_is_eq_shared); |
| 1451 | |
| 1452 | struct cpu_rmap *mlx4_get_cpu_rmap(struct mlx4_dev *dev, int port) |
| 1453 | { |
| 1454 | return mlx4_priv(dev)->port[port].rmap; |
| 1455 | } |
| 1456 | EXPORT_SYMBOL(mlx4_get_cpu_rmap); |
| 1457 | |
| 1458 | int mlx4_assign_eq(struct mlx4_dev *dev, u8 port, int *vector) |
| 1459 | { |
| 1460 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 1461 | int err = 0, i = 0; |
| 1462 | u32 min_ref_count_val = (u32)-1; |
| 1463 | int requested_vector = MLX4_CQ_TO_EQ_VECTOR(*vector); |
| 1464 | int *prequested_vector = NULL; |
| 1465 | |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 1466 | |
Yevgeny Petrilin | 730c41d | 2012-02-21 03:39:32 +0000 | [diff] [blame] | 1467 | mutex_lock(&priv->msix_ctl.pool_lock); |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1468 | if (requested_vector < (dev->caps.num_comp_vectors + 1) && |
| 1469 | (requested_vector >= 0) && |
| 1470 | (requested_vector != MLX4_EQ_ASYNC)) { |
| 1471 | if (test_bit(port - 1, |
| 1472 | priv->eq_table.eq[requested_vector].actv_ports.ports)) { |
| 1473 | prequested_vector = &requested_vector; |
| 1474 | } else { |
| 1475 | struct mlx4_eq *eq; |
Yuval Atias | 2eacc23 | 2014-05-14 12:15:10 +0300 | [diff] [blame] | 1476 | |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1477 | for (i = 1; i < port; |
| 1478 | requested_vector += mlx4_get_eqs_per_port(dev, i++)) |
| 1479 | ; |
| 1480 | |
| 1481 | eq = &priv->eq_table.eq[requested_vector]; |
| 1482 | if (requested_vector < dev->caps.num_comp_vectors + 1 && |
| 1483 | test_bit(port - 1, eq->actv_ports.ports)) { |
| 1484 | prequested_vector = &requested_vector; |
| 1485 | } |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 1486 | } |
| 1487 | } |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1488 | |
| 1489 | if (!prequested_vector) { |
| 1490 | requested_vector = -1; |
| 1491 | for (i = 0; min_ref_count_val && i < dev->caps.num_comp_vectors + 1; |
| 1492 | i++) { |
| 1493 | struct mlx4_eq *eq = &priv->eq_table.eq[i]; |
| 1494 | |
| 1495 | if (min_ref_count_val > eq->ref_count && |
| 1496 | test_bit(port - 1, eq->actv_ports.ports)) { |
| 1497 | min_ref_count_val = eq->ref_count; |
| 1498 | requested_vector = i; |
| 1499 | } |
| 1500 | } |
| 1501 | |
| 1502 | if (requested_vector < 0) { |
| 1503 | err = -ENOSPC; |
| 1504 | goto err_unlock; |
| 1505 | } |
| 1506 | |
| 1507 | prequested_vector = &requested_vector; |
| 1508 | } |
| 1509 | |
| 1510 | if (!test_bit(*prequested_vector, priv->msix_ctl.pool_bm) && |
| 1511 | dev->flags & MLX4_FLAG_MSI_X) { |
| 1512 | set_bit(*prequested_vector, priv->msix_ctl.pool_bm); |
| 1513 | snprintf(priv->eq_table.irq_names + |
| 1514 | *prequested_vector * MLX4_IRQNAME_SIZE, |
| 1515 | MLX4_IRQNAME_SIZE, "mlx4-%d@%s", |
| 1516 | *prequested_vector, dev_name(&dev->persist->pdev->dev)); |
| 1517 | |
| 1518 | err = request_irq(priv->eq_table.eq[*prequested_vector].irq, |
| 1519 | mlx4_msi_x_interrupt, 0, |
| 1520 | &priv->eq_table.irq_names[*prequested_vector << 5], |
| 1521 | priv->eq_table.eq + *prequested_vector); |
| 1522 | |
| 1523 | if (err) { |
| 1524 | clear_bit(*prequested_vector, priv->msix_ctl.pool_bm); |
| 1525 | *prequested_vector = -1; |
| 1526 | } else { |
Ido Shamay | de16180 | 2015-05-31 09:30:17 +0300 | [diff] [blame] | 1527 | #if defined(CONFIG_SMP) |
| 1528 | mlx4_set_eq_affinity_hint(priv, *prequested_vector); |
| 1529 | #endif |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1530 | eq_set_ci(&priv->eq_table.eq[*prequested_vector], 1); |
| 1531 | priv->eq_table.eq[*prequested_vector].have_irq = 1; |
| 1532 | } |
| 1533 | } |
| 1534 | |
| 1535 | if (!err && *prequested_vector >= 0) |
| 1536 | priv->eq_table.eq[*prequested_vector].ref_count++; |
| 1537 | |
| 1538 | err_unlock: |
Yevgeny Petrilin | 730c41d | 2012-02-21 03:39:32 +0000 | [diff] [blame] | 1539 | mutex_unlock(&priv->msix_ctl.pool_lock); |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 1540 | |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1541 | if (!err && *prequested_vector >= 0) |
| 1542 | *vector = MLX4_EQ_TO_CQ_VECTOR(*prequested_vector); |
| 1543 | else |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 1544 | *vector = 0; |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1545 | |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 1546 | return err; |
| 1547 | } |
| 1548 | EXPORT_SYMBOL(mlx4_assign_eq); |
| 1549 | |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1550 | int mlx4_eq_get_irq(struct mlx4_dev *dev, int cq_vec) |
Amir Vadai | 35f6f45 | 2014-06-29 11:54:55 +0300 | [diff] [blame] | 1551 | { |
| 1552 | struct mlx4_priv *priv = mlx4_priv(dev); |
| 1553 | |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1554 | return priv->eq_table.eq[MLX4_CQ_TO_EQ_VECTOR(cq_vec)].irq; |
Amir Vadai | 35f6f45 | 2014-06-29 11:54:55 +0300 | [diff] [blame] | 1555 | } |
| 1556 | EXPORT_SYMBOL(mlx4_eq_get_irq); |
| 1557 | |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 1558 | void mlx4_release_eq(struct mlx4_dev *dev, int vec) |
| 1559 | { |
| 1560 | struct mlx4_priv *priv = mlx4_priv(dev); |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1561 | int eq_vec = MLX4_CQ_TO_EQ_VECTOR(vec); |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 1562 | |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1563 | mutex_lock(&priv->msix_ctl.pool_lock); |
| 1564 | priv->eq_table.eq[eq_vec].ref_count--; |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 1565 | |
Matan Barak | c66fa19 | 2015-05-31 09:30:16 +0300 | [diff] [blame] | 1566 | /* once we allocated EQ, we don't release it because it might be binded |
| 1567 | * to cpu_rmap. |
| 1568 | */ |
| 1569 | mutex_unlock(&priv->msix_ctl.pool_lock); |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 1570 | } |
| 1571 | EXPORT_SYMBOL(mlx4_release_eq); |
| 1572 | |