Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 1 | /* |
| 2 | * File: drivers/pci/pcie/aspm.c |
Stefan Assmann | 45e829e | 2009-12-03 06:49:24 -0500 | [diff] [blame] | 3 | * Enabling PCIe link L0s/L1 state and Clock Power Management |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 4 | * |
| 5 | * Copyright (C) 2007 Intel |
| 6 | * Copyright (C) Zhang Yanmin (yanmin.zhang@intel.com) |
| 7 | * Copyright (C) Shaohua Li (shaohua.li@intel.com) |
| 8 | */ |
| 9 | |
| 10 | #include <linux/kernel.h> |
| 11 | #include <linux/module.h> |
| 12 | #include <linux/moduleparam.h> |
| 13 | #include <linux/pci.h> |
| 14 | #include <linux/pci_regs.h> |
| 15 | #include <linux/errno.h> |
| 16 | #include <linux/pm.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/slab.h> |
Thomas Renninger | 2a42d9d | 2008-12-09 13:05:09 +0100 | [diff] [blame] | 19 | #include <linux/jiffies.h> |
Andrew Patterson | 987a4c7 | 2009-01-05 16:21:04 -0700 | [diff] [blame] | 20 | #include <linux/delay.h> |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 21 | #include <linux/pci-aspm.h> |
| 22 | #include "../pci.h" |
| 23 | |
| 24 | #ifdef MODULE_PARAM_PREFIX |
| 25 | #undef MODULE_PARAM_PREFIX |
| 26 | #endif |
| 27 | #define MODULE_PARAM_PREFIX "pcie_aspm." |
| 28 | |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 29 | /* Note: those are not register definitions */ |
| 30 | #define ASPM_STATE_L0S_UP (1) /* Upstream direction L0s state */ |
| 31 | #define ASPM_STATE_L0S_DW (2) /* Downstream direction L0s state */ |
| 32 | #define ASPM_STATE_L1 (4) /* L1 state */ |
| 33 | #define ASPM_STATE_L0S (ASPM_STATE_L0S_UP | ASPM_STATE_L0S_DW) |
| 34 | #define ASPM_STATE_ALL (ASPM_STATE_L0S | ASPM_STATE_L1) |
| 35 | |
Kenji Kaneshige | b6c2e54 | 2009-05-13 12:14:58 +0900 | [diff] [blame] | 36 | struct aspm_latency { |
| 37 | u32 l0s; /* L0s latency (nsec) */ |
| 38 | u32 l1; /* L1 latency (nsec) */ |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 39 | }; |
| 40 | |
| 41 | struct pcie_link_state { |
Kenji Kaneshige | 5cde89d | 2009-05-13 12:17:04 +0900 | [diff] [blame] | 42 | struct pci_dev *pdev; /* Upstream component of the Link */ |
Kenji Kaneshige | 5c92ffb | 2009-05-13 12:23:57 +0900 | [diff] [blame] | 43 | struct pcie_link_state *root; /* pointer to the root port link */ |
Kenji Kaneshige | 5cde89d | 2009-05-13 12:17:04 +0900 | [diff] [blame] | 44 | struct pcie_link_state *parent; /* pointer to the parent Link state */ |
| 45 | struct list_head sibling; /* node in link_list */ |
| 46 | struct list_head children; /* list of child link states */ |
| 47 | struct list_head link; /* node in parent's children list */ |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 48 | |
| 49 | /* ASPM state */ |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 50 | u32 aspm_support:3; /* Supported ASPM state */ |
| 51 | u32 aspm_enabled:3; /* Enabled ASPM state */ |
| 52 | u32 aspm_capable:3; /* Capable ASPM state with latency */ |
| 53 | u32 aspm_default:3; /* Default ASPM state by BIOS */ |
| 54 | u32 aspm_disable:3; /* Disabled ASPM state */ |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 55 | |
Kenji Kaneshige | 4d246e4 | 2009-05-13 12:15:38 +0900 | [diff] [blame] | 56 | /* Clock PM state */ |
| 57 | u32 clkpm_capable:1; /* Clock PM capable? */ |
| 58 | u32 clkpm_enabled:1; /* Current Clock PM state */ |
| 59 | u32 clkpm_default:1; /* Default Clock PM state by BIOS */ |
| 60 | |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 61 | /* Exit latencies */ |
| 62 | struct aspm_latency latency_up; /* Upstream direction exit latency */ |
| 63 | struct aspm_latency latency_dw; /* Downstream direction exit latency */ |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 64 | /* |
Kenji Kaneshige | b6c2e54 | 2009-05-13 12:14:58 +0900 | [diff] [blame] | 65 | * Endpoint acceptable latencies. A pcie downstream port only |
| 66 | * has one slot under it, so at most there are 8 functions. |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 67 | */ |
Kenji Kaneshige | b6c2e54 | 2009-05-13 12:14:58 +0900 | [diff] [blame] | 68 | struct aspm_latency acceptable[8]; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 69 | }; |
| 70 | |
Matthew Garrett | 3c07635 | 2011-11-10 16:38:33 -0500 | [diff] [blame] | 71 | static int aspm_disabled, aspm_force; |
Rafael J. Wysocki | 8b8bae9 | 2011-03-05 13:21:51 +0100 | [diff] [blame] | 72 | static bool aspm_support_enabled = true; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 73 | static DEFINE_MUTEX(aspm_lock); |
| 74 | static LIST_HEAD(link_list); |
| 75 | |
| 76 | #define POLICY_DEFAULT 0 /* BIOS default setting */ |
| 77 | #define POLICY_PERFORMANCE 1 /* high performance */ |
| 78 | #define POLICY_POWERSAVE 2 /* high power saving */ |
Matthew Garrett | ad71c96 | 2012-02-03 10:18:13 -0500 | [diff] [blame] | 79 | |
| 80 | #ifdef CONFIG_PCIEASPM_PERFORMANCE |
| 81 | static int aspm_policy = POLICY_PERFORMANCE; |
| 82 | #elif defined CONFIG_PCIEASPM_POWERSAVE |
| 83 | static int aspm_policy = POLICY_POWERSAVE; |
| 84 | #else |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 85 | static int aspm_policy; |
Matthew Garrett | ad71c96 | 2012-02-03 10:18:13 -0500 | [diff] [blame] | 86 | #endif |
| 87 | |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 88 | static const char *policy_str[] = { |
| 89 | [POLICY_DEFAULT] = "default", |
| 90 | [POLICY_PERFORMANCE] = "performance", |
| 91 | [POLICY_POWERSAVE] = "powersave" |
| 92 | }; |
| 93 | |
Andrew Patterson | 987a4c7 | 2009-01-05 16:21:04 -0700 | [diff] [blame] | 94 | #define LINK_RETRAIN_TIMEOUT HZ |
| 95 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 96 | static int policy_to_aspm_state(struct pcie_link_state *link) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 97 | { |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 98 | switch (aspm_policy) { |
| 99 | case POLICY_PERFORMANCE: |
| 100 | /* Disable ASPM and Clock PM */ |
| 101 | return 0; |
| 102 | case POLICY_POWERSAVE: |
| 103 | /* Enable ASPM L0s/L1 */ |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 104 | return ASPM_STATE_ALL; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 105 | case POLICY_DEFAULT: |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 106 | return link->aspm_default; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 107 | } |
| 108 | return 0; |
| 109 | } |
| 110 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 111 | static int policy_to_clkpm_state(struct pcie_link_state *link) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 112 | { |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 113 | switch (aspm_policy) { |
| 114 | case POLICY_PERFORMANCE: |
| 115 | /* Disable ASPM and Clock PM */ |
| 116 | return 0; |
| 117 | case POLICY_POWERSAVE: |
| 118 | /* Disable Clock PM */ |
| 119 | return 1; |
| 120 | case POLICY_DEFAULT: |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 121 | return link->clkpm_default; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 122 | } |
| 123 | return 0; |
| 124 | } |
| 125 | |
Kenji Kaneshige | 430842e | 2009-05-13 12:20:10 +0900 | [diff] [blame] | 126 | static void pcie_set_clkpm_nocheck(struct pcie_link_state *link, int enable) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 127 | { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 128 | struct pci_dev *child; |
| 129 | struct pci_bus *linkbus = link->pdev->subordinate; |
Bjorn Helgaas | 0c0cbb6 | 2015-06-10 14:00:21 -0500 | [diff] [blame] | 130 | u32 val = enable ? PCI_EXP_LNKCTL_CLKREQ_EN : 0; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 131 | |
Bjorn Helgaas | 0c0cbb6 | 2015-06-10 14:00:21 -0500 | [diff] [blame] | 132 | list_for_each_entry(child, &linkbus->devices, bus_list) |
| 133 | pcie_capability_clear_and_set_word(child, PCI_EXP_LNKCTL, |
| 134 | PCI_EXP_LNKCTL_CLKREQ_EN, |
| 135 | val); |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 136 | link->clkpm_enabled = !!enable; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 137 | } |
| 138 | |
Kenji Kaneshige | 430842e | 2009-05-13 12:20:10 +0900 | [diff] [blame] | 139 | static void pcie_set_clkpm(struct pcie_link_state *link, int enable) |
| 140 | { |
| 141 | /* Don't enable Clock PM if the link is not Clock PM capable */ |
Shawn Lin | a6c1c6f | 2016-05-24 17:32:10 +0800 | [diff] [blame] | 142 | if (!link->clkpm_capable) |
Matthew Garrett | 2f671e2 | 2010-12-06 14:00:56 -0500 | [diff] [blame] | 143 | enable = 0; |
Kenji Kaneshige | 430842e | 2009-05-13 12:20:10 +0900 | [diff] [blame] | 144 | /* Need nothing if the specified equals to current state */ |
| 145 | if (link->clkpm_enabled == enable) |
| 146 | return; |
| 147 | pcie_set_clkpm_nocheck(link, enable); |
| 148 | } |
| 149 | |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 150 | static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 151 | { |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 152 | int capable = 1, enabled = 1; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 153 | u32 reg32; |
| 154 | u16 reg16; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 155 | struct pci_dev *child; |
| 156 | struct pci_bus *linkbus = link->pdev->subordinate; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 157 | |
| 158 | /* All functions should have the same cap and state, take the worst */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 159 | list_for_each_entry(child, &linkbus->devices, bus_list) { |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 160 | pcie_capability_read_dword(child, PCI_EXP_LNKCAP, ®32); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 161 | if (!(reg32 & PCI_EXP_LNKCAP_CLKPM)) { |
| 162 | capable = 0; |
| 163 | enabled = 0; |
| 164 | break; |
| 165 | } |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 166 | pcie_capability_read_word(child, PCI_EXP_LNKCTL, ®16); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 167 | if (!(reg16 & PCI_EXP_LNKCTL_CLKREQ_EN)) |
| 168 | enabled = 0; |
| 169 | } |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 170 | link->clkpm_enabled = enabled; |
| 171 | link->clkpm_default = enabled; |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 172 | link->clkpm_capable = (blacklist) ? 0 : capable; |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 173 | } |
| 174 | |
Stefan Mätje | 1c38a7b | 2019-03-29 18:07:34 +0100 | [diff] [blame] | 175 | static bool pcie_retrain_link(struct pcie_link_state *link) |
| 176 | { |
| 177 | struct pci_dev *parent = link->pdev; |
| 178 | unsigned long start_jiffies; |
| 179 | u16 reg16; |
| 180 | |
| 181 | pcie_capability_read_word(parent, PCI_EXP_LNKCTL, ®16); |
| 182 | reg16 |= PCI_EXP_LNKCTL_RL; |
| 183 | pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16); |
Stefan Mätje | d0a3f25 | 2019-03-29 18:07:35 +0100 | [diff] [blame^] | 184 | if (parent->clear_retrain_link) { |
| 185 | /* |
| 186 | * Due to an erratum in some devices the Retrain Link bit |
| 187 | * needs to be cleared again manually to allow the link |
| 188 | * training to succeed. |
| 189 | */ |
| 190 | reg16 &= ~PCI_EXP_LNKCTL_RL; |
| 191 | pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16); |
| 192 | } |
Stefan Mätje | 1c38a7b | 2019-03-29 18:07:34 +0100 | [diff] [blame] | 193 | |
| 194 | /* Wait for link training end. Break out after waiting for timeout */ |
| 195 | start_jiffies = jiffies; |
| 196 | for (;;) { |
| 197 | pcie_capability_read_word(parent, PCI_EXP_LNKSTA, ®16); |
| 198 | if (!(reg16 & PCI_EXP_LNKSTA_LT)) |
| 199 | break; |
| 200 | if (time_after(jiffies, start_jiffies + LINK_RETRAIN_TIMEOUT)) |
| 201 | break; |
| 202 | msleep(1); |
| 203 | } |
| 204 | return !(reg16 & PCI_EXP_LNKSTA_LT); |
| 205 | } |
| 206 | |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 207 | /* |
| 208 | * pcie_aspm_configure_common_clock: check if the 2 ends of a link |
| 209 | * could use common clock. If they are, configure them to use the |
| 210 | * common clock. That will reduce the ASPM state exit latency. |
| 211 | */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 212 | static void pcie_aspm_configure_common_clock(struct pcie_link_state *link) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 213 | { |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 214 | int same_clock = 1; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 215 | u16 reg16, parent_reg, child_reg[8]; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 216 | struct pci_dev *child, *parent = link->pdev; |
| 217 | struct pci_bus *linkbus = parent->subordinate; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 218 | /* |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 219 | * All functions of a slot should have the same Slot Clock |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 220 | * Configuration, so just check one function |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 221 | */ |
| 222 | child = list_entry(linkbus->devices.next, struct pci_dev, bus_list); |
Kenji Kaneshige | 8b06477 | 2009-11-11 14:36:52 +0900 | [diff] [blame] | 223 | BUG_ON(!pci_is_pcie(child)); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 224 | |
| 225 | /* Check downstream component if bit Slot Clock Configuration is 1 */ |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 226 | pcie_capability_read_word(child, PCI_EXP_LNKSTA, ®16); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 227 | if (!(reg16 & PCI_EXP_LNKSTA_SLC)) |
| 228 | same_clock = 0; |
| 229 | |
| 230 | /* Check upstream component if bit Slot Clock Configuration is 1 */ |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 231 | pcie_capability_read_word(parent, PCI_EXP_LNKSTA, ®16); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 232 | if (!(reg16 & PCI_EXP_LNKSTA_SLC)) |
| 233 | same_clock = 0; |
| 234 | |
| 235 | /* Configure downstream component, all functions */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 236 | list_for_each_entry(child, &linkbus->devices, bus_list) { |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 237 | pcie_capability_read_word(child, PCI_EXP_LNKCTL, ®16); |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 238 | child_reg[PCI_FUNC(child->devfn)] = reg16; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 239 | if (same_clock) |
| 240 | reg16 |= PCI_EXP_LNKCTL_CCC; |
| 241 | else |
| 242 | reg16 &= ~PCI_EXP_LNKCTL_CCC; |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 243 | pcie_capability_write_word(child, PCI_EXP_LNKCTL, reg16); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 244 | } |
| 245 | |
| 246 | /* Configure upstream component */ |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 247 | pcie_capability_read_word(parent, PCI_EXP_LNKCTL, ®16); |
Thomas Renninger | 2a42d9d | 2008-12-09 13:05:09 +0100 | [diff] [blame] | 248 | parent_reg = reg16; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 249 | if (same_clock) |
| 250 | reg16 |= PCI_EXP_LNKCTL_CCC; |
| 251 | else |
| 252 | reg16 &= ~PCI_EXP_LNKCTL_CCC; |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 253 | pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 254 | |
Stefan Mätje | 1c38a7b | 2019-03-29 18:07:34 +0100 | [diff] [blame] | 255 | if (pcie_retrain_link(link)) |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 256 | return; |
| 257 | |
| 258 | /* Training failed. Restore common clock configurations */ |
Joe Perches | 438be3c | 2012-10-28 01:05:49 -0700 | [diff] [blame] | 259 | dev_err(&parent->dev, "ASPM: Could not configure common clock\n"); |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 260 | list_for_each_entry(child, &linkbus->devices, bus_list) |
| 261 | pcie_capability_write_word(child, PCI_EXP_LNKCTL, |
| 262 | child_reg[PCI_FUNC(child->devfn)]); |
| 263 | pcie_capability_write_word(parent, PCI_EXP_LNKCTL, parent_reg); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 264 | } |
| 265 | |
Kenji Kaneshige | 5e0eaa7 | 2009-05-13 12:21:48 +0900 | [diff] [blame] | 266 | /* Convert L0s latency encoding to ns */ |
| 267 | static u32 calc_l0s_latency(u32 encoding) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 268 | { |
Kenji Kaneshige | 5e0eaa7 | 2009-05-13 12:21:48 +0900 | [diff] [blame] | 269 | if (encoding == 0x7) |
| 270 | return (5 * 1000); /* > 4us */ |
| 271 | return (64 << encoding); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 272 | } |
| 273 | |
Kenji Kaneshige | 5e0eaa7 | 2009-05-13 12:21:48 +0900 | [diff] [blame] | 274 | /* Convert L0s acceptable latency encoding to ns */ |
| 275 | static u32 calc_l0s_acceptable(u32 encoding) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 276 | { |
Kenji Kaneshige | 5e0eaa7 | 2009-05-13 12:21:48 +0900 | [diff] [blame] | 277 | if (encoding == 0x7) |
| 278 | return -1U; |
| 279 | return (64 << encoding); |
| 280 | } |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 281 | |
Kenji Kaneshige | 5e0eaa7 | 2009-05-13 12:21:48 +0900 | [diff] [blame] | 282 | /* Convert L1 latency encoding to ns */ |
| 283 | static u32 calc_l1_latency(u32 encoding) |
| 284 | { |
| 285 | if (encoding == 0x7) |
| 286 | return (65 * 1000); /* > 64us */ |
| 287 | return (1000 << encoding); |
| 288 | } |
| 289 | |
| 290 | /* Convert L1 acceptable latency encoding to ns */ |
| 291 | static u32 calc_l1_acceptable(u32 encoding) |
| 292 | { |
| 293 | if (encoding == 0x7) |
| 294 | return -1U; |
| 295 | return (1000 << encoding); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 296 | } |
| 297 | |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 298 | struct aspm_register_info { |
| 299 | u32 support:2; |
| 300 | u32 enabled:2; |
| 301 | u32 latency_encoding_l0s; |
| 302 | u32 latency_encoding_l1; |
| 303 | }; |
| 304 | |
| 305 | static void pcie_get_aspm_reg(struct pci_dev *pdev, |
| 306 | struct aspm_register_info *info) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 307 | { |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 308 | u16 reg16; |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 309 | u32 reg32; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 310 | |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 311 | pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, ®32); |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 312 | info->support = (reg32 & PCI_EXP_LNKCAP_ASPMS) >> 10; |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 313 | info->latency_encoding_l0s = (reg32 & PCI_EXP_LNKCAP_L0SEL) >> 12; |
| 314 | info->latency_encoding_l1 = (reg32 & PCI_EXP_LNKCAP_L1EL) >> 15; |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 315 | pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, ®16); |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 316 | info->enabled = reg16 & PCI_EXP_LNKCTL_ASPMC; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 317 | } |
| 318 | |
Kenji Kaneshige | 07d9276 | 2009-08-19 11:00:25 +0900 | [diff] [blame] | 319 | static void pcie_aspm_check_latency(struct pci_dev *endpoint) |
| 320 | { |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 321 | u32 latency, l1_switch_latency = 0; |
Kenji Kaneshige | 07d9276 | 2009-08-19 11:00:25 +0900 | [diff] [blame] | 322 | struct aspm_latency *acceptable; |
| 323 | struct pcie_link_state *link; |
| 324 | |
| 325 | /* Device not in D0 doesn't need latency check */ |
| 326 | if ((endpoint->current_state != PCI_D0) && |
| 327 | (endpoint->current_state != PCI_UNKNOWN)) |
| 328 | return; |
| 329 | |
| 330 | link = endpoint->bus->self->link_state; |
| 331 | acceptable = &link->acceptable[PCI_FUNC(endpoint->devfn)]; |
| 332 | |
| 333 | while (link) { |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 334 | /* Check upstream direction L0s latency */ |
| 335 | if ((link->aspm_capable & ASPM_STATE_L0S_UP) && |
| 336 | (link->latency_up.l0s > acceptable->l0s)) |
| 337 | link->aspm_capable &= ~ASPM_STATE_L0S_UP; |
| 338 | |
| 339 | /* Check downstream direction L0s latency */ |
| 340 | if ((link->aspm_capable & ASPM_STATE_L0S_DW) && |
| 341 | (link->latency_dw.l0s > acceptable->l0s)) |
| 342 | link->aspm_capable &= ~ASPM_STATE_L0S_DW; |
Kenji Kaneshige | 07d9276 | 2009-08-19 11:00:25 +0900 | [diff] [blame] | 343 | /* |
| 344 | * Check L1 latency. |
| 345 | * Every switch on the path to root complex need 1 |
| 346 | * more microsecond for L1. Spec doesn't mention L0s. |
| 347 | */ |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 348 | latency = max_t(u32, link->latency_up.l1, link->latency_dw.l1); |
| 349 | if ((link->aspm_capable & ASPM_STATE_L1) && |
| 350 | (latency + l1_switch_latency > acceptable->l1)) |
| 351 | link->aspm_capable &= ~ASPM_STATE_L1; |
Kenji Kaneshige | 07d9276 | 2009-08-19 11:00:25 +0900 | [diff] [blame] | 352 | l1_switch_latency += 1000; |
| 353 | |
| 354 | link = link->parent; |
| 355 | } |
| 356 | } |
| 357 | |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 358 | static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 359 | { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 360 | struct pci_dev *child, *parent = link->pdev; |
| 361 | struct pci_bus *linkbus = parent->subordinate; |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 362 | struct aspm_register_info upreg, dwreg; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 363 | |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 364 | if (blacklist) { |
Kenji Kaneshige | f1c0ca2 | 2009-08-19 10:59:52 +0900 | [diff] [blame] | 365 | /* Set enabled/disable so that we will disable ASPM later */ |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 366 | link->aspm_enabled = ASPM_STATE_ALL; |
| 367 | link->aspm_disable = ASPM_STATE_ALL; |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 368 | return; |
| 369 | } |
| 370 | |
| 371 | /* Configure common clock before checking latencies */ |
| 372 | pcie_aspm_configure_common_clock(link); |
| 373 | |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 374 | /* Get upstream/downstream components' register state */ |
| 375 | pcie_get_aspm_reg(parent, &upreg); |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 376 | child = list_entry(linkbus->devices.next, struct pci_dev, bus_list); |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 377 | pcie_get_aspm_reg(child, &dwreg); |
| 378 | |
| 379 | /* |
| 380 | * Setup L0s state |
| 381 | * |
| 382 | * Note that we must not enable L0s in either direction on a |
| 383 | * given link unless components on both sides of the link each |
| 384 | * support L0s. |
| 385 | */ |
| 386 | if (dwreg.support & upreg.support & PCIE_LINK_STATE_L0S) |
| 387 | link->aspm_support |= ASPM_STATE_L0S; |
| 388 | if (dwreg.enabled & PCIE_LINK_STATE_L0S) |
| 389 | link->aspm_enabled |= ASPM_STATE_L0S_UP; |
| 390 | if (upreg.enabled & PCIE_LINK_STATE_L0S) |
| 391 | link->aspm_enabled |= ASPM_STATE_L0S_DW; |
| 392 | link->latency_up.l0s = calc_l0s_latency(upreg.latency_encoding_l0s); |
| 393 | link->latency_dw.l0s = calc_l0s_latency(dwreg.latency_encoding_l0s); |
| 394 | |
| 395 | /* Setup L1 state */ |
| 396 | if (upreg.support & dwreg.support & PCIE_LINK_STATE_L1) |
| 397 | link->aspm_support |= ASPM_STATE_L1; |
| 398 | if (upreg.enabled & dwreg.enabled & PCIE_LINK_STATE_L1) |
| 399 | link->aspm_enabled |= ASPM_STATE_L1; |
| 400 | link->latency_up.l1 = calc_l1_latency(upreg.latency_encoding_l1); |
| 401 | link->latency_dw.l1 = calc_l1_latency(dwreg.latency_encoding_l1); |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 402 | |
Kenji Kaneshige | b127bd5 | 2009-08-19 10:57:31 +0900 | [diff] [blame] | 403 | /* Save default state */ |
| 404 | link->aspm_default = link->aspm_enabled; |
Kenji Kaneshige | 07d9276 | 2009-08-19 11:00:25 +0900 | [diff] [blame] | 405 | |
| 406 | /* Setup initial capable state. Will be updated later */ |
| 407 | link->aspm_capable = link->aspm_support; |
Kenji Kaneshige | f1c0ca2 | 2009-08-19 10:59:52 +0900 | [diff] [blame] | 408 | /* |
| 409 | * If the downstream component has pci bridge function, don't |
| 410 | * do ASPM for now. |
| 411 | */ |
| 412 | list_for_each_entry(child, &linkbus->devices, bus_list) { |
Yijing Wang | 62f87c0 | 2012-07-24 17:20:03 +0800 | [diff] [blame] | 413 | if (pci_pcie_type(child) == PCI_EXP_TYPE_PCI_BRIDGE) { |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 414 | link->aspm_disable = ASPM_STATE_ALL; |
Kenji Kaneshige | f1c0ca2 | 2009-08-19 10:59:52 +0900 | [diff] [blame] | 415 | break; |
| 416 | } |
| 417 | } |
Kenji Kaneshige | b127bd5 | 2009-08-19 10:57:31 +0900 | [diff] [blame] | 418 | |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 419 | /* Get and check endpoint acceptable latencies */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 420 | list_for_each_entry(child, &linkbus->devices, bus_list) { |
Kenji Kaneshige | 5e0eaa7 | 2009-05-13 12:21:48 +0900 | [diff] [blame] | 421 | u32 reg32, encoding; |
Kenji Kaneshige | b6c2e54 | 2009-05-13 12:14:58 +0900 | [diff] [blame] | 422 | struct aspm_latency *acceptable = |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 423 | &link->acceptable[PCI_FUNC(child->devfn)]; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 424 | |
Yijing Wang | 62f87c0 | 2012-07-24 17:20:03 +0800 | [diff] [blame] | 425 | if (pci_pcie_type(child) != PCI_EXP_TYPE_ENDPOINT && |
| 426 | pci_pcie_type(child) != PCI_EXP_TYPE_LEG_END) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 427 | continue; |
| 428 | |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 429 | pcie_capability_read_dword(child, PCI_EXP_DEVCAP, ®32); |
Kenji Kaneshige | 07d9276 | 2009-08-19 11:00:25 +0900 | [diff] [blame] | 430 | /* Calculate endpoint L0s acceptable latency */ |
Kenji Kaneshige | 5e0eaa7 | 2009-05-13 12:21:48 +0900 | [diff] [blame] | 431 | encoding = (reg32 & PCI_EXP_DEVCAP_L0S) >> 6; |
| 432 | acceptable->l0s = calc_l0s_acceptable(encoding); |
Kenji Kaneshige | 07d9276 | 2009-08-19 11:00:25 +0900 | [diff] [blame] | 433 | /* Calculate endpoint L1 acceptable latency */ |
| 434 | encoding = (reg32 & PCI_EXP_DEVCAP_L1) >> 9; |
| 435 | acceptable->l1 = calc_l1_acceptable(encoding); |
| 436 | |
| 437 | pcie_aspm_check_latency(child); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 438 | } |
| 439 | } |
| 440 | |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 441 | static void pcie_config_aspm_dev(struct pci_dev *pdev, u32 val) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 442 | { |
Bjorn Helgaas | 7508320 | 2012-12-05 13:51:19 -0700 | [diff] [blame] | 443 | pcie_capability_clear_and_set_word(pdev, PCI_EXP_LNKCTL, |
| 444 | PCI_EXP_LNKCTL_ASPMC, val); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 445 | } |
| 446 | |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 447 | static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 448 | { |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 449 | u32 upstream = 0, dwstream = 0; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 450 | struct pci_dev *child, *parent = link->pdev; |
| 451 | struct pci_bus *linkbus = parent->subordinate; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 452 | |
Kenji Kaneshige | f1c0ca2 | 2009-08-19 10:59:52 +0900 | [diff] [blame] | 453 | /* Nothing to do if the link is already in the requested state */ |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 454 | state &= (link->aspm_capable & ~link->aspm_disable); |
Kenji Kaneshige | f1c0ca2 | 2009-08-19 10:59:52 +0900 | [diff] [blame] | 455 | if (link->aspm_enabled == state) |
| 456 | return; |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 457 | /* Convert ASPM state to upstream/downstream ASPM register state */ |
| 458 | if (state & ASPM_STATE_L0S_UP) |
Bjorn Helgaas | 7508320 | 2012-12-05 13:51:19 -0700 | [diff] [blame] | 459 | dwstream |= PCI_EXP_LNKCTL_ASPM_L0S; |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 460 | if (state & ASPM_STATE_L0S_DW) |
Bjorn Helgaas | 7508320 | 2012-12-05 13:51:19 -0700 | [diff] [blame] | 461 | upstream |= PCI_EXP_LNKCTL_ASPM_L0S; |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 462 | if (state & ASPM_STATE_L1) { |
Bjorn Helgaas | 7508320 | 2012-12-05 13:51:19 -0700 | [diff] [blame] | 463 | upstream |= PCI_EXP_LNKCTL_ASPM_L1; |
| 464 | dwstream |= PCI_EXP_LNKCTL_ASPM_L1; |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 465 | } |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 466 | /* |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 467 | * Spec 2.0 suggests all functions should be configured the |
| 468 | * same setting for ASPM. Enabling ASPM L1 should be done in |
| 469 | * upstream component first and then downstream, and vice |
| 470 | * versa for disabling ASPM L1. Spec doesn't mention L0S. |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 471 | */ |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 472 | if (state & ASPM_STATE_L1) |
| 473 | pcie_config_aspm_dev(parent, upstream); |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 474 | list_for_each_entry(child, &linkbus->devices, bus_list) |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 475 | pcie_config_aspm_dev(child, dwstream); |
| 476 | if (!(state & ASPM_STATE_L1)) |
| 477 | pcie_config_aspm_dev(parent, upstream); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 478 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 479 | link->aspm_enabled = state; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 480 | } |
| 481 | |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 482 | static void pcie_config_aspm_path(struct pcie_link_state *link) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 483 | { |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 484 | while (link) { |
| 485 | pcie_config_aspm_link(link, policy_to_aspm_state(link)); |
| 486 | link = link->parent; |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 487 | } |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 488 | } |
| 489 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 490 | static void free_link_state(struct pcie_link_state *link) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 491 | { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 492 | link->pdev->link_state = NULL; |
| 493 | kfree(link); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 494 | } |
| 495 | |
Shaohua Li | ddc9753 | 2008-05-21 16:58:40 +0800 | [diff] [blame] | 496 | static int pcie_aspm_sanity_check(struct pci_dev *pdev) |
| 497 | { |
Kenji Kaneshige | 3647584 | 2009-05-13 12:23:09 +0900 | [diff] [blame] | 498 | struct pci_dev *child; |
Shaohua Li | 149e163 | 2008-07-23 10:32:31 +0800 | [diff] [blame] | 499 | u32 reg32; |
Matthew Garrett | 2f671e2 | 2010-12-06 14:00:56 -0500 | [diff] [blame] | 500 | |
Shaohua Li | ddc9753 | 2008-05-21 16:58:40 +0800 | [diff] [blame] | 501 | /* |
Stefan Assmann | 45e829e | 2009-12-03 06:49:24 -0500 | [diff] [blame] | 502 | * Some functions in a slot might not all be PCIe functions, |
Kenji Kaneshige | 3647584 | 2009-05-13 12:23:09 +0900 | [diff] [blame] | 503 | * very strange. Disable ASPM for the whole slot |
Shaohua Li | ddc9753 | 2008-05-21 16:58:40 +0800 | [diff] [blame] | 504 | */ |
Kenji Kaneshige | 3647584 | 2009-05-13 12:23:09 +0900 | [diff] [blame] | 505 | list_for_each_entry(child, &pdev->subordinate->devices, bus_list) { |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 506 | if (!pci_is_pcie(child)) |
Shaohua Li | ddc9753 | 2008-05-21 16:58:40 +0800 | [diff] [blame] | 507 | return -EINVAL; |
Matthew Garrett | c9651e7 | 2012-03-27 10:17:41 -0400 | [diff] [blame] | 508 | |
| 509 | /* |
| 510 | * If ASPM is disabled then we're not going to change |
| 511 | * the BIOS state. It's safe to continue even if it's a |
| 512 | * pre-1.1 device |
| 513 | */ |
| 514 | |
| 515 | if (aspm_disabled) |
| 516 | continue; |
| 517 | |
Shaohua Li | 149e163 | 2008-07-23 10:32:31 +0800 | [diff] [blame] | 518 | /* |
| 519 | * Disable ASPM for pre-1.1 PCIe device, we follow MS to use |
| 520 | * RBER bit to determine if a function is 1.1 version device |
| 521 | */ |
Jiang Liu | f12eb72 | 2012-07-24 17:20:12 +0800 | [diff] [blame] | 522 | pcie_capability_read_dword(child, PCI_EXP_DEVCAP, ®32); |
Sitsofe Wheeler | e1f4f59 | 2008-09-16 14:27:13 +0100 | [diff] [blame] | 523 | if (!(reg32 & PCI_EXP_DEVCAP_RBER) && !aspm_force) { |
Joe Perches | 438be3c | 2012-10-28 01:05:49 -0700 | [diff] [blame] | 524 | dev_info(&child->dev, "disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'\n"); |
Shaohua Li | 149e163 | 2008-07-23 10:32:31 +0800 | [diff] [blame] | 525 | return -EINVAL; |
| 526 | } |
Shaohua Li | ddc9753 | 2008-05-21 16:58:40 +0800 | [diff] [blame] | 527 | } |
| 528 | return 0; |
| 529 | } |
| 530 | |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 531 | static struct pcie_link_state *alloc_pcie_link_state(struct pci_dev *pdev) |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 532 | { |
| 533 | struct pcie_link_state *link; |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 534 | |
| 535 | link = kzalloc(sizeof(*link), GFP_KERNEL); |
| 536 | if (!link) |
| 537 | return NULL; |
Bjorn Helgaas | 610c2b7 | 2017-01-27 15:00:45 -0600 | [diff] [blame] | 538 | |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 539 | INIT_LIST_HEAD(&link->sibling); |
| 540 | INIT_LIST_HEAD(&link->children); |
| 541 | INIT_LIST_HEAD(&link->link); |
| 542 | link->pdev = pdev; |
Bjorn Helgaas | 610c2b7 | 2017-01-27 15:00:45 -0600 | [diff] [blame] | 543 | |
| 544 | /* |
| 545 | * Root Ports and PCI/PCI-X to PCIe Bridges are roots of PCIe |
Ard Biesheuvel | 6213c71 | 2017-10-02 15:08:40 +0100 | [diff] [blame] | 546 | * hierarchies. Note that some PCIe host implementations omit |
| 547 | * the root ports entirely, in which case a downstream port on |
| 548 | * a switch may become the root of the link state chain for all |
| 549 | * its subordinate endpoints. |
Bjorn Helgaas | 610c2b7 | 2017-01-27 15:00:45 -0600 | [diff] [blame] | 550 | */ |
| 551 | if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT || |
Ard Biesheuvel | 6213c71 | 2017-10-02 15:08:40 +0100 | [diff] [blame] | 552 | pci_pcie_type(pdev) == PCI_EXP_TYPE_PCIE_BRIDGE || |
| 553 | !pdev->bus->parent->self) { |
Bjorn Helgaas | 610c2b7 | 2017-01-27 15:00:45 -0600 | [diff] [blame] | 554 | link->root = link; |
| 555 | } else { |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 556 | struct pcie_link_state *parent; |
Bjorn Helgaas | 610c2b7 | 2017-01-27 15:00:45 -0600 | [diff] [blame] | 557 | |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 558 | parent = pdev->bus->parent->self->link_state; |
| 559 | if (!parent) { |
| 560 | kfree(link); |
| 561 | return NULL; |
| 562 | } |
Bjorn Helgaas | 610c2b7 | 2017-01-27 15:00:45 -0600 | [diff] [blame] | 563 | |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 564 | link->parent = parent; |
Bjorn Helgaas | 610c2b7 | 2017-01-27 15:00:45 -0600 | [diff] [blame] | 565 | link->root = link->parent->root; |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 566 | list_add(&link->link, &parent->children); |
| 567 | } |
Kenji Kaneshige | 5c92ffb | 2009-05-13 12:23:57 +0900 | [diff] [blame] | 568 | |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 569 | list_add(&link->sibling, &link_list); |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 570 | pdev->link_state = link; |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 571 | return link; |
| 572 | } |
| 573 | |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 574 | /* |
| 575 | * pcie_aspm_init_link_state: Initiate PCI express link state. |
Bjorn Helgaas | f762598 | 2013-11-14 11:28:18 -0700 | [diff] [blame] | 576 | * It is called after the pcie and its children devices are scanned. |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 577 | * @pdev: the root port or switch downstream port |
| 578 | */ |
| 579 | void pcie_aspm_init_link_state(struct pci_dev *pdev) |
| 580 | { |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 581 | struct pcie_link_state *link; |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 582 | int blacklist = !!pcie_aspm_sanity_check(pdev); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 583 | |
Joe Lawrence | a26d5ec | 2013-01-15 15:31:28 -0500 | [diff] [blame] | 584 | if (!aspm_support_enabled) |
| 585 | return; |
| 586 | |
Yijing Wang | c8fc933 | 2015-05-21 15:05:03 +0800 | [diff] [blame] | 587 | if (pdev->link_state) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 588 | return; |
Yijing Wang | c8fc933 | 2015-05-21 15:05:03 +0800 | [diff] [blame] | 589 | |
| 590 | /* |
| 591 | * We allocate pcie_link_state for the component on the upstream |
| 592 | * end of a Link, so there's nothing to do unless this device has a |
| 593 | * Link on its secondary side. |
| 594 | */ |
| 595 | if (!pdev->has_secondary_link) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 596 | return; |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 597 | |
Shaohua Li | 8e822df | 2009-06-08 09:27:25 +0800 | [diff] [blame] | 598 | /* VIA has a strange chipset, root port is under a bridge */ |
Yijing Wang | 62f87c0 | 2012-07-24 17:20:03 +0800 | [diff] [blame] | 599 | if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT && |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 600 | pdev->bus->self) |
Shaohua Li | 8e822df | 2009-06-08 09:27:25 +0800 | [diff] [blame] | 601 | return; |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 602 | |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 603 | down_read(&pci_bus_sem); |
| 604 | if (list_empty(&pdev->subordinate->devices)) |
| 605 | goto out; |
| 606 | |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 607 | mutex_lock(&aspm_lock); |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 608 | link = alloc_pcie_link_state(pdev); |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 609 | if (!link) |
| 610 | goto unlock; |
| 611 | /* |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 612 | * Setup initial ASPM state. Note that we need to configure |
| 613 | * upstream links also because capable state of them can be |
| 614 | * update through pcie_aspm_cap_init(). |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 615 | */ |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 616 | pcie_aspm_cap_init(link, blacklist); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 617 | |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 618 | /* Setup initial Clock PM state */ |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 619 | pcie_clkpm_cap_init(link, blacklist); |
Matthew Garrett | 41cd766 | 2010-06-09 16:05:07 -0400 | [diff] [blame] | 620 | |
| 621 | /* |
| 622 | * At this stage drivers haven't had an opportunity to change the |
| 623 | * link policy setting. Enabling ASPM on broken hardware can cripple |
| 624 | * it even before the driver has had a chance to disable ASPM, so |
| 625 | * default to a safe level right now. If we're enabling ASPM beyond |
| 626 | * the BIOS's expectation, we'll do so once pci_enable_device() is |
| 627 | * called. |
| 628 | */ |
Matthew Garrett | 3c07635 | 2011-11-10 16:38:33 -0500 | [diff] [blame] | 629 | if (aspm_policy != POLICY_POWERSAVE) { |
Matthew Garrett | 41cd766 | 2010-06-09 16:05:07 -0400 | [diff] [blame] | 630 | pcie_config_aspm_path(link); |
| 631 | pcie_set_clkpm(link, policy_to_clkpm_state(link)); |
| 632 | } |
| 633 | |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame] | 634 | unlock: |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 635 | mutex_unlock(&aspm_lock); |
| 636 | out: |
| 637 | up_read(&pci_bus_sem); |
| 638 | } |
| 639 | |
Kenji Kaneshige | 07d9276 | 2009-08-19 11:00:25 +0900 | [diff] [blame] | 640 | /* Recheck latencies and update aspm_capable for links under the root */ |
| 641 | static void pcie_update_aspm_capable(struct pcie_link_state *root) |
| 642 | { |
| 643 | struct pcie_link_state *link; |
| 644 | BUG_ON(root->parent); |
| 645 | list_for_each_entry(link, &link_list, sibling) { |
| 646 | if (link->root != root) |
| 647 | continue; |
| 648 | link->aspm_capable = link->aspm_support; |
| 649 | } |
| 650 | list_for_each_entry(link, &link_list, sibling) { |
| 651 | struct pci_dev *child; |
| 652 | struct pci_bus *linkbus = link->pdev->subordinate; |
| 653 | if (link->root != root) |
| 654 | continue; |
| 655 | list_for_each_entry(child, &linkbus->devices, bus_list) { |
Yijing Wang | 62f87c0 | 2012-07-24 17:20:03 +0800 | [diff] [blame] | 656 | if ((pci_pcie_type(child) != PCI_EXP_TYPE_ENDPOINT) && |
| 657 | (pci_pcie_type(child) != PCI_EXP_TYPE_LEG_END)) |
Kenji Kaneshige | 07d9276 | 2009-08-19 11:00:25 +0900 | [diff] [blame] | 658 | continue; |
| 659 | pcie_aspm_check_latency(child); |
| 660 | } |
| 661 | } |
| 662 | } |
| 663 | |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 664 | /* @pdev: the endpoint device */ |
| 665 | void pcie_aspm_exit_link_state(struct pci_dev *pdev) |
| 666 | { |
| 667 | struct pci_dev *parent = pdev->bus->self; |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 668 | struct pcie_link_state *link, *root, *parent_link; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 669 | |
Myron Stowe | 84fb913 | 2013-01-31 16:29:25 -0700 | [diff] [blame] | 670 | if (!parent || !parent->link_state) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 671 | return; |
Kenji Kaneshige | fc87e91 | 2009-08-19 10:58:46 +0900 | [diff] [blame] | 672 | |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 673 | down_read(&pci_bus_sem); |
| 674 | mutex_lock(&aspm_lock); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 675 | /* |
| 676 | * All PCIe functions are in one slot, remove one function will remove |
Alex Chiang | 3419c75 | 2009-01-28 14:59:18 -0700 | [diff] [blame] | 677 | * the whole slot, so just wait until we are the last function left. |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 678 | */ |
Alex Chiang | 3419c75 | 2009-01-28 14:59:18 -0700 | [diff] [blame] | 679 | if (!list_is_last(&pdev->bus_list, &parent->subordinate->devices)) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 680 | goto out; |
| 681 | |
Kenji Kaneshige | fc87e91 | 2009-08-19 10:58:46 +0900 | [diff] [blame] | 682 | link = parent->link_state; |
Kenji Kaneshige | 07d9276 | 2009-08-19 11:00:25 +0900 | [diff] [blame] | 683 | root = link->root; |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 684 | parent_link = link->parent; |
Kenji Kaneshige | fc87e91 | 2009-08-19 10:58:46 +0900 | [diff] [blame] | 685 | |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 686 | /* All functions are removed, so just disable ASPM for the link */ |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 687 | pcie_config_aspm_link(link, 0); |
Kenji Kaneshige | fc87e91 | 2009-08-19 10:58:46 +0900 | [diff] [blame] | 688 | list_del(&link->sibling); |
| 689 | list_del(&link->link); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 690 | /* Clock PM is for endpoint device */ |
Kenji Kaneshige | fc87e91 | 2009-08-19 10:58:46 +0900 | [diff] [blame] | 691 | free_link_state(link); |
Kenji Kaneshige | 07d9276 | 2009-08-19 11:00:25 +0900 | [diff] [blame] | 692 | |
| 693 | /* Recheck latencies and configure upstream links */ |
Kenji Kaneshige | b26a34a | 2009-11-06 11:25:13 +0900 | [diff] [blame] | 694 | if (parent_link) { |
| 695 | pcie_update_aspm_capable(root); |
| 696 | pcie_config_aspm_path(parent_link); |
| 697 | } |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 698 | out: |
| 699 | mutex_unlock(&aspm_lock); |
| 700 | up_read(&pci_bus_sem); |
| 701 | } |
| 702 | |
| 703 | /* @pdev: the root port or switch downstream port */ |
| 704 | void pcie_aspm_pm_state_change(struct pci_dev *pdev) |
| 705 | { |
Kenji Kaneshige | 07d9276 | 2009-08-19 11:00:25 +0900 | [diff] [blame] | 706 | struct pcie_link_state *link = pdev->link_state; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 707 | |
Yijing Wang | f9b8cd7 | 2015-05-19 11:41:34 +0800 | [diff] [blame] | 708 | if (aspm_disabled || !link) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 709 | return; |
| 710 | /* |
Kenji Kaneshige | 07d9276 | 2009-08-19 11:00:25 +0900 | [diff] [blame] | 711 | * Devices changed PM state, we should recheck if latency |
| 712 | * meets all functions' requirement |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 713 | */ |
Kenji Kaneshige | 07d9276 | 2009-08-19 11:00:25 +0900 | [diff] [blame] | 714 | down_read(&pci_bus_sem); |
| 715 | mutex_lock(&aspm_lock); |
| 716 | pcie_update_aspm_capable(link->root); |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 717 | pcie_config_aspm_path(link); |
Kenji Kaneshige | 07d9276 | 2009-08-19 11:00:25 +0900 | [diff] [blame] | 718 | mutex_unlock(&aspm_lock); |
| 719 | up_read(&pci_bus_sem); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 720 | } |
| 721 | |
Naga Chumbalkar | 1a680b7 | 2011-03-21 03:29:08 +0000 | [diff] [blame] | 722 | void pcie_aspm_powersave_config_link(struct pci_dev *pdev) |
| 723 | { |
| 724 | struct pcie_link_state *link = pdev->link_state; |
| 725 | |
Yijing Wang | f9b8cd7 | 2015-05-19 11:41:34 +0800 | [diff] [blame] | 726 | if (aspm_disabled || !link) |
Naga Chumbalkar | 1a680b7 | 2011-03-21 03:29:08 +0000 | [diff] [blame] | 727 | return; |
| 728 | |
| 729 | if (aspm_policy != POLICY_POWERSAVE) |
| 730 | return; |
| 731 | |
Naga Chumbalkar | 1a680b7 | 2011-03-21 03:29:08 +0000 | [diff] [blame] | 732 | down_read(&pci_bus_sem); |
| 733 | mutex_lock(&aspm_lock); |
| 734 | pcie_config_aspm_path(link); |
| 735 | pcie_set_clkpm(link, policy_to_clkpm_state(link)); |
| 736 | mutex_unlock(&aspm_lock); |
| 737 | up_read(&pci_bus_sem); |
| 738 | } |
| 739 | |
Bjorn Helgaas | e127a04 | 2015-05-20 12:13:05 -0500 | [diff] [blame] | 740 | static void __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 741 | { |
| 742 | struct pci_dev *parent = pdev->bus->self; |
Kenji Kaneshige | f1c0ca2 | 2009-08-19 10:59:52 +0900 | [diff] [blame] | 743 | struct pcie_link_state *link; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 744 | |
Matthew Garrett | 3c07635 | 2011-11-10 16:38:33 -0500 | [diff] [blame] | 745 | if (!pci_is_pcie(pdev)) |
| 746 | return; |
| 747 | |
Yijing Wang | c8fc933 | 2015-05-21 15:05:03 +0800 | [diff] [blame] | 748 | if (pdev->has_secondary_link) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 749 | parent = pdev; |
| 750 | if (!parent || !parent->link_state) |
| 751 | return; |
| 752 | |
Bjorn Helgaas | 2add0ec | 2013-05-21 10:56:51 -0600 | [diff] [blame] | 753 | /* |
| 754 | * A driver requested that ASPM be disabled on this device, but |
| 755 | * if we don't have permission to manage ASPM (e.g., on ACPI |
| 756 | * systems we have to observe the FADT ACPI_FADT_NO_ASPM bit and |
| 757 | * the _OSC method), we can't honor that request. Windows has |
| 758 | * a similar mechanism using "PciASPMOptOut", which is also |
| 759 | * ignored in this situation. |
| 760 | */ |
Bjorn Helgaas | e127a04 | 2015-05-20 12:13:05 -0500 | [diff] [blame] | 761 | if (aspm_disabled) { |
Bjorn Helgaas | 2add0ec | 2013-05-21 10:56:51 -0600 | [diff] [blame] | 762 | dev_warn(&pdev->dev, "can't disable ASPM; OS doesn't have ASPM control\n"); |
| 763 | return; |
| 764 | } |
| 765 | |
Yinghai Lu | 9f728f5 | 2011-05-12 17:11:47 -0700 | [diff] [blame] | 766 | if (sem) |
| 767 | down_read(&pci_bus_sem); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 768 | mutex_lock(&aspm_lock); |
Kenji Kaneshige | f1c0ca2 | 2009-08-19 10:59:52 +0900 | [diff] [blame] | 769 | link = parent->link_state; |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 770 | if (state & PCIE_LINK_STATE_L0S) |
| 771 | link->aspm_disable |= ASPM_STATE_L0S; |
| 772 | if (state & PCIE_LINK_STATE_L1) |
| 773 | link->aspm_disable |= ASPM_STATE_L1; |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 774 | pcie_config_aspm_link(link, policy_to_aspm_state(link)); |
| 775 | |
Kenji Kaneshige | 430842e | 2009-05-13 12:20:10 +0900 | [diff] [blame] | 776 | if (state & PCIE_LINK_STATE_CLKPM) { |
Kenji Kaneshige | f1c0ca2 | 2009-08-19 10:59:52 +0900 | [diff] [blame] | 777 | link->clkpm_capable = 0; |
| 778 | pcie_set_clkpm(link, 0); |
Kenji Kaneshige | 430842e | 2009-05-13 12:20:10 +0900 | [diff] [blame] | 779 | } |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 780 | mutex_unlock(&aspm_lock); |
Yinghai Lu | 9f728f5 | 2011-05-12 17:11:47 -0700 | [diff] [blame] | 781 | if (sem) |
| 782 | up_read(&pci_bus_sem); |
| 783 | } |
| 784 | |
| 785 | void pci_disable_link_state_locked(struct pci_dev *pdev, int state) |
| 786 | { |
Bjorn Helgaas | e127a04 | 2015-05-20 12:13:05 -0500 | [diff] [blame] | 787 | __pci_disable_link_state(pdev, state, false); |
Yinghai Lu | 9f728f5 | 2011-05-12 17:11:47 -0700 | [diff] [blame] | 788 | } |
| 789 | EXPORT_SYMBOL(pci_disable_link_state_locked); |
| 790 | |
Yijing Wang | 2dfca87 | 2013-05-28 16:03:22 +0800 | [diff] [blame] | 791 | /** |
| 792 | * pci_disable_link_state - Disable device's link state, so the link will |
| 793 | * never enter specific states. Note that if the BIOS didn't grant ASPM |
| 794 | * control to the OS, this does nothing because we can't touch the LNKCTL |
| 795 | * register. |
| 796 | * |
| 797 | * @pdev: PCI device |
| 798 | * @state: ASPM link state to disable |
| 799 | */ |
Yinghai Lu | 9f728f5 | 2011-05-12 17:11:47 -0700 | [diff] [blame] | 800 | void pci_disable_link_state(struct pci_dev *pdev, int state) |
| 801 | { |
Bjorn Helgaas | e127a04 | 2015-05-20 12:13:05 -0500 | [diff] [blame] | 802 | __pci_disable_link_state(pdev, state, true); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 803 | } |
| 804 | EXPORT_SYMBOL(pci_disable_link_state); |
| 805 | |
| 806 | static int pcie_aspm_set_policy(const char *val, struct kernel_param *kp) |
| 807 | { |
| 808 | int i; |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 809 | struct pcie_link_state *link; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 810 | |
Naga Chumbalkar | bbfa306 | 2011-03-21 03:29:14 +0000 | [diff] [blame] | 811 | if (aspm_disabled) |
| 812 | return -EPERM; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 813 | for (i = 0; i < ARRAY_SIZE(policy_str); i++) |
| 814 | if (!strncmp(val, policy_str[i], strlen(policy_str[i]))) |
| 815 | break; |
| 816 | if (i >= ARRAY_SIZE(policy_str)) |
| 817 | return -EINVAL; |
| 818 | if (i == aspm_policy) |
| 819 | return 0; |
| 820 | |
| 821 | down_read(&pci_bus_sem); |
| 822 | mutex_lock(&aspm_lock); |
| 823 | aspm_policy = i; |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 824 | list_for_each_entry(link, &link_list, sibling) { |
| 825 | pcie_config_aspm_link(link, policy_to_aspm_state(link)); |
| 826 | pcie_set_clkpm(link, policy_to_clkpm_state(link)); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 827 | } |
| 828 | mutex_unlock(&aspm_lock); |
| 829 | up_read(&pci_bus_sem); |
| 830 | return 0; |
| 831 | } |
| 832 | |
| 833 | static int pcie_aspm_get_policy(char *buffer, struct kernel_param *kp) |
| 834 | { |
| 835 | int i, cnt = 0; |
| 836 | for (i = 0; i < ARRAY_SIZE(policy_str); i++) |
| 837 | if (i == aspm_policy) |
| 838 | cnt += sprintf(buffer + cnt, "[%s] ", policy_str[i]); |
| 839 | else |
| 840 | cnt += sprintf(buffer + cnt, "%s ", policy_str[i]); |
| 841 | return cnt; |
| 842 | } |
| 843 | |
| 844 | module_param_call(policy, pcie_aspm_set_policy, pcie_aspm_get_policy, |
| 845 | NULL, 0644); |
| 846 | |
| 847 | #ifdef CONFIG_PCIEASPM_DEBUG |
| 848 | static ssize_t link_state_show(struct device *dev, |
| 849 | struct device_attribute *attr, |
| 850 | char *buf) |
| 851 | { |
| 852 | struct pci_dev *pci_device = to_pci_dev(dev); |
| 853 | struct pcie_link_state *link_state = pci_device->link_state; |
| 854 | |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 855 | return sprintf(buf, "%d\n", link_state->aspm_enabled); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 856 | } |
| 857 | |
| 858 | static ssize_t link_state_store(struct device *dev, |
| 859 | struct device_attribute *attr, |
| 860 | const char *buf, |
| 861 | size_t n) |
| 862 | { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 863 | struct pci_dev *pdev = to_pci_dev(dev); |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 864 | struct pcie_link_state *link, *root = pdev->link_state->root; |
Andy Lutomirski | 57d86a0 | 2015-11-19 08:05:35 -0800 | [diff] [blame] | 865 | u32 state; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 866 | |
Naga Chumbalkar | bbfa306 | 2011-03-21 03:29:14 +0000 | [diff] [blame] | 867 | if (aspm_disabled) |
| 868 | return -EPERM; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 869 | |
Andy Lutomirski | 57d86a0 | 2015-11-19 08:05:35 -0800 | [diff] [blame] | 870 | if (kstrtouint(buf, 10, &state)) |
| 871 | return -EINVAL; |
| 872 | if ((state & ~ASPM_STATE_ALL) != 0) |
| 873 | return -EINVAL; |
Kenji Kaneshige | ac18018 | 2009-08-19 11:02:13 +0900 | [diff] [blame] | 874 | |
Kenji Kaneshige | b7206cb | 2009-08-19 11:01:37 +0900 | [diff] [blame] | 875 | down_read(&pci_bus_sem); |
| 876 | mutex_lock(&aspm_lock); |
| 877 | list_for_each_entry(link, &link_list, sibling) { |
| 878 | if (link->root != root) |
| 879 | continue; |
| 880 | pcie_config_aspm_link(link, state); |
| 881 | } |
| 882 | mutex_unlock(&aspm_lock); |
| 883 | up_read(&pci_bus_sem); |
| 884 | return n; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 885 | } |
| 886 | |
| 887 | static ssize_t clk_ctl_show(struct device *dev, |
| 888 | struct device_attribute *attr, |
| 889 | char *buf) |
| 890 | { |
| 891 | struct pci_dev *pci_device = to_pci_dev(dev); |
| 892 | struct pcie_link_state *link_state = pci_device->link_state; |
| 893 | |
Kenji Kaneshige | 4d246e4 | 2009-05-13 12:15:38 +0900 | [diff] [blame] | 894 | return sprintf(buf, "%d\n", link_state->clkpm_enabled); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 895 | } |
| 896 | |
| 897 | static ssize_t clk_ctl_store(struct device *dev, |
| 898 | struct device_attribute *attr, |
| 899 | const char *buf, |
| 900 | size_t n) |
| 901 | { |
Kenji Kaneshige | 430842e | 2009-05-13 12:20:10 +0900 | [diff] [blame] | 902 | struct pci_dev *pdev = to_pci_dev(dev); |
Chris J Arges | 94a9031 | 2014-12-05 17:02:42 -0600 | [diff] [blame] | 903 | bool state; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 904 | |
Chris J Arges | 94a9031 | 2014-12-05 17:02:42 -0600 | [diff] [blame] | 905 | if (strtobool(buf, &state)) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 906 | return -EINVAL; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 907 | |
| 908 | down_read(&pci_bus_sem); |
| 909 | mutex_lock(&aspm_lock); |
Chris J Arges | 94a9031 | 2014-12-05 17:02:42 -0600 | [diff] [blame] | 910 | pcie_set_clkpm_nocheck(pdev->link_state, state); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 911 | mutex_unlock(&aspm_lock); |
| 912 | up_read(&pci_bus_sem); |
| 913 | |
| 914 | return n; |
| 915 | } |
| 916 | |
| 917 | static DEVICE_ATTR(link_state, 0644, link_state_show, link_state_store); |
| 918 | static DEVICE_ATTR(clk_ctl, 0644, clk_ctl_show, clk_ctl_store); |
| 919 | |
| 920 | static char power_group[] = "power"; |
| 921 | void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev) |
| 922 | { |
| 923 | struct pcie_link_state *link_state = pdev->link_state; |
| 924 | |
Yijing Wang | f9b8cd7 | 2015-05-19 11:41:34 +0800 | [diff] [blame] | 925 | if (!link_state) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 926 | return; |
| 927 | |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 928 | if (link_state->aspm_support) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 929 | sysfs_add_file_to_group(&pdev->dev.kobj, |
| 930 | &dev_attr_link_state.attr, power_group); |
Kenji Kaneshige | 4d246e4 | 2009-05-13 12:15:38 +0900 | [diff] [blame] | 931 | if (link_state->clkpm_capable) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 932 | sysfs_add_file_to_group(&pdev->dev.kobj, |
| 933 | &dev_attr_clk_ctl.attr, power_group); |
| 934 | } |
| 935 | |
| 936 | void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev) |
| 937 | { |
| 938 | struct pcie_link_state *link_state = pdev->link_state; |
| 939 | |
Yijing Wang | f9b8cd7 | 2015-05-19 11:41:34 +0800 | [diff] [blame] | 940 | if (!link_state) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 941 | return; |
| 942 | |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 943 | if (link_state->aspm_support) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 944 | sysfs_remove_file_from_group(&pdev->dev.kobj, |
| 945 | &dev_attr_link_state.attr, power_group); |
Kenji Kaneshige | 4d246e4 | 2009-05-13 12:15:38 +0900 | [diff] [blame] | 946 | if (link_state->clkpm_capable) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 947 | sysfs_remove_file_from_group(&pdev->dev.kobj, |
| 948 | &dev_attr_clk_ctl.attr, power_group); |
| 949 | } |
| 950 | #endif |
| 951 | |
| 952 | static int __init pcie_aspm_disable(char *str) |
| 953 | { |
Shaohua Li | d6d3857 | 2008-07-23 10:32:42 +0800 | [diff] [blame] | 954 | if (!strcmp(str, "off")) { |
Matthew Garrett | 3c07635 | 2011-11-10 16:38:33 -0500 | [diff] [blame] | 955 | aspm_policy = POLICY_DEFAULT; |
Shaohua Li | d6d3857 | 2008-07-23 10:32:42 +0800 | [diff] [blame] | 956 | aspm_disabled = 1; |
Rafael J. Wysocki | 8b8bae9 | 2011-03-05 13:21:51 +0100 | [diff] [blame] | 957 | aspm_support_enabled = false; |
Shaohua Li | d6d3857 | 2008-07-23 10:32:42 +0800 | [diff] [blame] | 958 | printk(KERN_INFO "PCIe ASPM is disabled\n"); |
| 959 | } else if (!strcmp(str, "force")) { |
| 960 | aspm_force = 1; |
Michael Witten | 8072ba1 | 2011-06-28 06:15:05 +0000 | [diff] [blame] | 961 | printk(KERN_INFO "PCIe ASPM is forcibly enabled\n"); |
Shaohua Li | d6d3857 | 2008-07-23 10:32:42 +0800 | [diff] [blame] | 962 | } |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 963 | return 1; |
| 964 | } |
| 965 | |
Shaohua Li | d6d3857 | 2008-07-23 10:32:42 +0800 | [diff] [blame] | 966 | __setup("pcie_aspm=", pcie_aspm_disable); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 967 | |
Shaohua Li | 5fde244 | 2008-07-23 10:32:24 +0800 | [diff] [blame] | 968 | void pcie_no_aspm(void) |
| 969 | { |
Matthew Garrett | 3c07635 | 2011-11-10 16:38:33 -0500 | [diff] [blame] | 970 | /* |
| 971 | * Disabling ASPM is intended to prevent the kernel from modifying |
| 972 | * existing hardware state, not to clear existing state. To that end: |
| 973 | * (a) set policy to POLICY_DEFAULT in order to avoid changing state |
| 974 | * (b) prevent userspace from changing policy |
| 975 | */ |
| 976 | if (!aspm_force) { |
| 977 | aspm_policy = POLICY_DEFAULT; |
Shaohua Li | d6d3857 | 2008-07-23 10:32:42 +0800 | [diff] [blame] | 978 | aspm_disabled = 1; |
Matthew Garrett | 3c07635 | 2011-11-10 16:38:33 -0500 | [diff] [blame] | 979 | } |
Shaohua Li | 5fde244 | 2008-07-23 10:32:24 +0800 | [diff] [blame] | 980 | } |
| 981 | |
Rafael J. Wysocki | 8b8bae9 | 2011-03-05 13:21:51 +0100 | [diff] [blame] | 982 | bool pcie_aspm_support_enabled(void) |
| 983 | { |
| 984 | return aspm_support_enabled; |
| 985 | } |
| 986 | EXPORT_SYMBOL(pcie_aspm_support_enabled); |