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gerrit-public.fairphone.software / kernel / msm-4.9 / d198b514bd9e94930ee0b9ca1cad0a51f5e29608 / . / arch / arm / mach-omap2 / include / mach / debug-macro.S
blob: 6a4d4136002ed9999fa401e61c3776b74abe7581 [file] [log] [blame]
Tony Lindgrenaca59b82009-10-19 17:26:17 -0700[diff] [blame]1/* arch/arm/mach-omap2/include/mach/debug-macro.S
Russell Kinga09e64f2008-08-05 16:14:15 +0100[diff] [blame]2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
Tony Lindgren4f2c49f2010-02-15 08:48:53 -0800[diff] [blame]14#include <linux/serial_reg.h>
15
Tony Lindgren96554d72010-04-30 17:39:19 -0700[diff] [blame]16#include <asm/memory.h>
17
Tony Lindgren4f2c49f2010-02-15 08:48:53 -0800[diff] [blame]18#include <plat/serial.h>
19
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]20#define UART_OFFSET(addr) ((addr) & 0x00ffffff)
21
22 .pushsection .data
23omap_uart_phys: .word 0
24omap_uart_virt: .word 0
25omap_uart_lsr: .word 0
26 .popsection
27
28 /*
29 * Note that this code won't work if the bootloader passes
30 * a wrong machine ID number in r1. To debug, just hardcode
31 * the desired UART phys and virt addresses temporarily into
32 * the omap_uart_phys and omap_uart_virt above.
33 */
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]34 .macro addruart, rp, rv
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]35
36 /* Use omap_uart_phys/virt if already configured */
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]3710: mrc p15, 0, \rp, c1, c0
38 tst \rp, #1 @ MMU enabled?
39 ldreq \rp, =__virt_to_phys(omap_uart_phys) @ MMU not enabled
40 ldrne \rp, =omap_uart_phys @ MMU enabled
41 add \rv, \rp, #4 @ omap_uart_virt
42 ldr \rp, [\rp, #0]
43 ldr \rv, [\rv, #0]
44 cmp \rp, #0 @ is port configured?
45 cmpne \rv, #0
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]46 bne 99f @ already configured
47
Tony Lindgren96554d72010-04-30 17:39:19 -0700[diff] [blame]48 /* Check the debug UART configuration set in uncompress.h */
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]49 mrc p15, 0, \rp, c1, c0
50 tst \rp, #1 @ MMU enabled?
51 ldreq \rp, =OMAP_UART_INFO @ MMU not enabled
52 ldrne \rp, =__phys_to_virt(OMAP_UART_INFO) @ MMU enabled
53 ldr \rp, [\rp, #0]
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300[diff] [blame]54
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]55 /* Select the UART to use based on the UART1 scratchpad value */
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]56 cmp \rp, #0 @ no port configured?
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]57 beq 21f @ if none, try to use UART1
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]58 cmp \rp, #OMAP2UART1 @ OMAP2/3/4UART1
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]59 beq 21f @ configure OMAP2/3/4UART1
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]60 cmp \rp, #OMAP2UART2 @ OMAP2/3/4UART2
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]61 beq 22f @ configure OMAP2/3/4UART2
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]62 cmp \rp, #OMAP2UART3 @ only on 24xx
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]63 beq 23f @ configure OMAP2UART3
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]64 cmp \rp, #OMAP3UART3 @ only on 34xx
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]65 beq 33f @ configure OMAP3UART3
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]66 cmp \rp, #OMAP4UART3 @ only on 44xx
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]67 beq 43f @ configure OMAP4UART3
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]68 cmp \rp, #OMAP3UART4 @ only on 36xx
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]69 beq 34f @ configure OMAP3UART4
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]70 cmp \rp, #OMAP4UART4 @ only on 44xx
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]71 beq 44f @ configure OMAP4UART4
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]72 cmp \rp, #ZOOM_UART @ only on zoom2/3
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]73 beq 95f @ configure ZOOM_UART
74
75 /* Configure the UART offset from the phys/virt base */
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]7621: mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]77 b 98f
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]7822: mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]79 b 98f
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]8023: mov \rp, #UART_OFFSET(OMAP2_UART3_BASE)
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]81 b 98f
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]8233: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
83 add \rp, \rp, #0x00fb0000
84 add \rp, \rp, #0x00006000 @ OMAP3_UART3_BASE
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]85 b 98f
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]8634: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
87 add \rp, \rp, #0x00fb0000
88 add \rp, \rp, #0x00028000 @ OMAP3_UART4_BASE
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]89 b 98f
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]9043: mov \rp, #UART_OFFSET(OMAP4_UART3_BASE)
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]91 b 98f
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]9244: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]93 b 98f
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]9495: ldr \rp, =ZOOM_UART_BASE
95 mrc p15, 0, \rv, c1, c0
96 tst \rv, #1 @ MMU enabled?
97 ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled
98 ldrne \rv, =omap_uart_phys @ MMU enabled
99 str \rp, [\rv, #0]
100 ldr \rp, =ZOOM_UART_VIRT
101 add \rv, \rv, #4 @ omap_uart_virt
102 str \rp, [\rv, #0]
103 mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT)
104 add \rv, \rv, #4 @ omap_uart_lsr
105 str \rp, [\rv, #0]
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]106 b 10b
107
108 /* Store both phys and virt address for the uart */
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]10998: add \rp, \rp, #0x48000000 @ phys base
110 mrc p15, 0, \rv, c1, c0
111 tst \rv, #1 @ MMU enabled?
112 ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled
113 ldrne \rv, =omap_uart_phys @ MMU enabled
114 str \rp, [\rv, #0]
115 sub \rp, \rp, #0x48000000 @ phys base
116 add \rp, \rp, #0xfa000000 @ virt base
117 add \rv, \rv, #4 @ omap_uart_virt
118 str \rp, [\rv, #0]
119 mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
120 add \rv, \rv, #4 @ omap_uart_lsr
121 str \rp, [\rv, #0]
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]122
123 b 10b
12499:
Russell Kinga09e64f2008-08-05 16:14:15 +0100[diff] [blame]125 .endm
126
127 .macro senduart,rd,rx
128 strb \rd, [\rx]
129 .endm
130
131 .macro busyuart,rd,rx
Jason Wang7e788b42010-08-03 11:44:18 +0800[diff] [blame]1321001: mrc p15, 0, \rd, c1, c0
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]133 tst \rd, #1 @ MMU enabled?
134 ldreq \rd, =__virt_to_phys(omap_uart_lsr) @ MMU not enabled
135 ldrne \rd, =omap_uart_lsr @ MMU enabled
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]136 ldr \rd, [\rd, #0]
137 ldrb \rd, [\rx, \rd]
Tony Lindgren4f2c49f2010-02-15 08:48:53 -0800[diff] [blame]138 and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
139 teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
Russell Kinga09e64f2008-08-05 16:14:15 +0100[diff] [blame]140 bne 1001b
Russell Kinga09e64f2008-08-05 16:14:15 +0100[diff] [blame]141 .endm
142
143 .macro waituart,rd,rx
144 .endm