blob: 060624f45ce01c5534f2a73139b153c6ae1d0ed4 [file] [log] [blame]
Mingkai Hu8b60d6c2010-10-12 18:18:32 +08001/*
2 * Freescale eSPI controller driver.
3 *
4 * Copyright 2010 Freescale Semiconductor, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080011#include <linux/delay.h>
Xiubo Lia3108362014-09-29 10:57:06 +080012#include <linux/err.h>
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080013#include <linux/fsl_devices.h>
Xiubo Lia3108362014-09-29 10:57:06 +080014#include <linux/interrupt.h>
Xiubo Lia3108362014-09-29 10:57:06 +080015#include <linux/module.h>
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080016#include <linux/mm.h>
17#include <linux/of.h>
Rob Herring5af50732013-09-17 14:28:33 -050018#include <linux/of_address.h>
19#include <linux/of_irq.h>
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080020#include <linux/of_platform.h>
Xiubo Lia3108362014-09-29 10:57:06 +080021#include <linux/platform_device.h>
22#include <linux/spi/spi.h>
Heiner Kallweite9abb4d2015-08-26 21:21:55 +020023#include <linux/pm_runtime.h>
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080024#include <sysdev/fsl_soc.h>
25
Grant Likelyca632f52011-06-06 01:16:30 -060026#include "spi-fsl-lib.h"
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080027
28/* eSPI Controller registers */
29struct fsl_espi_reg {
30 __be32 mode; /* 0x000 - eSPI mode register */
31 __be32 event; /* 0x004 - eSPI event register */
32 __be32 mask; /* 0x008 - eSPI mask register */
33 __be32 command; /* 0x00c - eSPI command register */
34 __be32 transmit; /* 0x010 - eSPI transmit FIFO access register*/
35 __be32 receive; /* 0x014 - eSPI receive FIFO access register*/
36 u8 res[8]; /* 0x018 - 0x01c reserved */
37 __be32 csmode[4]; /* 0x020 - 0x02c eSPI cs mode register */
38};
39
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080040/* eSPI Controller mode register definitions */
41#define SPMODE_ENABLE (1 << 31)
42#define SPMODE_LOOP (1 << 30)
43#define SPMODE_TXTHR(x) ((x) << 8)
44#define SPMODE_RXTHR(x) ((x) << 0)
45
46/* eSPI Controller CS mode register definitions */
47#define CSMODE_CI_INACTIVEHIGH (1 << 31)
48#define CSMODE_CP_BEGIN_EDGECLK (1 << 30)
49#define CSMODE_REV (1 << 29)
50#define CSMODE_DIV16 (1 << 28)
51#define CSMODE_PM(x) ((x) << 24)
52#define CSMODE_POL_1 (1 << 20)
53#define CSMODE_LEN(x) ((x) << 16)
54#define CSMODE_BEF(x) ((x) << 12)
55#define CSMODE_AFT(x) ((x) << 8)
56#define CSMODE_CG(x) ((x) << 3)
57
58/* Default mode/csmode for eSPI controller */
59#define SPMODE_INIT_VAL (SPMODE_TXTHR(4) | SPMODE_RXTHR(3))
60#define CSMODE_INIT_VAL (CSMODE_POL_1 | CSMODE_BEF(0) \
61 | CSMODE_AFT(0) | CSMODE_CG(1))
62
63/* SPIE register values */
64#define SPIE_NE 0x00000200 /* Not empty */
65#define SPIE_NF 0x00000100 /* Not full */
66
67/* SPIM register values */
68#define SPIM_NE 0x00000200 /* Not empty */
69#define SPIM_NF 0x00000100 /* Not full */
70#define SPIE_RXCNT(reg) ((reg >> 24) & 0x3F)
71#define SPIE_TXCNT(reg) ((reg >> 16) & 0x3F)
72
73/* SPCOM register values */
74#define SPCOM_CS(x) ((x) << 30)
75#define SPCOM_TRANLEN(x) ((x) << 0)
Hou Zhiqiang5cfa1e42016-01-22 18:58:26 +080076#define SPCOM_TRANLEN_MAX 0x10000 /* Max transaction length */
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080077
Heiner Kallweite9abb4d2015-08-26 21:21:55 +020078#define AUTOSUSPEND_TIMEOUT 2000
79
Heiner Kallweitcce7e3a2016-09-07 22:54:18 +020080static void fsl_espi_copy_to_buf(struct spi_message *m,
81 struct mpc8xxx_spi *mspi)
Heiner Kallweit7c159aa2016-09-07 22:50:53 +020082{
Heiner Kallweit7c159aa2016-09-07 22:50:53 +020083 struct spi_transfer *t;
84 u8 *buf = mspi->local_buf;
85
86 list_for_each_entry(t, &m->transfers, transfer_list) {
Heiner Kallweitcce7e3a2016-09-07 22:54:18 +020087 if (t->tx_buf)
Heiner Kallweit7c159aa2016-09-07 22:50:53 +020088 memcpy(buf, t->tx_buf, t->len);
Heiner Kallweitcce7e3a2016-09-07 22:54:18 +020089 else
Heiner Kallweit7c159aa2016-09-07 22:50:53 +020090 memset(buf, 0, t->len);
Heiner Kallweit7c159aa2016-09-07 22:50:53 +020091 buf += t->len;
92 }
Heiner Kallweitcce7e3a2016-09-07 22:54:18 +020093}
Heiner Kallweit7c159aa2016-09-07 22:50:53 +020094
Heiner Kallweitcce7e3a2016-09-07 22:54:18 +020095static void fsl_espi_copy_from_buf(struct spi_message *m,
96 struct mpc8xxx_spi *mspi)
97{
98 struct spi_transfer *t;
99 u8 *buf = mspi->local_buf;
100
101 list_for_each_entry(t, &m->transfers, transfer_list) {
102 if (t->rx_buf)
103 memcpy(t->rx_buf, buf, t->len);
104 buf += t->len;
105 }
Heiner Kallweit7c159aa2016-09-07 22:50:53 +0200106}
107
Heiner Kallweitd3152cf12016-09-07 22:53:38 +0200108static int fsl_espi_check_message(struct spi_message *m)
109{
110 struct mpc8xxx_spi *mspi = spi_master_get_devdata(m->spi->master);
111 struct spi_transfer *t, *first;
112
113 if (m->frame_length > SPCOM_TRANLEN_MAX) {
114 dev_err(mspi->dev, "message too long, size is %u bytes\n",
115 m->frame_length);
116 return -EMSGSIZE;
117 }
118
119 first = list_first_entry(&m->transfers, struct spi_transfer,
120 transfer_list);
121 list_for_each_entry(t, &m->transfers, transfer_list) {
122 if (first->bits_per_word != t->bits_per_word ||
123 first->speed_hz != t->speed_hz) {
124 dev_err(mspi->dev, "bits_per_word/speed_hz should be the same for all transfers\n");
125 return -EINVAL;
126 }
127 }
128
129 return 0;
130}
131
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800132static void fsl_espi_change_mode(struct spi_device *spi)
133{
134 struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master);
135 struct spi_mpc8xxx_cs *cs = spi->controller_state;
136 struct fsl_espi_reg *reg_base = mspi->reg_base;
137 __be32 __iomem *mode = &reg_base->csmode[spi->chip_select];
138 __be32 __iomem *espi_mode = &reg_base->mode;
139 u32 tmp;
140 unsigned long flags;
141
142 /* Turn off IRQs locally to minimize time that SPI is disabled. */
143 local_irq_save(flags);
144
145 /* Turn off SPI unit prior changing mode */
146 tmp = mpc8xxx_spi_read_reg(espi_mode);
147 mpc8xxx_spi_write_reg(espi_mode, tmp & ~SPMODE_ENABLE);
148 mpc8xxx_spi_write_reg(mode, cs->hw_mode);
149 mpc8xxx_spi_write_reg(espi_mode, tmp);
150
151 local_irq_restore(flags);
152}
153
154static u32 fsl_espi_tx_buf_lsb(struct mpc8xxx_spi *mpc8xxx_spi)
155{
156 u32 data;
157 u16 data_h;
158 u16 data_l;
159 const u32 *tx = mpc8xxx_spi->tx;
160
161 if (!tx)
162 return 0;
163
164 data = *tx++ << mpc8xxx_spi->tx_shift;
165 data_l = data & 0xffff;
166 data_h = (data >> 16) & 0xffff;
167 swab16s(&data_l);
168 swab16s(&data_h);
169 data = data_h | data_l;
170
171 mpc8xxx_spi->tx = tx;
172 return data;
173}
174
Heiner Kallweitea616ee2016-08-25 06:44:42 +0200175static void fsl_espi_setup_transfer(struct spi_device *spi,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800176 struct spi_transfer *t)
177{
178 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
Heiner Kallweitd198ebf2016-09-13 23:15:45 +0200179 int bits_per_word = t ? t->bits_per_word : spi->bits_per_word;
180 u32 hz = t ? t->speed_hz : spi->max_speed_hz;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800181 u8 pm;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800182 struct spi_mpc8xxx_cs *cs = spi->controller_state;
183
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800184 cs->rx_shift = 0;
185 cs->tx_shift = 0;
186 cs->get_rx = mpc8xxx_spi_rx_buf_u32;
187 cs->get_tx = mpc8xxx_spi_tx_buf_u32;
188 if (bits_per_word <= 8) {
189 cs->rx_shift = 8 - bits_per_word;
Stephen Warren51faed62013-05-30 09:59:41 -0600190 } else {
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800191 cs->rx_shift = 16 - bits_per_word;
192 if (spi->mode & SPI_LSB_FIRST)
193 cs->get_tx = fsl_espi_tx_buf_lsb;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800194 }
195
196 mpc8xxx_spi->rx_shift = cs->rx_shift;
197 mpc8xxx_spi->tx_shift = cs->tx_shift;
198 mpc8xxx_spi->get_rx = cs->get_rx;
199 mpc8xxx_spi->get_tx = cs->get_tx;
200
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800201 /* mask out bits we are going to set */
202 cs->hw_mode &= ~(CSMODE_LEN(0xF) | CSMODE_DIV16 | CSMODE_PM(0xF));
203
Heiner Kallweita755af52016-09-04 09:56:57 +0200204 cs->hw_mode |= CSMODE_LEN(bits_per_word - 1);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800205
206 if ((mpc8xxx_spi->spibrg / hz) > 64) {
207 cs->hw_mode |= CSMODE_DIV16;
Sebastian Andrzej Siewior35faa552012-03-15 18:42:31 +0100208 pm = DIV_ROUND_UP(mpc8xxx_spi->spibrg, hz * 16 * 4);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800209
Sebastian Andrzej Siewior87bf5ab2012-03-15 18:42:32 +0100210 WARN_ONCE(pm > 33, "%s: Requested speed is too low: %d Hz. "
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800211 "Will use %d Hz instead.\n", dev_name(&spi->dev),
Sebastian Andrzej Siewior87bf5ab2012-03-15 18:42:32 +0100212 hz, mpc8xxx_spi->spibrg / (4 * 16 * (32 + 1)));
213 if (pm > 33)
214 pm = 33;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800215 } else {
Sebastian Andrzej Siewior35faa552012-03-15 18:42:31 +0100216 pm = DIV_ROUND_UP(mpc8xxx_spi->spibrg, hz * 4);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800217 }
218 if (pm)
219 pm--;
Sebastian Andrzej Siewior87bf5ab2012-03-15 18:42:32 +0100220 if (pm < 2)
221 pm = 2;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800222
223 cs->hw_mode |= CSMODE_PM(pm);
224
225 fsl_espi_change_mode(spi);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800226}
227
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800228static int fsl_espi_bufs(struct spi_device *spi, struct spi_transfer *t)
229{
230 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
231 struct fsl_espi_reg *reg_base = mpc8xxx_spi->reg_base;
Heiner Kallweit5bcc6a22016-09-07 22:53:01 +0200232 u32 word;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800233 int ret;
234
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800235 mpc8xxx_spi->len = t->len;
Heiner Kallweit5bcc6a22016-09-07 22:53:01 +0200236 mpc8xxx_spi->count = roundup(t->len, 4) / 4;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800237
238 mpc8xxx_spi->tx = t->tx_buf;
239 mpc8xxx_spi->rx = t->rx_buf;
240
Wolfram Sang16735d02013-11-14 14:32:02 -0800241 reinit_completion(&mpc8xxx_spi->done);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800242
243 /* Set SPCOM[CS] and SPCOM[TRANLEN] field */
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800244 mpc8xxx_spi_write_reg(&reg_base->command,
245 (SPCOM_CS(spi->chip_select) | SPCOM_TRANLEN(t->len - 1)));
246
Heiner Kallweit5bcc6a22016-09-07 22:53:01 +0200247 /* enable rx ints */
248 mpc8xxx_spi_write_reg(&reg_base->mask, SPIM_NE);
249
250 /* transmit word */
251 word = mpc8xxx_spi->get_tx(mpc8xxx_spi);
252 mpc8xxx_spi_write_reg(&reg_base->transmit, word);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800253
Nobuteru Hayashiaa70e562016-03-18 11:35:21 +0000254 /* Won't hang up forever, SPI bus sometimes got lost interrupts... */
255 ret = wait_for_completion_timeout(&mpc8xxx_spi->done, 2 * HZ);
256 if (ret == 0)
257 dev_err(mpc8xxx_spi->dev,
258 "Transaction hanging up (left %d bytes)\n",
259 mpc8xxx_spi->count);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800260
261 /* disable rx ints */
262 mpc8xxx_spi_write_reg(&reg_base->mask, 0);
263
Heiner Kallweit84ccfc32016-09-07 22:52:43 +0200264 return mpc8xxx_spi->count > 0 ? -EMSGSIZE : 0;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800265}
266
Heiner Kallweit38d003f2016-09-07 22:54:51 +0200267static int fsl_espi_trans(struct spi_message *m, struct spi_transfer *trans)
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800268{
Heiner Kallweit38d003f2016-09-07 22:54:51 +0200269 struct mpc8xxx_spi *mspi = spi_master_get_devdata(m->spi->master);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800270 struct spi_device *spi = m->spi;
Heiner Kallweit38d003f2016-09-07 22:54:51 +0200271 int ret;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800272
Heiner Kallweit38d003f2016-09-07 22:54:51 +0200273 fsl_espi_copy_to_buf(m, mspi);
Heiner Kallweitfaceef32016-09-07 22:52:06 +0200274 fsl_espi_setup_transfer(spi, trans);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800275
Heiner Kallweit06af1152016-09-07 22:54:35 +0200276 ret = fsl_espi_bufs(spi, trans);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800277
Heiner Kallweitfaceef32016-09-07 22:52:06 +0200278 if (trans->delay_usecs)
279 udelay(trans->delay_usecs);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800280
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800281 fsl_espi_setup_transfer(spi, NULL);
Heiner Kallweite33a3ad2016-09-07 22:51:10 +0200282
Heiner Kallweitcce7e3a2016-09-07 22:54:18 +0200283 if (!ret)
284 fsl_espi_copy_from_buf(m, mspi);
Heiner Kallweite33a3ad2016-09-07 22:51:10 +0200285
286 return ret;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800287}
288
Heiner Kallweitc592bec2014-12-03 07:56:17 +0100289static int fsl_espi_do_one_msg(struct spi_master *master,
290 struct spi_message *m)
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800291{
Heiner Kallweit96361faf2016-09-07 22:54:00 +0200292 struct mpc8xxx_spi *mspi = spi_master_get_devdata(m->spi->master);
Heiner Kallweit06af1152016-09-07 22:54:35 +0200293 unsigned int delay_usecs = 0;
Heiner Kallweitfaceef32016-09-07 22:52:06 +0200294 struct spi_transfer *t, trans = {};
Heiner Kallweite33a3ad2016-09-07 22:51:10 +0200295 int ret;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800296
Heiner Kallweitd3152cf12016-09-07 22:53:38 +0200297 ret = fsl_espi_check_message(m);
298 if (ret)
299 goto out;
300
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800301 list_for_each_entry(t, &m->transfers, transfer_list) {
Heiner Kallweit96361faf2016-09-07 22:54:00 +0200302 if (t->delay_usecs > delay_usecs)
303 delay_usecs = t->delay_usecs;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800304 }
305
Heiner Kallweit96361faf2016-09-07 22:54:00 +0200306 t = list_first_entry(&m->transfers, struct spi_transfer,
307 transfer_list);
308
Heiner Kallweit06af1152016-09-07 22:54:35 +0200309 trans.len = m->frame_length;
Heiner Kallweit96361faf2016-09-07 22:54:00 +0200310 trans.speed_hz = t->speed_hz;
311 trans.bits_per_word = t->bits_per_word;
312 trans.delay_usecs = delay_usecs;
313 trans.tx_buf = mspi->local_buf;
314 trans.rx_buf = mspi->local_buf;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800315
Heiner Kallweit06af1152016-09-07 22:54:35 +0200316 if (trans.len)
317 ret = fsl_espi_trans(m, &trans);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800318
Heiner Kallweitfaceef32016-09-07 22:52:06 +0200319 m->actual_length = ret ? 0 : trans.len;
Heiner Kallweitd3152cf12016-09-07 22:53:38 +0200320out:
Heiner Kallweit0319d492016-09-07 22:51:29 +0200321 if (m->status == -EINPROGRESS)
322 m->status = ret;
323
Heiner Kallweitc592bec2014-12-03 07:56:17 +0100324 spi_finalize_current_message(master);
Heiner Kallweit0319d492016-09-07 22:51:29 +0200325
326 return ret;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800327}
328
329static int fsl_espi_setup(struct spi_device *spi)
330{
331 struct mpc8xxx_spi *mpc8xxx_spi;
332 struct fsl_espi_reg *reg_base;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800333 u32 hw_mode;
334 u32 loop_mode;
Axel Lind9f26742014-08-31 12:44:09 +0800335 struct spi_mpc8xxx_cs *cs = spi_get_ctldata(spi);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800336
337 if (!spi->max_speed_hz)
338 return -EINVAL;
339
340 if (!cs) {
Axel Lind9f26742014-08-31 12:44:09 +0800341 cs = kzalloc(sizeof(*cs), GFP_KERNEL);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800342 if (!cs)
343 return -ENOMEM;
Axel Lind9f26742014-08-31 12:44:09 +0800344 spi_set_ctldata(spi, cs);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800345 }
346
347 mpc8xxx_spi = spi_master_get_devdata(spi->master);
348 reg_base = mpc8xxx_spi->reg_base;
349
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200350 pm_runtime_get_sync(mpc8xxx_spi->dev);
351
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300352 hw_mode = cs->hw_mode; /* Save original settings */
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800353 cs->hw_mode = mpc8xxx_spi_read_reg(
354 &reg_base->csmode[spi->chip_select]);
355 /* mask out bits we are going to set */
356 cs->hw_mode &= ~(CSMODE_CP_BEGIN_EDGECLK | CSMODE_CI_INACTIVEHIGH
357 | CSMODE_REV);
358
359 if (spi->mode & SPI_CPHA)
360 cs->hw_mode |= CSMODE_CP_BEGIN_EDGECLK;
361 if (spi->mode & SPI_CPOL)
362 cs->hw_mode |= CSMODE_CI_INACTIVEHIGH;
363 if (!(spi->mode & SPI_LSB_FIRST))
364 cs->hw_mode |= CSMODE_REV;
365
366 /* Handle the loop mode */
367 loop_mode = mpc8xxx_spi_read_reg(&reg_base->mode);
368 loop_mode &= ~SPMODE_LOOP;
369 if (spi->mode & SPI_LOOP)
370 loop_mode |= SPMODE_LOOP;
371 mpc8xxx_spi_write_reg(&reg_base->mode, loop_mode);
372
Heiner Kallweitea616ee2016-08-25 06:44:42 +0200373 fsl_espi_setup_transfer(spi, NULL);
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200374
375 pm_runtime_mark_last_busy(mpc8xxx_spi->dev);
376 pm_runtime_put_autosuspend(mpc8xxx_spi->dev);
377
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800378 return 0;
379}
380
Axel Lind9f26742014-08-31 12:44:09 +0800381static void fsl_espi_cleanup(struct spi_device *spi)
382{
383 struct spi_mpc8xxx_cs *cs = spi_get_ctldata(spi);
384
385 kfree(cs);
386 spi_set_ctldata(spi, NULL);
387}
388
Heiner Kallweit10ed1e62016-08-25 06:45:16 +0200389static void fsl_espi_cpu_irq(struct mpc8xxx_spi *mspi, u32 events)
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800390{
391 struct fsl_espi_reg *reg_base = mspi->reg_base;
392
393 /* We need handle RX first */
394 if (events & SPIE_NE) {
Mingkai Hue6289d62010-12-21 09:26:07 +0800395 u32 rx_data, tmp;
396 u8 rx_data_8;
Nobuteru Hayashi6319a682016-03-18 11:35:21 +0000397 int rx_nr_bytes = 4;
Nobuteru Hayashia12ddd62016-03-18 11:35:21 +0000398 int ret;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800399
400 /* Spin until RX is done */
Nobuteru Hayashia12ddd62016-03-18 11:35:21 +0000401 if (SPIE_RXCNT(events) < min(4, mspi->len)) {
402 ret = spin_event_timeout(
403 !(SPIE_RXCNT(events =
404 mpc8xxx_spi_read_reg(&reg_base->event)) <
405 min(4, mspi->len)),
406 10000, 0); /* 10 msec */
407 if (!ret)
408 dev_err(mspi->dev,
409 "tired waiting for SPIE_RXCNT\n");
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800410 }
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800411
Mingkai Hue6289d62010-12-21 09:26:07 +0800412 if (mspi->len >= 4) {
413 rx_data = mpc8xxx_spi_read_reg(&reg_base->receive);
Nobuteru Hayashi6319a682016-03-18 11:35:21 +0000414 } else if (mspi->len <= 0) {
415 dev_err(mspi->dev,
416 "unexpected RX(SPIE_NE) interrupt occurred,\n"
417 "(local rxlen %d bytes, reg rxlen %d bytes)\n",
418 min(4, mspi->len), SPIE_RXCNT(events));
419 rx_nr_bytes = 0;
Mingkai Hue6289d62010-12-21 09:26:07 +0800420 } else {
Nobuteru Hayashi6319a682016-03-18 11:35:21 +0000421 rx_nr_bytes = mspi->len;
Mingkai Hue6289d62010-12-21 09:26:07 +0800422 tmp = mspi->len;
423 rx_data = 0;
424 while (tmp--) {
425 rx_data_8 = in_8((u8 *)&reg_base->receive);
426 rx_data |= (rx_data_8 << (tmp * 8));
427 }
428
429 rx_data <<= (4 - mspi->len) * 8;
430 }
431
Nobuteru Hayashi6319a682016-03-18 11:35:21 +0000432 mspi->len -= rx_nr_bytes;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800433
434 if (mspi->rx)
435 mspi->get_rx(rx_data, mspi);
436 }
437
438 if (!(events & SPIE_NF)) {
439 int ret;
440
441 /* spin until TX is done */
442 ret = spin_event_timeout(((events = mpc8xxx_spi_read_reg(
Jane Wan7a0a1752015-05-01 16:37:42 -0700443 &reg_base->event)) & SPIE_NF), 1000, 0);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800444 if (!ret) {
445 dev_err(mspi->dev, "tired waiting for SPIE_NF\n");
Jane Wan7a0a1752015-05-01 16:37:42 -0700446
447 /* Clear the SPIE bits */
448 mpc8xxx_spi_write_reg(&reg_base->event, events);
449 complete(&mspi->done);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800450 return;
451 }
452 }
453
454 /* Clear the events */
455 mpc8xxx_spi_write_reg(&reg_base->event, events);
456
457 mspi->count -= 1;
458 if (mspi->count) {
459 u32 word = mspi->get_tx(mspi);
460
461 mpc8xxx_spi_write_reg(&reg_base->transmit, word);
462 } else {
463 complete(&mspi->done);
464 }
465}
466
467static irqreturn_t fsl_espi_irq(s32 irq, void *context_data)
468{
469 struct mpc8xxx_spi *mspi = context_data;
470 struct fsl_espi_reg *reg_base = mspi->reg_base;
471 irqreturn_t ret = IRQ_NONE;
472 u32 events;
473
474 /* Get interrupt events(tx/rx) */
475 events = mpc8xxx_spi_read_reg(&reg_base->event);
476 if (events)
477 ret = IRQ_HANDLED;
478
479 dev_vdbg(mspi->dev, "%s: events %x\n", __func__, events);
480
481 fsl_espi_cpu_irq(mspi, events);
482
483 return ret;
484}
485
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200486#ifdef CONFIG_PM
487static int fsl_espi_runtime_suspend(struct device *dev)
Heiner Kallweit75506d02014-12-03 07:56:19 +0100488{
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200489 struct spi_master *master = dev_get_drvdata(dev);
490 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master);
491 struct fsl_espi_reg *reg_base = mpc8xxx_spi->reg_base;
Heiner Kallweit75506d02014-12-03 07:56:19 +0100492 u32 regval;
493
Heiner Kallweit75506d02014-12-03 07:56:19 +0100494 regval = mpc8xxx_spi_read_reg(&reg_base->mode);
495 regval &= ~SPMODE_ENABLE;
496 mpc8xxx_spi_write_reg(&reg_base->mode, regval);
497
498 return 0;
499}
500
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200501static int fsl_espi_runtime_resume(struct device *dev)
Heiner Kallweit75506d02014-12-03 07:56:19 +0100502{
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200503 struct spi_master *master = dev_get_drvdata(dev);
504 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master);
505 struct fsl_espi_reg *reg_base = mpc8xxx_spi->reg_base;
Heiner Kallweit75506d02014-12-03 07:56:19 +0100506 u32 regval;
507
Heiner Kallweit75506d02014-12-03 07:56:19 +0100508 regval = mpc8xxx_spi_read_reg(&reg_base->mode);
509 regval |= SPMODE_ENABLE;
510 mpc8xxx_spi_write_reg(&reg_base->mode, regval);
511
512 return 0;
513}
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200514#endif
Heiner Kallweit75506d02014-12-03 07:56:19 +0100515
Heiner Kallweit02a595d2016-08-17 21:11:01 +0200516static size_t fsl_espi_max_message_size(struct spi_device *spi)
Michal Suchanekb541eef2015-12-02 10:38:21 +0000517{
518 return SPCOM_TRANLEN_MAX;
519}
520
Grant Likelyfd4a3192012-12-07 16:57:14 +0000521static struct spi_master * fsl_espi_probe(struct device *dev,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800522 struct resource *mem, unsigned int irq)
523{
Jingoo Han8074cf02013-07-30 16:58:59 +0900524 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800525 struct spi_master *master;
526 struct mpc8xxx_spi *mpc8xxx_spi;
527 struct fsl_espi_reg *reg_base;
Jane Wand0fb47a52014-04-16 13:09:39 -0700528 struct device_node *nc;
529 const __be32 *prop;
530 u32 regval, csmode;
531 int i, len, ret = 0;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800532
533 master = spi_alloc_master(dev, sizeof(struct mpc8xxx_spi));
534 if (!master) {
535 ret = -ENOMEM;
536 goto err;
537 }
538
539 dev_set_drvdata(dev, master);
540
Heiner Kallweitc592bec2014-12-03 07:56:17 +0100541 mpc8xxx_spi_probe(dev, mem, irq);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800542
Stephen Warren24778be2013-05-21 20:36:35 -0600543 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800544 master->setup = fsl_espi_setup;
Axel Lind9f26742014-08-31 12:44:09 +0800545 master->cleanup = fsl_espi_cleanup;
Heiner Kallweitc592bec2014-12-03 07:56:17 +0100546 master->transfer_one_message = fsl_espi_do_one_msg;
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200547 master->auto_runtime_pm = true;
Heiner Kallweit02a595d2016-08-17 21:11:01 +0200548 master->max_message_size = fsl_espi_max_message_size;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800549
550 mpc8xxx_spi = spi_master_get_devdata(master);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800551
Heiner Kallweit14238772016-09-07 22:50:22 +0200552 mpc8xxx_spi->local_buf =
553 devm_kmalloc(dev, SPCOM_TRANLEN_MAX, GFP_KERNEL);
554 if (!mpc8xxx_spi->local_buf) {
555 ret = -ENOMEM;
556 goto err_probe;
557 }
558
Heiner Kallweit4178b6b2015-08-26 21:21:50 +0200559 mpc8xxx_spi->reg_base = devm_ioremap_resource(dev, mem);
Axel Lin37c5db72015-08-30 18:35:51 +0800560 if (IS_ERR(mpc8xxx_spi->reg_base)) {
561 ret = PTR_ERR(mpc8xxx_spi->reg_base);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800562 goto err_probe;
563 }
564
565 reg_base = mpc8xxx_spi->reg_base;
566
567 /* Register for SPI Interrupt */
Heiner Kallweit4178b6b2015-08-26 21:21:50 +0200568 ret = devm_request_irq(dev, mpc8xxx_spi->irq, fsl_espi_irq,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800569 0, "fsl_espi", mpc8xxx_spi);
570 if (ret)
Heiner Kallweit4178b6b2015-08-26 21:21:50 +0200571 goto err_probe;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800572
573 if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
574 mpc8xxx_spi->rx_shift = 16;
575 mpc8xxx_spi->tx_shift = 24;
576 }
577
578 /* SPI controller initializations */
579 mpc8xxx_spi_write_reg(&reg_base->mode, 0);
580 mpc8xxx_spi_write_reg(&reg_base->mask, 0);
581 mpc8xxx_spi_write_reg(&reg_base->command, 0);
582 mpc8xxx_spi_write_reg(&reg_base->event, 0xffffffff);
583
584 /* Init eSPI CS mode register */
Jane Wand0fb47a52014-04-16 13:09:39 -0700585 for_each_available_child_of_node(master->dev.of_node, nc) {
586 /* get chip select */
587 prop = of_get_property(nc, "reg", &len);
588 if (!prop || len < sizeof(*prop))
589 continue;
590 i = be32_to_cpup(prop);
591 if (i < 0 || i >= pdata->max_chipselect)
592 continue;
593
594 csmode = CSMODE_INIT_VAL;
595 /* check if CSBEF is set in device tree */
596 prop = of_get_property(nc, "fsl,csbef", &len);
597 if (prop && len >= sizeof(*prop)) {
598 csmode &= ~(CSMODE_BEF(0xf));
599 csmode |= CSMODE_BEF(be32_to_cpup(prop));
600 }
601 /* check if CSAFT is set in device tree */
602 prop = of_get_property(nc, "fsl,csaft", &len);
603 if (prop && len >= sizeof(*prop)) {
604 csmode &= ~(CSMODE_AFT(0xf));
605 csmode |= CSMODE_AFT(be32_to_cpup(prop));
606 }
607 mpc8xxx_spi_write_reg(&reg_base->csmode[i], csmode);
608
609 dev_info(dev, "cs=%d, init_csmode=0x%x\n", i, csmode);
610 }
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800611
612 /* Enable SPI interface */
613 regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE;
614
615 mpc8xxx_spi_write_reg(&reg_base->mode, regval);
616
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200617 pm_runtime_set_autosuspend_delay(dev, AUTOSUSPEND_TIMEOUT);
618 pm_runtime_use_autosuspend(dev);
619 pm_runtime_set_active(dev);
620 pm_runtime_enable(dev);
621 pm_runtime_get_sync(dev);
622
Heiner Kallweit4178b6b2015-08-26 21:21:50 +0200623 ret = devm_spi_register_master(dev, master);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800624 if (ret < 0)
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200625 goto err_pm;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800626
627 dev_info(dev, "at 0x%p (irq = %d)\n", reg_base, mpc8xxx_spi->irq);
628
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200629 pm_runtime_mark_last_busy(dev);
630 pm_runtime_put_autosuspend(dev);
631
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800632 return master;
633
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200634err_pm:
635 pm_runtime_put_noidle(dev);
636 pm_runtime_disable(dev);
637 pm_runtime_set_suspended(dev);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800638err_probe:
639 spi_master_put(master);
640err:
641 return ERR_PTR(ret);
642}
643
644static int of_fsl_espi_get_chipselects(struct device *dev)
645{
646 struct device_node *np = dev->of_node;
Jingoo Han8074cf02013-07-30 16:58:59 +0900647 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800648 const u32 *prop;
649 int len;
650
651 prop = of_get_property(np, "fsl,espi-num-chipselects", &len);
652 if (!prop || len < sizeof(*prop)) {
653 dev_err(dev, "No 'fsl,espi-num-chipselects' property\n");
654 return -EINVAL;
655 }
656
657 pdata->max_chipselect = *prop;
658 pdata->cs_control = NULL;
659
660 return 0;
661}
662
Grant Likelyfd4a3192012-12-07 16:57:14 +0000663static int of_fsl_espi_probe(struct platform_device *ofdev)
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800664{
665 struct device *dev = &ofdev->dev;
666 struct device_node *np = ofdev->dev.of_node;
667 struct spi_master *master;
668 struct resource mem;
Thierry Redingf7578492013-09-18 15:24:44 +0200669 unsigned int irq;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800670 int ret = -ENOMEM;
671
Grant Likely18d306d2011-02-22 21:02:43 -0700672 ret = of_mpc8xxx_spi_probe(ofdev);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800673 if (ret)
674 return ret;
675
676 ret = of_fsl_espi_get_chipselects(dev);
677 if (ret)
678 goto err;
679
680 ret = of_address_to_resource(np, 0, &mem);
681 if (ret)
682 goto err;
683
Thierry Redingf7578492013-09-18 15:24:44 +0200684 irq = irq_of_parse_and_map(np, 0);
Hou Zhiqiang7227cd12013-12-11 13:09:40 +0800685 if (!irq) {
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800686 ret = -EINVAL;
687 goto err;
688 }
689
Thierry Redingf7578492013-09-18 15:24:44 +0200690 master = fsl_espi_probe(dev, &mem, irq);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800691 if (IS_ERR(master)) {
692 ret = PTR_ERR(master);
693 goto err;
694 }
695
696 return 0;
697
698err:
699 return ret;
700}
701
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200702static int of_fsl_espi_remove(struct platform_device *dev)
703{
704 pm_runtime_disable(&dev->dev);
705
706 return 0;
707}
708
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800709#ifdef CONFIG_PM_SLEEP
710static int of_fsl_espi_suspend(struct device *dev)
711{
712 struct spi_master *master = dev_get_drvdata(dev);
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800713 int ret;
714
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800715 ret = spi_master_suspend(master);
716 if (ret) {
717 dev_warn(dev, "cannot suspend master\n");
718 return ret;
719 }
720
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200721 ret = pm_runtime_force_suspend(dev);
722 if (ret < 0)
723 return ret;
724
725 return 0;
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800726}
727
728static int of_fsl_espi_resume(struct device *dev)
729{
730 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
731 struct spi_master *master = dev_get_drvdata(dev);
732 struct mpc8xxx_spi *mpc8xxx_spi;
733 struct fsl_espi_reg *reg_base;
734 u32 regval;
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200735 int i, ret;
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800736
737 mpc8xxx_spi = spi_master_get_devdata(master);
738 reg_base = mpc8xxx_spi->reg_base;
739
740 /* SPI controller initializations */
741 mpc8xxx_spi_write_reg(&reg_base->mode, 0);
742 mpc8xxx_spi_write_reg(&reg_base->mask, 0);
743 mpc8xxx_spi_write_reg(&reg_base->command, 0);
744 mpc8xxx_spi_write_reg(&reg_base->event, 0xffffffff);
745
746 /* Init eSPI CS mode register */
747 for (i = 0; i < pdata->max_chipselect; i++)
748 mpc8xxx_spi_write_reg(&reg_base->csmode[i], CSMODE_INIT_VAL);
749
750 /* Enable SPI interface */
751 regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE;
752
753 mpc8xxx_spi_write_reg(&reg_base->mode, regval);
754
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200755 ret = pm_runtime_force_resume(dev);
756 if (ret < 0)
757 return ret;
758
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800759 return spi_master_resume(master);
760}
761#endif /* CONFIG_PM_SLEEP */
762
763static const struct dev_pm_ops espi_pm = {
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200764 SET_RUNTIME_PM_OPS(fsl_espi_runtime_suspend,
765 fsl_espi_runtime_resume, NULL)
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800766 SET_SYSTEM_SLEEP_PM_OPS(of_fsl_espi_suspend, of_fsl_espi_resume)
767};
768
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800769static const struct of_device_id of_fsl_espi_match[] = {
770 { .compatible = "fsl,mpc8536-espi" },
771 {}
772};
773MODULE_DEVICE_TABLE(of, of_fsl_espi_match);
774
Grant Likely18d306d2011-02-22 21:02:43 -0700775static struct platform_driver fsl_espi_driver = {
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800776 .driver = {
777 .name = "fsl_espi",
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800778 .of_match_table = of_fsl_espi_match,
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800779 .pm = &espi_pm,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800780 },
781 .probe = of_fsl_espi_probe,
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200782 .remove = of_fsl_espi_remove,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800783};
Grant Likely940ab882011-10-05 11:29:49 -0600784module_platform_driver(fsl_espi_driver);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800785
786MODULE_AUTHOR("Mingkai Hu");
787MODULE_DESCRIPTION("Enhanced Freescale SPI Driver");
788MODULE_LICENSE("GPL");