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Kukjin Kim1355bbc2012-10-24 13:41:15 +09001/*
2 * SAMSUNG EXYNOS5440 SoC device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
Andrzej Hajda86feafe2014-02-26 09:53:31 +090012#include <dt-bindings/clock/exynos5440.h>
Padmavathi Venna37992792013-06-18 00:02:08 +090013#include "skeleton.dtsi"
Kukjin Kim1355bbc2012-10-24 13:41:15 +090014
15/ {
Sachin Kamat8bdb31b2014-03-21 02:17:22 +090016 compatible = "samsung,exynos5440", "samsung,exynos5";
Kukjin Kim1355bbc2012-10-24 13:41:15 +090017
18 interrupt-parent = <&gic>;
19
Girish K Sdabd3f92013-06-18 06:35:14 +090020 aliases {
Tomasz Figa1e64f482014-06-26 13:24:35 +020021 serial0 = &serial_0;
22 serial1 = &serial_1;
Girish K Sdabd3f92013-06-18 06:35:14 +090023 spi0 = &spi_0;
Amit Daniel Kachhap5c7311b2013-07-24 14:27:16 +090024 tmuctrl0 = &tmuctrl_0;
25 tmuctrl1 = &tmuctrl_1;
26 tmuctrl2 = &tmuctrl_2;
Girish K Sdabd3f92013-06-18 06:35:14 +090027 };
28
Lee Jones644a79a2013-08-06 03:05:02 +090029 clock: clock-controller@160000 {
Thomas Abrahamd8bafc82013-03-09 17:11:33 +090030 compatible = "samsung,exynos5440-clock";
31 reg = <0x160000 0x1000>;
32 #clock-cells = <1>;
33 };
34
Tomasz Figa0572b722013-12-19 03:17:54 +090035 gic: interrupt-controller@2E0000 {
Kukjin Kim1355bbc2012-10-24 13:41:15 +090036 compatible = "arm,cortex-a15-gic";
37 #interrupt-cells = <3>;
38 interrupt-controller;
Giridhar Maruthy3279dd32013-04-04 15:25:00 +090039 reg = <0x2E1000 0x1000>,
40 <0x2E2000 0x1000>,
41 <0x2E4000 0x2000>,
42 <0x2E6000 0x2000>;
43 interrupts = <1 9 0xf04>;
Kukjin Kim1355bbc2012-10-24 13:41:15 +090044 };
45
46 cpus {
Kukjin Kimf5108e12012-12-06 16:54:10 +090047 #address-cells = <1>;
48 #size-cells = <0>;
49
Kukjin Kim1355bbc2012-10-24 13:41:15 +090050 cpu@0 {
Lorenzo Pieralisi88e41842013-04-18 18:32:40 +010051 device_type = "cpu";
Kukjin Kim1355bbc2012-10-24 13:41:15 +090052 compatible = "arm,cortex-a15";
Kukjin Kimf5108e12012-12-06 16:54:10 +090053 reg = <0>;
Kukjin Kim1355bbc2012-10-24 13:41:15 +090054 };
55 cpu@1 {
Lorenzo Pieralisi88e41842013-04-18 18:32:40 +010056 device_type = "cpu";
Kukjin Kim1355bbc2012-10-24 13:41:15 +090057 compatible = "arm,cortex-a15";
Kukjin Kimf5108e12012-12-06 16:54:10 +090058 reg = <1>;
Kukjin Kim1355bbc2012-10-24 13:41:15 +090059 };
60 cpu@2 {
Lorenzo Pieralisi88e41842013-04-18 18:32:40 +010061 device_type = "cpu";
Kukjin Kim1355bbc2012-10-24 13:41:15 +090062 compatible = "arm,cortex-a15";
Kukjin Kimf5108e12012-12-06 16:54:10 +090063 reg = <2>;
Kukjin Kim1355bbc2012-10-24 13:41:15 +090064 };
65 cpu@3 {
Lorenzo Pieralisi88e41842013-04-18 18:32:40 +010066 device_type = "cpu";
Kukjin Kim1355bbc2012-10-24 13:41:15 +090067 compatible = "arm,cortex-a15";
Kukjin Kimf5108e12012-12-06 16:54:10 +090068 reg = <3>;
Kukjin Kim1355bbc2012-10-24 13:41:15 +090069 };
70 };
71
Subash Patel4c46f512013-04-05 15:22:59 +090072 arm-pmu {
73 compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
74 interrupts = <0 52 4>,
75 <0 53 4>,
76 <0 54 4>,
77 <0 55 4>;
78 };
79
Kukjin Kimf5108e12012-12-06 16:54:10 +090080 timer {
81 compatible = "arm,cortex-a15-timer",
82 "arm,armv7-timer";
83 interrupts = <1 13 0xf08>,
84 <1 14 0xf08>,
85 <1 11 0xf08>,
86 <1 10 0xf08>;
87 clock-frequency = <50000000>;
88 };
89
Amit Daniel Kachhap7f7b8ed2013-04-08 21:48:17 +090090 cpufreq@160000 {
91 compatible = "samsung,exynos5440-cpufreq";
92 reg = <0x160000 0x1000>;
93 interrupts = <0 57 0>;
94 operating-points = <
95 /* KHz uV */
Amit Daniel Kachhapafbbf922013-06-18 06:39:41 +090096 1500000 1100000
97 1400000 1075000
98 1300000 1050000
Amit Daniel Kachhap7f7b8ed2013-04-08 21:48:17 +090099 1200000 1025000
Amit Daniel Kachhapafbbf922013-06-18 06:39:41 +0900100 1100000 1000000
Amit Daniel Kachhap7f7b8ed2013-04-08 21:48:17 +0900101 1000000 975000
Amit Daniel Kachhapafbbf922013-06-18 06:39:41 +0900102 900000 950000
Amit Daniel Kachhap7f7b8ed2013-04-08 21:48:17 +0900103 800000 925000
104 >;
105 };
106
Tomasz Figa1e64f482014-06-26 13:24:35 +0200107 serial_0: serial@B0000 {
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900108 compatible = "samsung,exynos4210-uart";
109 reg = <0xB0000 0x1000>;
110 interrupts = <0 2 0>;
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900111 clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
Thomas Abraham6a0338c2013-03-09 17:19:17 +0900112 clock-names = "uart", "clk_uart_baud0";
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900113 };
114
Tomasz Figa1e64f482014-06-26 13:24:35 +0200115 serial_1: serial@C0000 {
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900116 compatible = "samsung,exynos4210-uart";
117 reg = <0xC0000 0x1000>;
118 interrupts = <0 3 0>;
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900119 clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
Thomas Abraham6a0338c2013-03-09 17:19:17 +0900120 clock-names = "uart", "clk_uart_baud0";
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900121 };
122
Girish K Sdabd3f92013-06-18 06:35:14 +0900123 spi_0: spi@D0000 {
124 compatible = "samsung,exynos5440-spi";
125 reg = <0xD0000 0x100>;
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900126 interrupts = <0 4 0>;
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900127 #address-cells = <1>;
128 #size-cells = <0>;
Girish K Sdabd3f92013-06-18 06:35:14 +0900129 samsung,spi-src-clk = <0>;
130 num-cs = <1>;
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900131 clocks = <&clock CLK_B_125>, <&clock CLK_SPI_BAUD>;
Thomas Abraham6a0338c2013-03-09 17:19:17 +0900132 clock-names = "spi", "spi_busclk0";
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900133 };
134
Jingoo Hanb342e642013-06-21 16:26:14 +0900135 pin_ctrl: pinctrl {
Thomas Abrahamf6925432012-12-27 13:25:02 -0800136 compatible = "samsung,exynos5440-pinctrl";
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900137 reg = <0xE0000 0x1000>;
Thomas Abraham71d87da2013-04-05 15:20:03 +0900138 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>,
139 <0 41 0>, <0 42 0>, <0 43 0>, <0 44 0>;
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900140 interrupt-controller;
141 #interrupt-cells = <2>;
Thomas Abrahamb1ce1012012-10-24 17:18:52 +0900142 #gpio-cells = <2>;
143
144 fan: fan {
145 samsung,exynos5440-pin-function = <1>;
146 };
147
148 hdd_led0: hdd_led0 {
149 samsung,exynos5440-pin-function = <2>;
150 };
151
152 hdd_led1: hdd_led1 {
153 samsung,exynos5440-pin-function = <3>;
154 };
155
156 uart1: uart1 {
157 samsung,exynos5440-pin-function = <4>;
158 };
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900159 };
160
161 i2c@F0000 {
Giridhar Maruthy49498c52012-12-28 09:33:58 -0800162 compatible = "samsung,exynos5440-i2c";
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900163 reg = <0xF0000 0x1000>;
164 interrupts = <0 5 0>;
165 #address-cells = <1>;
166 #size-cells = <0>;
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900167 clocks = <&clock CLK_B_125>;
Thomas Abraham6a0338c2013-03-09 17:19:17 +0900168 clock-names = "i2c";
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900169 };
170
171 i2c@100000 {
Giridhar Maruthy49498c52012-12-28 09:33:58 -0800172 compatible = "samsung,exynos5440-i2c";
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900173 reg = <0x100000 0x1000>;
174 interrupts = <0 6 0>;
175 #address-cells = <1>;
176 #size-cells = <0>;
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900177 clocks = <&clock CLK_B_125>;
Thomas Abraham6a0338c2013-03-09 17:19:17 +0900178 clock-names = "i2c";
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900179 };
180
Sachin Kamat64f5d1e2014-05-28 00:56:26 +0900181 watchdog@110000 {
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900182 compatible = "samsung,s3c2410-wdt";
183 reg = <0x110000 0x1000>;
184 interrupts = <0 1 0>;
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900185 clocks = <&clock CLK_B_125>;
Thomas Abraham6a0338c2013-03-09 17:19:17 +0900186 clock-names = "watchdog";
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900187 };
188
Byungho Anc038c4d2013-04-05 15:22:58 +0900189 gmac: ethernet@00230000 {
190 compatible = "snps,dwmac-3.70a";
191 reg = <0x00230000 0x8000>;
192 interrupt-parent = <&gic>;
193 interrupts = <0 31 4>;
194 interrupt-names = "macirq";
195 phy-mode = "sgmii";
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900196 clocks = <&clock CLK_GMAC0>;
Byungho Anc038c4d2013-04-05 15:22:58 +0900197 clock-names = "stmmaceth";
198 };
199
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900200 amba {
201 #address-cells = <1>;
202 #size-cells = <1>;
203 compatible = "arm,amba-bus";
204 interrupt-parent = <&gic>;
205 ranges;
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900206 };
207
208 rtc {
209 compatible = "samsung,s3c6410-rtc";
210 reg = <0x130000 0x1000>;
Giridhar Maruthye877a5a2012-12-27 18:02:58 -0800211 interrupts = <0 17 0>, <0 16 0>;
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900212 clocks = <&clock CLK_B_125>;
Thomas Abraham6a0338c2013-03-09 17:19:17 +0900213 clock-names = "rtc";
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900214 };
Girish K S1a12f522013-06-10 17:29:34 +0900215
Amit Daniel Kachhap5c7311b2013-07-24 14:27:16 +0900216 tmuctrl_0: tmuctrl@160118 {
217 compatible = "samsung,exynos5440-tmu";
218 reg = <0x160118 0x230>, <0x160368 0x10>;
219 interrupts = <0 58 0>;
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900220 clocks = <&clock CLK_B_125>;
Amit Daniel Kachhap5c7311b2013-07-24 14:27:16 +0900221 clock-names = "tmu_apbif";
222 };
223
224 tmuctrl_1: tmuctrl@16011C {
225 compatible = "samsung,exynos5440-tmu";
226 reg = <0x16011C 0x230>, <0x160368 0x10>;
227 interrupts = <0 58 0>;
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900228 clocks = <&clock CLK_B_125>;
Amit Daniel Kachhap5c7311b2013-07-24 14:27:16 +0900229 clock-names = "tmu_apbif";
230 };
231
232 tmuctrl_2: tmuctrl@160120 {
233 compatible = "samsung,exynos5440-tmu";
234 reg = <0x160120 0x230>, <0x160368 0x10>;
235 interrupts = <0 58 0>;
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900236 clocks = <&clock CLK_B_125>;
Amit Daniel Kachhap5c7311b2013-07-24 14:27:16 +0900237 clock-names = "tmu_apbif";
238 };
239
Girish K S1a12f522013-06-10 17:29:34 +0900240 sata@210000 {
241 compatible = "snps,exynos5440-ahci";
242 reg = <0x210000 0x10000>;
243 interrupts = <0 30 0>;
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900244 clocks = <&clock CLK_SATA>;
Girish K S1a12f522013-06-10 17:29:34 +0900245 clock-names = "sata";
246 };
247
Thomas Abrahama3808902013-06-12 04:58:34 +0900248 ohci@220000 {
249 compatible = "samsung,exynos5440-ohci";
250 reg = <0x220000 0x1000>;
251 interrupts = <0 29 0>;
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900252 clocks = <&clock CLK_USB>;
Thomas Abrahama3808902013-06-12 04:58:34 +0900253 clock-names = "usbhost";
254 };
255
256 ehci@221000 {
257 compatible = "samsung,exynos5440-ehci";
258 reg = <0x221000 0x1000>;
259 interrupts = <0 29 0>;
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900260 clocks = <&clock CLK_USB>;
Thomas Abrahama3808902013-06-12 04:58:34 +0900261 clock-names = "usbhost";
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900262 };
Jingoo Han406a9322013-06-21 16:25:51 +0900263
264 pcie@290000 {
265 compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
266 reg = <0x290000 0x1000
267 0x270000 0x1000
268 0x271000 0x40>;
269 interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900270 clocks = <&clock CLK_PR0_250_O>, <&clock CLK_PB0_250_O>;
Jingoo Han406a9322013-06-21 16:25:51 +0900271 clock-names = "pcie", "pcie_bus";
272 #address-cells = <3>;
273 #size-cells = <2>;
274 device_type = "pci";
275 ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00001000 /* configuration space */
276 0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */
277 0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */
278 #interrupt-cells = <1>;
279 interrupt-map-mask = <0 0 0 0>;
280 interrupt-map = <0x0 0 &gic 53>;
Jingoo Han4b1ced82013-07-31 17:14:10 +0900281 num-lanes = <4>;
Jingoo Han331d7d62013-10-29 15:12:34 +0900282 status = "disabled";
Jingoo Han406a9322013-06-21 16:25:51 +0900283 };
284
285 pcie@2a0000 {
286 compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
287 reg = <0x2a0000 0x1000
288 0x272000 0x1000
289 0x271040 0x40>;
290 interrupts = <0 23 0>, <0 24 0>, <0 25 0>;
Andrzej Hajda86feafe2014-02-26 09:53:31 +0900291 clocks = <&clock CLK_PR1_250_O>, <&clock CLK_PB0_250_O>;
Jingoo Han406a9322013-06-21 16:25:51 +0900292 clock-names = "pcie", "pcie_bus";
293 #address-cells = <3>;
294 #size-cells = <2>;
295 device_type = "pci";
296 ranges = <0x00000800 0 0x60000000 0x60000000 0 0x00001000 /* configuration space */
297 0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */
298 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */
299 #interrupt-cells = <1>;
300 interrupt-map-mask = <0 0 0 0>;
301 interrupt-map = <0x0 0 &gic 56>;
Jingoo Han4b1ced82013-07-31 17:14:10 +0900302 num-lanes = <4>;
Jingoo Han331d7d62013-10-29 15:12:34 +0900303 status = "disabled";
Jingoo Han406a9322013-06-21 16:25:51 +0900304 };
Kukjin Kim1355bbc2012-10-24 13:41:15 +0900305};