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Yaniv Rosnerea4e0402008-06-23 20:27:26 -07001/* Copyright 2008 Broadcom Corporation
2 *
3 * Unless you and Broadcom execute a separate written software license
4 * agreement governing use of this software, this software is licensed to you
5 * under the terms of the GNU General Public License version 2, available
6 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
7 *
8 * Notwithstanding the above, under no circumstances may you combine this
9 * software in any way with any other Broadcom software provided under a
10 * license other than the GPL, without Broadcom's express prior written
11 * consent.
12 *
13 * Written by Yaniv Rosner
14 *
15 */
16
17#ifndef BNX2X_LINK_H
18#define BNX2X_LINK_H
19
20
21
22/***********************************************************/
23/* Defines */
24/***********************************************************/
25#define DEFAULT_PHY_DEV_ADDR 3
26
27
28
David S. Millerc0700f92008-12-16 23:53:20 -080029#define BNX2X_FLOW_CTRL_AUTO PORT_FEATURE_FLOW_CONTROL_AUTO
30#define BNX2X_FLOW_CTRL_TX PORT_FEATURE_FLOW_CONTROL_TX
31#define BNX2X_FLOW_CTRL_RX PORT_FEATURE_FLOW_CONTROL_RX
32#define BNX2X_FLOW_CTRL_BOTH PORT_FEATURE_FLOW_CONTROL_BOTH
33#define BNX2X_FLOW_CTRL_NONE PORT_FEATURE_FLOW_CONTROL_NONE
Yaniv Rosnerea4e0402008-06-23 20:27:26 -070034
35#define SPEED_AUTO_NEG 0
36#define SPEED_12000 12000
37#define SPEED_12500 12500
38#define SPEED_13000 13000
39#define SPEED_15000 15000
40#define SPEED_16000 16000
41
42
43/***********************************************************/
44/* Structs */
45/***********************************************************/
46/* Inputs parameters to the CLC */
47struct link_params {
48
49 u8 port;
50
51 /* Default / User Configuration */
52 u8 loopback_mode;
53#define LOOPBACK_NONE 0
54#define LOOPBACK_EMAC 1
55#define LOOPBACK_BMAC 2
56#define LOOPBACK_XGXS_10 3
57#define LOOPBACK_EXT_PHY 4
Yaniv Rosner6bbca912008-08-13 15:57:28 -070058#define LOOPBACK_EXT 5
Yaniv Rosnerea4e0402008-06-23 20:27:26 -070059
60 u16 req_duplex;
61 u16 req_flow_ctrl;
Yaniv Rosner8c99e7b2008-08-13 15:56:17 -070062 u16 req_fc_auto_adv; /* Should be set to TX / BOTH when
63 req_flow_ctrl is set to AUTO */
Yaniv Rosnerea4e0402008-06-23 20:27:26 -070064 u16 req_line_speed; /* Also determine AutoNeg */
65
66 /* Device parameters */
67 u8 mac_addr[6];
Yaniv Rosner8c99e7b2008-08-13 15:56:17 -070068
Yaniv Rosnerea4e0402008-06-23 20:27:26 -070069
70
71 /* shmem parameters */
72 u32 shmem_base;
73 u32 speed_cap_mask;
74 u32 switch_cfg;
75#define SWITCH_CFG_1G PORT_FEATURE_CON_SWITCH_1G_SWITCH
76#define SWITCH_CFG_10G PORT_FEATURE_CON_SWITCH_10G_SWITCH
77#define SWITCH_CFG_AUTO_DETECT PORT_FEATURE_CON_SWITCH_AUTO_DETECT
78
79 u16 hw_led_mode; /* part of the hw_config read from the shmem */
80 u32 serdes_config;
81 u32 lane_config;
82 u32 ext_phy_config;
83#define XGXS_EXT_PHY_TYPE(ext_phy_config) (ext_phy_config & \
84 PORT_HW_CFG_XGXS_EXT_PHY_TYPE_MASK)
85#define SERDES_EXT_PHY_TYPE(ext_phy_config) (ext_phy_config & \
86 PORT_HW_CFG_SERDES_EXT_PHY_TYPE_MASK)
87 /* Phy register parameter */
88 u32 chip_id;
89
90 /* phy_addr populated by the CLC */
91 u8 phy_addr;
92 /* Device pointer passed to all callback functions */
93 struct bnx2x *bp;
94};
95
96/* Output parameters */
97struct link_vars {
98 u8 phy_link_up; /* internal phy link indication */
99 u8 link_up;
100 u16 duplex;
101 u16 flow_ctrl;
102 u32 ieee_fc;
103 u8 mac_type;
104
105#define MAC_TYPE_NONE 0
106#define MAC_TYPE_EMAC 1
107#define MAC_TYPE_BMAC 2
108 u16 line_speed;
109 u32 autoneg;
110#define AUTO_NEG_DISABLED 0x0
111#define AUTO_NEG_ENABLED 0x1
112#define AUTO_NEG_COMPLETE 0x2
113#define AUTO_NEG_PARALLEL_DETECTION_USED 0x3
114
115 u8 phy_flags;
116
117 /* The same definitions as the shmem parameter */
118 u32 link_status;
119};
120
121/***********************************************************/
122/* Functions */
123/***********************************************************/
124
125/* Initialize the phy */
126u8 bnx2x_phy_init(struct link_params *input, struct link_vars *output);
127
128/* Reset the link. Should be called when driver or interface goes down */
129u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars);
130
131/* bnx2x_link_update should be called upon link interrupt */
132u8 bnx2x_link_update(struct link_params *input, struct link_vars *output);
133
134/* use the following cl45 functions to read/write from external_phy
135 In order to use it to read/write internal phy registers, use
136 DEFAULT_PHY_DEV_ADDR as devad, and (_bank + (_addr & 0xf)) as
137 Use ext_phy_type of 0 in case of cl22 over cl45
138 the register */
139u8 bnx2x_cl45_read(struct bnx2x *bp, u8 port, u32 ext_phy_type,
140 u8 phy_addr, u8 devad, u16 reg, u16 *ret_val);
141
142u8 bnx2x_cl45_write(struct bnx2x *bp, u8 port, u32 ext_phy_type,
143 u8 phy_addr, u8 devad, u16 reg, u16 val);
144
145/* Reads the link_status from the shmem,
Eilon Greenstein33471622008-08-13 15:59:08 -0700146 and update the link vars accordingly */
Yaniv Rosnerea4e0402008-06-23 20:27:26 -0700147void bnx2x_link_status_update(struct link_params *input,
148 struct link_vars *output);
149/* returns string representing the fw_version of the external phy */
150u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded,
151 u8 *version, u16 len);
152
153/* Set/Unset the led
154 Basically, the CLC takes care of the led for the link, but in case one needs
Eilon Greenstein33471622008-08-13 15:59:08 -0700155 to set/unset the led unnaturally, set the "mode" to LED_MODE_OPER to
Yaniv Rosnerea4e0402008-06-23 20:27:26 -0700156 blink the led, and LED_MODE_OFF to set the led off.*/
157u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed,
158 u16 hw_led_mode, u32 chip_id);
159#define LED_MODE_OFF 0
160#define LED_MODE_OPER 2
161
162u8 bnx2x_override_led_value(struct bnx2x *bp, u8 port, u32 led_idx, u32 value);
163
164u8 bnx2x_flash_download(struct bnx2x *bp, u8 port, u32 ext_phy_config,
165 u8 driver_loaded, char data[], u32 size);
166/* Get the actual link status. In case it returns 0, link is up,
167 otherwise link is down*/
168u8 bnx2x_test_link(struct link_params *input, struct link_vars *vars);
169
Yaniv Rosner6bbca912008-08-13 15:57:28 -0700170/* One-time initialization for external phy after power up */
171u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base);
Yaniv Rosnerea4e0402008-06-23 20:27:26 -0700172
173#endif /* BNX2X_LINK_H */