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Jaecheol Leea125a172012-01-07 20:18:35 +09001/*
2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * EXYNOS - CPU frequency scaling support for EXYNOS series
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
Jaecheol Leea125a172012-01-07 20:18:35 +090012#include <linux/kernel.h>
13#include <linux/err.h>
14#include <linux/clk.h>
15#include <linux/io.h>
16#include <linux/slab.h>
17#include <linux/regulator/consumer.h>
18#include <linux/cpufreq.h>
Lukasz Majewskid568b6f2013-11-28 13:42:42 +010019#include <linux/platform_device.h>
Jaecheol Leea125a172012-01-07 20:18:35 +090020
Jaecheol Lee6c523c62012-01-07 20:18:39 +090021#include <plat/cpu.h>
Jaecheol Leea125a172012-01-07 20:18:35 +090022
Kukjin Kimc4aaa292012-12-28 16:29:10 -080023#include "exynos-cpufreq.h"
24
Jaecheol Leea125a172012-01-07 20:18:35 +090025static struct exynos_dvfs_info *exynos_info;
Jaecheol Leea125a172012-01-07 20:18:35 +090026static struct regulator *arm_regulator;
Jaecheol Leea125a172012-01-07 20:18:35 +090027static unsigned int locking_frequency;
Jaecheol Leea125a172012-01-07 20:18:35 +090028
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080029static int exynos_cpufreq_get_index(unsigned int freq)
Jaecheol Leea125a172012-01-07 20:18:35 +090030{
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080031 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
32 int index;
33
34 for (index = 0;
35 freq_table[index].frequency != CPUFREQ_TABLE_END; index++)
36 if (freq_table[index].frequency == freq)
37 break;
38
39 if (freq_table[index].frequency == CPUFREQ_TABLE_END)
40 return -EINVAL;
41
42 return index;
43}
44
45static int exynos_cpufreq_scale(unsigned int target_freq)
46{
Jaecheol Leea125a172012-01-07 20:18:35 +090047 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
48 unsigned int *volt_table = exynos_info->volt_table;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080049 struct cpufreq_policy *policy = cpufreq_cpu_get(0);
50 unsigned int arm_volt, safe_arm_volt = 0;
Jaecheol Leea125a172012-01-07 20:18:35 +090051 unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
Viresh Kumard4019f02013-08-14 19:38:24 +053052 unsigned int old_freq;
Sachin Kamatd271d072013-01-25 10:18:09 -080053 int index, old_index;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080054 int ret = 0;
Jaecheol Leea125a172012-01-07 20:18:35 +090055
Viresh Kumard4019f02013-08-14 19:38:24 +053056 old_freq = policy->cur;
Jaecheol Leea125a172012-01-07 20:18:35 +090057
Jonghwa Lee53df1ad2012-07-20 02:54:02 +000058 /*
59 * The policy max have been changed so that we cannot get proper
60 * old_index with cpufreq_frequency_table_target(). Thus, ignore
LABBE Corentin05851232013-09-26 16:50:21 +020061 * policy and get the index from the raw frequency table.
Jonghwa Lee53df1ad2012-07-20 02:54:02 +000062 */
Viresh Kumard4019f02013-08-14 19:38:24 +053063 old_index = exynos_cpufreq_get_index(old_freq);
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080064 if (old_index < 0) {
65 ret = old_index;
Jaecheol Leea125a172012-01-07 20:18:35 +090066 goto out;
67 }
68
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080069 index = exynos_cpufreq_get_index(target_freq);
70 if (index < 0) {
71 ret = index;
Jaecheol Leea125a172012-01-07 20:18:35 +090072 goto out;
73 }
74
Jaecheol Leea125a172012-01-07 20:18:35 +090075 /*
76 * ARM clock source will be changed APLL to MPLL temporary
77 * To support this level, need to control regulator for
78 * required voltage level
79 */
80 if (exynos_info->need_apll_change != NULL) {
81 if (exynos_info->need_apll_change(old_index, index) &&
82 (freq_table[index].frequency < mpll_freq_khz) &&
83 (freq_table[old_index].frequency < mpll_freq_khz))
84 safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
85 }
86 arm_volt = volt_table[index];
87
Jaecheol Leea125a172012-01-07 20:18:35 +090088 /* When the new frequency is higher than current frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053089 if ((target_freq > old_freq) && !safe_arm_volt) {
Jaecheol Leea125a172012-01-07 20:18:35 +090090 /* Firstly, voltage up to increase frequency */
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080091 ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
92 if (ret) {
93 pr_err("%s: failed to set cpu voltage to %d\n",
94 __func__, arm_volt);
Viresh Kumard4019f02013-08-14 19:38:24 +053095 return ret;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080096 }
Jaecheol Leea125a172012-01-07 20:18:35 +090097 }
98
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080099 if (safe_arm_volt) {
100 ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
Jaecheol Leea125a172012-01-07 20:18:35 +0900101 safe_arm_volt);
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800102 if (ret) {
103 pr_err("%s: failed to set cpu voltage to %d\n",
104 __func__, safe_arm_volt);
Viresh Kumard4019f02013-08-14 19:38:24 +0530105 return ret;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800106 }
107 }
Jonghwan Choi857d90f2012-12-23 15:57:39 -0800108
109 exynos_info->set_freq(old_index, index);
Jaecheol Leea125a172012-01-07 20:18:35 +0900110
Jaecheol Leea125a172012-01-07 20:18:35 +0900111 /* When the new frequency is lower than current frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +0530112 if ((target_freq < old_freq) ||
113 ((target_freq > old_freq) && safe_arm_volt)) {
Jaecheol Leea125a172012-01-07 20:18:35 +0900114 /* down the voltage after frequency change */
Manish Badarkhe006454a2013-10-09 20:43:37 +0530115 ret = regulator_set_voltage(arm_regulator, arm_volt,
Jaecheol Leea125a172012-01-07 20:18:35 +0900116 arm_volt);
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800117 if (ret) {
118 pr_err("%s: failed to set cpu voltage to %d\n",
119 __func__, arm_volt);
120 goto out;
121 }
Jaecheol Leea125a172012-01-07 20:18:35 +0900122 }
123
124out:
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800125 cpufreq_cpu_put(policy);
126
127 return ret;
128}
129
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +0530130static int exynos_target(struct cpufreq_policy *policy, unsigned int index)
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800131{
Viresh Kumard248bb82014-03-04 11:00:28 +0800132 return exynos_cpufreq_scale(exynos_info->freq_table[index].frequency);
Jaecheol Leea125a172012-01-07 20:18:35 +0900133}
134
Jaecheol Leea125a172012-01-07 20:18:35 +0900135static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
136{
Viresh Kumar652ed952014-01-09 20:38:43 +0530137 policy->clk = exynos_info->cpu_clk;
Viresh Kumard248bb82014-03-04 11:00:28 +0800138 policy->suspend_freq = locking_frequency;
Viresh Kumarb249aba2013-10-03 20:29:13 +0530139 return cpufreq_generic_init(policy, exynos_info->freq_table, 100000);
Jaecheol Leea125a172012-01-07 20:18:35 +0900140}
141
142static struct cpufreq_driver exynos_driver = {
Viresh Kumarae6b4272013-12-03 11:20:45 +0530143 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
Viresh Kumareea61812013-10-03 20:28:06 +0530144 .verify = cpufreq_generic_frequency_table_verify,
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +0530145 .target_index = exynos_target,
Viresh Kumar652ed952014-01-09 20:38:43 +0530146 .get = cpufreq_generic_get,
Jaecheol Leea125a172012-01-07 20:18:35 +0900147 .init = exynos_cpufreq_cpu_init,
Viresh Kumareea61812013-10-03 20:28:06 +0530148 .exit = cpufreq_generic_exit,
Jaecheol Leea125a172012-01-07 20:18:35 +0900149 .name = "exynos_cpufreq",
Viresh Kumareea61812013-10-03 20:28:06 +0530150 .attr = cpufreq_generic_attr,
Lukasz Majewskic683c2c2013-12-20 15:24:52 +0100151#ifdef CONFIG_ARM_EXYNOS_CPU_FREQ_BOOST_SW
152 .boost_supported = true,
153#endif
Jaecheol Leea125a172012-01-07 20:18:35 +0900154#ifdef CONFIG_PM
Viresh Kumard248bb82014-03-04 11:00:28 +0800155 .suspend = cpufreq_generic_suspend,
Jaecheol Leea125a172012-01-07 20:18:35 +0900156#endif
157};
158
Lukasz Majewskid568b6f2013-11-28 13:42:42 +0100159static int exynos_cpufreq_probe(struct platform_device *pdev)
Jaecheol Leea125a172012-01-07 20:18:35 +0900160{
161 int ret = -EINVAL;
162
Viresh Kumard5b73cd2013-08-06 22:53:06 +0530163 exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL);
Jaecheol Leea125a172012-01-07 20:18:35 +0900164 if (!exynos_info)
165 return -ENOMEM;
166
167 if (soc_is_exynos4210())
168 ret = exynos4210_cpufreq_init(exynos_info);
Jaecheol Leea35c5052012-03-10 02:59:22 -0800169 else if (soc_is_exynos4212() || soc_is_exynos4412())
170 ret = exynos4x12_cpufreq_init(exynos_info);
Jaecheol Lee562a6cb2012-03-10 03:00:02 -0800171 else if (soc_is_exynos5250())
172 ret = exynos5250_cpufreq_init(exynos_info);
Jaecheol Leea125a172012-01-07 20:18:35 +0900173 else
Amit Daniel Kachhapc1585202013-04-08 08:17:36 +0000174 return 0;
Jaecheol Leea125a172012-01-07 20:18:35 +0900175
176 if (ret)
177 goto err_vdd_arm;
178
179 if (exynos_info->set_freq == NULL) {
180 pr_err("%s: No set_freq function (ERR)\n", __func__);
181 goto err_vdd_arm;
182 }
183
184 arm_regulator = regulator_get(NULL, "vdd_arm");
185 if (IS_ERR(arm_regulator)) {
186 pr_err("%s: failed to get resource vdd_arm\n", __func__);
187 goto err_vdd_arm;
188 }
189
Viresh Kumard248bb82014-03-04 11:00:28 +0800190 /* Done here as we want to capture boot frequency */
Viresh Kumar652ed952014-01-09 20:38:43 +0530191 locking_frequency = clk_get_rate(exynos_info->cpu_clk) / 1000;
Jonghwan Choi6e45eb12013-01-18 11:09:01 -0800192
Viresh Kumard248bb82014-03-04 11:00:28 +0800193 if (!cpufreq_register_driver(&exynos_driver))
194 return 0;
Jaecheol Leea125a172012-01-07 20:18:35 +0900195
Viresh Kumard248bb82014-03-04 11:00:28 +0800196 pr_err("%s: failed to register cpufreq driver\n", __func__);
Jonghwan Choi184cddd2012-12-23 15:51:40 -0800197 regulator_put(arm_regulator);
Jaecheol Leea125a172012-01-07 20:18:35 +0900198err_vdd_arm:
199 kfree(exynos_info);
Jaecheol Leea125a172012-01-07 20:18:35 +0900200 return -EINVAL;
201}
Lukasz Majewskid568b6f2013-11-28 13:42:42 +0100202
203static struct platform_driver exynos_cpufreq_platdrv = {
204 .driver = {
205 .name = "exynos-cpufreq",
206 .owner = THIS_MODULE,
207 },
208 .probe = exynos_cpufreq_probe,
209};
210module_platform_driver(exynos_cpufreq_platdrv);