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Yoshinori Sato618b9022015-01-28 02:52:42 +09001/*
Yoshinori Sato4633f4c2015-11-07 01:31:44 +09002 * H8S TPU Driver
Yoshinori Sato618b9022015-01-28 02:52:42 +09003 *
4 * Copyright 2015 Yoshinori Sato <ysato@users.sourcefoge.jp>
5 *
6 */
7
8#include <linux/errno.h>
Yoshinori Sato618b9022015-01-28 02:52:42 +09009#include <linux/kernel.h>
Yoshinori Sato618b9022015-01-28 02:52:42 +090010#include <linux/init.h>
Yoshinori Sato618b9022015-01-28 02:52:42 +090011#include <linux/clocksource.h>
Yoshinori Sato618b9022015-01-28 02:52:42 +090012#include <linux/clk.h>
13#include <linux/io.h>
14#include <linux/of.h>
Yoshinori Sato4633f4c2015-11-07 01:31:44 +090015#include <linux/of_address.h>
16#include <linux/of_irq.h>
Yoshinori Sato618b9022015-01-28 02:52:42 +090017
Daniel Lezcano9471f1d2015-11-07 14:18:51 +010018#define TCR 0x0
19#define TSR 0x5
20#define TCNT 0x6
Yoshinori Sato618b9022015-01-28 02:52:42 +090021
Yoshinori Satod33f2502015-12-05 02:48:18 +090022#define TCFV 0x10
23
Yoshinori Sato618b9022015-01-28 02:52:42 +090024struct tpu_priv {
Yoshinori Sato618b9022015-01-28 02:52:42 +090025 struct clocksource cs;
Daniel Lezcano75160512015-11-08 22:55:12 +010026 void __iomem *mapbase1;
27 void __iomem *mapbase2;
Yoshinori Sato618b9022015-01-28 02:52:42 +090028 raw_spinlock_t lock;
29 unsigned int cs_enabled;
30};
31
32static inline unsigned long read_tcnt32(struct tpu_priv *p)
33{
34 unsigned long tcnt;
35
Yoshinori Satod33f2502015-12-05 02:48:18 +090036 tcnt = ioread16be(p->mapbase1 + TCNT) << 16;
37 tcnt |= ioread16be(p->mapbase2 + TCNT);
Yoshinori Sato618b9022015-01-28 02:52:42 +090038 return tcnt;
39}
40
41static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val)
42{
43 unsigned long v1, v2, v3;
44 int o1, o2;
45
Yoshinori Satod33f2502015-12-05 02:48:18 +090046 o1 = ioread8(p->mapbase1 + TSR) & TCFV;
Yoshinori Sato618b9022015-01-28 02:52:42 +090047
48 /* Make sure the timer value is stable. Stolen from acpi_pm.c */
49 do {
50 o2 = o1;
51 v1 = read_tcnt32(p);
52 v2 = read_tcnt32(p);
53 v3 = read_tcnt32(p);
Yoshinori Satod33f2502015-12-05 02:48:18 +090054 o1 = ioread8(p->mapbase1 + TSR) & TCFV;
Yoshinori Sato618b9022015-01-28 02:52:42 +090055 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
56 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
57
58 *val = v2;
59 return o1;
60}
61
62static inline struct tpu_priv *cs_to_priv(struct clocksource *cs)
63{
64 return container_of(cs, struct tpu_priv, cs);
65}
66
67static cycle_t tpu_clocksource_read(struct clocksource *cs)
68{
69 struct tpu_priv *p = cs_to_priv(cs);
70 unsigned long flags;
71 unsigned long long value;
72
73 raw_spin_lock_irqsave(&p->lock, flags);
74 if (tpu_get_counter(p, &value))
75 value += 0x100000000;
76 raw_spin_unlock_irqrestore(&p->lock, flags);
77
78 return value;
79}
80
81static int tpu_clocksource_enable(struct clocksource *cs)
82{
83 struct tpu_priv *p = cs_to_priv(cs);
84
85 WARN_ON(p->cs_enabled);
86
Yoshinori Satod33f2502015-12-05 02:48:18 +090087 iowrite16be(0, p->mapbase1 + TCNT);
88 iowrite16be(0, p->mapbase2 + TCNT);
89 iowrite8(0x0f, p->mapbase1 + TCR);
90 iowrite8(0x03, p->mapbase2 + TCR);
Yoshinori Sato618b9022015-01-28 02:52:42 +090091
92 p->cs_enabled = true;
93 return 0;
94}
95
96static void tpu_clocksource_disable(struct clocksource *cs)
97{
98 struct tpu_priv *p = cs_to_priv(cs);
99
100 WARN_ON(!p->cs_enabled);
101
Yoshinori Satod33f2502015-12-05 02:48:18 +0900102 iowrite8(0, p->mapbase1 + TCR);
103 iowrite8(0, p->mapbase2 + TCR);
Yoshinori Sato618b9022015-01-28 02:52:42 +0900104 p->cs_enabled = false;
105}
106
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900107static struct tpu_priv tpu_priv = {
108 .cs = {
109 .name = "H8S_TPU",
110 .rating = 200,
111 .read = tpu_clocksource_read,
112 .enable = tpu_clocksource_enable,
113 .disable = tpu_clocksource_disable,
114 .mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8),
115 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
116 },
117};
118
Yoshinori Sato618b9022015-01-28 02:52:42 +0900119#define CH_L 0
120#define CH_H 1
121
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900122static void __init h8300_tpu_init(struct device_node *node)
Yoshinori Sato618b9022015-01-28 02:52:42 +0900123{
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900124 void __iomem *base[2];
125 struct clk *clk;
Yoshinori Sato618b9022015-01-28 02:52:42 +0900126
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900127 clk = of_clk_get(node, 0);
128 if (IS_ERR(clk)) {
129 pr_err("failed to get clock for clocksource\n");
130 return;
Yoshinori Sato618b9022015-01-28 02:52:42 +0900131 }
132
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900133 base[CH_L] = of_iomap(node, CH_L);
134 if (!base[CH_L]) {
135 pr_err("failed to map registers for clocksource\n");
136 goto free_clk;
137 }
138 base[CH_H] = of_iomap(node, CH_H);
139 if (!base[CH_H]) {
140 pr_err("failed to map registers for clocksource\n");
141 goto unmap_L;
Yoshinori Sato618b9022015-01-28 02:52:42 +0900142 }
143
Daniel Lezcano75160512015-11-08 22:55:12 +0100144 tpu_priv.mapbase1 = base[CH_L];
145 tpu_priv.mapbase2 = base[CH_H];
Yoshinori Sato618b9022015-01-28 02:52:42 +0900146
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900147 clocksource_register_hz(&tpu_priv.cs, clk_get_rate(clk) / 64);
Yoshinori Sato618b9022015-01-28 02:52:42 +0900148
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900149 return;
150
151unmap_L:
152 iounmap(base[CH_H]);
153free_clk:
154 clk_put(clk);
Yoshinori Sato618b9022015-01-28 02:52:42 +0900155}
156
Yoshinori Sato4633f4c2015-11-07 01:31:44 +0900157CLOCKSOURCE_OF_DECLARE(h8300_tpu, "renesas,tpu", h8300_tpu_init);