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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef __ASM_SPINLOCK_H
2#define __ASM_SPINLOCK_H
3
4#if __LINUX_ARM_ARCH__ < 6
5#error SMP not supported on pre-ARMv6 CPUs
6#endif
7
8/*
9 * ARMv6 Spin-locking.
10 *
Russell King6d9b37a2005-07-26 19:44:26 +010011 * We exclusively read the old value. If it is zero, we may have
12 * won the lock, so we try exclusively storing it. A memory barrier
13 * is required after we get a lock, and before we release it, because
14 * V6 CPUs are assumed to have weakly ordered memory.
Linus Torvalds1da177e2005-04-16 15:20:36 -070015 *
16 * Unlocked value: 0
17 * Locked value: 1
18 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070019
Ingo Molnarfb1c8f92005-09-10 00:25:56 -070020#define __raw_spin_is_locked(x) ((x)->lock != 0)
21#define __raw_spin_unlock_wait(lock) \
22 do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070023
Ingo Molnarfb1c8f92005-09-10 00:25:56 -070024#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
Linus Torvalds1da177e2005-04-16 15:20:36 -070025
Ingo Molnarfb1c8f92005-09-10 00:25:56 -070026static inline void __raw_spin_lock(raw_spinlock_t *lock)
Linus Torvalds1da177e2005-04-16 15:20:36 -070027{
28 unsigned long tmp;
29
30 __asm__ __volatile__(
31"1: ldrex %0, [%1]\n"
32" teq %0, #0\n"
Russell King00b4c902005-12-01 15:47:24 +000033#ifdef CONFIG_CPU_32v6K
34" wfene\n"
35#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070036" strexeq %0, %2, [%1]\n"
37" teqeq %0, #0\n"
38" bne 1b"
39 : "=&r" (tmp)
40 : "r" (&lock->lock), "r" (1)
Russell King6d9b37a2005-07-26 19:44:26 +010041 : "cc");
42
43 smp_mb();
Linus Torvalds1da177e2005-04-16 15:20:36 -070044}
45
Ingo Molnarfb1c8f92005-09-10 00:25:56 -070046static inline int __raw_spin_trylock(raw_spinlock_t *lock)
Linus Torvalds1da177e2005-04-16 15:20:36 -070047{
48 unsigned long tmp;
49
50 __asm__ __volatile__(
51" ldrex %0, [%1]\n"
52" teq %0, #0\n"
53" strexeq %0, %2, [%1]"
54 : "=&r" (tmp)
55 : "r" (&lock->lock), "r" (1)
Russell King6d9b37a2005-07-26 19:44:26 +010056 : "cc");
Linus Torvalds1da177e2005-04-16 15:20:36 -070057
Russell King6d9b37a2005-07-26 19:44:26 +010058 if (tmp == 0) {
59 smp_mb();
60 return 1;
61 } else {
62 return 0;
63 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070064}
65
Ingo Molnarfb1c8f92005-09-10 00:25:56 -070066static inline void __raw_spin_unlock(raw_spinlock_t *lock)
Linus Torvalds1da177e2005-04-16 15:20:36 -070067{
Russell King6d9b37a2005-07-26 19:44:26 +010068 smp_mb();
69
Linus Torvalds1da177e2005-04-16 15:20:36 -070070 __asm__ __volatile__(
Russell King00b4c902005-12-01 15:47:24 +000071" str %1, [%0]\n"
72#ifdef CONFIG_CPU_32v6K
73" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */
74" sev"
75#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070076 :
77 : "r" (&lock->lock), "r" (0)
Russell King6d9b37a2005-07-26 19:44:26 +010078 : "cc");
Linus Torvalds1da177e2005-04-16 15:20:36 -070079}
80
81/*
82 * RWLOCKS
Ingo Molnarfb1c8f92005-09-10 00:25:56 -070083 *
84 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070085 * Write locks are easy - we just set bit 31. When unlocking, we can
86 * just write zero since the lock is exclusively held.
87 */
Ingo Molnarfb1c8f92005-09-10 00:25:56 -070088
Russell King7e86df22005-11-02 15:09:31 +000089static inline void __raw_write_lock(raw_rwlock_t *rw)
Linus Torvalds1da177e2005-04-16 15:20:36 -070090{
91 unsigned long tmp;
92
93 __asm__ __volatile__(
94"1: ldrex %0, [%1]\n"
95" teq %0, #0\n"
Russell King00b4c902005-12-01 15:47:24 +000096#ifdef CONFIG_CPU_32v6K
97" wfene\n"
98#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070099" strexeq %0, %2, [%1]\n"
100" teq %0, #0\n"
101" bne 1b"
102 : "=&r" (tmp)
103 : "r" (&rw->lock), "r" (0x80000000)
Russell King6d9b37a2005-07-26 19:44:26 +0100104 : "cc");
105
106 smp_mb();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107}
108
Russell King7e86df22005-11-02 15:09:31 +0000109static inline int __raw_write_trylock(raw_rwlock_t *rw)
Russell King4e8fd222005-07-24 12:13:40 +0100110{
111 unsigned long tmp;
112
113 __asm__ __volatile__(
114"1: ldrex %0, [%1]\n"
115" teq %0, #0\n"
116" strexeq %0, %2, [%1]"
117 : "=&r" (tmp)
118 : "r" (&rw->lock), "r" (0x80000000)
Russell King6d9b37a2005-07-26 19:44:26 +0100119 : "cc");
Russell King4e8fd222005-07-24 12:13:40 +0100120
Russell King6d9b37a2005-07-26 19:44:26 +0100121 if (tmp == 0) {
122 smp_mb();
123 return 1;
124 } else {
125 return 0;
126 }
Russell King4e8fd222005-07-24 12:13:40 +0100127}
128
Ingo Molnarfb1c8f92005-09-10 00:25:56 -0700129static inline void __raw_write_unlock(raw_rwlock_t *rw)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130{
Russell King6d9b37a2005-07-26 19:44:26 +0100131 smp_mb();
132
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133 __asm__ __volatile__(
Russell King00b4c902005-12-01 15:47:24 +0000134 "str %1, [%0]\n"
135#ifdef CONFIG_CPU_32v6K
136" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */
137" sev\n"
138#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139 :
140 : "r" (&rw->lock), "r" (0)
Russell King6d9b37a2005-07-26 19:44:26 +0100141 : "cc");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142}
143
Catalin Marinasc2a4c402006-05-19 21:55:35 +0100144/* write_can_lock - would write_trylock() succeed? */
145#define __raw_write_can_lock(x) ((x)->lock == 0x80000000)
146
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147/*
148 * Read locks are a bit more hairy:
149 * - Exclusively load the lock value.
150 * - Increment it.
151 * - Store new lock value if positive, and we still own this location.
152 * If the value is negative, we've already failed.
153 * - If we failed to store the value, we want a negative result.
154 * - If we failed, try again.
155 * Unlocking is similarly hairy. We may have multiple read locks
156 * currently active. However, we know we won't have any write
157 * locks.
158 */
Ingo Molnarfb1c8f92005-09-10 00:25:56 -0700159static inline void __raw_read_lock(raw_rwlock_t *rw)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160{
161 unsigned long tmp, tmp2;
162
163 __asm__ __volatile__(
164"1: ldrex %0, [%2]\n"
165" adds %0, %0, #1\n"
166" strexpl %1, %0, [%2]\n"
Russell King00b4c902005-12-01 15:47:24 +0000167#ifdef CONFIG_CPU_32v6K
168" wfemi\n"
169#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170" rsbpls %0, %1, #0\n"
171" bmi 1b"
172 : "=&r" (tmp), "=&r" (tmp2)
173 : "r" (&rw->lock)
Russell King6d9b37a2005-07-26 19:44:26 +0100174 : "cc");
175
176 smp_mb();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177}
178
Russell King7e86df22005-11-02 15:09:31 +0000179static inline void __raw_read_unlock(raw_rwlock_t *rw)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180{
Russell King4e8fd222005-07-24 12:13:40 +0100181 unsigned long tmp, tmp2;
182
Russell King6d9b37a2005-07-26 19:44:26 +0100183 smp_mb();
184
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185 __asm__ __volatile__(
186"1: ldrex %0, [%2]\n"
187" sub %0, %0, #1\n"
188" strex %1, %0, [%2]\n"
189" teq %1, #0\n"
190" bne 1b"
Russell King00b4c902005-12-01 15:47:24 +0000191#ifdef CONFIG_CPU_32v6K
192"\n cmp %0, #0\n"
193" mcreq p15, 0, %0, c7, c10, 4\n"
194" seveq"
195#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700196 : "=&r" (tmp), "=&r" (tmp2)
197 : "r" (&rw->lock)
Russell King6d9b37a2005-07-26 19:44:26 +0100198 : "cc");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700199}
200
Russell King8e347032006-08-31 15:09:30 +0100201static inline int __raw_read_trylock(raw_rwlock_t *rw)
202{
Catalin Marinase89bc812006-09-06 19:03:14 +0100203 unsigned long tmp, tmp2 = 1;
Russell King8e347032006-08-31 15:09:30 +0100204
205 __asm__ __volatile__(
206"1: ldrex %0, [%2]\n"
207" adds %0, %0, #1\n"
208" strexpl %1, %0, [%2]\n"
209 : "=&r" (tmp), "+r" (tmp2)
210 : "r" (&rw->lock)
211 : "cc");
212
213 smp_mb();
214 return tmp2 == 0;
215}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216
Catalin Marinasc2a4c402006-05-19 21:55:35 +0100217/* read_can_lock - would read_trylock() succeed? */
218#define __raw_read_can_lock(x) ((x)->lock < 0x80000000)
219
Martin Schwidefskyef6edc92006-09-30 23:27:43 -0700220#define _raw_spin_relax(lock) cpu_relax()
221#define _raw_read_relax(lock) cpu_relax()
222#define _raw_write_relax(lock) cpu_relax()
223
Linus Torvalds1da177e2005-04-16 15:20:36 -0700224#endif /* __ASM_SPINLOCK_H */