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Linus Torvalds1da177e2005-04-16 15:20:36 -07001if ARCH_CLPS711X
2
Alexander Shiyan94bd3272012-05-13 02:40:57 +04003menu "CLPS711X/EP721X/EP731X Implementations"
Linus Torvalds1da177e2005-04-16 15:20:36 -07004
5config ARCH_AUTCPU12
6 bool "AUTCPU12"
7 help
8 Say Y if you intend to run the kernel on the autronix autcpu12
9 board. This board is based on a Cirrus Logic CS89712.
10
11config ARCH_CDB89712
12 bool "CDB89712"
Russell Kingf7e68bb2005-05-05 14:49:01 +010013 select ISA
Linus Torvalds1da177e2005-04-16 15:20:36 -070014 help
15 This is an evaluation board from Cirrus for the CS89712 processor.
16 The board includes 2 serial ports, Ethernet, IRDA, and expansion
17 headers. It comes with 16 MB SDRAM and 8 MB flash ROM.
18
Linus Torvalds1da177e2005-04-16 15:20:36 -070019config ARCH_CLEP7312
20 bool "CLEP7312"
Martin Michlmayrf999b8b2006-02-08 21:09:05 +000021 help
22 Boards based on the Cirrus Logic 7212/7312 chips.
Linus Torvalds1da177e2005-04-16 15:20:36 -070023
24config ARCH_EDB7211
25 bool "EDB7211"
Russell Kingf7e68bb2005-05-05 14:49:01 +010026 select ISA
Russell King05944d72006-11-30 20:43:51 +000027 select ARCH_SPARSEMEM_ENABLE
28 select ARCH_SELECT_MEMORY_MODEL
Linus Torvalds1da177e2005-04-16 15:20:36 -070029 help
30 Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211
31 evaluation board.
32
33config ARCH_P720T
34 bool "P720T"
35 help
36 Say Y here if you intend to run this kernel on the ARM Prospector
37 720T.
38
39config ARCH_FORTUNET
40 bool "FORTUNET"
41
Linus Torvalds1da177e2005-04-16 15:20:36 -070042config EP72XX_ROM_BOOT
Alexander Shiyan94bd3272012-05-13 02:40:57 +040043 bool "EP721x/EP731x ROM boot"
44 help
Linus Torvalds1da177e2005-04-16 15:20:36 -070045 If you say Y here, your CLPS711x-based kernel will use the bootstrap
46 mode memory map instead of the normal memory map.
47
Alexander Shiyan94bd3272012-05-13 02:40:57 +040048 Processors derived from the Cirrus CLPS711X core support two boot
Linus Torvalds1da177e2005-04-16 15:20:36 -070049 modes. Normal mode boots from the external memory device at CS0.
50 Bootstrap mode rearranges parts of the memory map, placing an
51 internal 128 byte bootstrap ROM at CS0. This option performs the
52 address map changes required to support booting in this mode.
53
54 You almost surely want to say N here.
55
Linus Torvalds1da177e2005-04-16 15:20:36 -070056endmenu
57
58endif