Daniel Walker | 1093276 | 2010-05-12 12:02:25 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2008 Google, Inc. |
Stepan Moskovchenko | d41cb8c | 2011-01-17 20:33:32 -0800 | [diff] [blame^] | 3 | * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved. |
Daniel Walker | 1093276 | 2010-05-12 12:02:25 -0700 | [diff] [blame] | 4 | * |
| 5 | * This software is licensed under the terms of the GNU General Public |
| 6 | * License version 2, as published by the Free Software Foundation, and |
| 7 | * may be copied, distributed, and modified under those terms. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/platform_device.h> |
| 18 | |
| 19 | #include <linux/dma-mapping.h> |
| 20 | #include <mach/irqs.h> |
| 21 | #include <mach/msm_iomap.h> |
| 22 | #include <mach/dma.h> |
| 23 | #include <mach/board.h> |
| 24 | |
| 25 | #include "devices.h" |
| 26 | #include "smd_private.h" |
| 27 | |
| 28 | #include <asm/mach/flash.h> |
| 29 | |
| 30 | #include "clock-pcom.h" |
| 31 | |
| 32 | #include <mach/mmc.h> |
| 33 | |
| 34 | static struct resource resources_uart2[] = { |
| 35 | { |
| 36 | .start = INT_UART2, |
| 37 | .end = INT_UART2, |
| 38 | .flags = IORESOURCE_IRQ, |
| 39 | }, |
| 40 | { |
| 41 | .start = MSM_UART2_PHYS, |
| 42 | .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1, |
| 43 | .flags = IORESOURCE_MEM, |
Stepan Moskovchenko | d41cb8c | 2011-01-17 20:33:32 -0800 | [diff] [blame^] | 44 | .name = "uart_resource" |
Daniel Walker | 1093276 | 2010-05-12 12:02:25 -0700 | [diff] [blame] | 45 | }, |
| 46 | }; |
| 47 | |
| 48 | struct platform_device msm_device_uart2 = { |
| 49 | .name = "msm_serial", |
| 50 | .id = 1, |
| 51 | .num_resources = ARRAY_SIZE(resources_uart2), |
| 52 | .resource = resources_uart2, |
| 53 | }; |
| 54 | |
Niranjana Vishwanathapura | a8855e9 | 2010-10-06 13:52:10 -0700 | [diff] [blame] | 55 | struct platform_device msm_device_smd = { |
| 56 | .name = "msm_smd", |
| 57 | .id = -1, |
| 58 | }; |
| 59 | |
Pavankumar Kondeti | 5155e2c | 2010-12-08 13:37:08 +0530 | [diff] [blame] | 60 | static struct resource resources_otg[] = { |
| 61 | { |
| 62 | .start = MSM_HSUSB_PHYS, |
| 63 | .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, |
| 64 | .flags = IORESOURCE_MEM, |
| 65 | }, |
| 66 | { |
| 67 | .start = INT_USB_HS, |
| 68 | .end = INT_USB_HS, |
| 69 | .flags = IORESOURCE_IRQ, |
| 70 | }, |
| 71 | }; |
| 72 | |
| 73 | struct platform_device msm_device_otg = { |
| 74 | .name = "msm_otg", |
| 75 | .id = -1, |
| 76 | .num_resources = ARRAY_SIZE(resources_otg), |
| 77 | .resource = resources_otg, |
| 78 | .dev = { |
| 79 | .coherent_dma_mask = 0xffffffff, |
| 80 | }, |
| 81 | }; |
| 82 | |
| 83 | static struct resource resources_hsusb[] = { |
| 84 | { |
| 85 | .start = MSM_HSUSB_PHYS, |
| 86 | .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, |
| 87 | .flags = IORESOURCE_MEM, |
| 88 | }, |
| 89 | { |
| 90 | .start = INT_USB_HS, |
| 91 | .end = INT_USB_HS, |
| 92 | .flags = IORESOURCE_IRQ, |
| 93 | }, |
| 94 | }; |
| 95 | |
| 96 | struct platform_device msm_device_hsusb = { |
| 97 | .name = "msm_hsusb", |
| 98 | .id = -1, |
| 99 | .num_resources = ARRAY_SIZE(resources_hsusb), |
| 100 | .resource = resources_hsusb, |
| 101 | .dev = { |
| 102 | .coherent_dma_mask = 0xffffffff, |
| 103 | }, |
| 104 | }; |
| 105 | |
| 106 | static u64 dma_mask = 0xffffffffULL; |
| 107 | static struct resource resources_hsusb_host[] = { |
| 108 | { |
| 109 | .start = MSM_HSUSB_PHYS, |
| 110 | .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, |
| 111 | .flags = IORESOURCE_MEM, |
| 112 | }, |
| 113 | { |
| 114 | .start = INT_USB_HS, |
| 115 | .end = INT_USB_HS, |
| 116 | .flags = IORESOURCE_IRQ, |
| 117 | }, |
| 118 | }; |
| 119 | |
| 120 | struct platform_device msm_device_hsusb_host = { |
| 121 | .name = "msm_hsusb_host", |
| 122 | .id = -1, |
| 123 | .num_resources = ARRAY_SIZE(resources_hsusb_host), |
| 124 | .resource = resources_hsusb_host, |
| 125 | .dev = { |
| 126 | .dma_mask = &dma_mask, |
| 127 | .coherent_dma_mask = 0xffffffffULL, |
| 128 | }, |
| 129 | }; |
| 130 | |
Daniel Walker | 1093276 | 2010-05-12 12:02:25 -0700 | [diff] [blame] | 131 | struct clk msm_clocks_7x30[] = { |
| 132 | CLK_PCOM("adm_clk", ADM_CLK, NULL, 0), |
| 133 | CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0), |
| 134 | CLK_PCOM("cam_m_clk", CAM_M_CLK, NULL, 0), |
| 135 | CLK_PCOM("camif_pad_pclk", CAMIF_PAD_P_CLK, NULL, OFF), |
| 136 | CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN), |
| 137 | CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0), |
| 138 | CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX), |
| 139 | CLK_PCOM("emdh_pclk", EMDH_P_CLK, NULL, OFF), |
| 140 | CLK_PCOM("gp_clk", GP_CLK, NULL, 0), |
| 141 | CLK_PCOM("grp_2d_clk", GRP_2D_CLK, NULL, 0), |
| 142 | CLK_PCOM("grp_2d_pclk", GRP_2D_P_CLK, NULL, 0), |
| 143 | CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0), |
| 144 | CLK_PCOM("grp_pclk", GRP_3D_P_CLK, NULL, 0), |
| 145 | CLK_7X30S("grp_src_clk", GRP_3D_SRC_CLK, GRP_3D_CLK, NULL, 0), |
| 146 | CLK_PCOM("hdmi_clk", HDMI_CLK, NULL, 0), |
| 147 | CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF), |
| 148 | CLK_PCOM("jpeg_clk", JPEG_CLK, NULL, OFF), |
| 149 | CLK_PCOM("jpeg_pclk", JPEG_P_CLK, NULL, OFF), |
| 150 | CLK_PCOM("lpa_codec_clk", LPA_CODEC_CLK, NULL, 0), |
| 151 | CLK_PCOM("lpa_core_clk", LPA_CORE_CLK, NULL, 0), |
| 152 | CLK_PCOM("lpa_pclk", LPA_P_CLK, NULL, 0), |
| 153 | CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0), |
| 154 | CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX), |
| 155 | CLK_PCOM("mddi_pclk", PMDH_P_CLK, NULL, 0), |
| 156 | CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF), |
| 157 | CLK_PCOM("mdp_pclk", MDP_P_CLK, NULL, 0), |
| 158 | CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0), |
| 159 | CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0), |
| 160 | CLK_PCOM("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, 0), |
| 161 | CLK_PCOM("mfc_clk", MFC_CLK, NULL, 0), |
| 162 | CLK_PCOM("mfc_div2_clk", MFC_DIV2_CLK, NULL, 0), |
| 163 | CLK_PCOM("mfc_pclk", MFC_P_CLK, NULL, 0), |
| 164 | CLK_PCOM("mi2s_m_clk", MI2S_M_CLK, NULL, 0), |
| 165 | CLK_PCOM("mi2s_s_clk", MI2S_S_CLK, NULL, 0), |
| 166 | CLK_PCOM("mi2s_codec_rx_m_clk", MI2S_CODEC_RX_M_CLK, NULL, 0), |
| 167 | CLK_PCOM("mi2s_codec_rx_s_clk", MI2S_CODEC_RX_S_CLK, NULL, 0), |
| 168 | CLK_PCOM("mi2s_codec_tx_m_clk", MI2S_CODEC_TX_M_CLK, NULL, 0), |
| 169 | CLK_PCOM("mi2s_codec_tx_s_clk", MI2S_CODEC_TX_S_CLK, NULL, 0), |
| 170 | CLK_PCOM("pbus_clk", PBUS_CLK, NULL, CLK_MIN), |
| 171 | CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0), |
| 172 | CLK_PCOM("rotator_clk", AXI_ROTATOR_CLK, NULL, 0), |
| 173 | CLK_PCOM("rotator_imem_clk", ROTATOR_IMEM_CLK, NULL, OFF), |
| 174 | CLK_PCOM("rotator_pclk", ROTATOR_P_CLK, NULL, OFF), |
| 175 | CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF), |
| 176 | CLK_PCOM("spi_clk", SPI_CLK, NULL, 0), |
| 177 | CLK_PCOM("spi_pclk", SPI_P_CLK, NULL, 0), |
| 178 | CLK_7X30S("tv_src_clk", TV_CLK, TV_ENC_CLK, NULL, 0), |
| 179 | CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0), |
| 180 | CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0), |
| 181 | CLK_PCOM("uart_clk", UART2_CLK, &msm_device_uart2.dev, 0), |
Pavankumar Kondeti | 5155e2c | 2010-12-08 13:37:08 +0530 | [diff] [blame] | 182 | CLK_PCOM("usb_phy_clk", USB_PHY_CLK, NULL, 0), |
Daniel Walker | 1093276 | 2010-05-12 12:02:25 -0700 | [diff] [blame] | 183 | CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF), |
| 184 | CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF), |
| 185 | CLK_PCOM("usb_hs_core_clk", USB_HS_CORE_CLK, NULL, OFF), |
| 186 | CLK_PCOM("usb_hs2_clk", USB_HS2_CLK, NULL, OFF), |
| 187 | CLK_PCOM("usb_hs2_pclk", USB_HS2_P_CLK, NULL, OFF), |
| 188 | CLK_PCOM("usb_hs2_core_clk", USB_HS2_CORE_CLK, NULL, OFF), |
| 189 | CLK_PCOM("usb_hs3_clk", USB_HS3_CLK, NULL, OFF), |
| 190 | CLK_PCOM("usb_hs3_pclk", USB_HS3_P_CLK, NULL, OFF), |
| 191 | CLK_PCOM("usb_hs3_core_clk", USB_HS3_CORE_CLK, NULL, OFF), |
| 192 | CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF | CLK_MIN), |
| 193 | CLK_PCOM("vfe_camif_clk", VFE_CAMIF_CLK, NULL, 0), |
| 194 | CLK_PCOM("vfe_clk", VFE_CLK, NULL, 0), |
| 195 | CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, 0), |
| 196 | CLK_PCOM("vfe_pclk", VFE_P_CLK, NULL, OFF), |
| 197 | CLK_PCOM("vpe_clk", VPE_CLK, NULL, 0), |
| 198 | |
| 199 | /* 7x30 v2 hardware only. */ |
| 200 | CLK_PCOM("csi_clk", CSI0_CLK, NULL, 0), |
| 201 | CLK_PCOM("csi_pclk", CSI0_P_CLK, NULL, 0), |
| 202 | CLK_PCOM("csi_vfe_clk", CSI0_VFE_CLK, NULL, 0), |
| 203 | }; |
| 204 | |
| 205 | unsigned msm_num_clocks_7x30 = ARRAY_SIZE(msm_clocks_7x30); |
| 206 | |