David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 1 | /* |
| 2 | * "RTT as Real Time Clock" driver for AT91SAM9 SoC family |
| 3 | * |
| 4 | * (C) 2007 Michel Benoit |
| 5 | * |
| 6 | * Based on rtc-at91rm9200.c by Rick Bronson |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License |
| 10 | * as published by the Free Software Foundation; either version |
| 11 | * 2 of the License, or (at your option) any later version. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/time.h> |
| 18 | #include <linux/rtc.h> |
| 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/ioctl.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 21 | #include <linux/slab.h> |
Jean-Christophe PLAGNIOL-VILLARD | bcd2360 | 2012-10-30 05:12:23 +0800 | [diff] [blame] | 22 | #include <linux/platform_data/atmel.h> |
Jingoo Han | 9d42e46 | 2013-04-29 16:20:35 -0700 | [diff] [blame] | 23 | #include <linux/io.h> |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 24 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 25 | /* |
| 26 | * This driver uses two configurable hardware resources that live in the |
| 27 | * AT91SAM9 backup power domain (intended to be powered at all times) |
| 28 | * to implement the Real Time Clock interfaces |
| 29 | * |
| 30 | * - A "Real-time Timer" (RTT) counts up in seconds from a base time. |
| 31 | * We can't assign the counter value (CRTV) ... but we can reset it. |
| 32 | * |
| 33 | * - One of the "General Purpose Backup Registers" (GPBRs) holds the |
| 34 | * base time, normally an offset from the beginning of the POSIX |
| 35 | * epoch (1970-Jan-1 00:00:00 UTC). Some systems also include the |
| 36 | * local timezone's offset. |
| 37 | * |
| 38 | * The RTC's value is the RTT counter plus that offset. The RTC's alarm |
| 39 | * is likewise a base (ALMV) plus that offset. |
| 40 | * |
| 41 | * Not all RTTs will be used as RTCs; some systems have multiple RTTs to |
| 42 | * choose from, or a "real" RTC module. All systems have multiple GPBR |
| 43 | * registers available, likewise usable for more than "RTC" support. |
| 44 | */ |
| 45 | |
Boris BREZILLON | 6575bd7 | 2014-09-23 13:13:29 +0200 | [diff] [blame] | 46 | #define AT91_RTT_MR 0x00 /* Real-time Mode Register */ |
| 47 | #define AT91_RTT_RTPRES (0xffff << 0) /* Real-time Timer Prescaler Value */ |
| 48 | #define AT91_RTT_ALMIEN (1 << 16) /* Alarm Interrupt Enable */ |
| 49 | #define AT91_RTT_RTTINCIEN (1 << 17) /* Real Time Timer Increment Interrupt Enable */ |
| 50 | #define AT91_RTT_RTTRST (1 << 18) /* Real Time Timer Restart */ |
| 51 | |
| 52 | #define AT91_RTT_AR 0x04 /* Real-time Alarm Register */ |
| 53 | #define AT91_RTT_ALMV (0xffffffff) /* Alarm Value */ |
| 54 | |
| 55 | #define AT91_RTT_VR 0x08 /* Real-time Value Register */ |
| 56 | #define AT91_RTT_CRTV (0xffffffff) /* Current Real-time Value */ |
| 57 | |
| 58 | #define AT91_RTT_SR 0x0c /* Real-time Status Register */ |
| 59 | #define AT91_RTT_ALMS (1 << 0) /* Real-time Alarm Status */ |
| 60 | #define AT91_RTT_RTTINC (1 << 1) /* Real-time Timer Increment */ |
| 61 | |
| 62 | #define AT91_SLOW_CLOCK 32768 |
| 63 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 64 | /* |
| 65 | * We store ALARM_DISABLED in ALMV to record that no alarm is set. |
| 66 | * It's also the reset value for that field. |
| 67 | */ |
| 68 | #define ALARM_DISABLED ((u32)~0) |
| 69 | |
| 70 | |
| 71 | struct sam9_rtc { |
| 72 | void __iomem *rtt; |
| 73 | struct rtc_device *rtcdev; |
| 74 | u32 imr; |
Jean-Christophe PLAGNIOL-VILLARD | b3af8b4 | 2012-02-15 21:24:46 +0800 | [diff] [blame] | 75 | void __iomem *gpbr; |
Ludovic Desroches | e402af6 | 2012-08-14 11:19:22 +0200 | [diff] [blame] | 76 | int irq; |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 77 | }; |
| 78 | |
| 79 | #define rtt_readl(rtc, field) \ |
Boris BREZILLON | 272f1df | 2014-09-23 13:13:52 +0200 | [diff] [blame^] | 80 | readl((rtc)->rtt + AT91_RTT_ ## field) |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 81 | #define rtt_writel(rtc, field, val) \ |
Boris BREZILLON | 272f1df | 2014-09-23 13:13:52 +0200 | [diff] [blame^] | 82 | writel((val), (rtc)->rtt + AT91_RTT_ ## field) |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 83 | |
| 84 | #define gpbr_readl(rtc) \ |
Boris BREZILLON | 272f1df | 2014-09-23 13:13:52 +0200 | [diff] [blame^] | 85 | readl((rtc)->gpbr) |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 86 | #define gpbr_writel(rtc, val) \ |
Boris BREZILLON | 272f1df | 2014-09-23 13:13:52 +0200 | [diff] [blame^] | 87 | writel((val), (rtc)->gpbr) |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 88 | |
| 89 | /* |
| 90 | * Read current time and date in RTC |
| 91 | */ |
| 92 | static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm) |
| 93 | { |
| 94 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
| 95 | u32 secs, secs2; |
| 96 | u32 offset; |
| 97 | |
| 98 | /* read current time offset */ |
| 99 | offset = gpbr_readl(rtc); |
| 100 | if (offset == 0) |
| 101 | return -EILSEQ; |
| 102 | |
| 103 | /* reread the counter to help sync the two clock domains */ |
| 104 | secs = rtt_readl(rtc, VR); |
| 105 | secs2 = rtt_readl(rtc, VR); |
| 106 | if (secs != secs2) |
| 107 | secs = rtt_readl(rtc, VR); |
| 108 | |
| 109 | rtc_time_to_tm(offset + secs, tm); |
| 110 | |
| 111 | dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readtime", |
| 112 | 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, |
| 113 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
| 114 | |
| 115 | return 0; |
| 116 | } |
| 117 | |
| 118 | /* |
| 119 | * Set current time and date in RTC |
| 120 | */ |
| 121 | static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) |
| 122 | { |
| 123 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
| 124 | int err; |
| 125 | u32 offset, alarm, mr; |
| 126 | unsigned long secs; |
| 127 | |
| 128 | dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "settime", |
| 129 | 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, |
| 130 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
| 131 | |
| 132 | err = rtc_tm_to_time(tm, &secs); |
| 133 | if (err != 0) |
| 134 | return err; |
| 135 | |
| 136 | mr = rtt_readl(rtc, MR); |
| 137 | |
| 138 | /* disable interrupts */ |
| 139 | rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN)); |
| 140 | |
| 141 | /* read current time offset */ |
| 142 | offset = gpbr_readl(rtc); |
| 143 | |
| 144 | /* store the new base time in a battery backup register */ |
| 145 | secs += 1; |
| 146 | gpbr_writel(rtc, secs); |
| 147 | |
| 148 | /* adjust the alarm time for the new base */ |
| 149 | alarm = rtt_readl(rtc, AR); |
| 150 | if (alarm != ALARM_DISABLED) { |
| 151 | if (offset > secs) { |
| 152 | /* time jumped backwards, increase time until alarm */ |
| 153 | alarm += (offset - secs); |
| 154 | } else if ((alarm + offset) > secs) { |
| 155 | /* time jumped forwards, decrease time until alarm */ |
| 156 | alarm -= (secs - offset); |
| 157 | } else { |
| 158 | /* time jumped past the alarm, disable alarm */ |
| 159 | alarm = ALARM_DISABLED; |
| 160 | mr &= ~AT91_RTT_ALMIEN; |
| 161 | } |
| 162 | rtt_writel(rtc, AR, alarm); |
| 163 | } |
| 164 | |
| 165 | /* reset the timer, and re-enable interrupts */ |
| 166 | rtt_writel(rtc, MR, mr | AT91_RTT_RTTRST); |
| 167 | |
| 168 | return 0; |
| 169 | } |
| 170 | |
| 171 | static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 172 | { |
| 173 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
| 174 | struct rtc_time *tm = &alrm->time; |
| 175 | u32 alarm = rtt_readl(rtc, AR); |
| 176 | u32 offset; |
| 177 | |
| 178 | offset = gpbr_readl(rtc); |
| 179 | if (offset == 0) |
| 180 | return -EILSEQ; |
| 181 | |
Julia Lawall | 870a276 | 2010-03-05 13:44:23 -0800 | [diff] [blame] | 182 | memset(alrm, 0, sizeof(*alrm)); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 183 | if (alarm != ALARM_DISABLED && offset != 0) { |
| 184 | rtc_time_to_tm(offset + alarm, tm); |
| 185 | |
| 186 | dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readalarm", |
| 187 | 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, |
| 188 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
| 189 | |
| 190 | if (rtt_readl(rtc, MR) & AT91_RTT_ALMIEN) |
| 191 | alrm->enabled = 1; |
| 192 | } |
| 193 | |
| 194 | return 0; |
| 195 | } |
| 196 | |
| 197 | static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 198 | { |
| 199 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
| 200 | struct rtc_time *tm = &alrm->time; |
| 201 | unsigned long secs; |
| 202 | u32 offset; |
| 203 | u32 mr; |
| 204 | int err; |
| 205 | |
| 206 | err = rtc_tm_to_time(tm, &secs); |
| 207 | if (err != 0) |
| 208 | return err; |
| 209 | |
| 210 | offset = gpbr_readl(rtc); |
| 211 | if (offset == 0) { |
| 212 | /* time is not set */ |
| 213 | return -EILSEQ; |
| 214 | } |
| 215 | mr = rtt_readl(rtc, MR); |
| 216 | rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN); |
| 217 | |
| 218 | /* alarm in the past? finish and leave disabled */ |
| 219 | if (secs <= offset) { |
| 220 | rtt_writel(rtc, AR, ALARM_DISABLED); |
| 221 | return 0; |
| 222 | } |
| 223 | |
| 224 | /* else set alarm and maybe enable it */ |
| 225 | rtt_writel(rtc, AR, secs - offset); |
| 226 | if (alrm->enabled) |
| 227 | rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN); |
| 228 | |
| 229 | dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "setalarm", |
| 230 | tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour, |
| 231 | tm->tm_min, tm->tm_sec); |
| 232 | |
| 233 | return 0; |
| 234 | } |
| 235 | |
John Stultz | 16380c1 | 2011-02-02 17:02:41 -0800 | [diff] [blame] | 236 | static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
| 237 | { |
| 238 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
| 239 | u32 mr = rtt_readl(rtc, MR); |
| 240 | |
| 241 | dev_dbg(dev, "alarm_irq_enable: enabled=%08x, mr %08x\n", enabled, mr); |
| 242 | if (enabled) |
| 243 | rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN); |
| 244 | else |
| 245 | rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN); |
| 246 | return 0; |
| 247 | } |
| 248 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 249 | /* |
| 250 | * Provide additional RTC information in /proc/driver/rtc |
| 251 | */ |
| 252 | static int at91_rtc_proc(struct device *dev, struct seq_file *seq) |
| 253 | { |
| 254 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
| 255 | u32 mr = mr = rtt_readl(rtc, MR); |
| 256 | |
| 257 | seq_printf(seq, "update_IRQ\t: %s\n", |
| 258 | (mr & AT91_RTT_RTTINCIEN) ? "yes" : "no"); |
| 259 | return 0; |
| 260 | } |
| 261 | |
| 262 | /* |
| 263 | * IRQ handler for the RTC |
| 264 | */ |
| 265 | static irqreturn_t at91_rtc_interrupt(int irq, void *_rtc) |
| 266 | { |
| 267 | struct sam9_rtc *rtc = _rtc; |
| 268 | u32 sr, mr; |
| 269 | unsigned long events = 0; |
| 270 | |
| 271 | /* Shared interrupt may be for another device. Note: reading |
| 272 | * SR clears it, so we must only read it in this irq handler! |
| 273 | */ |
| 274 | mr = rtt_readl(rtc, MR) & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN); |
David Brownell | 9fedc9f | 2008-03-19 17:01:09 -0700 | [diff] [blame] | 275 | sr = rtt_readl(rtc, SR) & (mr >> 16); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 276 | if (!sr) |
| 277 | return IRQ_NONE; |
| 278 | |
| 279 | /* alarm status */ |
| 280 | if (sr & AT91_RTT_ALMS) |
| 281 | events |= (RTC_AF | RTC_IRQF); |
| 282 | |
| 283 | /* timer update/increment */ |
| 284 | if (sr & AT91_RTT_RTTINC) |
| 285 | events |= (RTC_UF | RTC_IRQF); |
| 286 | |
| 287 | rtc_update_irq(rtc->rtcdev, 1, events); |
| 288 | |
Harvey Harrison | 2a4e2b8 | 2008-04-28 02:12:00 -0700 | [diff] [blame] | 289 | pr_debug("%s: num=%ld, events=0x%02lx\n", __func__, |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 290 | events >> 8, events & 0x000000FF); |
| 291 | |
| 292 | return IRQ_HANDLED; |
| 293 | } |
| 294 | |
| 295 | static const struct rtc_class_ops at91_rtc_ops = { |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 296 | .read_time = at91_rtc_readtime, |
| 297 | .set_time = at91_rtc_settime, |
| 298 | .read_alarm = at91_rtc_readalarm, |
| 299 | .set_alarm = at91_rtc_setalarm, |
| 300 | .proc = at91_rtc_proc, |
Jelle Martijn Kok | d403585 | 2011-02-25 11:13:55 -0800 | [diff] [blame] | 301 | .alarm_irq_enable = at91_rtc_alarm_irq_enable, |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 302 | }; |
| 303 | |
| 304 | /* |
| 305 | * Initialize and install RTC driver |
| 306 | */ |
Greg Kroah-Hartman | 5a167f4 | 2012-12-21 13:09:38 -0800 | [diff] [blame] | 307 | static int at91_rtc_probe(struct platform_device *pdev) |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 308 | { |
Jean-Christophe PLAGNIOL-VILLARD | b3af8b4 | 2012-02-15 21:24:46 +0800 | [diff] [blame] | 309 | struct resource *r, *r_gpbr; |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 310 | struct sam9_rtc *rtc; |
Ludovic Desroches | e402af6 | 2012-08-14 11:19:22 +0200 | [diff] [blame] | 311 | int ret, irq; |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 312 | u32 mr; |
| 313 | |
| 314 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Jean-Christophe PLAGNIOL-VILLARD | b3af8b4 | 2012-02-15 21:24:46 +0800 | [diff] [blame] | 315 | r_gpbr = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 316 | if (!r || !r_gpbr) { |
| 317 | dev_err(&pdev->dev, "need 2 ressources\n"); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 318 | return -ENODEV; |
Jean-Christophe PLAGNIOL-VILLARD | b3af8b4 | 2012-02-15 21:24:46 +0800 | [diff] [blame] | 319 | } |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 320 | |
Ludovic Desroches | e402af6 | 2012-08-14 11:19:22 +0200 | [diff] [blame] | 321 | irq = platform_get_irq(pdev, 0); |
| 322 | if (irq < 0) { |
| 323 | dev_err(&pdev->dev, "failed to get interrupt resource\n"); |
| 324 | return irq; |
| 325 | } |
| 326 | |
Jingoo Han | 9d42e46 | 2013-04-29 16:20:35 -0700 | [diff] [blame] | 327 | rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 328 | if (!rtc) |
| 329 | return -ENOMEM; |
| 330 | |
Ludovic Desroches | e402af6 | 2012-08-14 11:19:22 +0200 | [diff] [blame] | 331 | rtc->irq = irq; |
| 332 | |
David Brownell | 9fedc9f | 2008-03-19 17:01:09 -0700 | [diff] [blame] | 333 | /* platform setup code should have handled this; sigh */ |
| 334 | if (!device_can_wakeup(&pdev->dev)) |
| 335 | device_init_wakeup(&pdev->dev, 1); |
| 336 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 337 | platform_set_drvdata(pdev, rtc); |
Jingoo Han | 9d42e46 | 2013-04-29 16:20:35 -0700 | [diff] [blame] | 338 | rtc->rtt = devm_ioremap(&pdev->dev, r->start, resource_size(r)); |
Jean-Christophe PLAGNIOL-VILLARD | 2dcc90e | 2011-09-18 10:17:54 +0800 | [diff] [blame] | 339 | if (!rtc->rtt) { |
| 340 | dev_err(&pdev->dev, "failed to map registers, aborting.\n"); |
Jingoo Han | 61cc483 | 2013-07-03 15:06:12 -0700 | [diff] [blame] | 341 | return -ENOMEM; |
Jean-Christophe PLAGNIOL-VILLARD | 2dcc90e | 2011-09-18 10:17:54 +0800 | [diff] [blame] | 342 | } |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 343 | |
Jingoo Han | 9d42e46 | 2013-04-29 16:20:35 -0700 | [diff] [blame] | 344 | rtc->gpbr = devm_ioremap(&pdev->dev, r_gpbr->start, |
| 345 | resource_size(r_gpbr)); |
Jean-Christophe PLAGNIOL-VILLARD | b3af8b4 | 2012-02-15 21:24:46 +0800 | [diff] [blame] | 346 | if (!rtc->gpbr) { |
| 347 | dev_err(&pdev->dev, "failed to map gpbr registers, aborting.\n"); |
Jingoo Han | 61cc483 | 2013-07-03 15:06:12 -0700 | [diff] [blame] | 348 | return -ENOMEM; |
Jean-Christophe PLAGNIOL-VILLARD | b3af8b4 | 2012-02-15 21:24:46 +0800 | [diff] [blame] | 349 | } |
| 350 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 351 | mr = rtt_readl(rtc, MR); |
| 352 | |
| 353 | /* unless RTT is counting at 1 Hz, re-initialize it */ |
| 354 | if ((mr & AT91_RTT_RTPRES) != AT91_SLOW_CLOCK) { |
| 355 | mr = AT91_RTT_RTTRST | (AT91_SLOW_CLOCK & AT91_RTT_RTPRES); |
| 356 | gpbr_writel(rtc, 0); |
| 357 | } |
| 358 | |
| 359 | /* disable all interrupts (same as on shutdown path) */ |
| 360 | mr &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN); |
| 361 | rtt_writel(rtc, MR, mr); |
| 362 | |
Jingoo Han | 9d42e46 | 2013-04-29 16:20:35 -0700 | [diff] [blame] | 363 | rtc->rtcdev = devm_rtc_device_register(&pdev->dev, pdev->name, |
| 364 | &at91_rtc_ops, THIS_MODULE); |
Jingoo Han | 61cc483 | 2013-07-03 15:06:12 -0700 | [diff] [blame] | 365 | if (IS_ERR(rtc->rtcdev)) |
| 366 | return PTR_ERR(rtc->rtcdev); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 367 | |
| 368 | /* register irq handler after we know what name we'll use */ |
Jingoo Han | 9d42e46 | 2013-04-29 16:20:35 -0700 | [diff] [blame] | 369 | ret = devm_request_irq(&pdev->dev, rtc->irq, at91_rtc_interrupt, |
| 370 | IRQF_SHARED, dev_name(&rtc->rtcdev->dev), rtc); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 371 | if (ret) { |
Ludovic Desroches | e402af6 | 2012-08-14 11:19:22 +0200 | [diff] [blame] | 372 | dev_dbg(&pdev->dev, "can't share IRQ %d?\n", rtc->irq); |
Jingoo Han | 61cc483 | 2013-07-03 15:06:12 -0700 | [diff] [blame] | 373 | return ret; |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 374 | } |
| 375 | |
| 376 | /* NOTE: sam9260 rev A silicon has a ROM bug which resets the |
| 377 | * RTT on at least some reboots. If you have that chip, you must |
| 378 | * initialize the time from some external source like a GPS, wall |
| 379 | * clock, discrete RTC, etc |
| 380 | */ |
| 381 | |
| 382 | if (gpbr_readl(rtc) == 0) |
| 383 | dev_warn(&pdev->dev, "%s: SET TIME!\n", |
Kay Sievers | 744bcb1 | 2009-03-24 16:38:22 -0700 | [diff] [blame] | 384 | dev_name(&rtc->rtcdev->dev)); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 385 | |
| 386 | return 0; |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 387 | } |
| 388 | |
| 389 | /* |
| 390 | * Disable and remove the RTC driver |
| 391 | */ |
Greg Kroah-Hartman | 5a167f4 | 2012-12-21 13:09:38 -0800 | [diff] [blame] | 392 | static int at91_rtc_remove(struct platform_device *pdev) |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 393 | { |
| 394 | struct sam9_rtc *rtc = platform_get_drvdata(pdev); |
| 395 | u32 mr = rtt_readl(rtc, MR); |
| 396 | |
| 397 | /* disable all interrupts */ |
| 398 | rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN)); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 399 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 400 | return 0; |
| 401 | } |
| 402 | |
| 403 | static void at91_rtc_shutdown(struct platform_device *pdev) |
| 404 | { |
| 405 | struct sam9_rtc *rtc = platform_get_drvdata(pdev); |
| 406 | u32 mr = rtt_readl(rtc, MR); |
| 407 | |
| 408 | rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN); |
| 409 | rtt_writel(rtc, MR, mr & ~rtc->imr); |
| 410 | } |
| 411 | |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 412 | #ifdef CONFIG_PM_SLEEP |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 413 | |
| 414 | /* AT91SAM9 RTC Power management control */ |
| 415 | |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 416 | static int at91_rtc_suspend(struct device *dev) |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 417 | { |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 418 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 419 | u32 mr = rtt_readl(rtc, MR); |
| 420 | |
| 421 | /* |
| 422 | * This IRQ is shared with DBGU and other hardware which isn't |
| 423 | * necessarily a wakeup event source. |
| 424 | */ |
| 425 | rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN); |
| 426 | if (rtc->imr) { |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 427 | if (device_may_wakeup(dev) && (mr & AT91_RTT_ALMIEN)) { |
Ludovic Desroches | e402af6 | 2012-08-14 11:19:22 +0200 | [diff] [blame] | 428 | enable_irq_wake(rtc->irq); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 429 | /* don't let RTTINC cause wakeups */ |
| 430 | if (mr & AT91_RTT_RTTINCIEN) |
| 431 | rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN); |
| 432 | } else |
| 433 | rtt_writel(rtc, MR, mr & ~rtc->imr); |
| 434 | } |
| 435 | |
| 436 | return 0; |
| 437 | } |
| 438 | |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 439 | static int at91_rtc_resume(struct device *dev) |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 440 | { |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 441 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 442 | u32 mr; |
| 443 | |
| 444 | if (rtc->imr) { |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 445 | if (device_may_wakeup(dev)) |
Ludovic Desroches | e402af6 | 2012-08-14 11:19:22 +0200 | [diff] [blame] | 446 | disable_irq_wake(rtc->irq); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 447 | mr = rtt_readl(rtc, MR); |
| 448 | rtt_writel(rtc, MR, mr | rtc->imr); |
| 449 | } |
| 450 | |
| 451 | return 0; |
| 452 | } |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 453 | #endif |
| 454 | |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 455 | static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume); |
| 456 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 457 | static struct platform_driver at91_rtc_driver = { |
Jean-Christophe PLAGNIOL-VILLARD | 205056a | 2012-02-15 20:51:37 +0800 | [diff] [blame] | 458 | .probe = at91_rtc_probe, |
Greg Kroah-Hartman | 5a167f4 | 2012-12-21 13:09:38 -0800 | [diff] [blame] | 459 | .remove = at91_rtc_remove, |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 460 | .shutdown = at91_rtc_shutdown, |
Jean-Christophe PLAGNIOL-VILLARD | 205056a | 2012-02-15 20:51:37 +0800 | [diff] [blame] | 461 | .driver = { |
| 462 | .name = "rtc-at91sam9", |
| 463 | .owner = THIS_MODULE, |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 464 | .pm = &at91_rtc_pm_ops, |
Jean-Christophe PLAGNIOL-VILLARD | 205056a | 2012-02-15 20:51:37 +0800 | [diff] [blame] | 465 | }, |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 466 | }; |
| 467 | |
Devendra Naga | 477d30d | 2012-10-04 17:13:54 -0700 | [diff] [blame] | 468 | module_platform_driver(at91_rtc_driver); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 469 | |
| 470 | MODULE_AUTHOR("Michel Benoit"); |
| 471 | MODULE_DESCRIPTION("RTC driver for Atmel AT91SAM9x"); |
| 472 | MODULE_LICENSE("GPL"); |