blob: f001bb01e38f277a3210a7a19ee08d4bf1aabfca [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef _PARISC_PGTABLE_H
2#define _PARISC_PGTABLE_H
3
4#include <asm-generic/4level-fixup.h>
5
6#include <linux/config.h>
7#include <asm/fixmap.h>
8
9#ifndef __ASSEMBLY__
10/*
11 * we simulate an x86-style page table for the linux mm code
12 */
13
14#include <linux/spinlock.h>
15#include <asm/processor.h>
16#include <asm/cache.h>
17#include <asm/bitops.h>
18
19/*
20 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
21 * memory. For the return value to be meaningful, ADDR must be >=
22 * PAGE_OFFSET. This operation can be relatively expensive (e.g.,
23 * require a hash-, or multi-level tree-lookup or something of that
24 * sort) but it guarantees to return TRUE only if accessing the page
25 * at that address does not cause an error. Note that there may be
26 * addresses for which kern_addr_valid() returns FALSE even though an
27 * access would not cause an error (e.g., this is typically true for
28 * memory mapped I/O regions.
29 *
30 * XXX Need to implement this for parisc.
31 */
32#define kern_addr_valid(addr) (1)
33
34/* Certain architectures need to do special things when PTEs
35 * within a page table are directly modified. Thus, the following
36 * hook is made available.
37 */
38#define set_pte(pteptr, pteval) \
39 do{ \
40 *(pteptr) = (pteval); \
41 } while(0)
42#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
43
44#endif /* !__ASSEMBLY__ */
45
46#define pte_ERROR(e) \
47 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
48#define pmd_ERROR(e) \
49 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, (unsigned long)pmd_val(e))
50#define pgd_ERROR(e) \
51 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e))
52
53 /* Note: If you change ISTACK_SIZE, you need to change the corresponding
54 * values in vmlinux.lds and vmlinux64.lds (init_istack section). Also,
55 * the "order" and size need to agree.
56 */
57
58#define ISTACK_SIZE 32768 /* Interrupt Stack Size */
59#define ISTACK_ORDER 3
60
61/* This is the size of the initially mapped kernel memory (i.e. currently
62 * 0 to 1<<23 == 8MB */
63#ifdef CONFIG_64BIT
64#define KERNEL_INITIAL_ORDER 24
65#else
66#define KERNEL_INITIAL_ORDER 23
67#endif
68#define KERNEL_INITIAL_SIZE (1 << KERNEL_INITIAL_ORDER)
69
70#ifdef CONFIG_64BIT
71#define PT_NLEVELS 3
72#define PGD_ORDER 1 /* Number of pages per pgd */
73#define PMD_ORDER 1 /* Number of pages per pmd */
74#define PGD_ALLOC_ORDER 2 /* first pgd contains pmd */
75#else
76#define PT_NLEVELS 2
77#define PGD_ORDER 1 /* Number of pages per pgd */
78#define PGD_ALLOC_ORDER PGD_ORDER
79#endif
80
81/* Definitions for 3rd level (we use PLD here for Page Lower directory
82 * because PTE_SHIFT is used lower down to mean shift that has to be
83 * done to get usable bits out of the PTE) */
84#define PLD_SHIFT PAGE_SHIFT
85#define PLD_SIZE PAGE_SIZE
86#define BITS_PER_PTE (PAGE_SHIFT - BITS_PER_PTE_ENTRY)
87#define PTRS_PER_PTE (1UL << BITS_PER_PTE)
88
89/* Definitions for 2nd level */
90#define pgtable_cache_init() do { } while (0)
91
92#define PMD_SHIFT (PLD_SHIFT + BITS_PER_PTE)
93#define PMD_SIZE (1UL << PMD_SHIFT)
94#define PMD_MASK (~(PMD_SIZE-1))
95#if PT_NLEVELS == 3
96#define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY)
97#else
98#define BITS_PER_PMD 0
99#endif
100#define PTRS_PER_PMD (1UL << BITS_PER_PMD)
101
102/* Definitions for 1st level */
103#define PGDIR_SHIFT (PMD_SHIFT + BITS_PER_PMD)
104#define BITS_PER_PGD (PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY)
105#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
106#define PGDIR_MASK (~(PGDIR_SIZE-1))
107#define PTRS_PER_PGD (1UL << BITS_PER_PGD)
108#define USER_PTRS_PER_PGD PTRS_PER_PGD
109
110#define MAX_ADDRBITS (PGDIR_SHIFT + BITS_PER_PGD)
111#define MAX_ADDRESS (1UL << MAX_ADDRBITS)
112
113#define SPACEID_SHIFT (MAX_ADDRBITS - 32)
114
115/* This calculates the number of initial pages we need for the initial
116 * page tables */
117#define PT_INITIAL (1 << (KERNEL_INITIAL_ORDER - PMD_SHIFT))
118
119/*
120 * pgd entries used up by user/kernel:
121 */
122
Hugh Dickinsd455a362005-04-19 13:29:23 -0700123#define FIRST_USER_ADDRESS 0
Linus Torvalds1da177e2005-04-16 15:20:36 -0700124
125#ifndef __ASSEMBLY__
126extern void *vmalloc_start;
127#define PCXL_DMA_MAP_SIZE (8*1024*1024)
128#define VMALLOC_START ((unsigned long)vmalloc_start)
129/* this is a fixmap remnant, see fixmap.h */
130#define VMALLOC_END (KERNEL_MAP_END)
131#endif
132
133/* NB: The tlb miss handlers make certain assumptions about the order */
134/* of the following bits, so be careful (One example, bits 25-31 */
135/* are moved together in one instruction). */
136
137#define _PAGE_READ_BIT 31 /* (0x001) read access allowed */
138#define _PAGE_WRITE_BIT 30 /* (0x002) write access allowed */
139#define _PAGE_EXEC_BIT 29 /* (0x004) execute access allowed */
140#define _PAGE_GATEWAY_BIT 28 /* (0x008) privilege promotion allowed */
141#define _PAGE_DMB_BIT 27 /* (0x010) Data Memory Break enable (B bit) */
142#define _PAGE_DIRTY_BIT 26 /* (0x020) Page Dirty (D bit) */
143#define _PAGE_FILE_BIT _PAGE_DIRTY_BIT /* overload this bit */
144#define _PAGE_REFTRAP_BIT 25 /* (0x040) Page Ref. Trap enable (T bit) */
145#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */
146#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */
147#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */
148#define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */
149 /* for cache flushing only */
150#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */
151
152/* N.B. The bits are defined in terms of a 32 bit word above, so the */
153/* following macro is ok for both 32 and 64 bit. */
154
155#define xlate_pabit(x) (31 - x)
156
157/* this defines the shift to the usable bits in the PTE it is set so
158 * that the valid bits _PAGE_PRESENT_BIT and _PAGE_USER_BIT are set
159 * to zero */
160#define PTE_SHIFT xlate_pabit(_PAGE_USER_BIT)
161
162/* this is how many bits may be used by the file functions */
163#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_SHIFT)
164
165#define pte_to_pgoff(pte) (pte_val(pte) >> PTE_SHIFT)
166#define pgoff_to_pte(off) ((pte_t) { ((off) << PTE_SHIFT) | _PAGE_FILE })
167
168#define _PAGE_READ (1 << xlate_pabit(_PAGE_READ_BIT))
169#define _PAGE_WRITE (1 << xlate_pabit(_PAGE_WRITE_BIT))
170#define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
171#define _PAGE_EXEC (1 << xlate_pabit(_PAGE_EXEC_BIT))
172#define _PAGE_GATEWAY (1 << xlate_pabit(_PAGE_GATEWAY_BIT))
173#define _PAGE_DMB (1 << xlate_pabit(_PAGE_DMB_BIT))
174#define _PAGE_DIRTY (1 << xlate_pabit(_PAGE_DIRTY_BIT))
175#define _PAGE_REFTRAP (1 << xlate_pabit(_PAGE_REFTRAP_BIT))
176#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
177#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
178#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT))
179#define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT))
180#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT))
181#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT))
182
183#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
184#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
185#define _PAGE_KERNEL (_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
186
187/* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds
188 * are page-aligned, we don't care about the PAGE_OFFSET bits, except
189 * for a few meta-information bits, so we shift the address to be
190 * able to effectively address 40-bits of physical address space. */
191#define _PxD_PRESENT_BIT 31
192#define _PxD_ATTACHED_BIT 30
193#define _PxD_VALID_BIT 29
194
195#define PxD_FLAG_PRESENT (1 << xlate_pabit(_PxD_PRESENT_BIT))
196#define PxD_FLAG_ATTACHED (1 << xlate_pabit(_PxD_ATTACHED_BIT))
197#define PxD_FLAG_VALID (1 << xlate_pabit(_PxD_VALID_BIT))
198#define PxD_FLAG_MASK (0xf)
199#define PxD_FLAG_SHIFT (4)
200#define PxD_VALUE_SHIFT (8)
201
202#ifndef __ASSEMBLY__
203
204#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
205#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_ACCESSED)
206/* Others seem to make this executable, I don't know if that's correct
207 or not. The stack is mapped this way though so this is necessary
208 in the short term - dhd@linuxcare.com, 2000-08-08 */
209#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_ACCESSED)
210#define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_WRITE | _PAGE_ACCESSED)
211#define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_EXEC |_PAGE_ACCESSED)
212#define PAGE_COPY PAGE_EXECREAD
213#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED)
214#define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
215#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_DIRTY | _PAGE_ACCESSED)
216#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
217#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
218#define PAGE_FLUSH __pgprot(_PAGE_FLUSH)
219
220
221/*
222 * We could have an execute only page using "gateway - promote to priv
223 * level 3", but that is kind of silly. So, the way things are defined
224 * now, we must always have read permission for pages with execute
225 * permission. For the fun of it we'll go ahead and support write only
226 * pages.
227 */
228
229 /*xwr*/
230#define __P000 PAGE_NONE
231#define __P001 PAGE_READONLY
232#define __P010 __P000 /* copy on write */
233#define __P011 __P001 /* copy on write */
234#define __P100 PAGE_EXECREAD
235#define __P101 PAGE_EXECREAD
236#define __P110 __P100 /* copy on write */
237#define __P111 __P101 /* copy on write */
238
239#define __S000 PAGE_NONE
240#define __S001 PAGE_READONLY
241#define __S010 PAGE_WRITEONLY
242#define __S011 PAGE_SHARED
243#define __S100 PAGE_EXECREAD
244#define __S101 PAGE_EXECREAD
245#define __S110 PAGE_RWX
246#define __S111 PAGE_RWX
247
248extern pgd_t swapper_pg_dir[]; /* declared in init_task.c */
249
250/* initial page tables for 0-8MB for kernel */
251
252extern pte_t pg0[];
253
254/* zero page used for uninitialized stuff */
255
256extern unsigned long *empty_zero_page;
257
258/*
259 * ZERO_PAGE is a global shared page that is always zero: used
260 * for zero-mapped memory areas etc..
261 */
262
263#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
264
265#define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH))
266#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
267#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0)
268
269#define pmd_flag(x) (pmd_val(x) & PxD_FLAG_MASK)
270#define pmd_address(x) ((unsigned long)(pmd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
271#define pgd_flag(x) (pgd_val(x) & PxD_FLAG_MASK)
272#define pgd_address(x) ((unsigned long)(pgd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
273
274#ifdef CONFIG_64BIT
275/* The first entry of the permanent pmd is not there if it contains
276 * the gateway marker */
277#define pmd_none(x) (!pmd_val(x) || pmd_flag(x) == PxD_FLAG_ATTACHED)
278#else
279#define pmd_none(x) (!pmd_val(x))
280#endif
281#define pmd_bad(x) (!(pmd_flag(x) & PxD_FLAG_VALID))
282#define pmd_present(x) (pmd_flag(x) & PxD_FLAG_PRESENT)
283static inline void pmd_clear(pmd_t *pmd) {
284#ifdef CONFIG_64BIT
285 if (pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
286 /* This is the entry pointing to the permanent pmd
287 * attached to the pgd; cannot clear it */
288 __pmd_val_set(*pmd, PxD_FLAG_ATTACHED);
289 else
290#endif
291 __pmd_val_set(*pmd, 0);
292}
293
294
295
296#if PT_NLEVELS == 3
297#define pgd_page(pgd) ((unsigned long) __va(pgd_address(pgd)))
298
299/* For 64 bit we have three level tables */
300
301#define pgd_none(x) (!pgd_val(x))
302#define pgd_bad(x) (!(pgd_flag(x) & PxD_FLAG_VALID))
303#define pgd_present(x) (pgd_flag(x) & PxD_FLAG_PRESENT)
304static inline void pgd_clear(pgd_t *pgd) {
305#ifdef CONFIG_64BIT
306 if(pgd_flag(*pgd) & PxD_FLAG_ATTACHED)
307 /* This is the permanent pmd attached to the pgd; cannot
308 * free it */
309 return;
310#endif
311 __pgd_val_set(*pgd, 0);
312}
313#else
314/*
315 * The "pgd_xxx()" functions here are trivial for a folded two-level
316 * setup: the pgd is never bad, and a pmd always exists (as it's folded
317 * into the pgd entry)
318 */
319extern inline int pgd_none(pgd_t pgd) { return 0; }
320extern inline int pgd_bad(pgd_t pgd) { return 0; }
321extern inline int pgd_present(pgd_t pgd) { return 1; }
322extern inline void pgd_clear(pgd_t * pgdp) { }
323#endif
324
325/*
326 * The following only work if pte_present() is true.
327 * Undefined behaviour if not..
328 */
329extern inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_READ; }
330extern inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
331extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
332extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
333extern inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
334extern inline int pte_user(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
335
336extern inline pte_t pte_rdprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_READ; return pte; }
337extern inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
338extern inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
339extern inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_WRITE; return pte; }
340extern inline pte_t pte_mkread(pte_t pte) { pte_val(pte) |= _PAGE_READ; return pte; }
341extern inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
342extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
343extern inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; return pte; }
344
345/*
346 * Conversion functions: convert a page and protection to a page entry,
347 * and a page entry and page directory to the page they refer to.
348 */
349#define __mk_pte(addr,pgprot) \
350({ \
351 pte_t __pte; \
352 \
353 pte_val(__pte) = ((addr)+pgprot_val(pgprot)); \
354 \
355 __pte; \
356})
357
358#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
359
360static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
361{
362 pte_t pte;
363 pte_val(pte) = (pfn << PAGE_SHIFT) | pgprot_val(pgprot);
364 return pte;
365}
366
367/* This takes a physical page address that is used by the remapping functions */
368#define mk_pte_phys(physpage, pgprot) \
369({ pte_t __pte; pte_val(__pte) = physpage + pgprot_val(pgprot); __pte; })
370
371extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
372{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
373
374/* Permanent address of a page. On parisc we don't have highmem. */
375
376#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
377
378#define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
379
380#define pmd_page_kernel(pmd) ((unsigned long) __va(pmd_address(pmd)))
381
382#define __pmd_page(pmd) ((unsigned long) __va(pmd_address(pmd)))
383#define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd))
384
385#define pgd_index(address) ((address) >> PGDIR_SHIFT)
386
387/* to find an entry in a page-table-directory */
388#define pgd_offset(mm, address) \
389((mm)->pgd + ((address) >> PGDIR_SHIFT))
390
391/* to find an entry in a kernel page-table-directory */
392#define pgd_offset_k(address) pgd_offset(&init_mm, address)
393
394/* Find an entry in the second-level page table.. */
395
396#if PT_NLEVELS == 3
397#define pmd_offset(dir,address) \
398((pmd_t *) pgd_page(*(dir)) + (((address)>>PMD_SHIFT) & (PTRS_PER_PMD-1)))
399#else
400#define pmd_offset(dir,addr) ((pmd_t *) dir)
401#endif
402
403/* Find an entry in the third-level page table.. */
404#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
405#define pte_offset_kernel(pmd, address) \
406 ((pte_t *) pmd_page_kernel(*(pmd)) + pte_index(address))
407#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
408#define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
409#define pte_unmap(pte) do { } while (0)
410#define pte_unmap_nested(pte) do { } while (0)
411
412#define pte_unmap(pte) do { } while (0)
413#define pte_unmap_nested(pte) do { } while (0)
414
415extern void paging_init (void);
416
417/* Used for deferring calls to flush_dcache_page() */
418
419#define PG_dcache_dirty PG_arch_1
420
421struct vm_area_struct; /* forward declaration (include/linux/mm.h) */
422extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
423
424/* Encode and de-code a swap entry */
425
426#define __swp_type(x) ((x).val & 0x1f)
427#define __swp_offset(x) ( (((x).val >> 6) & 0x7) | \
428 (((x).val >> 8) & ~0x7) )
429#define __swp_entry(type, offset) ((swp_entry_t) { (type) | \
430 ((offset & 0x7) << 6) | \
431 ((offset & ~0x7) << 8) })
432#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
433#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
434
435static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
436{
437#ifdef CONFIG_SMP
438 if (!pte_young(*ptep))
439 return 0;
440 return test_and_clear_bit(xlate_pabit(_PAGE_ACCESSED_BIT), &pte_val(*ptep));
441#else
442 pte_t pte = *ptep;
443 if (!pte_young(pte))
444 return 0;
445 set_pte_at(vma->vm_mm, addr, ptep, pte_mkold(pte));
446 return 1;
447#endif
448}
449
450static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
451{
452#ifdef CONFIG_SMP
453 if (!pte_dirty(*ptep))
454 return 0;
455 return test_and_clear_bit(xlate_pabit(_PAGE_DIRTY_BIT), &pte_val(*ptep));
456#else
457 pte_t pte = *ptep;
458 if (!pte_dirty(pte))
459 return 0;
460 set_pte_at(vma->vm_mm, addr, ptep, pte_mkclean(pte));
461 return 1;
462#endif
463}
464
465extern spinlock_t pa_dbit_lock;
466
467static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
468{
469 pte_t old_pte;
470 pte_t pte;
471
472 spin_lock(&pa_dbit_lock);
473 pte = old_pte = *ptep;
474 pte_val(pte) &= ~_PAGE_PRESENT;
475 pte_val(pte) |= _PAGE_FLUSH;
476 set_pte_at(mm,addr,ptep,pte);
477 spin_unlock(&pa_dbit_lock);
478
479 return old_pte;
480}
481
482static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
483{
484#ifdef CONFIG_SMP
485 unsigned long new, old;
486
487 do {
488 old = pte_val(*ptep);
489 new = pte_val(pte_wrprotect(__pte (old)));
490 } while (cmpxchg((unsigned long *) ptep, old, new) != old);
491#else
492 pte_t old_pte = *ptep;
493 set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
494#endif
495}
496
497#define pte_same(A,B) (pte_val(A) == pte_val(B))
498
499#endif /* !__ASSEMBLY__ */
500
501#define io_remap_page_range(vma, vaddr, paddr, size, prot) \
502 remap_pfn_range(vma, vaddr, (paddr) >> PAGE_SHIFT, size, prot)
503
504#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
505 remap_pfn_range(vma, vaddr, pfn, size, prot)
506
507#define MK_IOSPACE_PFN(space, pfn) (pfn)
508#define GET_IOSPACE(pfn) 0
509#define GET_PFN(pfn) (pfn)
510
511/* We provide our own get_unmapped_area to provide cache coherency */
512
513#define HAVE_ARCH_UNMAPPED_AREA
514
515#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
516#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
517#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
518#define __HAVE_ARCH_PTEP_SET_WRPROTECT
519#define __HAVE_ARCH_PTE_SAME
520#include <asm-generic/pgtable.h>
521
522#endif /* _PARISC_PGTABLE_H */