Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1 | /* |
Martin Kepplinger | c5ea1b58 | 2015-09-01 13:45:09 +0200 | [diff] [blame] | 2 | * mma8452.c - Support for following Freescale 3-axis accelerometers: |
| 3 | * |
Martin Kepplinger | 244a93f | 2016-01-16 15:35:22 +0100 | [diff] [blame] | 4 | * MMA8451Q (14 bit) |
Martin Kepplinger | c5ea1b58 | 2015-09-01 13:45:09 +0200 | [diff] [blame] | 5 | * MMA8452Q (12 bit) |
| 6 | * MMA8453Q (10 bit) |
Martin Kepplinger | 417e008 | 2015-09-01 13:45:11 +0200 | [diff] [blame] | 7 | * MMA8652FC (12 bit) |
| 8 | * MMA8653FC (10 bit) |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 9 | * |
Martin Kepplinger | d6223c3 | 2015-09-01 13:45:12 +0200 | [diff] [blame] | 10 | * Copyright 2015 Martin Kepplinger <martin.kepplinger@theobroma-systems.com> |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 11 | * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net> |
| 12 | * |
| 13 | * This file is subject to the terms and conditions of version 2 of |
| 14 | * the GNU General Public License. See the file COPYING in the main |
| 15 | * directory of this archive for more details. |
| 16 | * |
| 17 | * 7-bit I2C slave address 0x1c/0x1d (pin selectable) |
| 18 | * |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 19 | * TODO: orientation events, autosleep |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 20 | */ |
| 21 | |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/i2c.h> |
| 24 | #include <linux/iio/iio.h> |
| 25 | #include <linux/iio/sysfs.h> |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 26 | #include <linux/iio/buffer.h> |
Martin Fuzzey | ae6d9ce | 2015-06-01 15:39:58 +0200 | [diff] [blame] | 27 | #include <linux/iio/trigger.h> |
| 28 | #include <linux/iio/trigger_consumer.h> |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 29 | #include <linux/iio/triggered_buffer.h> |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 30 | #include <linux/iio/events.h> |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 31 | #include <linux/delay.h> |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 32 | #include <linux/of_device.h> |
Martin Kepplinger | d2a3e09 | 2015-10-15 15:10:32 +0200 | [diff] [blame] | 33 | #include <linux/of_irq.h> |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 34 | |
Hartmut Knaack | 69abff8 | 2015-08-02 22:43:50 +0200 | [diff] [blame] | 35 | #define MMA8452_STATUS 0x00 |
| 36 | #define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0)) |
Martin Kepplinger | c5ea1b58 | 2015-09-01 13:45:09 +0200 | [diff] [blame] | 37 | #define MMA8452_OUT_X 0x01 /* MSB first */ |
Hartmut Knaack | 69abff8 | 2015-08-02 22:43:50 +0200 | [diff] [blame] | 38 | #define MMA8452_OUT_Y 0x03 |
| 39 | #define MMA8452_OUT_Z 0x05 |
| 40 | #define MMA8452_INT_SRC 0x0c |
| 41 | #define MMA8452_WHO_AM_I 0x0d |
| 42 | #define MMA8452_DATA_CFG 0x0e |
| 43 | #define MMA8452_DATA_CFG_FS_MASK GENMASK(1, 0) |
| 44 | #define MMA8452_DATA_CFG_FS_2G 0 |
| 45 | #define MMA8452_DATA_CFG_FS_4G 1 |
| 46 | #define MMA8452_DATA_CFG_FS_8G 2 |
| 47 | #define MMA8452_DATA_CFG_HPF_MASK BIT(4) |
| 48 | #define MMA8452_HP_FILTER_CUTOFF 0x0f |
| 49 | #define MMA8452_HP_FILTER_CUTOFF_SEL_MASK GENMASK(1, 0) |
Martin Kepplinger | 60f562e | 2015-09-01 13:45:10 +0200 | [diff] [blame] | 50 | #define MMA8452_FF_MT_CFG 0x15 |
| 51 | #define MMA8452_FF_MT_CFG_OAE BIT(6) |
| 52 | #define MMA8452_FF_MT_CFG_ELE BIT(7) |
| 53 | #define MMA8452_FF_MT_SRC 0x16 |
| 54 | #define MMA8452_FF_MT_SRC_XHE BIT(1) |
| 55 | #define MMA8452_FF_MT_SRC_YHE BIT(3) |
| 56 | #define MMA8452_FF_MT_SRC_ZHE BIT(5) |
| 57 | #define MMA8452_FF_MT_THS 0x17 |
| 58 | #define MMA8452_FF_MT_THS_MASK 0x7f |
| 59 | #define MMA8452_FF_MT_COUNT 0x18 |
Hartmut Knaack | 69abff8 | 2015-08-02 22:43:50 +0200 | [diff] [blame] | 60 | #define MMA8452_TRANSIENT_CFG 0x1d |
| 61 | #define MMA8452_TRANSIENT_CFG_HPF_BYP BIT(0) |
Hartmut Knaack | 69abff8 | 2015-08-02 22:43:50 +0200 | [diff] [blame] | 62 | #define MMA8452_TRANSIENT_CFG_ELE BIT(4) |
| 63 | #define MMA8452_TRANSIENT_SRC 0x1e |
| 64 | #define MMA8452_TRANSIENT_SRC_XTRANSE BIT(1) |
| 65 | #define MMA8452_TRANSIENT_SRC_YTRANSE BIT(3) |
| 66 | #define MMA8452_TRANSIENT_SRC_ZTRANSE BIT(5) |
| 67 | #define MMA8452_TRANSIENT_THS 0x1f |
| 68 | #define MMA8452_TRANSIENT_THS_MASK GENMASK(6, 0) |
| 69 | #define MMA8452_TRANSIENT_COUNT 0x20 |
| 70 | #define MMA8452_CTRL_REG1 0x2a |
| 71 | #define MMA8452_CTRL_ACTIVE BIT(0) |
| 72 | #define MMA8452_CTRL_DR_MASK GENMASK(5, 3) |
| 73 | #define MMA8452_CTRL_DR_SHIFT 3 |
| 74 | #define MMA8452_CTRL_DR_DEFAULT 0x4 /* 50 Hz sample frequency */ |
| 75 | #define MMA8452_CTRL_REG2 0x2b |
| 76 | #define MMA8452_CTRL_REG2_RST BIT(6) |
| 77 | #define MMA8452_CTRL_REG4 0x2d |
| 78 | #define MMA8452_CTRL_REG5 0x2e |
| 79 | #define MMA8452_OFF_X 0x2f |
| 80 | #define MMA8452_OFF_Y 0x30 |
| 81 | #define MMA8452_OFF_Z 0x31 |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 82 | |
Hartmut Knaack | 69abff8 | 2015-08-02 22:43:50 +0200 | [diff] [blame] | 83 | #define MMA8452_MAX_REG 0x31 |
Martin Fuzzey | 2a17698c | 2015-05-13 12:26:40 +0200 | [diff] [blame] | 84 | |
Hartmut Knaack | 69abff8 | 2015-08-02 22:43:50 +0200 | [diff] [blame] | 85 | #define MMA8452_INT_DRDY BIT(0) |
Martin Kepplinger | 60f562e | 2015-09-01 13:45:10 +0200 | [diff] [blame] | 86 | #define MMA8452_INT_FF_MT BIT(2) |
Hartmut Knaack | 69abff8 | 2015-08-02 22:43:50 +0200 | [diff] [blame] | 87 | #define MMA8452_INT_TRANS BIT(5) |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 88 | |
Martin Kepplinger | 244a93f | 2016-01-16 15:35:22 +0100 | [diff] [blame] | 89 | #define MMA8451_DEVICE_ID 0x1a |
Martin Kepplinger | 36775d5 | 2016-01-16 15:35:21 +0100 | [diff] [blame] | 90 | #define MMA8452_DEVICE_ID 0x2a |
| 91 | #define MMA8453_DEVICE_ID 0x3a |
Martin Kepplinger | 417e008 | 2015-09-01 13:45:11 +0200 | [diff] [blame] | 92 | #define MMA8652_DEVICE_ID 0x4a |
| 93 | #define MMA8653_DEVICE_ID 0x5a |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 94 | |
| 95 | struct mma8452_data { |
| 96 | struct i2c_client *client; |
| 97 | struct mutex lock; |
| 98 | u8 ctrl_reg1; |
| 99 | u8 data_cfg; |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 100 | const struct mma_chip_info *chip_info; |
| 101 | }; |
| 102 | |
| 103 | /** |
| 104 | * struct mma_chip_info - chip specific data for Freescale's accelerometers |
| 105 | * @chip_id: WHO_AM_I register's value |
| 106 | * @channels: struct iio_chan_spec matching the device's |
| 107 | * capabilities |
| 108 | * @num_channels: number of channels |
| 109 | * @mma_scales: scale factors for converting register values |
| 110 | * to m/s^2; 3 modes: 2g, 4g, 8g; 2 integers |
| 111 | * per mode: m/s^2 and micro m/s^2 |
| 112 | * @ev_cfg: event config register address |
| 113 | * @ev_cfg_ele: latch bit in event config register |
| 114 | * @ev_cfg_chan_shift: number of the bit to enable events in X |
| 115 | * direction; in event config register |
| 116 | * @ev_src: event source register address |
| 117 | * @ev_src_xe: bit in event source register that indicates |
| 118 | * an event in X direction |
| 119 | * @ev_src_ye: bit in event source register that indicates |
| 120 | * an event in Y direction |
| 121 | * @ev_src_ze: bit in event source register that indicates |
| 122 | * an event in Z direction |
| 123 | * @ev_ths: event threshold register address |
| 124 | * @ev_ths_mask: mask for the threshold value |
| 125 | * @ev_count: event count (period) register address |
| 126 | * |
| 127 | * Since not all chips supported by the driver support comparing high pass |
| 128 | * filtered data for events (interrupts), different interrupt sources are |
| 129 | * used for different chips and the relevant registers are included here. |
| 130 | */ |
| 131 | struct mma_chip_info { |
| 132 | u8 chip_id; |
| 133 | const struct iio_chan_spec *channels; |
| 134 | int num_channels; |
| 135 | const int mma_scales[3][2]; |
| 136 | u8 ev_cfg; |
| 137 | u8 ev_cfg_ele; |
| 138 | u8 ev_cfg_chan_shift; |
| 139 | u8 ev_src; |
| 140 | u8 ev_src_xe; |
| 141 | u8 ev_src_ye; |
| 142 | u8 ev_src_ze; |
| 143 | u8 ev_ths; |
| 144 | u8 ev_ths_mask; |
| 145 | u8 ev_count; |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 146 | }; |
| 147 | |
Martin Kepplinger | e60378c | 2015-12-15 17:45:00 +0100 | [diff] [blame] | 148 | enum { |
| 149 | idx_x, |
| 150 | idx_y, |
| 151 | idx_z, |
| 152 | idx_ts, |
| 153 | }; |
| 154 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 155 | static int mma8452_drdy(struct mma8452_data *data) |
| 156 | { |
| 157 | int tries = 150; |
| 158 | |
| 159 | while (tries-- > 0) { |
| 160 | int ret = i2c_smbus_read_byte_data(data->client, |
| 161 | MMA8452_STATUS); |
| 162 | if (ret < 0) |
| 163 | return ret; |
| 164 | if ((ret & MMA8452_STATUS_DRDY) == MMA8452_STATUS_DRDY) |
| 165 | return 0; |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 166 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 167 | msleep(20); |
| 168 | } |
| 169 | |
| 170 | dev_err(&data->client->dev, "data not ready\n"); |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 171 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 172 | return -EIO; |
| 173 | } |
| 174 | |
| 175 | static int mma8452_read(struct mma8452_data *data, __be16 buf[3]) |
| 176 | { |
| 177 | int ret = mma8452_drdy(data); |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 178 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 179 | if (ret < 0) |
| 180 | return ret; |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 181 | |
| 182 | return i2c_smbus_read_i2c_block_data(data->client, MMA8452_OUT_X, |
| 183 | 3 * sizeof(__be16), (u8 *)buf); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 184 | } |
| 185 | |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 186 | static ssize_t mma8452_show_int_plus_micros(char *buf, const int (*vals)[2], |
| 187 | int n) |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 188 | { |
| 189 | size_t len = 0; |
| 190 | |
| 191 | while (n-- > 0) |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 192 | len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ", |
| 193 | vals[n][0], vals[n][1]); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 194 | |
| 195 | /* replace trailing space by newline */ |
| 196 | buf[len - 1] = '\n'; |
| 197 | |
| 198 | return len; |
| 199 | } |
| 200 | |
| 201 | static int mma8452_get_int_plus_micros_index(const int (*vals)[2], int n, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 202 | int val, int val2) |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 203 | { |
| 204 | while (n-- > 0) |
| 205 | if (val == vals[n][0] && val2 == vals[n][1]) |
| 206 | return n; |
| 207 | |
| 208 | return -EINVAL; |
| 209 | } |
| 210 | |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 211 | static int mma8452_get_odr_index(struct mma8452_data *data) |
| 212 | { |
| 213 | return (data->ctrl_reg1 & MMA8452_CTRL_DR_MASK) >> |
| 214 | MMA8452_CTRL_DR_SHIFT; |
| 215 | } |
| 216 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 217 | static const int mma8452_samp_freq[8][2] = { |
| 218 | {800, 0}, {400, 0}, {200, 0}, {100, 0}, {50, 0}, {12, 500000}, |
| 219 | {6, 250000}, {1, 560000} |
| 220 | }; |
| 221 | |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 222 | /* Datasheet table 35 (step time vs sample frequency) */ |
| 223 | static const int mma8452_transient_time_step_us[8] = { |
| 224 | 1250, |
| 225 | 2500, |
| 226 | 5000, |
| 227 | 10000, |
| 228 | 20000, |
| 229 | 20000, |
| 230 | 20000, |
| 231 | 20000 |
| 232 | }; |
| 233 | |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 234 | /* Datasheet table 18 (normal mode) */ |
| 235 | static const int mma8452_hp_filter_cutoff[8][4][2] = { |
| 236 | { {16, 0}, {8, 0}, {4, 0}, {2, 0} }, /* 800 Hz sample */ |
| 237 | { {16, 0}, {8, 0}, {4, 0}, {2, 0} }, /* 400 Hz sample */ |
| 238 | { {8, 0}, {4, 0}, {2, 0}, {1, 0} }, /* 200 Hz sample */ |
| 239 | { {4, 0}, {2, 0}, {1, 0}, {0, 500000} }, /* 100 Hz sample */ |
| 240 | { {2, 0}, {1, 0}, {0, 500000}, {0, 250000} }, /* 50 Hz sample */ |
| 241 | { {2, 0}, {1, 0}, {0, 500000}, {0, 250000} }, /* 12.5 Hz sample */ |
| 242 | { {2, 0}, {1, 0}, {0, 500000}, {0, 250000} }, /* 6.25 Hz sample */ |
| 243 | { {2, 0}, {1, 0}, {0, 500000}, {0, 250000} } /* 1.56 Hz sample */ |
| 244 | }; |
| 245 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 246 | static ssize_t mma8452_show_samp_freq_avail(struct device *dev, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 247 | struct device_attribute *attr, |
| 248 | char *buf) |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 249 | { |
| 250 | return mma8452_show_int_plus_micros(buf, mma8452_samp_freq, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 251 | ARRAY_SIZE(mma8452_samp_freq)); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 252 | } |
| 253 | |
| 254 | static ssize_t mma8452_show_scale_avail(struct device *dev, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 255 | struct device_attribute *attr, |
| 256 | char *buf) |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 257 | { |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 258 | struct mma8452_data *data = iio_priv(i2c_get_clientdata( |
| 259 | to_i2c_client(dev))); |
| 260 | |
| 261 | return mma8452_show_int_plus_micros(buf, data->chip_info->mma_scales, |
| 262 | ARRAY_SIZE(data->chip_info->mma_scales)); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 263 | } |
| 264 | |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 265 | static ssize_t mma8452_show_hp_cutoff_avail(struct device *dev, |
| 266 | struct device_attribute *attr, |
| 267 | char *buf) |
| 268 | { |
| 269 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
| 270 | struct mma8452_data *data = iio_priv(indio_dev); |
| 271 | int i = mma8452_get_odr_index(data); |
| 272 | |
| 273 | return mma8452_show_int_plus_micros(buf, mma8452_hp_filter_cutoff[i], |
| 274 | ARRAY_SIZE(mma8452_hp_filter_cutoff[0])); |
| 275 | } |
| 276 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 277 | static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(mma8452_show_samp_freq_avail); |
| 278 | static IIO_DEVICE_ATTR(in_accel_scale_available, S_IRUGO, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 279 | mma8452_show_scale_avail, NULL, 0); |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 280 | static IIO_DEVICE_ATTR(in_accel_filter_high_pass_3db_frequency_available, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 281 | S_IRUGO, mma8452_show_hp_cutoff_avail, NULL, 0); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 282 | |
| 283 | static int mma8452_get_samp_freq_index(struct mma8452_data *data, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 284 | int val, int val2) |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 285 | { |
| 286 | return mma8452_get_int_plus_micros_index(mma8452_samp_freq, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 287 | ARRAY_SIZE(mma8452_samp_freq), |
| 288 | val, val2); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 289 | } |
| 290 | |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 291 | static int mma8452_get_scale_index(struct mma8452_data *data, int val, int val2) |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 292 | { |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 293 | return mma8452_get_int_plus_micros_index(data->chip_info->mma_scales, |
| 294 | ARRAY_SIZE(data->chip_info->mma_scales), val, val2); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 295 | } |
| 296 | |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 297 | static int mma8452_get_hp_filter_index(struct mma8452_data *data, |
| 298 | int val, int val2) |
| 299 | { |
| 300 | int i = mma8452_get_odr_index(data); |
| 301 | |
| 302 | return mma8452_get_int_plus_micros_index(mma8452_hp_filter_cutoff[i], |
Hartmut Knaack | 001fceb | 2015-08-02 22:43:46 +0200 | [diff] [blame] | 303 | ARRAY_SIZE(mma8452_hp_filter_cutoff[0]), val, val2); |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 304 | } |
| 305 | |
| 306 | static int mma8452_read_hp_filter(struct mma8452_data *data, int *hz, int *uHz) |
| 307 | { |
| 308 | int i, ret; |
| 309 | |
| 310 | ret = i2c_smbus_read_byte_data(data->client, MMA8452_HP_FILTER_CUTOFF); |
| 311 | if (ret < 0) |
| 312 | return ret; |
| 313 | |
| 314 | i = mma8452_get_odr_index(data); |
| 315 | ret &= MMA8452_HP_FILTER_CUTOFF_SEL_MASK; |
| 316 | *hz = mma8452_hp_filter_cutoff[i][ret][0]; |
| 317 | *uHz = mma8452_hp_filter_cutoff[i][ret][1]; |
| 318 | |
| 319 | return 0; |
| 320 | } |
| 321 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 322 | static int mma8452_read_raw(struct iio_dev *indio_dev, |
| 323 | struct iio_chan_spec const *chan, |
| 324 | int *val, int *val2, long mask) |
| 325 | { |
| 326 | struct mma8452_data *data = iio_priv(indio_dev); |
| 327 | __be16 buffer[3]; |
| 328 | int i, ret; |
| 329 | |
| 330 | switch (mask) { |
| 331 | case IIO_CHAN_INFO_RAW: |
| 332 | if (iio_buffer_enabled(indio_dev)) |
| 333 | return -EBUSY; |
| 334 | |
| 335 | mutex_lock(&data->lock); |
| 336 | ret = mma8452_read(data, buffer); |
| 337 | mutex_unlock(&data->lock); |
| 338 | if (ret < 0) |
| 339 | return ret; |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 340 | |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 341 | *val = sign_extend32(be16_to_cpu( |
| 342 | buffer[chan->scan_index]) >> chan->scan_type.shift, |
| 343 | chan->scan_type.realbits - 1); |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 344 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 345 | return IIO_VAL_INT; |
| 346 | case IIO_CHAN_INFO_SCALE: |
| 347 | i = data->data_cfg & MMA8452_DATA_CFG_FS_MASK; |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 348 | *val = data->chip_info->mma_scales[i][0]; |
| 349 | *val2 = data->chip_info->mma_scales[i][1]; |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 350 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 351 | return IIO_VAL_INT_PLUS_MICRO; |
| 352 | case IIO_CHAN_INFO_SAMP_FREQ: |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 353 | i = mma8452_get_odr_index(data); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 354 | *val = mma8452_samp_freq[i][0]; |
| 355 | *val2 = mma8452_samp_freq[i][1]; |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 356 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 357 | return IIO_VAL_INT_PLUS_MICRO; |
| 358 | case IIO_CHAN_INFO_CALIBBIAS: |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 359 | ret = i2c_smbus_read_byte_data(data->client, |
| 360 | MMA8452_OFF_X + chan->scan_index); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 361 | if (ret < 0) |
| 362 | return ret; |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 363 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 364 | *val = sign_extend32(ret, 7); |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 365 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 366 | return IIO_VAL_INT; |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 367 | case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY: |
| 368 | if (data->data_cfg & MMA8452_DATA_CFG_HPF_MASK) { |
| 369 | ret = mma8452_read_hp_filter(data, val, val2); |
| 370 | if (ret < 0) |
| 371 | return ret; |
| 372 | } else { |
| 373 | *val = 0; |
| 374 | *val2 = 0; |
| 375 | } |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 376 | |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 377 | return IIO_VAL_INT_PLUS_MICRO; |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 378 | } |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 379 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 380 | return -EINVAL; |
| 381 | } |
| 382 | |
| 383 | static int mma8452_standby(struct mma8452_data *data) |
| 384 | { |
| 385 | return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 386 | data->ctrl_reg1 & ~MMA8452_CTRL_ACTIVE); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 387 | } |
| 388 | |
| 389 | static int mma8452_active(struct mma8452_data *data) |
| 390 | { |
| 391 | return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 392 | data->ctrl_reg1); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 393 | } |
| 394 | |
| 395 | static int mma8452_change_config(struct mma8452_data *data, u8 reg, u8 val) |
| 396 | { |
| 397 | int ret; |
| 398 | |
| 399 | mutex_lock(&data->lock); |
| 400 | |
| 401 | /* config can only be changed when in standby */ |
| 402 | ret = mma8452_standby(data); |
| 403 | if (ret < 0) |
| 404 | goto fail; |
| 405 | |
| 406 | ret = i2c_smbus_write_byte_data(data->client, reg, val); |
| 407 | if (ret < 0) |
| 408 | goto fail; |
| 409 | |
| 410 | ret = mma8452_active(data); |
| 411 | if (ret < 0) |
| 412 | goto fail; |
| 413 | |
| 414 | ret = 0; |
| 415 | fail: |
| 416 | mutex_unlock(&data->lock); |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 417 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 418 | return ret; |
| 419 | } |
| 420 | |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 421 | /* returns >0 if in freefall mode, 0 if not or <0 if an error occured */ |
| 422 | static int mma8452_freefall_mode_enabled(struct mma8452_data *data) |
| 423 | { |
| 424 | int val; |
| 425 | const struct mma_chip_info *chip = data->chip_info; |
| 426 | |
| 427 | val = i2c_smbus_read_byte_data(data->client, chip->ev_cfg); |
| 428 | if (val < 0) |
| 429 | return val; |
| 430 | |
| 431 | return !(val & MMA8452_FF_MT_CFG_OAE); |
| 432 | } |
| 433 | |
| 434 | static int mma8452_set_freefall_mode(struct mma8452_data *data, bool state) |
| 435 | { |
| 436 | int val; |
| 437 | const struct mma_chip_info *chip = data->chip_info; |
| 438 | |
| 439 | if ((state && mma8452_freefall_mode_enabled(data)) || |
| 440 | (!state && !(mma8452_freefall_mode_enabled(data)))) |
| 441 | return 0; |
| 442 | |
| 443 | val = i2c_smbus_read_byte_data(data->client, chip->ev_cfg); |
| 444 | if (val < 0) |
| 445 | return val; |
| 446 | |
| 447 | if (state) { |
| 448 | val |= BIT(idx_x + chip->ev_cfg_chan_shift); |
| 449 | val |= BIT(idx_y + chip->ev_cfg_chan_shift); |
| 450 | val |= BIT(idx_z + chip->ev_cfg_chan_shift); |
| 451 | val &= ~MMA8452_FF_MT_CFG_OAE; |
| 452 | } else { |
| 453 | val &= ~BIT(idx_x + chip->ev_cfg_chan_shift); |
| 454 | val &= ~BIT(idx_y + chip->ev_cfg_chan_shift); |
| 455 | val &= ~BIT(idx_z + chip->ev_cfg_chan_shift); |
| 456 | val |= MMA8452_FF_MT_CFG_OAE; |
| 457 | } |
| 458 | |
| 459 | val = mma8452_change_config(data, chip->ev_cfg, val); |
| 460 | if (val) |
| 461 | return val; |
| 462 | |
| 463 | return 0; |
| 464 | } |
| 465 | |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 466 | static int mma8452_set_hp_filter_frequency(struct mma8452_data *data, |
| 467 | int val, int val2) |
| 468 | { |
| 469 | int i, reg; |
| 470 | |
| 471 | i = mma8452_get_hp_filter_index(data, val, val2); |
| 472 | if (i < 0) |
Hartmut Knaack | b9fddcd | 2015-08-02 22:43:48 +0200 | [diff] [blame] | 473 | return i; |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 474 | |
| 475 | reg = i2c_smbus_read_byte_data(data->client, |
| 476 | MMA8452_HP_FILTER_CUTOFF); |
| 477 | if (reg < 0) |
| 478 | return reg; |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 479 | |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 480 | reg &= ~MMA8452_HP_FILTER_CUTOFF_SEL_MASK; |
| 481 | reg |= i; |
| 482 | |
| 483 | return mma8452_change_config(data, MMA8452_HP_FILTER_CUTOFF, reg); |
| 484 | } |
| 485 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 486 | static int mma8452_write_raw(struct iio_dev *indio_dev, |
| 487 | struct iio_chan_spec const *chan, |
| 488 | int val, int val2, long mask) |
| 489 | { |
| 490 | struct mma8452_data *data = iio_priv(indio_dev); |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 491 | int i, ret; |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 492 | |
| 493 | if (iio_buffer_enabled(indio_dev)) |
| 494 | return -EBUSY; |
| 495 | |
| 496 | switch (mask) { |
| 497 | case IIO_CHAN_INFO_SAMP_FREQ: |
| 498 | i = mma8452_get_samp_freq_index(data, val, val2); |
| 499 | if (i < 0) |
Hartmut Knaack | b9fddcd | 2015-08-02 22:43:48 +0200 | [diff] [blame] | 500 | return i; |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 501 | |
| 502 | data->ctrl_reg1 &= ~MMA8452_CTRL_DR_MASK; |
| 503 | data->ctrl_reg1 |= i << MMA8452_CTRL_DR_SHIFT; |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 504 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 505 | return mma8452_change_config(data, MMA8452_CTRL_REG1, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 506 | data->ctrl_reg1); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 507 | case IIO_CHAN_INFO_SCALE: |
| 508 | i = mma8452_get_scale_index(data, val, val2); |
| 509 | if (i < 0) |
Hartmut Knaack | b9fddcd | 2015-08-02 22:43:48 +0200 | [diff] [blame] | 510 | return i; |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 511 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 512 | data->data_cfg &= ~MMA8452_DATA_CFG_FS_MASK; |
| 513 | data->data_cfg |= i; |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 514 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 515 | return mma8452_change_config(data, MMA8452_DATA_CFG, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 516 | data->data_cfg); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 517 | case IIO_CHAN_INFO_CALIBBIAS: |
| 518 | if (val < -128 || val > 127) |
| 519 | return -EINVAL; |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 520 | |
| 521 | return mma8452_change_config(data, |
| 522 | MMA8452_OFF_X + chan->scan_index, |
| 523 | val); |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 524 | |
| 525 | case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY: |
| 526 | if (val == 0 && val2 == 0) { |
| 527 | data->data_cfg &= ~MMA8452_DATA_CFG_HPF_MASK; |
| 528 | } else { |
| 529 | data->data_cfg |= MMA8452_DATA_CFG_HPF_MASK; |
| 530 | ret = mma8452_set_hp_filter_frequency(data, val, val2); |
| 531 | if (ret < 0) |
| 532 | return ret; |
| 533 | } |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 534 | |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 535 | return mma8452_change_config(data, MMA8452_DATA_CFG, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 536 | data->data_cfg); |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 537 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 538 | default: |
| 539 | return -EINVAL; |
| 540 | } |
| 541 | } |
| 542 | |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 543 | static int mma8452_read_thresh(struct iio_dev *indio_dev, |
| 544 | const struct iio_chan_spec *chan, |
| 545 | enum iio_event_type type, |
| 546 | enum iio_event_direction dir, |
| 547 | enum iio_event_info info, |
| 548 | int *val, int *val2) |
| 549 | { |
| 550 | struct mma8452_data *data = iio_priv(indio_dev); |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 551 | int ret, us; |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 552 | |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 553 | switch (info) { |
| 554 | case IIO_EV_INFO_VALUE: |
| 555 | ret = i2c_smbus_read_byte_data(data->client, |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 556 | data->chip_info->ev_ths); |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 557 | if (ret < 0) |
| 558 | return ret; |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 559 | |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 560 | *val = ret & data->chip_info->ev_ths_mask; |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 561 | |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 562 | return IIO_VAL_INT; |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 563 | |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 564 | case IIO_EV_INFO_PERIOD: |
| 565 | ret = i2c_smbus_read_byte_data(data->client, |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 566 | data->chip_info->ev_count); |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 567 | if (ret < 0) |
| 568 | return ret; |
| 569 | |
| 570 | us = ret * mma8452_transient_time_step_us[ |
| 571 | mma8452_get_odr_index(data)]; |
| 572 | *val = us / USEC_PER_SEC; |
| 573 | *val2 = us % USEC_PER_SEC; |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 574 | |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 575 | return IIO_VAL_INT_PLUS_MICRO; |
| 576 | |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 577 | case IIO_EV_INFO_HIGH_PASS_FILTER_3DB: |
| 578 | ret = i2c_smbus_read_byte_data(data->client, |
| 579 | MMA8452_TRANSIENT_CFG); |
| 580 | if (ret < 0) |
| 581 | return ret; |
| 582 | |
| 583 | if (ret & MMA8452_TRANSIENT_CFG_HPF_BYP) { |
| 584 | *val = 0; |
| 585 | *val2 = 0; |
| 586 | } else { |
| 587 | ret = mma8452_read_hp_filter(data, val, val2); |
| 588 | if (ret < 0) |
| 589 | return ret; |
| 590 | } |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 591 | |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 592 | return IIO_VAL_INT_PLUS_MICRO; |
| 593 | |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 594 | default: |
| 595 | return -EINVAL; |
| 596 | } |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 597 | } |
| 598 | |
| 599 | static int mma8452_write_thresh(struct iio_dev *indio_dev, |
| 600 | const struct iio_chan_spec *chan, |
| 601 | enum iio_event_type type, |
| 602 | enum iio_event_direction dir, |
| 603 | enum iio_event_info info, |
| 604 | int val, int val2) |
| 605 | { |
| 606 | struct mma8452_data *data = iio_priv(indio_dev); |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 607 | int ret, reg, steps; |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 608 | |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 609 | switch (info) { |
| 610 | case IIO_EV_INFO_VALUE: |
Hartmut Knaack | 1121822 | 2015-08-02 22:43:49 +0200 | [diff] [blame] | 611 | if (val < 0 || val > MMA8452_TRANSIENT_THS_MASK) |
| 612 | return -EINVAL; |
| 613 | |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 614 | return mma8452_change_config(data, data->chip_info->ev_ths, |
| 615 | val); |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 616 | |
| 617 | case IIO_EV_INFO_PERIOD: |
| 618 | steps = (val * USEC_PER_SEC + val2) / |
| 619 | mma8452_transient_time_step_us[ |
| 620 | mma8452_get_odr_index(data)]; |
| 621 | |
Hartmut Knaack | 1121822 | 2015-08-02 22:43:49 +0200 | [diff] [blame] | 622 | if (steps < 0 || steps > 0xff) |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 623 | return -EINVAL; |
| 624 | |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 625 | return mma8452_change_config(data, data->chip_info->ev_count, |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 626 | steps); |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 627 | |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 628 | case IIO_EV_INFO_HIGH_PASS_FILTER_3DB: |
| 629 | reg = i2c_smbus_read_byte_data(data->client, |
| 630 | MMA8452_TRANSIENT_CFG); |
| 631 | if (reg < 0) |
| 632 | return reg; |
| 633 | |
| 634 | if (val == 0 && val2 == 0) { |
| 635 | reg |= MMA8452_TRANSIENT_CFG_HPF_BYP; |
| 636 | } else { |
| 637 | reg &= ~MMA8452_TRANSIENT_CFG_HPF_BYP; |
| 638 | ret = mma8452_set_hp_filter_frequency(data, val, val2); |
| 639 | if (ret < 0) |
| 640 | return ret; |
| 641 | } |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 642 | |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 643 | return mma8452_change_config(data, MMA8452_TRANSIENT_CFG, reg); |
| 644 | |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 645 | default: |
| 646 | return -EINVAL; |
| 647 | } |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 648 | } |
| 649 | |
| 650 | static int mma8452_read_event_config(struct iio_dev *indio_dev, |
| 651 | const struct iio_chan_spec *chan, |
| 652 | enum iio_event_type type, |
| 653 | enum iio_event_direction dir) |
| 654 | { |
| 655 | struct mma8452_data *data = iio_priv(indio_dev); |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 656 | const struct mma_chip_info *chip = data->chip_info; |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 657 | int ret; |
| 658 | |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 659 | switch (dir) { |
| 660 | case IIO_EV_DIR_FALLING: |
| 661 | return mma8452_freefall_mode_enabled(data); |
| 662 | case IIO_EV_DIR_RISING: |
| 663 | if (mma8452_freefall_mode_enabled(data)) |
| 664 | return 0; |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 665 | |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 666 | ret = i2c_smbus_read_byte_data(data->client, |
| 667 | data->chip_info->ev_cfg); |
| 668 | if (ret < 0) |
| 669 | return ret; |
| 670 | |
| 671 | return !!(ret & BIT(chan->scan_index + chip->ev_cfg_chan_shift)); |
| 672 | default: |
| 673 | return -EINVAL; |
| 674 | } |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 675 | } |
| 676 | |
| 677 | static int mma8452_write_event_config(struct iio_dev *indio_dev, |
| 678 | const struct iio_chan_spec *chan, |
| 679 | enum iio_event_type type, |
| 680 | enum iio_event_direction dir, |
| 681 | int state) |
| 682 | { |
| 683 | struct mma8452_data *data = iio_priv(indio_dev); |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 684 | const struct mma_chip_info *chip = data->chip_info; |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 685 | int val; |
| 686 | |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 687 | switch (dir) { |
| 688 | case IIO_EV_DIR_FALLING: |
| 689 | return mma8452_set_freefall_mode(data, state); |
| 690 | case IIO_EV_DIR_RISING: |
| 691 | val = i2c_smbus_read_byte_data(data->client, chip->ev_cfg); |
| 692 | if (val < 0) |
| 693 | return val; |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 694 | |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 695 | if (state) { |
| 696 | if (mma8452_freefall_mode_enabled(data)) { |
| 697 | val &= ~BIT(idx_x + chip->ev_cfg_chan_shift); |
| 698 | val &= ~BIT(idx_y + chip->ev_cfg_chan_shift); |
| 699 | val &= ~BIT(idx_z + chip->ev_cfg_chan_shift); |
| 700 | val |= MMA8452_FF_MT_CFG_OAE; |
| 701 | } |
| 702 | val |= BIT(chan->scan_index + chip->ev_cfg_chan_shift); |
| 703 | } else { |
| 704 | if (mma8452_freefall_mode_enabled(data)) |
| 705 | return 0; |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 706 | |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 707 | val &= ~BIT(chan->scan_index + chip->ev_cfg_chan_shift); |
| 708 | } |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 709 | |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 710 | val |= chip->ev_cfg_ele; |
| 711 | |
| 712 | return mma8452_change_config(data, chip->ev_cfg, val); |
| 713 | default: |
| 714 | return -EINVAL; |
| 715 | } |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 716 | } |
| 717 | |
| 718 | static void mma8452_transient_interrupt(struct iio_dev *indio_dev) |
| 719 | { |
| 720 | struct mma8452_data *data = iio_priv(indio_dev); |
| 721 | s64 ts = iio_get_time_ns(); |
| 722 | int src; |
| 723 | |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 724 | src = i2c_smbus_read_byte_data(data->client, data->chip_info->ev_src); |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 725 | if (src < 0) |
| 726 | return; |
| 727 | |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 728 | if (mma8452_freefall_mode_enabled(data)) { |
| 729 | iio_push_event(indio_dev, |
| 730 | IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, |
| 731 | IIO_MOD_X_AND_Y_AND_Z, |
| 732 | IIO_EV_TYPE_MAG, |
| 733 | IIO_EV_DIR_FALLING), |
| 734 | ts); |
| 735 | return; |
| 736 | } |
| 737 | |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 738 | if (src & data->chip_info->ev_src_xe) |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 739 | iio_push_event(indio_dev, |
| 740 | IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X, |
Martin Kepplinger | c5d0db0 | 2015-07-05 19:50:18 +0200 | [diff] [blame] | 741 | IIO_EV_TYPE_MAG, |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 742 | IIO_EV_DIR_RISING), |
| 743 | ts); |
| 744 | |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 745 | if (src & data->chip_info->ev_src_ye) |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 746 | iio_push_event(indio_dev, |
| 747 | IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Y, |
Martin Kepplinger | c5d0db0 | 2015-07-05 19:50:18 +0200 | [diff] [blame] | 748 | IIO_EV_TYPE_MAG, |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 749 | IIO_EV_DIR_RISING), |
| 750 | ts); |
| 751 | |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 752 | if (src & data->chip_info->ev_src_ze) |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 753 | iio_push_event(indio_dev, |
| 754 | IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Z, |
Martin Kepplinger | c5d0db0 | 2015-07-05 19:50:18 +0200 | [diff] [blame] | 755 | IIO_EV_TYPE_MAG, |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 756 | IIO_EV_DIR_RISING), |
| 757 | ts); |
| 758 | } |
| 759 | |
| 760 | static irqreturn_t mma8452_interrupt(int irq, void *p) |
| 761 | { |
| 762 | struct iio_dev *indio_dev = p; |
| 763 | struct mma8452_data *data = iio_priv(indio_dev); |
Martin Kepplinger | 60f562e | 2015-09-01 13:45:10 +0200 | [diff] [blame] | 764 | const struct mma_chip_info *chip = data->chip_info; |
Martin Fuzzey | ae6d9ce | 2015-06-01 15:39:58 +0200 | [diff] [blame] | 765 | int ret = IRQ_NONE; |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 766 | int src; |
| 767 | |
| 768 | src = i2c_smbus_read_byte_data(data->client, MMA8452_INT_SRC); |
| 769 | if (src < 0) |
| 770 | return IRQ_NONE; |
| 771 | |
Martin Fuzzey | ae6d9ce | 2015-06-01 15:39:58 +0200 | [diff] [blame] | 772 | if (src & MMA8452_INT_DRDY) { |
| 773 | iio_trigger_poll_chained(indio_dev->trig); |
| 774 | ret = IRQ_HANDLED; |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 775 | } |
| 776 | |
Martin Kepplinger | 60f562e | 2015-09-01 13:45:10 +0200 | [diff] [blame] | 777 | if ((src & MMA8452_INT_TRANS && |
| 778 | chip->ev_src == MMA8452_TRANSIENT_SRC) || |
| 779 | (src & MMA8452_INT_FF_MT && |
| 780 | chip->ev_src == MMA8452_FF_MT_SRC)) { |
Martin Fuzzey | ae6d9ce | 2015-06-01 15:39:58 +0200 | [diff] [blame] | 781 | mma8452_transient_interrupt(indio_dev); |
| 782 | ret = IRQ_HANDLED; |
| 783 | } |
| 784 | |
| 785 | return ret; |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 786 | } |
| 787 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 788 | static irqreturn_t mma8452_trigger_handler(int irq, void *p) |
| 789 | { |
| 790 | struct iio_poll_func *pf = p; |
| 791 | struct iio_dev *indio_dev = pf->indio_dev; |
| 792 | struct mma8452_data *data = iio_priv(indio_dev); |
| 793 | u8 buffer[16]; /* 3 16-bit channels + padding + ts */ |
| 794 | int ret; |
| 795 | |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 796 | ret = mma8452_read(data, (__be16 *)buffer); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 797 | if (ret < 0) |
| 798 | goto done; |
| 799 | |
| 800 | iio_push_to_buffers_with_timestamp(indio_dev, buffer, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 801 | iio_get_time_ns()); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 802 | |
| 803 | done: |
| 804 | iio_trigger_notify_done(indio_dev->trig); |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 805 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 806 | return IRQ_HANDLED; |
| 807 | } |
| 808 | |
Martin Fuzzey | 2a17698c | 2015-05-13 12:26:40 +0200 | [diff] [blame] | 809 | static int mma8452_reg_access_dbg(struct iio_dev *indio_dev, |
| 810 | unsigned reg, unsigned writeval, |
| 811 | unsigned *readval) |
| 812 | { |
| 813 | int ret; |
| 814 | struct mma8452_data *data = iio_priv(indio_dev); |
| 815 | |
| 816 | if (reg > MMA8452_MAX_REG) |
| 817 | return -EINVAL; |
| 818 | |
| 819 | if (!readval) |
| 820 | return mma8452_change_config(data, reg, writeval); |
| 821 | |
| 822 | ret = i2c_smbus_read_byte_data(data->client, reg); |
| 823 | if (ret < 0) |
| 824 | return ret; |
| 825 | |
| 826 | *readval = ret; |
| 827 | |
| 828 | return 0; |
| 829 | } |
| 830 | |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 831 | static const struct iio_event_spec mma8452_freefall_event[] = { |
| 832 | { |
| 833 | .type = IIO_EV_TYPE_MAG, |
| 834 | .dir = IIO_EV_DIR_FALLING, |
| 835 | .mask_separate = BIT(IIO_EV_INFO_ENABLE), |
| 836 | .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) | |
| 837 | BIT(IIO_EV_INFO_PERIOD) | |
| 838 | BIT(IIO_EV_INFO_HIGH_PASS_FILTER_3DB) |
| 839 | }, |
| 840 | }; |
| 841 | |
| 842 | static const struct iio_event_spec mma8652_freefall_event[] = { |
| 843 | { |
| 844 | .type = IIO_EV_TYPE_MAG, |
| 845 | .dir = IIO_EV_DIR_FALLING, |
| 846 | .mask_separate = BIT(IIO_EV_INFO_ENABLE), |
| 847 | .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) | |
| 848 | BIT(IIO_EV_INFO_PERIOD) |
| 849 | }, |
| 850 | }; |
| 851 | |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 852 | static const struct iio_event_spec mma8452_transient_event[] = { |
| 853 | { |
Martin Kepplinger | c5d0db0 | 2015-07-05 19:50:18 +0200 | [diff] [blame] | 854 | .type = IIO_EV_TYPE_MAG, |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 855 | .dir = IIO_EV_DIR_RISING, |
| 856 | .mask_separate = BIT(IIO_EV_INFO_ENABLE), |
Martin Fuzzey | 5dbbd19 | 2015-06-01 15:39:54 +0200 | [diff] [blame] | 857 | .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) | |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 858 | BIT(IIO_EV_INFO_PERIOD) | |
| 859 | BIT(IIO_EV_INFO_HIGH_PASS_FILTER_3DB) |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 860 | }, |
| 861 | }; |
| 862 | |
Martin Kepplinger | 60f562e | 2015-09-01 13:45:10 +0200 | [diff] [blame] | 863 | static const struct iio_event_spec mma8452_motion_event[] = { |
| 864 | { |
| 865 | .type = IIO_EV_TYPE_MAG, |
| 866 | .dir = IIO_EV_DIR_RISING, |
| 867 | .mask_separate = BIT(IIO_EV_INFO_ENABLE), |
| 868 | .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) | |
| 869 | BIT(IIO_EV_INFO_PERIOD) |
| 870 | }, |
| 871 | }; |
| 872 | |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 873 | /* |
| 874 | * Threshold is configured in fixed 8G/127 steps regardless of |
| 875 | * currently selected scale for measurement. |
| 876 | */ |
| 877 | static IIO_CONST_ATTR_NAMED(accel_transient_scale, in_accel_scale, "0.617742"); |
| 878 | |
| 879 | static struct attribute *mma8452_event_attributes[] = { |
| 880 | &iio_const_attr_accel_transient_scale.dev_attr.attr, |
| 881 | NULL, |
| 882 | }; |
| 883 | |
| 884 | static struct attribute_group mma8452_event_attribute_group = { |
| 885 | .attrs = mma8452_event_attributes, |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 886 | }; |
| 887 | |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 888 | #define MMA8452_FREEFALL_CHANNEL(modifier) { \ |
| 889 | .type = IIO_ACCEL, \ |
| 890 | .modified = 1, \ |
| 891 | .channel2 = modifier, \ |
| 892 | .scan_index = -1, \ |
| 893 | .event_spec = mma8452_freefall_event, \ |
| 894 | .num_event_specs = ARRAY_SIZE(mma8452_freefall_event), \ |
| 895 | } |
| 896 | |
| 897 | #define MMA8652_FREEFALL_CHANNEL(modifier) { \ |
| 898 | .type = IIO_ACCEL, \ |
| 899 | .modified = 1, \ |
| 900 | .channel2 = modifier, \ |
| 901 | .scan_index = -1, \ |
| 902 | .event_spec = mma8652_freefall_event, \ |
| 903 | .num_event_specs = ARRAY_SIZE(mma8652_freefall_event), \ |
| 904 | } |
| 905 | |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 906 | #define MMA8452_CHANNEL(axis, idx, bits) { \ |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 907 | .type = IIO_ACCEL, \ |
| 908 | .modified = 1, \ |
| 909 | .channel2 = IIO_MOD_##axis, \ |
| 910 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 911 | BIT(IIO_CHAN_INFO_CALIBBIAS), \ |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 912 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 913 | BIT(IIO_CHAN_INFO_SCALE) | \ |
| 914 | BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \ |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 915 | .scan_index = idx, \ |
| 916 | .scan_type = { \ |
| 917 | .sign = 's', \ |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 918 | .realbits = (bits), \ |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 919 | .storagebits = 16, \ |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 920 | .shift = 16 - (bits), \ |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 921 | .endianness = IIO_BE, \ |
| 922 | }, \ |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 923 | .event_spec = mma8452_transient_event, \ |
| 924 | .num_event_specs = ARRAY_SIZE(mma8452_transient_event), \ |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 925 | } |
| 926 | |
Martin Kepplinger | 417e008 | 2015-09-01 13:45:11 +0200 | [diff] [blame] | 927 | #define MMA8652_CHANNEL(axis, idx, bits) { \ |
| 928 | .type = IIO_ACCEL, \ |
| 929 | .modified = 1, \ |
| 930 | .channel2 = IIO_MOD_##axis, \ |
| 931 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ |
| 932 | BIT(IIO_CHAN_INFO_CALIBBIAS), \ |
| 933 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ |
| 934 | BIT(IIO_CHAN_INFO_SCALE), \ |
| 935 | .scan_index = idx, \ |
| 936 | .scan_type = { \ |
| 937 | .sign = 's', \ |
| 938 | .realbits = (bits), \ |
| 939 | .storagebits = 16, \ |
| 940 | .shift = 16 - (bits), \ |
| 941 | .endianness = IIO_BE, \ |
| 942 | }, \ |
| 943 | .event_spec = mma8452_motion_event, \ |
| 944 | .num_event_specs = ARRAY_SIZE(mma8452_motion_event), \ |
| 945 | } |
| 946 | |
Martin Kepplinger | 244a93f | 2016-01-16 15:35:22 +0100 | [diff] [blame] | 947 | static const struct iio_chan_spec mma8451_channels[] = { |
| 948 | MMA8452_CHANNEL(X, idx_x, 14), |
| 949 | MMA8452_CHANNEL(Y, idx_y, 14), |
| 950 | MMA8452_CHANNEL(Z, idx_z, 14), |
| 951 | IIO_CHAN_SOFT_TIMESTAMP(idx_ts), |
| 952 | MMA8452_FREEFALL_CHANNEL(IIO_MOD_X_AND_Y_AND_Z), |
| 953 | }; |
| 954 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 955 | static const struct iio_chan_spec mma8452_channels[] = { |
Martin Kepplinger | e60378c | 2015-12-15 17:45:00 +0100 | [diff] [blame] | 956 | MMA8452_CHANNEL(X, idx_x, 12), |
| 957 | MMA8452_CHANNEL(Y, idx_y, 12), |
| 958 | MMA8452_CHANNEL(Z, idx_z, 12), |
| 959 | IIO_CHAN_SOFT_TIMESTAMP(idx_ts), |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 960 | MMA8452_FREEFALL_CHANNEL(IIO_MOD_X_AND_Y_AND_Z), |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 961 | }; |
| 962 | |
Martin Kepplinger | c5ea1b58 | 2015-09-01 13:45:09 +0200 | [diff] [blame] | 963 | static const struct iio_chan_spec mma8453_channels[] = { |
Martin Kepplinger | e60378c | 2015-12-15 17:45:00 +0100 | [diff] [blame] | 964 | MMA8452_CHANNEL(X, idx_x, 10), |
| 965 | MMA8452_CHANNEL(Y, idx_y, 10), |
| 966 | MMA8452_CHANNEL(Z, idx_z, 10), |
| 967 | IIO_CHAN_SOFT_TIMESTAMP(idx_ts), |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 968 | MMA8452_FREEFALL_CHANNEL(IIO_MOD_X_AND_Y_AND_Z), |
Martin Kepplinger | c5ea1b58 | 2015-09-01 13:45:09 +0200 | [diff] [blame] | 969 | }; |
| 970 | |
Martin Kepplinger | 417e008 | 2015-09-01 13:45:11 +0200 | [diff] [blame] | 971 | static const struct iio_chan_spec mma8652_channels[] = { |
Martin Kepplinger | e60378c | 2015-12-15 17:45:00 +0100 | [diff] [blame] | 972 | MMA8652_CHANNEL(X, idx_x, 12), |
| 973 | MMA8652_CHANNEL(Y, idx_y, 12), |
| 974 | MMA8652_CHANNEL(Z, idx_z, 12), |
| 975 | IIO_CHAN_SOFT_TIMESTAMP(idx_ts), |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 976 | MMA8652_FREEFALL_CHANNEL(IIO_MOD_X_AND_Y_AND_Z), |
Martin Kepplinger | 417e008 | 2015-09-01 13:45:11 +0200 | [diff] [blame] | 977 | }; |
| 978 | |
| 979 | static const struct iio_chan_spec mma8653_channels[] = { |
Martin Kepplinger | e60378c | 2015-12-15 17:45:00 +0100 | [diff] [blame] | 980 | MMA8652_CHANNEL(X, idx_x, 10), |
| 981 | MMA8652_CHANNEL(Y, idx_y, 10), |
| 982 | MMA8652_CHANNEL(Z, idx_z, 10), |
| 983 | IIO_CHAN_SOFT_TIMESTAMP(idx_ts), |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 984 | MMA8652_FREEFALL_CHANNEL(IIO_MOD_X_AND_Y_AND_Z), |
Martin Kepplinger | 417e008 | 2015-09-01 13:45:11 +0200 | [diff] [blame] | 985 | }; |
| 986 | |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 987 | enum { |
Martin Kepplinger | 244a93f | 2016-01-16 15:35:22 +0100 | [diff] [blame] | 988 | mma8451, |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 989 | mma8452, |
Martin Kepplinger | c5ea1b58 | 2015-09-01 13:45:09 +0200 | [diff] [blame] | 990 | mma8453, |
Martin Kepplinger | 417e008 | 2015-09-01 13:45:11 +0200 | [diff] [blame] | 991 | mma8652, |
| 992 | mma8653, |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 993 | }; |
| 994 | |
| 995 | static const struct mma_chip_info mma_chip_info_table[] = { |
Martin Kepplinger | 244a93f | 2016-01-16 15:35:22 +0100 | [diff] [blame] | 996 | [mma8451] = { |
| 997 | .chip_id = MMA8451_DEVICE_ID, |
| 998 | .channels = mma8451_channels, |
| 999 | .num_channels = ARRAY_SIZE(mma8451_channels), |
| 1000 | /* |
| 1001 | * Hardware has fullscale of -2G, -4G, -8G corresponding to |
| 1002 | * raw value -8192 for 14 bit, -2048 for 12 bit or -512 for 10 |
| 1003 | * bit. |
| 1004 | * The userspace interface uses m/s^2 and we declare micro units |
| 1005 | * So scale factor for 12 bit here is given by: |
| 1006 | * g * N * 1000000 / 2048 for N = 2, 4, 8 and g=9.80665 |
| 1007 | */ |
| 1008 | .mma_scales = { {0, 2394}, {0, 4788}, {0, 9577} }, |
| 1009 | .ev_cfg = MMA8452_TRANSIENT_CFG, |
| 1010 | .ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE, |
| 1011 | .ev_cfg_chan_shift = 1, |
| 1012 | .ev_src = MMA8452_TRANSIENT_SRC, |
| 1013 | .ev_src_xe = MMA8452_TRANSIENT_SRC_XTRANSE, |
| 1014 | .ev_src_ye = MMA8452_TRANSIENT_SRC_YTRANSE, |
| 1015 | .ev_src_ze = MMA8452_TRANSIENT_SRC_ZTRANSE, |
| 1016 | .ev_ths = MMA8452_TRANSIENT_THS, |
| 1017 | .ev_ths_mask = MMA8452_TRANSIENT_THS_MASK, |
| 1018 | .ev_count = MMA8452_TRANSIENT_COUNT, |
| 1019 | }, |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 1020 | [mma8452] = { |
| 1021 | .chip_id = MMA8452_DEVICE_ID, |
| 1022 | .channels = mma8452_channels, |
| 1023 | .num_channels = ARRAY_SIZE(mma8452_channels), |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 1024 | .mma_scales = { {0, 9577}, {0, 19154}, {0, 38307} }, |
| 1025 | .ev_cfg = MMA8452_TRANSIENT_CFG, |
| 1026 | .ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE, |
| 1027 | .ev_cfg_chan_shift = 1, |
| 1028 | .ev_src = MMA8452_TRANSIENT_SRC, |
| 1029 | .ev_src_xe = MMA8452_TRANSIENT_SRC_XTRANSE, |
| 1030 | .ev_src_ye = MMA8452_TRANSIENT_SRC_YTRANSE, |
| 1031 | .ev_src_ze = MMA8452_TRANSIENT_SRC_ZTRANSE, |
| 1032 | .ev_ths = MMA8452_TRANSIENT_THS, |
| 1033 | .ev_ths_mask = MMA8452_TRANSIENT_THS_MASK, |
| 1034 | .ev_count = MMA8452_TRANSIENT_COUNT, |
| 1035 | }, |
Martin Kepplinger | c5ea1b58 | 2015-09-01 13:45:09 +0200 | [diff] [blame] | 1036 | [mma8453] = { |
| 1037 | .chip_id = MMA8453_DEVICE_ID, |
| 1038 | .channels = mma8453_channels, |
| 1039 | .num_channels = ARRAY_SIZE(mma8453_channels), |
| 1040 | .mma_scales = { {0, 38307}, {0, 76614}, {0, 153228} }, |
| 1041 | .ev_cfg = MMA8452_TRANSIENT_CFG, |
| 1042 | .ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE, |
| 1043 | .ev_cfg_chan_shift = 1, |
| 1044 | .ev_src = MMA8452_TRANSIENT_SRC, |
| 1045 | .ev_src_xe = MMA8452_TRANSIENT_SRC_XTRANSE, |
| 1046 | .ev_src_ye = MMA8452_TRANSIENT_SRC_YTRANSE, |
| 1047 | .ev_src_ze = MMA8452_TRANSIENT_SRC_ZTRANSE, |
| 1048 | .ev_ths = MMA8452_TRANSIENT_THS, |
| 1049 | .ev_ths_mask = MMA8452_TRANSIENT_THS_MASK, |
| 1050 | .ev_count = MMA8452_TRANSIENT_COUNT, |
| 1051 | }, |
Martin Kepplinger | 417e008 | 2015-09-01 13:45:11 +0200 | [diff] [blame] | 1052 | [mma8652] = { |
| 1053 | .chip_id = MMA8652_DEVICE_ID, |
| 1054 | .channels = mma8652_channels, |
| 1055 | .num_channels = ARRAY_SIZE(mma8652_channels), |
| 1056 | .mma_scales = { {0, 9577}, {0, 19154}, {0, 38307} }, |
| 1057 | .ev_cfg = MMA8452_FF_MT_CFG, |
| 1058 | .ev_cfg_ele = MMA8452_FF_MT_CFG_ELE, |
| 1059 | .ev_cfg_chan_shift = 3, |
| 1060 | .ev_src = MMA8452_FF_MT_SRC, |
| 1061 | .ev_src_xe = MMA8452_FF_MT_SRC_XHE, |
| 1062 | .ev_src_ye = MMA8452_FF_MT_SRC_YHE, |
| 1063 | .ev_src_ze = MMA8452_FF_MT_SRC_ZHE, |
| 1064 | .ev_ths = MMA8452_FF_MT_THS, |
| 1065 | .ev_ths_mask = MMA8452_FF_MT_THS_MASK, |
| 1066 | .ev_count = MMA8452_FF_MT_COUNT, |
| 1067 | }, |
| 1068 | [mma8653] = { |
| 1069 | .chip_id = MMA8653_DEVICE_ID, |
| 1070 | .channels = mma8653_channels, |
| 1071 | .num_channels = ARRAY_SIZE(mma8653_channels), |
| 1072 | .mma_scales = { {0, 38307}, {0, 76614}, {0, 153228} }, |
| 1073 | .ev_cfg = MMA8452_FF_MT_CFG, |
| 1074 | .ev_cfg_ele = MMA8452_FF_MT_CFG_ELE, |
| 1075 | .ev_cfg_chan_shift = 3, |
| 1076 | .ev_src = MMA8452_FF_MT_SRC, |
| 1077 | .ev_src_xe = MMA8452_FF_MT_SRC_XHE, |
| 1078 | .ev_src_ye = MMA8452_FF_MT_SRC_YHE, |
| 1079 | .ev_src_ze = MMA8452_FF_MT_SRC_ZHE, |
| 1080 | .ev_ths = MMA8452_FF_MT_THS, |
| 1081 | .ev_ths_mask = MMA8452_FF_MT_THS_MASK, |
| 1082 | .ev_count = MMA8452_FF_MT_COUNT, |
| 1083 | }, |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 1084 | }; |
| 1085 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1086 | static struct attribute *mma8452_attributes[] = { |
| 1087 | &iio_dev_attr_sampling_frequency_available.dev_attr.attr, |
| 1088 | &iio_dev_attr_in_accel_scale_available.dev_attr.attr, |
Martin Fuzzey | 1e79841 | 2015-06-01 15:39:56 +0200 | [diff] [blame] | 1089 | &iio_dev_attr_in_accel_filter_high_pass_3db_frequency_available.dev_attr.attr, |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1090 | NULL |
| 1091 | }; |
| 1092 | |
| 1093 | static const struct attribute_group mma8452_group = { |
| 1094 | .attrs = mma8452_attributes, |
| 1095 | }; |
| 1096 | |
| 1097 | static const struct iio_info mma8452_info = { |
| 1098 | .attrs = &mma8452_group, |
| 1099 | .read_raw = &mma8452_read_raw, |
| 1100 | .write_raw = &mma8452_write_raw, |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 1101 | .event_attrs = &mma8452_event_attribute_group, |
| 1102 | .read_event_value = &mma8452_read_thresh, |
| 1103 | .write_event_value = &mma8452_write_thresh, |
| 1104 | .read_event_config = &mma8452_read_event_config, |
| 1105 | .write_event_config = &mma8452_write_event_config, |
Martin Fuzzey | 2a17698c | 2015-05-13 12:26:40 +0200 | [diff] [blame] | 1106 | .debugfs_reg_access = &mma8452_reg_access_dbg, |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1107 | .driver_module = THIS_MODULE, |
| 1108 | }; |
| 1109 | |
| 1110 | static const unsigned long mma8452_scan_masks[] = {0x7, 0}; |
| 1111 | |
Martin Fuzzey | ae6d9ce | 2015-06-01 15:39:58 +0200 | [diff] [blame] | 1112 | static int mma8452_data_rdy_trigger_set_state(struct iio_trigger *trig, |
| 1113 | bool state) |
| 1114 | { |
| 1115 | struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); |
| 1116 | struct mma8452_data *data = iio_priv(indio_dev); |
| 1117 | int reg; |
| 1118 | |
| 1119 | reg = i2c_smbus_read_byte_data(data->client, MMA8452_CTRL_REG4); |
| 1120 | if (reg < 0) |
| 1121 | return reg; |
| 1122 | |
| 1123 | if (state) |
| 1124 | reg |= MMA8452_INT_DRDY; |
| 1125 | else |
| 1126 | reg &= ~MMA8452_INT_DRDY; |
| 1127 | |
| 1128 | return mma8452_change_config(data, MMA8452_CTRL_REG4, reg); |
| 1129 | } |
| 1130 | |
| 1131 | static int mma8452_validate_device(struct iio_trigger *trig, |
| 1132 | struct iio_dev *indio_dev) |
| 1133 | { |
| 1134 | struct iio_dev *indio = iio_trigger_get_drvdata(trig); |
| 1135 | |
| 1136 | if (indio != indio_dev) |
| 1137 | return -EINVAL; |
| 1138 | |
| 1139 | return 0; |
| 1140 | } |
| 1141 | |
| 1142 | static const struct iio_trigger_ops mma8452_trigger_ops = { |
| 1143 | .set_trigger_state = mma8452_data_rdy_trigger_set_state, |
| 1144 | .validate_device = mma8452_validate_device, |
| 1145 | .owner = THIS_MODULE, |
| 1146 | }; |
| 1147 | |
| 1148 | static int mma8452_trigger_setup(struct iio_dev *indio_dev) |
| 1149 | { |
| 1150 | struct mma8452_data *data = iio_priv(indio_dev); |
| 1151 | struct iio_trigger *trig; |
| 1152 | int ret; |
| 1153 | |
| 1154 | trig = devm_iio_trigger_alloc(&data->client->dev, "%s-dev%d", |
| 1155 | indio_dev->name, |
| 1156 | indio_dev->id); |
| 1157 | if (!trig) |
| 1158 | return -ENOMEM; |
| 1159 | |
| 1160 | trig->dev.parent = &data->client->dev; |
| 1161 | trig->ops = &mma8452_trigger_ops; |
| 1162 | iio_trigger_set_drvdata(trig, indio_dev); |
| 1163 | |
| 1164 | ret = iio_trigger_register(trig); |
| 1165 | if (ret) |
| 1166 | return ret; |
| 1167 | |
| 1168 | indio_dev->trig = trig; |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 1169 | |
Martin Fuzzey | ae6d9ce | 2015-06-01 15:39:58 +0200 | [diff] [blame] | 1170 | return 0; |
| 1171 | } |
| 1172 | |
| 1173 | static void mma8452_trigger_cleanup(struct iio_dev *indio_dev) |
| 1174 | { |
| 1175 | if (indio_dev->trig) |
| 1176 | iio_trigger_unregister(indio_dev->trig); |
| 1177 | } |
| 1178 | |
Martin Fuzzey | ecabae7 | 2015-05-13 12:26:38 +0200 | [diff] [blame] | 1179 | static int mma8452_reset(struct i2c_client *client) |
| 1180 | { |
| 1181 | int i; |
| 1182 | int ret; |
| 1183 | |
| 1184 | ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG2, |
| 1185 | MMA8452_CTRL_REG2_RST); |
| 1186 | if (ret < 0) |
| 1187 | return ret; |
| 1188 | |
| 1189 | for (i = 0; i < 10; i++) { |
| 1190 | usleep_range(100, 200); |
| 1191 | ret = i2c_smbus_read_byte_data(client, MMA8452_CTRL_REG2); |
| 1192 | if (ret == -EIO) |
| 1193 | continue; /* I2C comm reset */ |
| 1194 | if (ret < 0) |
| 1195 | return ret; |
| 1196 | if (!(ret & MMA8452_CTRL_REG2_RST)) |
| 1197 | return 0; |
| 1198 | } |
| 1199 | |
| 1200 | return -ETIMEDOUT; |
| 1201 | } |
| 1202 | |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 1203 | static const struct of_device_id mma8452_dt_ids[] = { |
Martin Kepplinger | 244a93f | 2016-01-16 15:35:22 +0100 | [diff] [blame] | 1204 | { .compatible = "fsl,mma8451", .data = &mma_chip_info_table[mma8451] }, |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 1205 | { .compatible = "fsl,mma8452", .data = &mma_chip_info_table[mma8452] }, |
Martin Kepplinger | c5ea1b58 | 2015-09-01 13:45:09 +0200 | [diff] [blame] | 1206 | { .compatible = "fsl,mma8453", .data = &mma_chip_info_table[mma8453] }, |
Martin Kepplinger | 417e008 | 2015-09-01 13:45:11 +0200 | [diff] [blame] | 1207 | { .compatible = "fsl,mma8652", .data = &mma_chip_info_table[mma8652] }, |
| 1208 | { .compatible = "fsl,mma8653", .data = &mma_chip_info_table[mma8653] }, |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 1209 | { } |
| 1210 | }; |
| 1211 | MODULE_DEVICE_TABLE(of, mma8452_dt_ids); |
| 1212 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1213 | static int mma8452_probe(struct i2c_client *client, |
| 1214 | const struct i2c_device_id *id) |
| 1215 | { |
| 1216 | struct mma8452_data *data; |
| 1217 | struct iio_dev *indio_dev; |
| 1218 | int ret; |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 1219 | const struct of_device_id *match; |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1220 | |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 1221 | match = of_match_device(mma8452_dt_ids, &client->dev); |
| 1222 | if (!match) { |
| 1223 | dev_err(&client->dev, "unknown device model\n"); |
| 1224 | return -ENODEV; |
| 1225 | } |
| 1226 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1227 | indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); |
| 1228 | if (!indio_dev) |
| 1229 | return -ENOMEM; |
| 1230 | |
| 1231 | data = iio_priv(indio_dev); |
| 1232 | data->client = client; |
| 1233 | mutex_init(&data->lock); |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 1234 | data->chip_info = match->data; |
| 1235 | |
Martin Kepplinger | 417e008 | 2015-09-01 13:45:11 +0200 | [diff] [blame] | 1236 | ret = i2c_smbus_read_byte_data(client, MMA8452_WHO_AM_I); |
| 1237 | if (ret < 0) |
| 1238 | return ret; |
| 1239 | |
| 1240 | switch (ret) { |
Martin Kepplinger | 244a93f | 2016-01-16 15:35:22 +0100 | [diff] [blame] | 1241 | case MMA8451_DEVICE_ID: |
Martin Kepplinger | 417e008 | 2015-09-01 13:45:11 +0200 | [diff] [blame] | 1242 | case MMA8452_DEVICE_ID: |
| 1243 | case MMA8453_DEVICE_ID: |
| 1244 | case MMA8652_DEVICE_ID: |
| 1245 | case MMA8653_DEVICE_ID: |
| 1246 | if (ret == data->chip_info->chip_id) |
| 1247 | break; |
| 1248 | default: |
| 1249 | return -ENODEV; |
| 1250 | } |
| 1251 | |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 1252 | dev_info(&client->dev, "registering %s accelerometer; ID 0x%x\n", |
| 1253 | match->compatible, data->chip_info->chip_id); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1254 | |
| 1255 | i2c_set_clientdata(client, indio_dev); |
| 1256 | indio_dev->info = &mma8452_info; |
| 1257 | indio_dev->name = id->name; |
| 1258 | indio_dev->dev.parent = &client->dev; |
| 1259 | indio_dev->modes = INDIO_DIRECT_MODE; |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 1260 | indio_dev->channels = data->chip_info->channels; |
| 1261 | indio_dev->num_channels = data->chip_info->num_channels; |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1262 | indio_dev->available_scan_masks = mma8452_scan_masks; |
| 1263 | |
Martin Fuzzey | ecabae7 | 2015-05-13 12:26:38 +0200 | [diff] [blame] | 1264 | ret = mma8452_reset(client); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1265 | if (ret < 0) |
| 1266 | return ret; |
| 1267 | |
| 1268 | data->data_cfg = MMA8452_DATA_CFG_FS_2G; |
| 1269 | ret = i2c_smbus_write_byte_data(client, MMA8452_DATA_CFG, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 1270 | data->data_cfg); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1271 | if (ret < 0) |
| 1272 | return ret; |
| 1273 | |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 1274 | /* |
| 1275 | * By default set transient threshold to max to avoid events if |
| 1276 | * enabling without configuring threshold. |
| 1277 | */ |
| 1278 | ret = i2c_smbus_write_byte_data(client, MMA8452_TRANSIENT_THS, |
| 1279 | MMA8452_TRANSIENT_THS_MASK); |
| 1280 | if (ret < 0) |
| 1281 | return ret; |
| 1282 | |
| 1283 | if (client->irq) { |
| 1284 | /* |
Martin Kepplinger | 60f562e | 2015-09-01 13:45:10 +0200 | [diff] [blame] | 1285 | * Although we enable the interrupt sources once and for |
| 1286 | * all here the event detection itself is not enabled until |
| 1287 | * userspace asks for it by mma8452_write_event_config() |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 1288 | */ |
Martin Kepplinger | 60f562e | 2015-09-01 13:45:10 +0200 | [diff] [blame] | 1289 | int supported_interrupts = MMA8452_INT_DRDY | |
| 1290 | MMA8452_INT_TRANS | |
| 1291 | MMA8452_INT_FF_MT; |
| 1292 | int enabled_interrupts = MMA8452_INT_TRANS | |
| 1293 | MMA8452_INT_FF_MT; |
Martin Kepplinger | d2a3e09 | 2015-10-15 15:10:32 +0200 | [diff] [blame] | 1294 | int irq2; |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 1295 | |
Martin Kepplinger | d2a3e09 | 2015-10-15 15:10:32 +0200 | [diff] [blame] | 1296 | irq2 = of_irq_get_byname(client->dev.of_node, "INT2"); |
| 1297 | |
| 1298 | if (irq2 == client->irq) { |
| 1299 | dev_dbg(&client->dev, "using interrupt line INT2\n"); |
| 1300 | } else { |
| 1301 | ret = i2c_smbus_write_byte_data(client, |
| 1302 | MMA8452_CTRL_REG5, |
| 1303 | supported_interrupts); |
| 1304 | if (ret < 0) |
| 1305 | return ret; |
| 1306 | |
| 1307 | dev_dbg(&client->dev, "using interrupt line INT1\n"); |
| 1308 | } |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 1309 | |
| 1310 | ret = i2c_smbus_write_byte_data(client, |
| 1311 | MMA8452_CTRL_REG4, |
Martin Fuzzey | ae6d9ce | 2015-06-01 15:39:58 +0200 | [diff] [blame] | 1312 | enabled_interrupts); |
| 1313 | if (ret < 0) |
| 1314 | return ret; |
| 1315 | |
| 1316 | ret = mma8452_trigger_setup(indio_dev); |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 1317 | if (ret < 0) |
| 1318 | return ret; |
| 1319 | } |
| 1320 | |
Martin Fuzzey | ecabae7 | 2015-05-13 12:26:38 +0200 | [diff] [blame] | 1321 | data->ctrl_reg1 = MMA8452_CTRL_ACTIVE | |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 1322 | (MMA8452_CTRL_DR_DEFAULT << MMA8452_CTRL_DR_SHIFT); |
Martin Fuzzey | ecabae7 | 2015-05-13 12:26:38 +0200 | [diff] [blame] | 1323 | ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG1, |
| 1324 | data->ctrl_reg1); |
| 1325 | if (ret < 0) |
Martin Fuzzey | ae6d9ce | 2015-06-01 15:39:58 +0200 | [diff] [blame] | 1326 | goto trigger_cleanup; |
Martin Fuzzey | ecabae7 | 2015-05-13 12:26:38 +0200 | [diff] [blame] | 1327 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1328 | ret = iio_triggered_buffer_setup(indio_dev, NULL, |
Hartmut Knaack | 686027f | 2015-08-02 22:43:51 +0200 | [diff] [blame] | 1329 | mma8452_trigger_handler, NULL); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1330 | if (ret < 0) |
Martin Fuzzey | ae6d9ce | 2015-06-01 15:39:58 +0200 | [diff] [blame] | 1331 | goto trigger_cleanup; |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1332 | |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 1333 | if (client->irq) { |
| 1334 | ret = devm_request_threaded_irq(&client->dev, |
| 1335 | client->irq, |
| 1336 | NULL, mma8452_interrupt, |
| 1337 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, |
| 1338 | client->name, indio_dev); |
| 1339 | if (ret) |
| 1340 | goto buffer_cleanup; |
| 1341 | } |
| 1342 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1343 | ret = iio_device_register(indio_dev); |
| 1344 | if (ret < 0) |
| 1345 | goto buffer_cleanup; |
Martin Fuzzey | 28e3427 | 2015-06-01 15:39:52 +0200 | [diff] [blame] | 1346 | |
Martin Kepplinger | 4b04266 | 2016-01-16 15:35:20 +0100 | [diff] [blame] | 1347 | ret = mma8452_set_freefall_mode(data, false); |
| 1348 | if (ret) |
| 1349 | return ret; |
| 1350 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1351 | return 0; |
| 1352 | |
| 1353 | buffer_cleanup: |
| 1354 | iio_triggered_buffer_cleanup(indio_dev); |
Martin Fuzzey | ae6d9ce | 2015-06-01 15:39:58 +0200 | [diff] [blame] | 1355 | |
| 1356 | trigger_cleanup: |
| 1357 | mma8452_trigger_cleanup(indio_dev); |
| 1358 | |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1359 | return ret; |
| 1360 | } |
| 1361 | |
| 1362 | static int mma8452_remove(struct i2c_client *client) |
| 1363 | { |
| 1364 | struct iio_dev *indio_dev = i2c_get_clientdata(client); |
| 1365 | |
| 1366 | iio_device_unregister(indio_dev); |
| 1367 | iio_triggered_buffer_cleanup(indio_dev); |
Martin Fuzzey | ae6d9ce | 2015-06-01 15:39:58 +0200 | [diff] [blame] | 1368 | mma8452_trigger_cleanup(indio_dev); |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1369 | mma8452_standby(iio_priv(indio_dev)); |
| 1370 | |
| 1371 | return 0; |
| 1372 | } |
| 1373 | |
| 1374 | #ifdef CONFIG_PM_SLEEP |
| 1375 | static int mma8452_suspend(struct device *dev) |
| 1376 | { |
| 1377 | return mma8452_standby(iio_priv(i2c_get_clientdata( |
| 1378 | to_i2c_client(dev)))); |
| 1379 | } |
| 1380 | |
| 1381 | static int mma8452_resume(struct device *dev) |
| 1382 | { |
| 1383 | return mma8452_active(iio_priv(i2c_get_clientdata( |
| 1384 | to_i2c_client(dev)))); |
| 1385 | } |
| 1386 | |
| 1387 | static SIMPLE_DEV_PM_OPS(mma8452_pm_ops, mma8452_suspend, mma8452_resume); |
| 1388 | #define MMA8452_PM_OPS (&mma8452_pm_ops) |
| 1389 | #else |
| 1390 | #define MMA8452_PM_OPS NULL |
| 1391 | #endif |
| 1392 | |
| 1393 | static const struct i2c_device_id mma8452_id[] = { |
Martin Kepplinger | c3cdd6e | 2015-09-01 13:45:08 +0200 | [diff] [blame] | 1394 | { "mma8452", mma8452 }, |
Martin Kepplinger | c5ea1b58 | 2015-09-01 13:45:09 +0200 | [diff] [blame] | 1395 | { "mma8453", mma8453 }, |
Martin Kepplinger | 417e008 | 2015-09-01 13:45:11 +0200 | [diff] [blame] | 1396 | { "mma8652", mma8652 }, |
| 1397 | { "mma8653", mma8653 }, |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1398 | { } |
| 1399 | }; |
| 1400 | MODULE_DEVICE_TABLE(i2c, mma8452_id); |
| 1401 | |
| 1402 | static struct i2c_driver mma8452_driver = { |
| 1403 | .driver = { |
| 1404 | .name = "mma8452", |
Martin Fuzzey | a3fb96a | 2014-11-07 14:06:00 +0000 | [diff] [blame] | 1405 | .of_match_table = of_match_ptr(mma8452_dt_ids), |
Peter Meerwald | c7eeea9 | 2014-02-05 09:51:00 +0000 | [diff] [blame] | 1406 | .pm = MMA8452_PM_OPS, |
| 1407 | }, |
| 1408 | .probe = mma8452_probe, |
| 1409 | .remove = mma8452_remove, |
| 1410 | .id_table = mma8452_id, |
| 1411 | }; |
| 1412 | module_i2c_driver(mma8452_driver); |
| 1413 | |
| 1414 | MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>"); |
| 1415 | MODULE_DESCRIPTION("Freescale MMA8452 accelerometer driver"); |
| 1416 | MODULE_LICENSE("GPL"); |