Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Driver for the Atmel AHB DMA Controller (aka HDMA or DMAC on AT91 systems) |
| 3 | * |
| 4 | * Copyright (C) 2008 Atmel Corporation |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * |
Nicolas Ferre | 9102d87 | 2012-06-12 10:44:55 +0200 | [diff] [blame] | 12 | * This supports the Atmel AHB DMA Controller found in several Atmel SoCs. |
| 13 | * The only Atmel DMA Controller that is not covered by this driver is the one |
| 14 | * found on AT91SAM9263. |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #include <linux/clk.h> |
| 18 | #include <linux/dmaengine.h> |
| 19 | #include <linux/dma-mapping.h> |
| 20 | #include <linux/dmapool.h> |
| 21 | #include <linux/interrupt.h> |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/platform_device.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 24 | #include <linux/slab.h> |
Nicolas Ferre | c511595 | 2011-10-17 14:56:41 +0200 | [diff] [blame] | 25 | #include <linux/of.h> |
| 26 | #include <linux/of_device.h> |
Ludovic Desroches | bbe89c8 | 2013-04-19 09:11:18 +0000 | [diff] [blame] | 27 | #include <linux/of_dma.h> |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 28 | |
| 29 | #include "at_hdmac_regs.h" |
Russell King - ARM Linux | d2ebfb3 | 2012-03-06 22:34:26 +0000 | [diff] [blame] | 30 | #include "dmaengine.h" |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 31 | |
| 32 | /* |
| 33 | * Glossary |
| 34 | * -------- |
| 35 | * |
| 36 | * at_hdmac : Name of the ATmel AHB DMA Controller |
| 37 | * at_dma_ / atdma : ATmel DMA controller entity related |
| 38 | * atc_ / atchan : ATmel DMA Channel entity related |
| 39 | */ |
| 40 | |
| 41 | #define ATC_DEFAULT_CFG (ATC_FIFOCFG_HALFFIFO) |
Nicolas Ferre | ae14d4b | 2011-04-30 16:57:49 +0200 | [diff] [blame] | 42 | #define ATC_DEFAULT_CTRLB (ATC_SIF(AT_DMA_MEM_IF) \ |
| 43 | |ATC_DIF(AT_DMA_MEM_IF)) |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 44 | |
| 45 | /* |
| 46 | * Initial number of descriptors to allocate for each channel. This could |
| 47 | * be increased during dma usage. |
| 48 | */ |
| 49 | static unsigned int init_nr_desc_per_channel = 64; |
| 50 | module_param(init_nr_desc_per_channel, uint, 0644); |
| 51 | MODULE_PARM_DESC(init_nr_desc_per_channel, |
| 52 | "initial descriptors per channel (default: 64)"); |
| 53 | |
| 54 | |
| 55 | /* prototypes */ |
| 56 | static dma_cookie_t atc_tx_submit(struct dma_async_tx_descriptor *tx); |
| 57 | |
| 58 | |
| 59 | /*----------------------------------------------------------------------*/ |
| 60 | |
| 61 | static struct at_desc *atc_first_active(struct at_dma_chan *atchan) |
| 62 | { |
| 63 | return list_first_entry(&atchan->active_list, |
| 64 | struct at_desc, desc_node); |
| 65 | } |
| 66 | |
| 67 | static struct at_desc *atc_first_queued(struct at_dma_chan *atchan) |
| 68 | { |
| 69 | return list_first_entry(&atchan->queue, |
| 70 | struct at_desc, desc_node); |
| 71 | } |
| 72 | |
| 73 | /** |
Uwe Kleine-König | 421f91d | 2010-06-11 12:17:00 +0200 | [diff] [blame] | 74 | * atc_alloc_descriptor - allocate and return an initialized descriptor |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 75 | * @chan: the channel to allocate descriptors for |
| 76 | * @gfp_flags: GFP allocation flags |
| 77 | * |
| 78 | * Note: The ack-bit is positioned in the descriptor flag at creation time |
| 79 | * to make initial allocation more convenient. This bit will be cleared |
| 80 | * and control will be given to client at usage time (during |
| 81 | * preparation functions). |
| 82 | */ |
| 83 | static struct at_desc *atc_alloc_descriptor(struct dma_chan *chan, |
| 84 | gfp_t gfp_flags) |
| 85 | { |
| 86 | struct at_desc *desc = NULL; |
| 87 | struct at_dma *atdma = to_at_dma(chan->device); |
| 88 | dma_addr_t phys; |
| 89 | |
| 90 | desc = dma_pool_alloc(atdma->dma_desc_pool, gfp_flags, &phys); |
| 91 | if (desc) { |
| 92 | memset(desc, 0, sizeof(struct at_desc)); |
Dan Williams | 285a3c7 | 2009-09-08 17:53:03 -0700 | [diff] [blame] | 93 | INIT_LIST_HEAD(&desc->tx_list); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 94 | dma_async_tx_descriptor_init(&desc->txd, chan); |
| 95 | /* txd.flags will be overwritten in prep functions */ |
| 96 | desc->txd.flags = DMA_CTRL_ACK; |
| 97 | desc->txd.tx_submit = atc_tx_submit; |
| 98 | desc->txd.phys = phys; |
| 99 | } |
| 100 | |
| 101 | return desc; |
| 102 | } |
| 103 | |
| 104 | /** |
André Goddard Rosa | af901ca | 2009-11-14 13:09:05 -0200 | [diff] [blame] | 105 | * atc_desc_get - get an unused descriptor from free_list |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 106 | * @atchan: channel we want a new descriptor for |
| 107 | */ |
| 108 | static struct at_desc *atc_desc_get(struct at_dma_chan *atchan) |
| 109 | { |
| 110 | struct at_desc *desc, *_desc; |
| 111 | struct at_desc *ret = NULL; |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 112 | unsigned long flags; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 113 | unsigned int i = 0; |
| 114 | LIST_HEAD(tmp_list); |
| 115 | |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 116 | spin_lock_irqsave(&atchan->lock, flags); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 117 | list_for_each_entry_safe(desc, _desc, &atchan->free_list, desc_node) { |
| 118 | i++; |
| 119 | if (async_tx_test_ack(&desc->txd)) { |
| 120 | list_del(&desc->desc_node); |
| 121 | ret = desc; |
| 122 | break; |
| 123 | } |
| 124 | dev_dbg(chan2dev(&atchan->chan_common), |
| 125 | "desc %p not ACKed\n", desc); |
| 126 | } |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 127 | spin_unlock_irqrestore(&atchan->lock, flags); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 128 | dev_vdbg(chan2dev(&atchan->chan_common), |
| 129 | "scanned %u descriptors on freelist\n", i); |
| 130 | |
| 131 | /* no more descriptor available in initial pool: create one more */ |
| 132 | if (!ret) { |
| 133 | ret = atc_alloc_descriptor(&atchan->chan_common, GFP_ATOMIC); |
| 134 | if (ret) { |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 135 | spin_lock_irqsave(&atchan->lock, flags); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 136 | atchan->descs_allocated++; |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 137 | spin_unlock_irqrestore(&atchan->lock, flags); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 138 | } else { |
| 139 | dev_err(chan2dev(&atchan->chan_common), |
| 140 | "not enough descriptors available\n"); |
| 141 | } |
| 142 | } |
| 143 | |
| 144 | return ret; |
| 145 | } |
| 146 | |
| 147 | /** |
| 148 | * atc_desc_put - move a descriptor, including any children, to the free list |
| 149 | * @atchan: channel we work on |
| 150 | * @desc: descriptor, at the head of a chain, to move to free list |
| 151 | */ |
| 152 | static void atc_desc_put(struct at_dma_chan *atchan, struct at_desc *desc) |
| 153 | { |
| 154 | if (desc) { |
| 155 | struct at_desc *child; |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 156 | unsigned long flags; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 157 | |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 158 | spin_lock_irqsave(&atchan->lock, flags); |
Dan Williams | 285a3c7 | 2009-09-08 17:53:03 -0700 | [diff] [blame] | 159 | list_for_each_entry(child, &desc->tx_list, desc_node) |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 160 | dev_vdbg(chan2dev(&atchan->chan_common), |
| 161 | "moving child desc %p to freelist\n", |
| 162 | child); |
Dan Williams | 285a3c7 | 2009-09-08 17:53:03 -0700 | [diff] [blame] | 163 | list_splice_init(&desc->tx_list, &atchan->free_list); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 164 | dev_vdbg(chan2dev(&atchan->chan_common), |
| 165 | "moving desc %p to freelist\n", desc); |
| 166 | list_add(&desc->desc_node, &atchan->free_list); |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 167 | spin_unlock_irqrestore(&atchan->lock, flags); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 168 | } |
| 169 | } |
| 170 | |
| 171 | /** |
Masanari Iida | d73111c | 2012-08-04 23:37:53 +0900 | [diff] [blame] | 172 | * atc_desc_chain - build chain adding a descriptor |
| 173 | * @first: address of first descriptor of the chain |
| 174 | * @prev: address of previous descriptor of the chain |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 175 | * @desc: descriptor to queue |
| 176 | * |
| 177 | * Called from prep_* functions |
| 178 | */ |
| 179 | static void atc_desc_chain(struct at_desc **first, struct at_desc **prev, |
| 180 | struct at_desc *desc) |
| 181 | { |
| 182 | if (!(*first)) { |
| 183 | *first = desc; |
| 184 | } else { |
| 185 | /* inform the HW lli about chaining */ |
| 186 | (*prev)->lli.dscr = desc->txd.phys; |
| 187 | /* insert the link descriptor to the LD ring */ |
| 188 | list_add_tail(&desc->desc_node, |
| 189 | &(*first)->tx_list); |
| 190 | } |
| 191 | *prev = desc; |
| 192 | } |
| 193 | |
| 194 | /** |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 195 | * atc_dostart - starts the DMA engine for real |
| 196 | * @atchan: the channel we want to start |
| 197 | * @first: first descriptor in the list we want to begin with |
| 198 | * |
| 199 | * Called with atchan->lock held and bh disabled |
| 200 | */ |
| 201 | static void atc_dostart(struct at_dma_chan *atchan, struct at_desc *first) |
| 202 | { |
| 203 | struct at_dma *atdma = to_at_dma(atchan->chan_common.device); |
| 204 | |
| 205 | /* ASSERT: channel is idle */ |
| 206 | if (atc_chan_is_enabled(atchan)) { |
| 207 | dev_err(chan2dev(&atchan->chan_common), |
| 208 | "BUG: Attempted to start non-idle channel\n"); |
| 209 | dev_err(chan2dev(&atchan->chan_common), |
| 210 | " channel: s0x%x d0x%x ctrl0x%x:0x%x l0x%x\n", |
| 211 | channel_readl(atchan, SADDR), |
| 212 | channel_readl(atchan, DADDR), |
| 213 | channel_readl(atchan, CTRLA), |
| 214 | channel_readl(atchan, CTRLB), |
| 215 | channel_readl(atchan, DSCR)); |
| 216 | |
| 217 | /* The tasklet will hopefully advance the queue... */ |
| 218 | return; |
| 219 | } |
| 220 | |
| 221 | vdbg_dump_regs(atchan); |
| 222 | |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 223 | channel_writel(atchan, SADDR, 0); |
| 224 | channel_writel(atchan, DADDR, 0); |
| 225 | channel_writel(atchan, CTRLA, 0); |
| 226 | channel_writel(atchan, CTRLB, 0); |
| 227 | channel_writel(atchan, DSCR, first->txd.phys); |
| 228 | dma_writel(atdma, CHER, atchan->mask); |
| 229 | |
| 230 | vdbg_dump_regs(atchan); |
| 231 | } |
| 232 | |
| 233 | /** |
| 234 | * atc_chain_complete - finish work for one transaction chain |
| 235 | * @atchan: channel we work on |
| 236 | * @desc: descriptor at the head of the chain we want do complete |
| 237 | * |
| 238 | * Called with atchan->lock held and bh disabled */ |
| 239 | static void |
| 240 | atc_chain_complete(struct at_dma_chan *atchan, struct at_desc *desc) |
| 241 | { |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 242 | struct dma_async_tx_descriptor *txd = &desc->txd; |
| 243 | |
| 244 | dev_vdbg(chan2dev(&atchan->chan_common), |
| 245 | "descriptor %u complete\n", txd->cookie); |
| 246 | |
Vinod Koul | d411605 | 2012-05-11 11:48:21 +0530 | [diff] [blame] | 247 | /* mark the descriptor as complete for non cyclic cases only */ |
| 248 | if (!atc_chan_is_cyclic(atchan)) |
| 249 | dma_cookie_complete(txd); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 250 | |
| 251 | /* move children to free_list */ |
Dan Williams | 285a3c7 | 2009-09-08 17:53:03 -0700 | [diff] [blame] | 252 | list_splice_init(&desc->tx_list, &atchan->free_list); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 253 | /* move myself to free_list */ |
| 254 | list_move(&desc->desc_node, &atchan->free_list); |
| 255 | |
Nicolas Ferre | ebcf9b8 | 2011-01-12 15:39:06 +0100 | [diff] [blame] | 256 | /* unmap dma addresses (not on slave channels) */ |
Atsushi Nemoto | 657a77fa | 2009-09-08 17:53:05 -0700 | [diff] [blame] | 257 | if (!atchan->chan_common.private) { |
| 258 | struct device *parent = chan2parent(&atchan->chan_common); |
| 259 | if (!(txd->flags & DMA_COMPL_SKIP_DEST_UNMAP)) { |
| 260 | if (txd->flags & DMA_COMPL_DEST_UNMAP_SINGLE) |
| 261 | dma_unmap_single(parent, |
| 262 | desc->lli.daddr, |
| 263 | desc->len, DMA_FROM_DEVICE); |
| 264 | else |
| 265 | dma_unmap_page(parent, |
| 266 | desc->lli.daddr, |
| 267 | desc->len, DMA_FROM_DEVICE); |
| 268 | } |
| 269 | if (!(txd->flags & DMA_COMPL_SKIP_SRC_UNMAP)) { |
| 270 | if (txd->flags & DMA_COMPL_SRC_UNMAP_SINGLE) |
| 271 | dma_unmap_single(parent, |
| 272 | desc->lli.saddr, |
| 273 | desc->len, DMA_TO_DEVICE); |
| 274 | else |
| 275 | dma_unmap_page(parent, |
| 276 | desc->lli.saddr, |
| 277 | desc->len, DMA_TO_DEVICE); |
| 278 | } |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 279 | } |
| 280 | |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 281 | /* for cyclic transfers, |
| 282 | * no need to replay callback function while stopping */ |
Nicolas Ferre | 3c47748 | 2011-07-25 21:09:23 +0000 | [diff] [blame] | 283 | if (!atc_chan_is_cyclic(atchan)) { |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 284 | dma_async_tx_callback callback = txd->callback; |
| 285 | void *param = txd->callback_param; |
| 286 | |
| 287 | /* |
| 288 | * The API requires that no submissions are done from a |
| 289 | * callback, so we don't need to drop the lock here |
| 290 | */ |
| 291 | if (callback) |
| 292 | callback(param); |
| 293 | } |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 294 | |
| 295 | dma_run_dependencies(txd); |
| 296 | } |
| 297 | |
| 298 | /** |
| 299 | * atc_complete_all - finish work for all transactions |
| 300 | * @atchan: channel to complete transactions for |
| 301 | * |
| 302 | * Eventually submit queued descriptors if any |
| 303 | * |
| 304 | * Assume channel is idle while calling this function |
| 305 | * Called with atchan->lock held and bh disabled |
| 306 | */ |
| 307 | static void atc_complete_all(struct at_dma_chan *atchan) |
| 308 | { |
| 309 | struct at_desc *desc, *_desc; |
| 310 | LIST_HEAD(list); |
| 311 | |
| 312 | dev_vdbg(chan2dev(&atchan->chan_common), "complete all\n"); |
| 313 | |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 314 | /* |
| 315 | * Submit queued descriptors ASAP, i.e. before we go through |
| 316 | * the completed ones. |
| 317 | */ |
| 318 | if (!list_empty(&atchan->queue)) |
| 319 | atc_dostart(atchan, atc_first_queued(atchan)); |
| 320 | /* empty active_list now it is completed */ |
| 321 | list_splice_init(&atchan->active_list, &list); |
| 322 | /* empty queue list by moving descriptors (if any) to active_list */ |
| 323 | list_splice_init(&atchan->queue, &atchan->active_list); |
| 324 | |
| 325 | list_for_each_entry_safe(desc, _desc, &list, desc_node) |
| 326 | atc_chain_complete(atchan, desc); |
| 327 | } |
| 328 | |
| 329 | /** |
| 330 | * atc_cleanup_descriptors - cleanup up finished descriptors in active_list |
| 331 | * @atchan: channel to be cleaned up |
| 332 | * |
| 333 | * Called with atchan->lock held and bh disabled |
| 334 | */ |
| 335 | static void atc_cleanup_descriptors(struct at_dma_chan *atchan) |
| 336 | { |
| 337 | struct at_desc *desc, *_desc; |
| 338 | struct at_desc *child; |
| 339 | |
| 340 | dev_vdbg(chan2dev(&atchan->chan_common), "cleanup descriptors\n"); |
| 341 | |
| 342 | list_for_each_entry_safe(desc, _desc, &atchan->active_list, desc_node) { |
| 343 | if (!(desc->lli.ctrla & ATC_DONE)) |
| 344 | /* This one is currently in progress */ |
| 345 | return; |
| 346 | |
Dan Williams | 285a3c7 | 2009-09-08 17:53:03 -0700 | [diff] [blame] | 347 | list_for_each_entry(child, &desc->tx_list, desc_node) |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 348 | if (!(child->lli.ctrla & ATC_DONE)) |
| 349 | /* Currently in progress */ |
| 350 | return; |
| 351 | |
| 352 | /* |
| 353 | * No descriptors so far seem to be in progress, i.e. |
| 354 | * this chain must be done. |
| 355 | */ |
| 356 | atc_chain_complete(atchan, desc); |
| 357 | } |
| 358 | } |
| 359 | |
| 360 | /** |
| 361 | * atc_advance_work - at the end of a transaction, move forward |
| 362 | * @atchan: channel where the transaction ended |
| 363 | * |
| 364 | * Called with atchan->lock held and bh disabled |
| 365 | */ |
| 366 | static void atc_advance_work(struct at_dma_chan *atchan) |
| 367 | { |
| 368 | dev_vdbg(chan2dev(&atchan->chan_common), "advance_work\n"); |
| 369 | |
Ludovic Desroches | d202f05 | 2013-04-18 09:52:59 +0200 | [diff] [blame] | 370 | if (atc_chan_is_enabled(atchan)) |
| 371 | return; |
| 372 | |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 373 | if (list_empty(&atchan->active_list) || |
| 374 | list_is_singular(&atchan->active_list)) { |
| 375 | atc_complete_all(atchan); |
| 376 | } else { |
| 377 | atc_chain_complete(atchan, atc_first_active(atchan)); |
| 378 | /* advance work */ |
| 379 | atc_dostart(atchan, atc_first_active(atchan)); |
| 380 | } |
| 381 | } |
| 382 | |
| 383 | |
| 384 | /** |
| 385 | * atc_handle_error - handle errors reported by DMA controller |
| 386 | * @atchan: channel where error occurs |
| 387 | * |
| 388 | * Called with atchan->lock held and bh disabled |
| 389 | */ |
| 390 | static void atc_handle_error(struct at_dma_chan *atchan) |
| 391 | { |
| 392 | struct at_desc *bad_desc; |
| 393 | struct at_desc *child; |
| 394 | |
| 395 | /* |
| 396 | * The descriptor currently at the head of the active list is |
| 397 | * broked. Since we don't have any way to report errors, we'll |
| 398 | * just have to scream loudly and try to carry on. |
| 399 | */ |
| 400 | bad_desc = atc_first_active(atchan); |
| 401 | list_del_init(&bad_desc->desc_node); |
| 402 | |
| 403 | /* As we are stopped, take advantage to push queued descriptors |
| 404 | * in active_list */ |
| 405 | list_splice_init(&atchan->queue, atchan->active_list.prev); |
| 406 | |
| 407 | /* Try to restart the controller */ |
| 408 | if (!list_empty(&atchan->active_list)) |
| 409 | atc_dostart(atchan, atc_first_active(atchan)); |
| 410 | |
| 411 | /* |
| 412 | * KERN_CRITICAL may seem harsh, but since this only happens |
| 413 | * when someone submits a bad physical address in a |
| 414 | * descriptor, we should consider ourselves lucky that the |
| 415 | * controller flagged an error instead of scribbling over |
| 416 | * random memory locations. |
| 417 | */ |
| 418 | dev_crit(chan2dev(&atchan->chan_common), |
| 419 | "Bad descriptor submitted for DMA!\n"); |
| 420 | dev_crit(chan2dev(&atchan->chan_common), |
| 421 | " cookie: %d\n", bad_desc->txd.cookie); |
| 422 | atc_dump_lli(atchan, &bad_desc->lli); |
Dan Williams | 285a3c7 | 2009-09-08 17:53:03 -0700 | [diff] [blame] | 423 | list_for_each_entry(child, &bad_desc->tx_list, desc_node) |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 424 | atc_dump_lli(atchan, &child->lli); |
| 425 | |
| 426 | /* Pretend the descriptor completed successfully */ |
| 427 | atc_chain_complete(atchan, bad_desc); |
| 428 | } |
| 429 | |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 430 | /** |
| 431 | * atc_handle_cyclic - at the end of a period, run callback function |
| 432 | * @atchan: channel used for cyclic operations |
| 433 | * |
| 434 | * Called with atchan->lock held and bh disabled |
| 435 | */ |
| 436 | static void atc_handle_cyclic(struct at_dma_chan *atchan) |
| 437 | { |
| 438 | struct at_desc *first = atc_first_active(atchan); |
| 439 | struct dma_async_tx_descriptor *txd = &first->txd; |
| 440 | dma_async_tx_callback callback = txd->callback; |
| 441 | void *param = txd->callback_param; |
| 442 | |
| 443 | dev_vdbg(chan2dev(&atchan->chan_common), |
| 444 | "new cyclic period llp 0x%08x\n", |
| 445 | channel_readl(atchan, DSCR)); |
| 446 | |
| 447 | if (callback) |
| 448 | callback(param); |
| 449 | } |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 450 | |
| 451 | /*-- IRQ & Tasklet ---------------------------------------------------*/ |
| 452 | |
| 453 | static void atc_tasklet(unsigned long data) |
| 454 | { |
| 455 | struct at_dma_chan *atchan = (struct at_dma_chan *)data; |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 456 | unsigned long flags; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 457 | |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 458 | spin_lock_irqsave(&atchan->lock, flags); |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 459 | if (test_and_clear_bit(ATC_IS_ERROR, &atchan->status)) |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 460 | atc_handle_error(atchan); |
Nicolas Ferre | 3c47748 | 2011-07-25 21:09:23 +0000 | [diff] [blame] | 461 | else if (atc_chan_is_cyclic(atchan)) |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 462 | atc_handle_cyclic(atchan); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 463 | else |
| 464 | atc_advance_work(atchan); |
| 465 | |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 466 | spin_unlock_irqrestore(&atchan->lock, flags); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 467 | } |
| 468 | |
| 469 | static irqreturn_t at_dma_interrupt(int irq, void *dev_id) |
| 470 | { |
| 471 | struct at_dma *atdma = (struct at_dma *)dev_id; |
| 472 | struct at_dma_chan *atchan; |
| 473 | int i; |
| 474 | u32 status, pending, imr; |
| 475 | int ret = IRQ_NONE; |
| 476 | |
| 477 | do { |
| 478 | imr = dma_readl(atdma, EBCIMR); |
| 479 | status = dma_readl(atdma, EBCISR); |
| 480 | pending = status & imr; |
| 481 | |
| 482 | if (!pending) |
| 483 | break; |
| 484 | |
| 485 | dev_vdbg(atdma->dma_common.dev, |
| 486 | "interrupt: status = 0x%08x, 0x%08x, 0x%08x\n", |
| 487 | status, imr, pending); |
| 488 | |
| 489 | for (i = 0; i < atdma->dma_common.chancnt; i++) { |
| 490 | atchan = &atdma->chan[i]; |
Nicolas Ferre | 9b3aa58 | 2011-04-30 16:57:45 +0200 | [diff] [blame] | 491 | if (pending & (AT_DMA_BTC(i) | AT_DMA_ERR(i))) { |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 492 | if (pending & AT_DMA_ERR(i)) { |
| 493 | /* Disable channel on AHB error */ |
Nicolas Ferre | 23b5e3a | 2011-05-06 19:56:52 +0200 | [diff] [blame] | 494 | dma_writel(atdma, CHDR, |
| 495 | AT_DMA_RES(i) | atchan->mask); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 496 | /* Give information to tasklet */ |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 497 | set_bit(ATC_IS_ERROR, &atchan->status); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 498 | } |
| 499 | tasklet_schedule(&atchan->tasklet); |
| 500 | ret = IRQ_HANDLED; |
| 501 | } |
| 502 | } |
| 503 | |
| 504 | } while (pending); |
| 505 | |
| 506 | return ret; |
| 507 | } |
| 508 | |
| 509 | |
| 510 | /*-- DMA Engine API --------------------------------------------------*/ |
| 511 | |
| 512 | /** |
| 513 | * atc_tx_submit - set the prepared descriptor(s) to be executed by the engine |
| 514 | * @desc: descriptor at the head of the transaction chain |
| 515 | * |
| 516 | * Queue chain if DMA engine is working already |
| 517 | * |
| 518 | * Cookie increment and adding to active_list or queue must be atomic |
| 519 | */ |
| 520 | static dma_cookie_t atc_tx_submit(struct dma_async_tx_descriptor *tx) |
| 521 | { |
| 522 | struct at_desc *desc = txd_to_at_desc(tx); |
| 523 | struct at_dma_chan *atchan = to_at_dma_chan(tx->chan); |
| 524 | dma_cookie_t cookie; |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 525 | unsigned long flags; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 526 | |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 527 | spin_lock_irqsave(&atchan->lock, flags); |
Russell King - ARM Linux | 884485e | 2012-03-06 22:34:46 +0000 | [diff] [blame] | 528 | cookie = dma_cookie_assign(tx); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 529 | |
| 530 | if (list_empty(&atchan->active_list)) { |
| 531 | dev_vdbg(chan2dev(tx->chan), "tx_submit: started %u\n", |
| 532 | desc->txd.cookie); |
| 533 | atc_dostart(atchan, desc); |
| 534 | list_add_tail(&desc->desc_node, &atchan->active_list); |
| 535 | } else { |
| 536 | dev_vdbg(chan2dev(tx->chan), "tx_submit: queued %u\n", |
| 537 | desc->txd.cookie); |
| 538 | list_add_tail(&desc->desc_node, &atchan->queue); |
| 539 | } |
| 540 | |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 541 | spin_unlock_irqrestore(&atchan->lock, flags); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 542 | |
| 543 | return cookie; |
| 544 | } |
| 545 | |
| 546 | /** |
| 547 | * atc_prep_dma_memcpy - prepare a memcpy operation |
| 548 | * @chan: the channel to prepare operation on |
| 549 | * @dest: operation virtual destination address |
| 550 | * @src: operation virtual source address |
| 551 | * @len: operation length |
| 552 | * @flags: tx descriptor status flags |
| 553 | */ |
| 554 | static struct dma_async_tx_descriptor * |
| 555 | atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, |
| 556 | size_t len, unsigned long flags) |
| 557 | { |
| 558 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
| 559 | struct at_desc *desc = NULL; |
| 560 | struct at_desc *first = NULL; |
| 561 | struct at_desc *prev = NULL; |
| 562 | size_t xfer_count; |
| 563 | size_t offset; |
| 564 | unsigned int src_width; |
| 565 | unsigned int dst_width; |
| 566 | u32 ctrla; |
| 567 | u32 ctrlb; |
| 568 | |
| 569 | dev_vdbg(chan2dev(chan), "prep_dma_memcpy: d0x%x s0x%x l0x%zx f0x%lx\n", |
| 570 | dest, src, len, flags); |
| 571 | |
| 572 | if (unlikely(!len)) { |
| 573 | dev_dbg(chan2dev(chan), "prep_dma_memcpy: length is zero!\n"); |
| 574 | return NULL; |
| 575 | } |
| 576 | |
Nicolas Ferre | 9b3aa58 | 2011-04-30 16:57:45 +0200 | [diff] [blame] | 577 | ctrlb = ATC_DEFAULT_CTRLB | ATC_IEN |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 578 | | ATC_SRC_ADDR_MODE_INCR |
| 579 | | ATC_DST_ADDR_MODE_INCR |
| 580 | | ATC_FC_MEM2MEM; |
| 581 | |
| 582 | /* |
| 583 | * We can be a lot more clever here, but this should take care |
| 584 | * of the most common optimization. |
| 585 | */ |
| 586 | if (!((src | dest | len) & 3)) { |
Nicolas Ferre | b409ebf | 2012-05-10 12:17:40 +0200 | [diff] [blame] | 587 | ctrla = ATC_SRC_WIDTH_WORD | ATC_DST_WIDTH_WORD; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 588 | src_width = dst_width = 2; |
| 589 | } else if (!((src | dest | len) & 1)) { |
Nicolas Ferre | b409ebf | 2012-05-10 12:17:40 +0200 | [diff] [blame] | 590 | ctrla = ATC_SRC_WIDTH_HALFWORD | ATC_DST_WIDTH_HALFWORD; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 591 | src_width = dst_width = 1; |
| 592 | } else { |
Nicolas Ferre | b409ebf | 2012-05-10 12:17:40 +0200 | [diff] [blame] | 593 | ctrla = ATC_SRC_WIDTH_BYTE | ATC_DST_WIDTH_BYTE; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 594 | src_width = dst_width = 0; |
| 595 | } |
| 596 | |
| 597 | for (offset = 0; offset < len; offset += xfer_count << src_width) { |
| 598 | xfer_count = min_t(size_t, (len - offset) >> src_width, |
| 599 | ATC_BTSIZE_MAX); |
| 600 | |
| 601 | desc = atc_desc_get(atchan); |
| 602 | if (!desc) |
| 603 | goto err_desc_get; |
| 604 | |
| 605 | desc->lli.saddr = src + offset; |
| 606 | desc->lli.daddr = dest + offset; |
| 607 | desc->lli.ctrla = ctrla | xfer_count; |
| 608 | desc->lli.ctrlb = ctrlb; |
| 609 | |
| 610 | desc->txd.cookie = 0; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 611 | |
Nicolas Ferre | e257e15 | 2011-05-06 19:56:53 +0200 | [diff] [blame] | 612 | atc_desc_chain(&first, &prev, desc); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 613 | } |
| 614 | |
| 615 | /* First descriptor of the chain embedds additional information */ |
| 616 | first->txd.cookie = -EBUSY; |
| 617 | first->len = len; |
Elen Song | d088c33 | 2013-05-10 11:00:50 +0800 | [diff] [blame^] | 618 | first->tx_width = src_width; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 619 | |
| 620 | /* set end-of-link to the last link descriptor of list*/ |
| 621 | set_desc_eol(desc); |
| 622 | |
Nicolas Ferre | 568f7f0 | 2011-01-12 15:39:09 +0100 | [diff] [blame] | 623 | first->txd.flags = flags; /* client is in control of this ack */ |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 624 | |
| 625 | return &first->txd; |
| 626 | |
| 627 | err_desc_get: |
| 628 | atc_desc_put(atchan, first); |
| 629 | return NULL; |
| 630 | } |
| 631 | |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 632 | |
| 633 | /** |
| 634 | * atc_prep_slave_sg - prepare descriptors for a DMA_SLAVE transaction |
| 635 | * @chan: DMA channel |
| 636 | * @sgl: scatterlist to transfer to/from |
| 637 | * @sg_len: number of entries in @scatterlist |
| 638 | * @direction: DMA direction |
| 639 | * @flags: tx descriptor status flags |
Alexandre Bounine | 185ecb5 | 2012-03-08 15:35:13 -0500 | [diff] [blame] | 640 | * @context: transaction context (ignored) |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 641 | */ |
| 642 | static struct dma_async_tx_descriptor * |
| 643 | atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 644 | unsigned int sg_len, enum dma_transfer_direction direction, |
Alexandre Bounine | 185ecb5 | 2012-03-08 15:35:13 -0500 | [diff] [blame] | 645 | unsigned long flags, void *context) |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 646 | { |
| 647 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
| 648 | struct at_dma_slave *atslave = chan->private; |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 649 | struct dma_slave_config *sconfig = &atchan->dma_sconfig; |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 650 | struct at_desc *first = NULL; |
| 651 | struct at_desc *prev = NULL; |
| 652 | u32 ctrla; |
| 653 | u32 ctrlb; |
| 654 | dma_addr_t reg; |
| 655 | unsigned int reg_width; |
| 656 | unsigned int mem_width; |
| 657 | unsigned int i; |
| 658 | struct scatterlist *sg; |
| 659 | size_t total_len = 0; |
| 660 | |
Nicolas Ferre | cc52a10 | 2011-04-30 16:57:47 +0200 | [diff] [blame] | 661 | dev_vdbg(chan2dev(chan), "prep_slave_sg (%d): %s f0x%lx\n", |
| 662 | sg_len, |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 663 | direction == DMA_MEM_TO_DEV ? "TO DEVICE" : "FROM DEVICE", |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 664 | flags); |
| 665 | |
| 666 | if (unlikely(!atslave || !sg_len)) { |
Nicolas Ferre | c618a9b | 2012-09-11 17:21:44 +0200 | [diff] [blame] | 667 | dev_dbg(chan2dev(chan), "prep_slave_sg: sg length is zero!\n"); |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 668 | return NULL; |
| 669 | } |
| 670 | |
Nicolas Ferre | 1dd1ea8 | 2012-05-10 12:17:41 +0200 | [diff] [blame] | 671 | ctrla = ATC_SCSIZE(sconfig->src_maxburst) |
| 672 | | ATC_DCSIZE(sconfig->dst_maxburst); |
Nicolas Ferre | ae14d4b | 2011-04-30 16:57:49 +0200 | [diff] [blame] | 673 | ctrlb = ATC_IEN; |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 674 | |
| 675 | switch (direction) { |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 676 | case DMA_MEM_TO_DEV: |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 677 | reg_width = convert_buswidth(sconfig->dst_addr_width); |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 678 | ctrla |= ATC_DST_WIDTH(reg_width); |
| 679 | ctrlb |= ATC_DST_ADDR_MODE_FIXED |
| 680 | | ATC_SRC_ADDR_MODE_INCR |
Nicolas Ferre | ae14d4b | 2011-04-30 16:57:49 +0200 | [diff] [blame] | 681 | | ATC_FC_MEM2PER |
Ludovic Desroches | bbe89c8 | 2013-04-19 09:11:18 +0000 | [diff] [blame] | 682 | | ATC_SIF(atchan->mem_if) | ATC_DIF(atchan->per_if); |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 683 | reg = sconfig->dst_addr; |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 684 | for_each_sg(sgl, sg, sg_len, i) { |
| 685 | struct at_desc *desc; |
| 686 | u32 len; |
| 687 | u32 mem; |
| 688 | |
| 689 | desc = atc_desc_get(atchan); |
| 690 | if (!desc) |
| 691 | goto err_desc_get; |
| 692 | |
Nicolas Ferre | 0f70e8c | 2010-12-15 18:50:16 +0100 | [diff] [blame] | 693 | mem = sg_dma_address(sg); |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 694 | len = sg_dma_len(sg); |
Nicolas Ferre | c456797 | 2012-09-11 17:21:45 +0200 | [diff] [blame] | 695 | if (unlikely(!len)) { |
| 696 | dev_dbg(chan2dev(chan), |
| 697 | "prep_slave_sg: sg(%d) data length is zero\n", i); |
| 698 | goto err; |
| 699 | } |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 700 | mem_width = 2; |
| 701 | if (unlikely(mem & 3 || len & 3)) |
| 702 | mem_width = 0; |
| 703 | |
| 704 | desc->lli.saddr = mem; |
| 705 | desc->lli.daddr = reg; |
| 706 | desc->lli.ctrla = ctrla |
| 707 | | ATC_SRC_WIDTH(mem_width) |
| 708 | | len >> mem_width; |
| 709 | desc->lli.ctrlb = ctrlb; |
| 710 | |
Nicolas Ferre | e257e15 | 2011-05-06 19:56:53 +0200 | [diff] [blame] | 711 | atc_desc_chain(&first, &prev, desc); |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 712 | total_len += len; |
| 713 | } |
| 714 | break; |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 715 | case DMA_DEV_TO_MEM: |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 716 | reg_width = convert_buswidth(sconfig->src_addr_width); |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 717 | ctrla |= ATC_SRC_WIDTH(reg_width); |
| 718 | ctrlb |= ATC_DST_ADDR_MODE_INCR |
| 719 | | ATC_SRC_ADDR_MODE_FIXED |
Nicolas Ferre | ae14d4b | 2011-04-30 16:57:49 +0200 | [diff] [blame] | 720 | | ATC_FC_PER2MEM |
Ludovic Desroches | bbe89c8 | 2013-04-19 09:11:18 +0000 | [diff] [blame] | 721 | | ATC_SIF(atchan->per_if) | ATC_DIF(atchan->mem_if); |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 722 | |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 723 | reg = sconfig->src_addr; |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 724 | for_each_sg(sgl, sg, sg_len, i) { |
| 725 | struct at_desc *desc; |
| 726 | u32 len; |
| 727 | u32 mem; |
| 728 | |
| 729 | desc = atc_desc_get(atchan); |
| 730 | if (!desc) |
| 731 | goto err_desc_get; |
| 732 | |
Nicolas Ferre | 0f70e8c | 2010-12-15 18:50:16 +0100 | [diff] [blame] | 733 | mem = sg_dma_address(sg); |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 734 | len = sg_dma_len(sg); |
Nicolas Ferre | c456797 | 2012-09-11 17:21:45 +0200 | [diff] [blame] | 735 | if (unlikely(!len)) { |
| 736 | dev_dbg(chan2dev(chan), |
| 737 | "prep_slave_sg: sg(%d) data length is zero\n", i); |
| 738 | goto err; |
| 739 | } |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 740 | mem_width = 2; |
| 741 | if (unlikely(mem & 3 || len & 3)) |
| 742 | mem_width = 0; |
| 743 | |
| 744 | desc->lli.saddr = reg; |
| 745 | desc->lli.daddr = mem; |
| 746 | desc->lli.ctrla = ctrla |
| 747 | | ATC_DST_WIDTH(mem_width) |
Nicolas Ferre | 59a609d | 2010-12-13 13:48:41 +0100 | [diff] [blame] | 748 | | len >> reg_width; |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 749 | desc->lli.ctrlb = ctrlb; |
| 750 | |
Nicolas Ferre | e257e15 | 2011-05-06 19:56:53 +0200 | [diff] [blame] | 751 | atc_desc_chain(&first, &prev, desc); |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 752 | total_len += len; |
| 753 | } |
| 754 | break; |
| 755 | default: |
| 756 | return NULL; |
| 757 | } |
| 758 | |
| 759 | /* set end-of-link to the last link descriptor of list*/ |
| 760 | set_desc_eol(prev); |
| 761 | |
| 762 | /* First descriptor of the chain embedds additional information */ |
| 763 | first->txd.cookie = -EBUSY; |
| 764 | first->len = total_len; |
Elen Song | d088c33 | 2013-05-10 11:00:50 +0800 | [diff] [blame^] | 765 | first->tx_width = reg_width; |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 766 | |
Nicolas Ferre | 568f7f0 | 2011-01-12 15:39:09 +0100 | [diff] [blame] | 767 | /* first link descriptor of list is responsible of flags */ |
| 768 | first->txd.flags = flags; /* client is in control of this ack */ |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 769 | |
| 770 | return &first->txd; |
| 771 | |
| 772 | err_desc_get: |
| 773 | dev_err(chan2dev(chan), "not enough descriptors available\n"); |
Nicolas Ferre | c456797 | 2012-09-11 17:21:45 +0200 | [diff] [blame] | 774 | err: |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 775 | atc_desc_put(atchan, first); |
| 776 | return NULL; |
| 777 | } |
| 778 | |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 779 | /** |
| 780 | * atc_dma_cyclic_check_values |
| 781 | * Check for too big/unaligned periods and unaligned DMA buffer |
| 782 | */ |
| 783 | static int |
| 784 | atc_dma_cyclic_check_values(unsigned int reg_width, dma_addr_t buf_addr, |
Andy Shevchenko | 0e7264c | 2013-01-10 10:52:57 +0200 | [diff] [blame] | 785 | size_t period_len) |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 786 | { |
| 787 | if (period_len > (ATC_BTSIZE_MAX << reg_width)) |
| 788 | goto err_out; |
| 789 | if (unlikely(period_len & ((1 << reg_width) - 1))) |
| 790 | goto err_out; |
| 791 | if (unlikely(buf_addr & ((1 << reg_width) - 1))) |
| 792 | goto err_out; |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 793 | |
| 794 | return 0; |
| 795 | |
| 796 | err_out: |
| 797 | return -EINVAL; |
| 798 | } |
| 799 | |
| 800 | /** |
Masanari Iida | d73111c | 2012-08-04 23:37:53 +0900 | [diff] [blame] | 801 | * atc_dma_cyclic_fill_desc - Fill one period descriptor |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 802 | */ |
| 803 | static int |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 804 | atc_dma_cyclic_fill_desc(struct dma_chan *chan, struct at_desc *desc, |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 805 | unsigned int period_index, dma_addr_t buf_addr, |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 806 | unsigned int reg_width, size_t period_len, |
| 807 | enum dma_transfer_direction direction) |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 808 | { |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 809 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 810 | struct dma_slave_config *sconfig = &atchan->dma_sconfig; |
| 811 | u32 ctrla; |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 812 | |
| 813 | /* prepare common CRTLA value */ |
Nicolas Ferre | 1dd1ea8 | 2012-05-10 12:17:41 +0200 | [diff] [blame] | 814 | ctrla = ATC_SCSIZE(sconfig->src_maxburst) |
| 815 | | ATC_DCSIZE(sconfig->dst_maxburst) |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 816 | | ATC_DST_WIDTH(reg_width) |
| 817 | | ATC_SRC_WIDTH(reg_width) |
| 818 | | period_len >> reg_width; |
| 819 | |
| 820 | switch (direction) { |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 821 | case DMA_MEM_TO_DEV: |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 822 | desc->lli.saddr = buf_addr + (period_len * period_index); |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 823 | desc->lli.daddr = sconfig->dst_addr; |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 824 | desc->lli.ctrla = ctrla; |
Nicolas Ferre | ae14d4b | 2011-04-30 16:57:49 +0200 | [diff] [blame] | 825 | desc->lli.ctrlb = ATC_DST_ADDR_MODE_FIXED |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 826 | | ATC_SRC_ADDR_MODE_INCR |
Nicolas Ferre | ae14d4b | 2011-04-30 16:57:49 +0200 | [diff] [blame] | 827 | | ATC_FC_MEM2PER |
Ludovic Desroches | bbe89c8 | 2013-04-19 09:11:18 +0000 | [diff] [blame] | 828 | | ATC_SIF(atchan->mem_if) |
| 829 | | ATC_DIF(atchan->per_if); |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 830 | break; |
| 831 | |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 832 | case DMA_DEV_TO_MEM: |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 833 | desc->lli.saddr = sconfig->src_addr; |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 834 | desc->lli.daddr = buf_addr + (period_len * period_index); |
| 835 | desc->lli.ctrla = ctrla; |
Nicolas Ferre | ae14d4b | 2011-04-30 16:57:49 +0200 | [diff] [blame] | 836 | desc->lli.ctrlb = ATC_DST_ADDR_MODE_INCR |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 837 | | ATC_SRC_ADDR_MODE_FIXED |
Nicolas Ferre | ae14d4b | 2011-04-30 16:57:49 +0200 | [diff] [blame] | 838 | | ATC_FC_PER2MEM |
Ludovic Desroches | bbe89c8 | 2013-04-19 09:11:18 +0000 | [diff] [blame] | 839 | | ATC_SIF(atchan->per_if) |
| 840 | | ATC_DIF(atchan->mem_if); |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 841 | break; |
| 842 | |
| 843 | default: |
| 844 | return -EINVAL; |
| 845 | } |
| 846 | |
| 847 | return 0; |
| 848 | } |
| 849 | |
| 850 | /** |
| 851 | * atc_prep_dma_cyclic - prepare the cyclic DMA transfer |
| 852 | * @chan: the DMA channel to prepare |
| 853 | * @buf_addr: physical DMA address where the buffer starts |
| 854 | * @buf_len: total number of bytes for the entire buffer |
| 855 | * @period_len: number of bytes for each period |
| 856 | * @direction: transfer direction, to or from device |
Peter Ujfalusi | ec8b5e4 | 2012-09-14 15:05:47 +0300 | [diff] [blame] | 857 | * @flags: tx descriptor status flags |
Alexandre Bounine | 185ecb5 | 2012-03-08 15:35:13 -0500 | [diff] [blame] | 858 | * @context: transfer context (ignored) |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 859 | */ |
| 860 | static struct dma_async_tx_descriptor * |
| 861 | atc_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, |
Alexandre Bounine | 185ecb5 | 2012-03-08 15:35:13 -0500 | [diff] [blame] | 862 | size_t period_len, enum dma_transfer_direction direction, |
Peter Ujfalusi | ec8b5e4 | 2012-09-14 15:05:47 +0300 | [diff] [blame] | 863 | unsigned long flags, void *context) |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 864 | { |
| 865 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
| 866 | struct at_dma_slave *atslave = chan->private; |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 867 | struct dma_slave_config *sconfig = &atchan->dma_sconfig; |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 868 | struct at_desc *first = NULL; |
| 869 | struct at_desc *prev = NULL; |
| 870 | unsigned long was_cyclic; |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 871 | unsigned int reg_width; |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 872 | unsigned int periods = buf_len / period_len; |
| 873 | unsigned int i; |
| 874 | |
| 875 | dev_vdbg(chan2dev(chan), "prep_dma_cyclic: %s buf@0x%08x - %d (%d/%d)\n", |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 876 | direction == DMA_MEM_TO_DEV ? "TO DEVICE" : "FROM DEVICE", |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 877 | buf_addr, |
| 878 | periods, buf_len, period_len); |
| 879 | |
| 880 | if (unlikely(!atslave || !buf_len || !period_len)) { |
| 881 | dev_dbg(chan2dev(chan), "prep_dma_cyclic: length is zero!\n"); |
| 882 | return NULL; |
| 883 | } |
| 884 | |
| 885 | was_cyclic = test_and_set_bit(ATC_IS_CYCLIC, &atchan->status); |
| 886 | if (was_cyclic) { |
| 887 | dev_dbg(chan2dev(chan), "prep_dma_cyclic: channel in use!\n"); |
| 888 | return NULL; |
| 889 | } |
| 890 | |
Andy Shevchenko | 0e7264c | 2013-01-10 10:52:57 +0200 | [diff] [blame] | 891 | if (unlikely(!is_slave_direction(direction))) |
| 892 | goto err_out; |
| 893 | |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 894 | if (sconfig->direction == DMA_MEM_TO_DEV) |
| 895 | reg_width = convert_buswidth(sconfig->dst_addr_width); |
| 896 | else |
| 897 | reg_width = convert_buswidth(sconfig->src_addr_width); |
| 898 | |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 899 | /* Check for too big/unaligned periods and unaligned DMA buffer */ |
Andy Shevchenko | 0e7264c | 2013-01-10 10:52:57 +0200 | [diff] [blame] | 900 | if (atc_dma_cyclic_check_values(reg_width, buf_addr, period_len)) |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 901 | goto err_out; |
| 902 | |
| 903 | /* build cyclic linked list */ |
| 904 | for (i = 0; i < periods; i++) { |
| 905 | struct at_desc *desc; |
| 906 | |
| 907 | desc = atc_desc_get(atchan); |
| 908 | if (!desc) |
| 909 | goto err_desc_get; |
| 910 | |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 911 | if (atc_dma_cyclic_fill_desc(chan, desc, i, buf_addr, |
| 912 | reg_width, period_len, direction)) |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 913 | goto err_desc_get; |
| 914 | |
| 915 | atc_desc_chain(&first, &prev, desc); |
| 916 | } |
| 917 | |
| 918 | /* lets make a cyclic list */ |
| 919 | prev->lli.dscr = first->txd.phys; |
| 920 | |
| 921 | /* First descriptor of the chain embedds additional information */ |
| 922 | first->txd.cookie = -EBUSY; |
| 923 | first->len = buf_len; |
Elen Song | d088c33 | 2013-05-10 11:00:50 +0800 | [diff] [blame^] | 924 | first->tx_width = reg_width; |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 925 | |
| 926 | return &first->txd; |
| 927 | |
| 928 | err_desc_get: |
| 929 | dev_err(chan2dev(chan), "not enough descriptors available\n"); |
| 930 | atc_desc_put(atchan, first); |
| 931 | err_out: |
| 932 | clear_bit(ATC_IS_CYCLIC, &atchan->status); |
| 933 | return NULL; |
| 934 | } |
| 935 | |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 936 | static int set_runtime_config(struct dma_chan *chan, |
| 937 | struct dma_slave_config *sconfig) |
| 938 | { |
| 939 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
| 940 | |
| 941 | /* Check if it is chan is configured for slave transfers */ |
| 942 | if (!chan->private) |
| 943 | return -EINVAL; |
| 944 | |
| 945 | memcpy(&atchan->dma_sconfig, sconfig, sizeof(*sconfig)); |
| 946 | |
| 947 | convert_burst(&atchan->dma_sconfig.src_maxburst); |
| 948 | convert_burst(&atchan->dma_sconfig.dst_maxburst); |
| 949 | |
| 950 | return 0; |
| 951 | } |
| 952 | |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 953 | |
Linus Walleij | 0582763 | 2010-05-17 16:30:42 -0700 | [diff] [blame] | 954 | static int atc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, |
| 955 | unsigned long arg) |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 956 | { |
| 957 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
| 958 | struct at_dma *atdma = to_at_dma(chan->device); |
Nicolas Ferre | 23b5e3a | 2011-05-06 19:56:52 +0200 | [diff] [blame] | 959 | int chan_id = atchan->chan_common.chan_id; |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 960 | unsigned long flags; |
Nicolas Ferre | 23b5e3a | 2011-05-06 19:56:52 +0200 | [diff] [blame] | 961 | |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 962 | LIST_HEAD(list); |
| 963 | |
Nicolas Ferre | 23b5e3a | 2011-05-06 19:56:52 +0200 | [diff] [blame] | 964 | dev_vdbg(chan2dev(chan), "atc_control (%d)\n", cmd); |
| 965 | |
| 966 | if (cmd == DMA_PAUSE) { |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 967 | spin_lock_irqsave(&atchan->lock, flags); |
Nicolas Ferre | 23b5e3a | 2011-05-06 19:56:52 +0200 | [diff] [blame] | 968 | |
| 969 | dma_writel(atdma, CHER, AT_DMA_SUSP(chan_id)); |
Nicolas Ferre | 23b5e3a | 2011-05-06 19:56:52 +0200 | [diff] [blame] | 970 | set_bit(ATC_IS_PAUSED, &atchan->status); |
| 971 | |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 972 | spin_unlock_irqrestore(&atchan->lock, flags); |
Nicolas Ferre | 23b5e3a | 2011-05-06 19:56:52 +0200 | [diff] [blame] | 973 | } else if (cmd == DMA_RESUME) { |
Nicolas Ferre | 3c47748 | 2011-07-25 21:09:23 +0000 | [diff] [blame] | 974 | if (!atc_chan_is_paused(atchan)) |
Nicolas Ferre | 23b5e3a | 2011-05-06 19:56:52 +0200 | [diff] [blame] | 975 | return 0; |
| 976 | |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 977 | spin_lock_irqsave(&atchan->lock, flags); |
Nicolas Ferre | 23b5e3a | 2011-05-06 19:56:52 +0200 | [diff] [blame] | 978 | |
| 979 | dma_writel(atdma, CHDR, AT_DMA_RES(chan_id)); |
| 980 | clear_bit(ATC_IS_PAUSED, &atchan->status); |
| 981 | |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 982 | spin_unlock_irqrestore(&atchan->lock, flags); |
Nicolas Ferre | 23b5e3a | 2011-05-06 19:56:52 +0200 | [diff] [blame] | 983 | } else if (cmd == DMA_TERMINATE_ALL) { |
| 984 | struct at_desc *desc, *_desc; |
| 985 | /* |
| 986 | * This is only called when something went wrong elsewhere, so |
| 987 | * we don't really care about the data. Just disable the |
| 988 | * channel. We still have to poll the channel enable bit due |
| 989 | * to AHB/HSB limitations. |
| 990 | */ |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 991 | spin_lock_irqsave(&atchan->lock, flags); |
Nicolas Ferre | 23b5e3a | 2011-05-06 19:56:52 +0200 | [diff] [blame] | 992 | |
| 993 | /* disabling channel: must also remove suspend state */ |
| 994 | dma_writel(atdma, CHDR, AT_DMA_RES(chan_id) | atchan->mask); |
| 995 | |
| 996 | /* confirm that this channel is disabled */ |
| 997 | while (dma_readl(atdma, CHSR) & atchan->mask) |
| 998 | cpu_relax(); |
| 999 | |
| 1000 | /* active_list entries will end up before queued entries */ |
| 1001 | list_splice_init(&atchan->queue, &list); |
| 1002 | list_splice_init(&atchan->active_list, &list); |
| 1003 | |
| 1004 | /* Flush all pending and queued descriptors */ |
| 1005 | list_for_each_entry_safe(desc, _desc, &list, desc_node) |
| 1006 | atc_chain_complete(atchan, desc); |
| 1007 | |
| 1008 | clear_bit(ATC_IS_PAUSED, &atchan->status); |
| 1009 | /* if channel dedicated to cyclic operations, free it */ |
| 1010 | clear_bit(ATC_IS_CYCLIC, &atchan->status); |
| 1011 | |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 1012 | spin_unlock_irqrestore(&atchan->lock, flags); |
Nicolas Ferre | beeaa10 | 2012-03-14 12:41:43 +0100 | [diff] [blame] | 1013 | } else if (cmd == DMA_SLAVE_CONFIG) { |
| 1014 | return set_runtime_config(chan, (struct dma_slave_config *)arg); |
Nicolas Ferre | 23b5e3a | 2011-05-06 19:56:52 +0200 | [diff] [blame] | 1015 | } else { |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 1016 | return -ENXIO; |
Nicolas Ferre | 23b5e3a | 2011-05-06 19:56:52 +0200 | [diff] [blame] | 1017 | } |
Yong Wang | b0ebeb9 | 2010-08-05 10:40:08 +0800 | [diff] [blame] | 1018 | |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 1019 | return 0; |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 1020 | } |
| 1021 | |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1022 | /** |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 1023 | * atc_tx_status - poll for transaction completion |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1024 | * @chan: DMA channel |
| 1025 | * @cookie: transaction identifier to check status of |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 1026 | * @txstate: if not %NULL updated with transaction state |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1027 | * |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 1028 | * If @txstate is passed in, upon return it reflect the driver |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1029 | * internal state and can be used with dma_async_is_complete() to check |
| 1030 | * the status of multiple cookies without re-checking hardware state. |
| 1031 | */ |
| 1032 | static enum dma_status |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 1033 | atc_tx_status(struct dma_chan *chan, |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1034 | dma_cookie_t cookie, |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 1035 | struct dma_tx_state *txstate) |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1036 | { |
| 1037 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
| 1038 | dma_cookie_t last_used; |
| 1039 | dma_cookie_t last_complete; |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 1040 | unsigned long flags; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1041 | enum dma_status ret; |
| 1042 | |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 1043 | spin_lock_irqsave(&atchan->lock, flags); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1044 | |
Russell King - ARM Linux | 96a2af4 | 2012-03-06 22:35:27 +0000 | [diff] [blame] | 1045 | ret = dma_cookie_status(chan, cookie, txstate); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1046 | if (ret != DMA_SUCCESS) { |
| 1047 | atc_cleanup_descriptors(atchan); |
| 1048 | |
Russell King - ARM Linux | 96a2af4 | 2012-03-06 22:35:27 +0000 | [diff] [blame] | 1049 | ret = dma_cookie_status(chan, cookie, txstate); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1050 | } |
| 1051 | |
Russell King - ARM Linux | 96a2af4 | 2012-03-06 22:35:27 +0000 | [diff] [blame] | 1052 | last_complete = chan->completed_cookie; |
| 1053 | last_used = chan->cookie; |
| 1054 | |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 1055 | spin_unlock_irqrestore(&atchan->lock, flags); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1056 | |
Nicolas Ferre | 543aabc | 2011-05-06 19:56:51 +0200 | [diff] [blame] | 1057 | if (ret != DMA_SUCCESS) |
Russell King - ARM Linux | 96a2af4 | 2012-03-06 22:35:27 +0000 | [diff] [blame] | 1058 | dma_set_residue(txstate, atc_first_active(atchan)->len); |
Nicolas Ferre | 543aabc | 2011-05-06 19:56:51 +0200 | [diff] [blame] | 1059 | |
Nicolas Ferre | 3c47748 | 2011-07-25 21:09:23 +0000 | [diff] [blame] | 1060 | if (atc_chan_is_paused(atchan)) |
Nicolas Ferre | 23b5e3a | 2011-05-06 19:56:52 +0200 | [diff] [blame] | 1061 | ret = DMA_PAUSED; |
| 1062 | |
| 1063 | dev_vdbg(chan2dev(chan), "tx_status %d: cookie = %d (d%d, u%d)\n", |
| 1064 | ret, cookie, last_complete ? last_complete : 0, |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 1065 | last_used ? last_used : 0); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1066 | |
| 1067 | return ret; |
| 1068 | } |
| 1069 | |
| 1070 | /** |
| 1071 | * atc_issue_pending - try to finish work |
| 1072 | * @chan: target DMA channel |
| 1073 | */ |
| 1074 | static void atc_issue_pending(struct dma_chan *chan) |
| 1075 | { |
| 1076 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 1077 | unsigned long flags; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1078 | |
| 1079 | dev_vdbg(chan2dev(chan), "issue_pending\n"); |
| 1080 | |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 1081 | /* Not needed for cyclic transfers */ |
Nicolas Ferre | 3c47748 | 2011-07-25 21:09:23 +0000 | [diff] [blame] | 1082 | if (atc_chan_is_cyclic(atchan)) |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 1083 | return; |
| 1084 | |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 1085 | spin_lock_irqsave(&atchan->lock, flags); |
Ludovic Desroches | d202f05 | 2013-04-18 09:52:59 +0200 | [diff] [blame] | 1086 | atc_advance_work(atchan); |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 1087 | spin_unlock_irqrestore(&atchan->lock, flags); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1088 | } |
| 1089 | |
| 1090 | /** |
| 1091 | * atc_alloc_chan_resources - allocate resources for DMA channel |
| 1092 | * @chan: allocate descriptor resources for this channel |
| 1093 | * @client: current client requesting the channel be ready for requests |
| 1094 | * |
| 1095 | * return - the number of allocated descriptors |
| 1096 | */ |
| 1097 | static int atc_alloc_chan_resources(struct dma_chan *chan) |
| 1098 | { |
| 1099 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
| 1100 | struct at_dma *atdma = to_at_dma(chan->device); |
| 1101 | struct at_desc *desc; |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 1102 | struct at_dma_slave *atslave; |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 1103 | unsigned long flags; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1104 | int i; |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 1105 | u32 cfg; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1106 | LIST_HEAD(tmp_list); |
| 1107 | |
| 1108 | dev_vdbg(chan2dev(chan), "alloc_chan_resources\n"); |
| 1109 | |
| 1110 | /* ASSERT: channel is idle */ |
| 1111 | if (atc_chan_is_enabled(atchan)) { |
| 1112 | dev_dbg(chan2dev(chan), "DMA channel not idle ?\n"); |
| 1113 | return -EIO; |
| 1114 | } |
| 1115 | |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 1116 | cfg = ATC_DEFAULT_CFG; |
| 1117 | |
| 1118 | atslave = chan->private; |
| 1119 | if (atslave) { |
| 1120 | /* |
| 1121 | * We need controller-specific data to set up slave |
| 1122 | * transfers. |
| 1123 | */ |
| 1124 | BUG_ON(!atslave->dma_dev || atslave->dma_dev != atdma->dma_common.dev); |
| 1125 | |
Nicolas Ferre | ea7e790 | 2013-05-10 15:19:13 +0200 | [diff] [blame] | 1126 | /* if cfg configuration specified take it instead of default */ |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 1127 | if (atslave->cfg) |
| 1128 | cfg = atslave->cfg; |
| 1129 | } |
| 1130 | |
| 1131 | /* have we already been set up? |
| 1132 | * reconfigure channel but no need to reallocate descriptors */ |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1133 | if (!list_empty(&atchan->free_list)) |
| 1134 | return atchan->descs_allocated; |
| 1135 | |
| 1136 | /* Allocate initial pool of descriptors */ |
| 1137 | for (i = 0; i < init_nr_desc_per_channel; i++) { |
| 1138 | desc = atc_alloc_descriptor(chan, GFP_KERNEL); |
| 1139 | if (!desc) { |
| 1140 | dev_err(atdma->dma_common.dev, |
| 1141 | "Only %d initial descriptors\n", i); |
| 1142 | break; |
| 1143 | } |
| 1144 | list_add_tail(&desc->desc_node, &tmp_list); |
| 1145 | } |
| 1146 | |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 1147 | spin_lock_irqsave(&atchan->lock, flags); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1148 | atchan->descs_allocated = i; |
| 1149 | list_splice(&tmp_list, &atchan->free_list); |
Russell King - ARM Linux | d3ee98cdc | 2012-03-06 22:35:47 +0000 | [diff] [blame] | 1150 | dma_cookie_init(chan); |
Nicolas Ferre | d8cb04b | 2011-07-27 12:21:28 +0000 | [diff] [blame] | 1151 | spin_unlock_irqrestore(&atchan->lock, flags); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1152 | |
| 1153 | /* channel parameters */ |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 1154 | channel_writel(atchan, CFG, cfg); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1155 | |
| 1156 | dev_dbg(chan2dev(chan), |
| 1157 | "alloc_chan_resources: allocated %d descriptors\n", |
| 1158 | atchan->descs_allocated); |
| 1159 | |
| 1160 | return atchan->descs_allocated; |
| 1161 | } |
| 1162 | |
| 1163 | /** |
| 1164 | * atc_free_chan_resources - free all channel resources |
| 1165 | * @chan: DMA channel |
| 1166 | */ |
| 1167 | static void atc_free_chan_resources(struct dma_chan *chan) |
| 1168 | { |
| 1169 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
| 1170 | struct at_dma *atdma = to_at_dma(chan->device); |
| 1171 | struct at_desc *desc, *_desc; |
| 1172 | LIST_HEAD(list); |
| 1173 | |
| 1174 | dev_dbg(chan2dev(chan), "free_chan_resources: (descs allocated=%u)\n", |
| 1175 | atchan->descs_allocated); |
| 1176 | |
| 1177 | /* ASSERT: channel is idle */ |
| 1178 | BUG_ON(!list_empty(&atchan->active_list)); |
| 1179 | BUG_ON(!list_empty(&atchan->queue)); |
| 1180 | BUG_ON(atc_chan_is_enabled(atchan)); |
| 1181 | |
| 1182 | list_for_each_entry_safe(desc, _desc, &atchan->free_list, desc_node) { |
| 1183 | dev_vdbg(chan2dev(chan), " freeing descriptor %p\n", desc); |
| 1184 | list_del(&desc->desc_node); |
| 1185 | /* free link descriptor */ |
| 1186 | dma_pool_free(atdma->dma_desc_pool, desc, desc->txd.phys); |
| 1187 | } |
| 1188 | list_splice_init(&atchan->free_list, &list); |
| 1189 | atchan->descs_allocated = 0; |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 1190 | atchan->status = 0; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1191 | |
| 1192 | dev_vdbg(chan2dev(chan), "free_chan_resources: done\n"); |
| 1193 | } |
| 1194 | |
Ludovic Desroches | bbe89c8 | 2013-04-19 09:11:18 +0000 | [diff] [blame] | 1195 | #ifdef CONFIG_OF |
| 1196 | static bool at_dma_filter(struct dma_chan *chan, void *slave) |
| 1197 | { |
| 1198 | struct at_dma_slave *atslave = slave; |
| 1199 | |
| 1200 | if (atslave->dma_dev == chan->device->dev) { |
| 1201 | chan->private = atslave; |
| 1202 | return true; |
| 1203 | } else { |
| 1204 | return false; |
| 1205 | } |
| 1206 | } |
| 1207 | |
| 1208 | static struct dma_chan *at_dma_xlate(struct of_phandle_args *dma_spec, |
| 1209 | struct of_dma *of_dma) |
| 1210 | { |
| 1211 | struct dma_chan *chan; |
| 1212 | struct at_dma_chan *atchan; |
| 1213 | struct at_dma_slave *atslave; |
| 1214 | dma_cap_mask_t mask; |
| 1215 | unsigned int per_id; |
| 1216 | struct platform_device *dmac_pdev; |
| 1217 | |
| 1218 | if (dma_spec->args_count != 2) |
| 1219 | return NULL; |
| 1220 | |
| 1221 | dmac_pdev = of_find_device_by_node(dma_spec->np); |
| 1222 | |
| 1223 | dma_cap_zero(mask); |
| 1224 | dma_cap_set(DMA_SLAVE, mask); |
| 1225 | |
| 1226 | atslave = devm_kzalloc(&dmac_pdev->dev, sizeof(*atslave), GFP_KERNEL); |
| 1227 | if (!atslave) |
| 1228 | return NULL; |
| 1229 | /* |
| 1230 | * We can fill both SRC_PER and DST_PER, one of these fields will be |
| 1231 | * ignored depending on DMA transfer direction. |
| 1232 | */ |
| 1233 | per_id = dma_spec->args[1]; |
Nicolas Ferre | 6c22770 | 2013-05-10 15:19:15 +0200 | [diff] [blame] | 1234 | atslave->cfg = ATC_FIFOCFG_HALFFIFO |
| 1235 | | ATC_DST_H2SEL_HW | ATC_SRC_H2SEL_HW |
| 1236 | | ATC_DST_PER_MSB(per_id) | ATC_DST_PER(per_id) |
| 1237 | | ATC_SRC_PER_MSB(per_id) | ATC_SRC_PER(per_id); |
Ludovic Desroches | bbe89c8 | 2013-04-19 09:11:18 +0000 | [diff] [blame] | 1238 | atslave->dma_dev = &dmac_pdev->dev; |
| 1239 | |
| 1240 | chan = dma_request_channel(mask, at_dma_filter, atslave); |
| 1241 | if (!chan) |
| 1242 | return NULL; |
| 1243 | |
| 1244 | atchan = to_at_dma_chan(chan); |
| 1245 | atchan->per_if = dma_spec->args[0] & 0xff; |
| 1246 | atchan->mem_if = (dma_spec->args[0] >> 16) & 0xff; |
| 1247 | |
| 1248 | return chan; |
| 1249 | } |
| 1250 | #else |
| 1251 | static struct dma_chan *at_dma_xlate(struct of_phandle_args *dma_spec, |
| 1252 | struct of_dma *of_dma) |
| 1253 | { |
| 1254 | return NULL; |
| 1255 | } |
| 1256 | #endif |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1257 | |
| 1258 | /*-- Module Management -----------------------------------------------*/ |
| 1259 | |
Nicolas Ferre | 02f88be | 2011-11-22 11:55:54 +0100 | [diff] [blame] | 1260 | /* cap_mask is a multi-u32 bitfield, fill it with proper C code. */ |
| 1261 | static struct at_dma_platform_data at91sam9rl_config = { |
| 1262 | .nr_channels = 2, |
| 1263 | }; |
| 1264 | static struct at_dma_platform_data at91sam9g45_config = { |
| 1265 | .nr_channels = 8, |
| 1266 | }; |
| 1267 | |
Nicolas Ferre | c511595 | 2011-10-17 14:56:41 +0200 | [diff] [blame] | 1268 | #if defined(CONFIG_OF) |
| 1269 | static const struct of_device_id atmel_dma_dt_ids[] = { |
| 1270 | { |
| 1271 | .compatible = "atmel,at91sam9rl-dma", |
Nicolas Ferre | 02f88be | 2011-11-22 11:55:54 +0100 | [diff] [blame] | 1272 | .data = &at91sam9rl_config, |
Nicolas Ferre | c511595 | 2011-10-17 14:56:41 +0200 | [diff] [blame] | 1273 | }, { |
| 1274 | .compatible = "atmel,at91sam9g45-dma", |
Nicolas Ferre | 02f88be | 2011-11-22 11:55:54 +0100 | [diff] [blame] | 1275 | .data = &at91sam9g45_config, |
Nicolas Ferre | dcc8173 | 2011-11-22 11:55:53 +0100 | [diff] [blame] | 1276 | }, { |
| 1277 | /* sentinel */ |
| 1278 | } |
Nicolas Ferre | c511595 | 2011-10-17 14:56:41 +0200 | [diff] [blame] | 1279 | }; |
| 1280 | |
| 1281 | MODULE_DEVICE_TABLE(of, atmel_dma_dt_ids); |
| 1282 | #endif |
| 1283 | |
Nicolas Ferre | 0ab88a0 | 2011-11-22 11:55:52 +0100 | [diff] [blame] | 1284 | static const struct platform_device_id atdma_devtypes[] = { |
Nicolas Ferre | 6734845 | 2011-10-17 14:56:40 +0200 | [diff] [blame] | 1285 | { |
| 1286 | .name = "at91sam9rl_dma", |
Nicolas Ferre | 02f88be | 2011-11-22 11:55:54 +0100 | [diff] [blame] | 1287 | .driver_data = (unsigned long) &at91sam9rl_config, |
Nicolas Ferre | 6734845 | 2011-10-17 14:56:40 +0200 | [diff] [blame] | 1288 | }, { |
| 1289 | .name = "at91sam9g45_dma", |
Nicolas Ferre | 02f88be | 2011-11-22 11:55:54 +0100 | [diff] [blame] | 1290 | .driver_data = (unsigned long) &at91sam9g45_config, |
Nicolas Ferre | 6734845 | 2011-10-17 14:56:40 +0200 | [diff] [blame] | 1291 | }, { |
| 1292 | /* sentinel */ |
| 1293 | } |
| 1294 | }; |
| 1295 | |
Uwe Kleine-König | 7fd63cc | 2012-07-13 14:32:10 +0200 | [diff] [blame] | 1296 | static inline const struct at_dma_platform_data * __init at_dma_get_driver_data( |
Nicolas Ferre | 02f88be | 2011-11-22 11:55:54 +0100 | [diff] [blame] | 1297 | struct platform_device *pdev) |
Nicolas Ferre | c511595 | 2011-10-17 14:56:41 +0200 | [diff] [blame] | 1298 | { |
| 1299 | if (pdev->dev.of_node) { |
| 1300 | const struct of_device_id *match; |
| 1301 | match = of_match_node(atmel_dma_dt_ids, pdev->dev.of_node); |
| 1302 | if (match == NULL) |
Nicolas Ferre | 02f88be | 2011-11-22 11:55:54 +0100 | [diff] [blame] | 1303 | return NULL; |
| 1304 | return match->data; |
Nicolas Ferre | c511595 | 2011-10-17 14:56:41 +0200 | [diff] [blame] | 1305 | } |
Nicolas Ferre | 02f88be | 2011-11-22 11:55:54 +0100 | [diff] [blame] | 1306 | return (struct at_dma_platform_data *) |
| 1307 | platform_get_device_id(pdev)->driver_data; |
Nicolas Ferre | c511595 | 2011-10-17 14:56:41 +0200 | [diff] [blame] | 1308 | } |
| 1309 | |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1310 | /** |
| 1311 | * at_dma_off - disable DMA controller |
| 1312 | * @atdma: the Atmel HDAMC device |
| 1313 | */ |
| 1314 | static void at_dma_off(struct at_dma *atdma) |
| 1315 | { |
| 1316 | dma_writel(atdma, EN, 0); |
| 1317 | |
| 1318 | /* disable all interrupts */ |
| 1319 | dma_writel(atdma, EBCIDR, -1L); |
| 1320 | |
| 1321 | /* confirm that all channels are disabled */ |
| 1322 | while (dma_readl(atdma, CHSR) & atdma->all_chan_mask) |
| 1323 | cpu_relax(); |
| 1324 | } |
| 1325 | |
| 1326 | static int __init at_dma_probe(struct platform_device *pdev) |
| 1327 | { |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1328 | struct resource *io; |
| 1329 | struct at_dma *atdma; |
| 1330 | size_t size; |
| 1331 | int irq; |
| 1332 | int err; |
| 1333 | int i; |
Uwe Kleine-König | 7fd63cc | 2012-07-13 14:32:10 +0200 | [diff] [blame] | 1334 | const struct at_dma_platform_data *plat_dat; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1335 | |
Nicolas Ferre | 02f88be | 2011-11-22 11:55:54 +0100 | [diff] [blame] | 1336 | /* setup platform data for each SoC */ |
| 1337 | dma_cap_set(DMA_MEMCPY, at91sam9rl_config.cap_mask); |
| 1338 | dma_cap_set(DMA_MEMCPY, at91sam9g45_config.cap_mask); |
| 1339 | dma_cap_set(DMA_SLAVE, at91sam9g45_config.cap_mask); |
Nicolas Ferre | 6734845 | 2011-10-17 14:56:40 +0200 | [diff] [blame] | 1340 | |
| 1341 | /* get DMA parameters from controller type */ |
Nicolas Ferre | 02f88be | 2011-11-22 11:55:54 +0100 | [diff] [blame] | 1342 | plat_dat = at_dma_get_driver_data(pdev); |
| 1343 | if (!plat_dat) |
| 1344 | return -ENODEV; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1345 | |
| 1346 | io = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1347 | if (!io) |
| 1348 | return -EINVAL; |
| 1349 | |
| 1350 | irq = platform_get_irq(pdev, 0); |
| 1351 | if (irq < 0) |
| 1352 | return irq; |
| 1353 | |
| 1354 | size = sizeof(struct at_dma); |
Nicolas Ferre | 02f88be | 2011-11-22 11:55:54 +0100 | [diff] [blame] | 1355 | size += plat_dat->nr_channels * sizeof(struct at_dma_chan); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1356 | atdma = kzalloc(size, GFP_KERNEL); |
| 1357 | if (!atdma) |
| 1358 | return -ENOMEM; |
| 1359 | |
Nicolas Ferre | 6734845 | 2011-10-17 14:56:40 +0200 | [diff] [blame] | 1360 | /* discover transaction capabilities */ |
Nicolas Ferre | 02f88be | 2011-11-22 11:55:54 +0100 | [diff] [blame] | 1361 | atdma->dma_common.cap_mask = plat_dat->cap_mask; |
| 1362 | atdma->all_chan_mask = (1 << plat_dat->nr_channels) - 1; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1363 | |
H Hartley Sweeten | 114df7d | 2011-06-01 15:16:09 -0700 | [diff] [blame] | 1364 | size = resource_size(io); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1365 | if (!request_mem_region(io->start, size, pdev->dev.driver->name)) { |
| 1366 | err = -EBUSY; |
| 1367 | goto err_kfree; |
| 1368 | } |
| 1369 | |
| 1370 | atdma->regs = ioremap(io->start, size); |
| 1371 | if (!atdma->regs) { |
| 1372 | err = -ENOMEM; |
| 1373 | goto err_release_r; |
| 1374 | } |
| 1375 | |
| 1376 | atdma->clk = clk_get(&pdev->dev, "dma_clk"); |
| 1377 | if (IS_ERR(atdma->clk)) { |
| 1378 | err = PTR_ERR(atdma->clk); |
| 1379 | goto err_clk; |
| 1380 | } |
| 1381 | clk_enable(atdma->clk); |
| 1382 | |
| 1383 | /* force dma off, just in case */ |
| 1384 | at_dma_off(atdma); |
| 1385 | |
| 1386 | err = request_irq(irq, at_dma_interrupt, 0, "at_hdmac", atdma); |
| 1387 | if (err) |
| 1388 | goto err_irq; |
| 1389 | |
| 1390 | platform_set_drvdata(pdev, atdma); |
| 1391 | |
| 1392 | /* create a pool of consistent memory blocks for hardware descriptors */ |
| 1393 | atdma->dma_desc_pool = dma_pool_create("at_hdmac_desc_pool", |
| 1394 | &pdev->dev, sizeof(struct at_desc), |
| 1395 | 4 /* word alignment */, 0); |
| 1396 | if (!atdma->dma_desc_pool) { |
| 1397 | dev_err(&pdev->dev, "No memory for descriptors dma pool\n"); |
| 1398 | err = -ENOMEM; |
| 1399 | goto err_pool_create; |
| 1400 | } |
| 1401 | |
| 1402 | /* clear any pending interrupt */ |
| 1403 | while (dma_readl(atdma, EBCISR)) |
| 1404 | cpu_relax(); |
| 1405 | |
| 1406 | /* initialize channels related values */ |
| 1407 | INIT_LIST_HEAD(&atdma->dma_common.channels); |
Nicolas Ferre | 02f88be | 2011-11-22 11:55:54 +0100 | [diff] [blame] | 1408 | for (i = 0; i < plat_dat->nr_channels; i++) { |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1409 | struct at_dma_chan *atchan = &atdma->chan[i]; |
| 1410 | |
Ludovic Desroches | bbe89c8 | 2013-04-19 09:11:18 +0000 | [diff] [blame] | 1411 | atchan->mem_if = AT_DMA_MEM_IF; |
| 1412 | atchan->per_if = AT_DMA_PER_IF; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1413 | atchan->chan_common.device = &atdma->dma_common; |
Russell King - ARM Linux | d3ee98cdc | 2012-03-06 22:35:47 +0000 | [diff] [blame] | 1414 | dma_cookie_init(&atchan->chan_common); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1415 | list_add_tail(&atchan->chan_common.device_node, |
| 1416 | &atdma->dma_common.channels); |
| 1417 | |
| 1418 | atchan->ch_regs = atdma->regs + ch_regs(i); |
| 1419 | spin_lock_init(&atchan->lock); |
| 1420 | atchan->mask = 1 << i; |
| 1421 | |
| 1422 | INIT_LIST_HEAD(&atchan->active_list); |
| 1423 | INIT_LIST_HEAD(&atchan->queue); |
| 1424 | INIT_LIST_HEAD(&atchan->free_list); |
| 1425 | |
| 1426 | tasklet_init(&atchan->tasklet, atc_tasklet, |
| 1427 | (unsigned long)atchan); |
Nikolaus Voss | bda3a47 | 2012-01-17 10:28:33 +0100 | [diff] [blame] | 1428 | atc_enable_chan_irq(atdma, i); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1429 | } |
| 1430 | |
| 1431 | /* set base routines */ |
| 1432 | atdma->dma_common.device_alloc_chan_resources = atc_alloc_chan_resources; |
| 1433 | atdma->dma_common.device_free_chan_resources = atc_free_chan_resources; |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 1434 | atdma->dma_common.device_tx_status = atc_tx_status; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1435 | atdma->dma_common.device_issue_pending = atc_issue_pending; |
| 1436 | atdma->dma_common.dev = &pdev->dev; |
| 1437 | |
| 1438 | /* set prep routines based on capability */ |
| 1439 | if (dma_has_cap(DMA_MEMCPY, atdma->dma_common.cap_mask)) |
| 1440 | atdma->dma_common.device_prep_dma_memcpy = atc_prep_dma_memcpy; |
| 1441 | |
Nicolas Ferre | d7db808 | 2011-08-05 11:43:44 +0000 | [diff] [blame] | 1442 | if (dma_has_cap(DMA_SLAVE, atdma->dma_common.cap_mask)) { |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 1443 | atdma->dma_common.device_prep_slave_sg = atc_prep_slave_sg; |
Nicolas Ferre | d7db808 | 2011-08-05 11:43:44 +0000 | [diff] [blame] | 1444 | /* controller can do slave DMA: can trigger cyclic transfers */ |
| 1445 | dma_cap_set(DMA_CYCLIC, atdma->dma_common.cap_mask); |
Nicolas Ferre | 53830cc | 2011-04-30 16:57:46 +0200 | [diff] [blame] | 1446 | atdma->dma_common.device_prep_dma_cyclic = atc_prep_dma_cyclic; |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 1447 | atdma->dma_common.device_control = atc_control; |
Nicolas Ferre | d7db808 | 2011-08-05 11:43:44 +0000 | [diff] [blame] | 1448 | } |
Nicolas Ferre | 808347f | 2009-07-22 20:04:45 +0200 | [diff] [blame] | 1449 | |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1450 | dma_writel(atdma, EN, AT_DMA_ENABLE); |
| 1451 | |
| 1452 | dev_info(&pdev->dev, "Atmel AHB DMA Controller ( %s%s), %d channels\n", |
| 1453 | dma_has_cap(DMA_MEMCPY, atdma->dma_common.cap_mask) ? "cpy " : "", |
| 1454 | dma_has_cap(DMA_SLAVE, atdma->dma_common.cap_mask) ? "slave " : "", |
Nicolas Ferre | 02f88be | 2011-11-22 11:55:54 +0100 | [diff] [blame] | 1455 | plat_dat->nr_channels); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1456 | |
| 1457 | dma_async_device_register(&atdma->dma_common); |
| 1458 | |
Ludovic Desroches | bbe89c8 | 2013-04-19 09:11:18 +0000 | [diff] [blame] | 1459 | /* |
| 1460 | * Do not return an error if the dmac node is not present in order to |
| 1461 | * not break the existing way of requesting channel with |
| 1462 | * dma_request_channel(). |
| 1463 | */ |
| 1464 | if (pdev->dev.of_node) { |
| 1465 | err = of_dma_controller_register(pdev->dev.of_node, |
| 1466 | at_dma_xlate, atdma); |
| 1467 | if (err) { |
| 1468 | dev_err(&pdev->dev, "could not register of_dma_controller\n"); |
| 1469 | goto err_of_dma_controller_register; |
| 1470 | } |
| 1471 | } |
| 1472 | |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1473 | return 0; |
| 1474 | |
Ludovic Desroches | bbe89c8 | 2013-04-19 09:11:18 +0000 | [diff] [blame] | 1475 | err_of_dma_controller_register: |
| 1476 | dma_async_device_unregister(&atdma->dma_common); |
| 1477 | dma_pool_destroy(atdma->dma_desc_pool); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1478 | err_pool_create: |
| 1479 | platform_set_drvdata(pdev, NULL); |
| 1480 | free_irq(platform_get_irq(pdev, 0), atdma); |
| 1481 | err_irq: |
| 1482 | clk_disable(atdma->clk); |
| 1483 | clk_put(atdma->clk); |
| 1484 | err_clk: |
| 1485 | iounmap(atdma->regs); |
| 1486 | atdma->regs = NULL; |
| 1487 | err_release_r: |
| 1488 | release_mem_region(io->start, size); |
| 1489 | err_kfree: |
| 1490 | kfree(atdma); |
| 1491 | return err; |
| 1492 | } |
| 1493 | |
Maxin B. John | 1d1bbd3 | 2013-02-20 02:07:04 +0200 | [diff] [blame] | 1494 | static int at_dma_remove(struct platform_device *pdev) |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1495 | { |
| 1496 | struct at_dma *atdma = platform_get_drvdata(pdev); |
| 1497 | struct dma_chan *chan, *_chan; |
| 1498 | struct resource *io; |
| 1499 | |
| 1500 | at_dma_off(atdma); |
| 1501 | dma_async_device_unregister(&atdma->dma_common); |
| 1502 | |
| 1503 | dma_pool_destroy(atdma->dma_desc_pool); |
| 1504 | platform_set_drvdata(pdev, NULL); |
| 1505 | free_irq(platform_get_irq(pdev, 0), atdma); |
| 1506 | |
| 1507 | list_for_each_entry_safe(chan, _chan, &atdma->dma_common.channels, |
| 1508 | device_node) { |
| 1509 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
| 1510 | |
| 1511 | /* Disable interrupts */ |
Nikolaus Voss | bda3a47 | 2012-01-17 10:28:33 +0100 | [diff] [blame] | 1512 | atc_disable_chan_irq(atdma, chan->chan_id); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1513 | tasklet_disable(&atchan->tasklet); |
| 1514 | |
| 1515 | tasklet_kill(&atchan->tasklet); |
| 1516 | list_del(&chan->device_node); |
| 1517 | } |
| 1518 | |
| 1519 | clk_disable(atdma->clk); |
| 1520 | clk_put(atdma->clk); |
| 1521 | |
| 1522 | iounmap(atdma->regs); |
| 1523 | atdma->regs = NULL; |
| 1524 | |
| 1525 | io = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
H Hartley Sweeten | 114df7d | 2011-06-01 15:16:09 -0700 | [diff] [blame] | 1526 | release_mem_region(io->start, resource_size(io)); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1527 | |
| 1528 | kfree(atdma); |
| 1529 | |
| 1530 | return 0; |
| 1531 | } |
| 1532 | |
| 1533 | static void at_dma_shutdown(struct platform_device *pdev) |
| 1534 | { |
| 1535 | struct at_dma *atdma = platform_get_drvdata(pdev); |
| 1536 | |
| 1537 | at_dma_off(platform_get_drvdata(pdev)); |
| 1538 | clk_disable(atdma->clk); |
| 1539 | } |
| 1540 | |
Nicolas Ferre | c0ba594 | 2011-07-27 12:21:29 +0000 | [diff] [blame] | 1541 | static int at_dma_prepare(struct device *dev) |
| 1542 | { |
| 1543 | struct platform_device *pdev = to_platform_device(dev); |
| 1544 | struct at_dma *atdma = platform_get_drvdata(pdev); |
| 1545 | struct dma_chan *chan, *_chan; |
| 1546 | |
| 1547 | list_for_each_entry_safe(chan, _chan, &atdma->dma_common.channels, |
| 1548 | device_node) { |
| 1549 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
| 1550 | /* wait for transaction completion (except in cyclic case) */ |
Nicolas Ferre | 3c47748 | 2011-07-25 21:09:23 +0000 | [diff] [blame] | 1551 | if (atc_chan_is_enabled(atchan) && !atc_chan_is_cyclic(atchan)) |
Nicolas Ferre | c0ba594 | 2011-07-27 12:21:29 +0000 | [diff] [blame] | 1552 | return -EAGAIN; |
| 1553 | } |
| 1554 | return 0; |
| 1555 | } |
| 1556 | |
| 1557 | static void atc_suspend_cyclic(struct at_dma_chan *atchan) |
| 1558 | { |
| 1559 | struct dma_chan *chan = &atchan->chan_common; |
| 1560 | |
| 1561 | /* Channel should be paused by user |
| 1562 | * do it anyway even if it is not done already */ |
Nicolas Ferre | 3c47748 | 2011-07-25 21:09:23 +0000 | [diff] [blame] | 1563 | if (!atc_chan_is_paused(atchan)) { |
Nicolas Ferre | c0ba594 | 2011-07-27 12:21:29 +0000 | [diff] [blame] | 1564 | dev_warn(chan2dev(chan), |
| 1565 | "cyclic channel not paused, should be done by channel user\n"); |
| 1566 | atc_control(chan, DMA_PAUSE, 0); |
| 1567 | } |
| 1568 | |
| 1569 | /* now preserve additional data for cyclic operations */ |
| 1570 | /* next descriptor address in the cyclic list */ |
| 1571 | atchan->save_dscr = channel_readl(atchan, DSCR); |
| 1572 | |
| 1573 | vdbg_dump_regs(atchan); |
| 1574 | } |
| 1575 | |
Dan Williams | 33f82d1 | 2009-09-10 00:06:44 +0200 | [diff] [blame] | 1576 | static int at_dma_suspend_noirq(struct device *dev) |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1577 | { |
Dan Williams | 33f82d1 | 2009-09-10 00:06:44 +0200 | [diff] [blame] | 1578 | struct platform_device *pdev = to_platform_device(dev); |
| 1579 | struct at_dma *atdma = platform_get_drvdata(pdev); |
Nicolas Ferre | c0ba594 | 2011-07-27 12:21:29 +0000 | [diff] [blame] | 1580 | struct dma_chan *chan, *_chan; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1581 | |
Nicolas Ferre | c0ba594 | 2011-07-27 12:21:29 +0000 | [diff] [blame] | 1582 | /* preserve data */ |
| 1583 | list_for_each_entry_safe(chan, _chan, &atdma->dma_common.channels, |
| 1584 | device_node) { |
| 1585 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
| 1586 | |
Nicolas Ferre | 3c47748 | 2011-07-25 21:09:23 +0000 | [diff] [blame] | 1587 | if (atc_chan_is_cyclic(atchan)) |
Nicolas Ferre | c0ba594 | 2011-07-27 12:21:29 +0000 | [diff] [blame] | 1588 | atc_suspend_cyclic(atchan); |
| 1589 | atchan->save_cfg = channel_readl(atchan, CFG); |
| 1590 | } |
| 1591 | atdma->save_imr = dma_readl(atdma, EBCIMR); |
| 1592 | |
| 1593 | /* disable DMA controller */ |
| 1594 | at_dma_off(atdma); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1595 | clk_disable(atdma->clk); |
| 1596 | return 0; |
| 1597 | } |
| 1598 | |
Nicolas Ferre | c0ba594 | 2011-07-27 12:21:29 +0000 | [diff] [blame] | 1599 | static void atc_resume_cyclic(struct at_dma_chan *atchan) |
| 1600 | { |
| 1601 | struct at_dma *atdma = to_at_dma(atchan->chan_common.device); |
| 1602 | |
| 1603 | /* restore channel status for cyclic descriptors list: |
| 1604 | * next descriptor in the cyclic list at the time of suspend */ |
| 1605 | channel_writel(atchan, SADDR, 0); |
| 1606 | channel_writel(atchan, DADDR, 0); |
| 1607 | channel_writel(atchan, CTRLA, 0); |
| 1608 | channel_writel(atchan, CTRLB, 0); |
| 1609 | channel_writel(atchan, DSCR, atchan->save_dscr); |
| 1610 | dma_writel(atdma, CHER, atchan->mask); |
| 1611 | |
| 1612 | /* channel pause status should be removed by channel user |
| 1613 | * We cannot take the initiative to do it here */ |
| 1614 | |
| 1615 | vdbg_dump_regs(atchan); |
| 1616 | } |
| 1617 | |
Dan Williams | 33f82d1 | 2009-09-10 00:06:44 +0200 | [diff] [blame] | 1618 | static int at_dma_resume_noirq(struct device *dev) |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1619 | { |
Dan Williams | 33f82d1 | 2009-09-10 00:06:44 +0200 | [diff] [blame] | 1620 | struct platform_device *pdev = to_platform_device(dev); |
| 1621 | struct at_dma *atdma = platform_get_drvdata(pdev); |
Nicolas Ferre | c0ba594 | 2011-07-27 12:21:29 +0000 | [diff] [blame] | 1622 | struct dma_chan *chan, *_chan; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1623 | |
Nicolas Ferre | c0ba594 | 2011-07-27 12:21:29 +0000 | [diff] [blame] | 1624 | /* bring back DMA controller */ |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1625 | clk_enable(atdma->clk); |
| 1626 | dma_writel(atdma, EN, AT_DMA_ENABLE); |
Nicolas Ferre | c0ba594 | 2011-07-27 12:21:29 +0000 | [diff] [blame] | 1627 | |
| 1628 | /* clear any pending interrupt */ |
| 1629 | while (dma_readl(atdma, EBCISR)) |
| 1630 | cpu_relax(); |
| 1631 | |
| 1632 | /* restore saved data */ |
| 1633 | dma_writel(atdma, EBCIER, atdma->save_imr); |
| 1634 | list_for_each_entry_safe(chan, _chan, &atdma->dma_common.channels, |
| 1635 | device_node) { |
| 1636 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
| 1637 | |
| 1638 | channel_writel(atchan, CFG, atchan->save_cfg); |
Nicolas Ferre | 3c47748 | 2011-07-25 21:09:23 +0000 | [diff] [blame] | 1639 | if (atc_chan_is_cyclic(atchan)) |
Nicolas Ferre | c0ba594 | 2011-07-27 12:21:29 +0000 | [diff] [blame] | 1640 | atc_resume_cyclic(atchan); |
| 1641 | } |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1642 | return 0; |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1643 | } |
| 1644 | |
Alexey Dobriyan | 4714521 | 2009-12-14 18:00:08 -0800 | [diff] [blame] | 1645 | static const struct dev_pm_ops at_dma_dev_pm_ops = { |
Nicolas Ferre | c0ba594 | 2011-07-27 12:21:29 +0000 | [diff] [blame] | 1646 | .prepare = at_dma_prepare, |
Dan Williams | 33f82d1 | 2009-09-10 00:06:44 +0200 | [diff] [blame] | 1647 | .suspend_noirq = at_dma_suspend_noirq, |
| 1648 | .resume_noirq = at_dma_resume_noirq, |
| 1649 | }; |
| 1650 | |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1651 | static struct platform_driver at_dma_driver = { |
Maxin B. John | 1d1bbd3 | 2013-02-20 02:07:04 +0200 | [diff] [blame] | 1652 | .remove = at_dma_remove, |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1653 | .shutdown = at_dma_shutdown, |
Nicolas Ferre | 6734845 | 2011-10-17 14:56:40 +0200 | [diff] [blame] | 1654 | .id_table = atdma_devtypes, |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1655 | .driver = { |
| 1656 | .name = "at_hdmac", |
Dan Williams | 33f82d1 | 2009-09-10 00:06:44 +0200 | [diff] [blame] | 1657 | .pm = &at_dma_dev_pm_ops, |
Nicolas Ferre | c511595 | 2011-10-17 14:56:41 +0200 | [diff] [blame] | 1658 | .of_match_table = of_match_ptr(atmel_dma_dt_ids), |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1659 | }, |
| 1660 | }; |
| 1661 | |
| 1662 | static int __init at_dma_init(void) |
| 1663 | { |
| 1664 | return platform_driver_probe(&at_dma_driver, at_dma_probe); |
| 1665 | } |
Eric Xu | 93d0bec | 2011-01-12 15:39:08 +0100 | [diff] [blame] | 1666 | subsys_initcall(at_dma_init); |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 1667 | |
| 1668 | static void __exit at_dma_exit(void) |
| 1669 | { |
| 1670 | platform_driver_unregister(&at_dma_driver); |
| 1671 | } |
| 1672 | module_exit(at_dma_exit); |
| 1673 | |
| 1674 | MODULE_DESCRIPTION("Atmel AHB DMA Controller driver"); |
| 1675 | MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>"); |
| 1676 | MODULE_LICENSE("GPL"); |
| 1677 | MODULE_ALIAS("platform:at_hdmac"); |