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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Hirokazu Takata3264f972007-08-01 21:09:31 +09002 * linux/arch/m32r/platforms/mappi/setup.c
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
4 * Setup routines for Renesas MAPPI Board
5 *
Hirokazu Takata316240f2005-07-07 17:59:32 -07006 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 */
9
Linus Torvalds1da177e2005-04-16 15:20:36 -070010#include <linux/irq.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010013#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <asm/m32r.h>
16#include <asm/io.h>
17
18#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
19
Linus Torvalds1da177e2005-04-16 15:20:36 -070020icu_data_t icu_data[NR_IRQS];
21
22static void disable_mappi_irq(unsigned int irq)
23{
24 unsigned long port, data;
25
26 port = irq2port(irq);
27 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
28 outl(data, port);
29}
30
31static void enable_mappi_irq(unsigned int irq)
32{
33 unsigned long port, data;
34
35 port = irq2port(irq);
36 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
37 outl(data, port);
38}
39
Thomas Gleixner1f126812011-01-19 18:27:59 +010040static void mask_mappi(struct irq_data *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -070041{
Thomas Gleixner1f126812011-01-19 18:27:59 +010042 disable_mappi_irq(data->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070043}
44
Thomas Gleixner1f126812011-01-19 18:27:59 +010045static void unmask_mappi(struct irq_data *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -070046{
Thomas Gleixner1f126812011-01-19 18:27:59 +010047 enable_mappi_irq(data->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070048}
49
Thomas Gleixner1f126812011-01-19 18:27:59 +010050static void shutdown_mappi(struct irq_data *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -070051{
52 unsigned long port;
53
Thomas Gleixner1f126812011-01-19 18:27:59 +010054 port = irq2port(data->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070055 outl(M32R_ICUCR_ILEVEL7, port);
56}
57
Thomas Gleixner189e91f2009-06-16 15:33:26 -070058static struct irq_chip mappi_irq_type =
Linus Torvalds1da177e2005-04-16 15:20:36 -070059{
Thomas Gleixner1f126812011-01-19 18:27:59 +010060 .name = "MAPPI-IRQ",
61 .irq_shutdown = shutdown_mappi,
62 .irq_mask = mask_mappi,
63 .irq_unmask = unmask_mappi,
Linus Torvalds1da177e2005-04-16 15:20:36 -070064};
65
66void __init init_IRQ(void)
67{
68 static int once = 0;
69
70 if (once)
71 return;
72 else
73 once++;
74
75#ifdef CONFIG_NE2000
76 /* INT0 : LAN controller (RTL8019AS) */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +010077 irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type,
Thomas Gleixner1f126812011-01-19 18:27:59 +010078 handle_level_irq);
Hirokazu Takata4fc093852007-07-26 10:41:19 -070079 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
Linus Torvalds1da177e2005-04-16 15:20:36 -070080 disable_mappi_irq(M32R_IRQ_INT0);
81#endif /* CONFIG_M32R_NE2000 */
82
83 /* MFT2 : system timer */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +010084 irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
Thomas Gleixner1f126812011-01-19 18:27:59 +010085 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070086 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
87 disable_mappi_irq(M32R_IRQ_MFT2);
88
89#ifdef CONFIG_SERIAL_M32R_SIO
90 /* SIO0_R : uart receive data */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +010091 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
Thomas Gleixner1f126812011-01-19 18:27:59 +010092 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070093 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
94 disable_mappi_irq(M32R_IRQ_SIO0_R);
95
96 /* SIO0_S : uart send data */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +010097 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
Thomas Gleixner1f126812011-01-19 18:27:59 +010098 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070099 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
100 disable_mappi_irq(M32R_IRQ_SIO0_S);
101
102 /* SIO1_R : uart receive data */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100103 irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
Thomas Gleixner1f126812011-01-19 18:27:59 +0100104 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
106 disable_mappi_irq(M32R_IRQ_SIO1_R);
107
108 /* SIO1_S : uart send data */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100109 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
Thomas Gleixner1f126812011-01-19 18:27:59 +0100110 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
112 disable_mappi_irq(M32R_IRQ_SIO1_S);
113#endif /* CONFIG_SERIAL_M32R_SIO */
114
115#if defined(CONFIG_M32R_PCC)
116 /* INT1 : pccard0 interrupt */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100117 irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type,
Thomas Gleixner1f126812011-01-19 18:27:59 +0100118 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
120 disable_mappi_irq(M32R_IRQ_INT1);
121
122 /* INT2 : pccard1 interrupt */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100123 irq_set_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type,
Thomas Gleixner1f126812011-01-19 18:27:59 +0100124 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125 icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
126 disable_mappi_irq(M32R_IRQ_INT2);
127#endif /* CONFIG_M32RPCC */
128}
Hirokazu Takata316240f2005-07-07 17:59:32 -0700129
130#if defined(CONFIG_FB_S1D13XXX)
131
132#include <video/s1d13xxxfb.h>
133#include <asm/s1d13806.h>
134
135static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
136 .initregs = s1d13xxxfb_initregs,
137 .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
138 .platform_init_video = NULL,
139#ifdef CONFIG_PM
140 .platform_suspend_video = NULL,
141 .platform_resume_video = NULL,
142#endif
143};
144
145static struct resource s1d13xxxfb_resources[] = {
146 [0] = {
147 .start = 0x10200000UL,
148 .end = 0x1033FFFFUL,
149 .flags = IORESOURCE_MEM,
150 },
151 [1] = {
152 .start = 0x10000000UL,
153 .end = 0x100001FFUL,
154 .flags = IORESOURCE_MEM,
155 }
156};
157
158static struct platform_device s1d13xxxfb_device = {
159 .name = S1D_DEVICENAME,
160 .id = 0,
161 .dev = {
162 .platform_data = &s1d13xxxfb_data,
163 },
164 .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
165 .resource = s1d13xxxfb_resources,
166};
167
168static int __init platform_init(void)
169{
170 platform_device_register(&s1d13xxxfb_device);
171 return 0;
172}
173arch_initcall(platform_init);
174#endif