Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * descriptions + helper functions for simple dvb plls. |
| 3 | * |
| 4 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 19 | */ |
| 20 | |
| 21 | #include <linux/module.h> |
| 22 | #include <linux/dvb/frontend.h> |
| 23 | #include <asm/types.h> |
| 24 | |
| 25 | #include "dvb-pll.h" |
| 26 | |
| 27 | /* ----------------------------------------------------------- */ |
| 28 | /* descriptions */ |
| 29 | |
Trent Piepho | 26aed92 | 2007-04-27 12:31:29 -0300 | [diff] [blame] | 30 | /* Set AGC TOP value to 103 dBuV: |
| 31 | 0x80 = Control Byte |
| 32 | 0x40 = 250 uA charge pump (irrelevant) |
| 33 | 0x18 = Aux Byte to follow |
| 34 | 0x06 = 64.5 kHz divider (irrelevant) |
| 35 | 0x01 = Disable Vt (aka sleep) |
| 36 | |
| 37 | 0x00 = AGC Time constant 2s Iagc = 300 nA (vs 0x80 = 9 nA) |
| 38 | 0x50 = AGC Take over point = 103 dBuV */ |
| 39 | static u8 tua603x_agc103[] = { 2, 0x80|0x40|0x18|0x06|0x01, 0x00|0x50 }; |
| 40 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | struct dvb_pll_desc dvb_pll_thomson_dtt7579 = { |
| 42 | .name = "Thomson dtt7579", |
| 43 | .min = 177000000, |
| 44 | .max = 858000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 45 | .iffreq= 36166667, |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame^] | 46 | .sleepdata = (u8[]){ 2, 0xb4, 0x03 }, |
| 47 | .count = 4, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 49 | { 443250000, 166667, 0xb4, 0x02 }, |
| 50 | { 542000000, 166667, 0xb4, 0x08 }, |
| 51 | { 771000000, 166667, 0xbc, 0x08 }, |
| 52 | { 999999999, 166667, 0xf4, 0x08 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 53 | }, |
| 54 | }; |
| 55 | EXPORT_SYMBOL(dvb_pll_thomson_dtt7579); |
| 56 | |
| 57 | struct dvb_pll_desc dvb_pll_thomson_dtt7610 = { |
| 58 | .name = "Thomson dtt7610", |
| 59 | .min = 44000000, |
| 60 | .max = 958000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 61 | .iffreq= 44000000, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | .count = 3, |
| 63 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 64 | { 157250000, 62500, 0x8e, 0x39 }, |
| 65 | { 454000000, 62500, 0x8e, 0x3a }, |
| 66 | { 999999999, 62500, 0x8e, 0x3c }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | }, |
| 68 | }; |
| 69 | EXPORT_SYMBOL(dvb_pll_thomson_dtt7610); |
| 70 | |
Patrick Boettcher | 49dc82f | 2005-07-07 17:58:09 -0700 | [diff] [blame] | 71 | static void thomson_dtt759x_bw(u8 *buf, u32 freq, int bandwidth) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | { |
| 73 | if (BANDWIDTH_7_MHZ == bandwidth) |
| 74 | buf[3] |= 0x10; |
| 75 | } |
| 76 | |
| 77 | struct dvb_pll_desc dvb_pll_thomson_dtt759x = { |
| 78 | .name = "Thomson dtt759x", |
| 79 | .min = 177000000, |
| 80 | .max = 896000000, |
| 81 | .setbw = thomson_dtt759x_bw, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 82 | .iffreq= 36166667, |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame^] | 83 | .sleepdata = (u8[]){ 2, 0x84, 0x03 }, |
| 84 | .count = 5, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 86 | { 264000000, 166667, 0xb4, 0x02 }, |
| 87 | { 470000000, 166667, 0xbc, 0x02 }, |
| 88 | { 735000000, 166667, 0xbc, 0x08 }, |
| 89 | { 835000000, 166667, 0xf4, 0x08 }, |
| 90 | { 999999999, 166667, 0xfc, 0x08 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 91 | }, |
| 92 | }; |
| 93 | EXPORT_SYMBOL(dvb_pll_thomson_dtt759x); |
| 94 | |
| 95 | struct dvb_pll_desc dvb_pll_lg_z201 = { |
| 96 | .name = "LG z201", |
| 97 | .min = 174000000, |
| 98 | .max = 862000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 99 | .iffreq= 36166667, |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame^] | 100 | .sleepdata = (u8[]){ 2, 0xbc, 0x03 }, |
| 101 | .count = 5, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 102 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 103 | { 157500000, 166667, 0xbc, 0x01 }, |
| 104 | { 443250000, 166667, 0xbc, 0x02 }, |
| 105 | { 542000000, 166667, 0xbc, 0x04 }, |
| 106 | { 830000000, 166667, 0xf4, 0x04 }, |
| 107 | { 999999999, 166667, 0xfc, 0x04 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 108 | }, |
| 109 | }; |
| 110 | EXPORT_SYMBOL(dvb_pll_lg_z201); |
| 111 | |
Mac Michaels | d8667cb | 2005-07-07 17:58:29 -0700 | [diff] [blame] | 112 | struct dvb_pll_desc dvb_pll_microtune_4042 = { |
| 113 | .name = "Microtune 4042 FI5", |
| 114 | .min = 57000000, |
| 115 | .max = 858000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 116 | .iffreq= 44000000, |
Mac Michaels | d8667cb | 2005-07-07 17:58:29 -0700 | [diff] [blame] | 117 | .count = 3, |
| 118 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 119 | { 162000000, 62500, 0x8e, 0xa1 }, |
| 120 | { 457000000, 62500, 0x8e, 0x91 }, |
| 121 | { 999999999, 62500, 0x8e, 0x31 }, |
Mac Michaels | d8667cb | 2005-07-07 17:58:29 -0700 | [diff] [blame] | 122 | }, |
| 123 | }; |
| 124 | EXPORT_SYMBOL(dvb_pll_microtune_4042); |
| 125 | |
Michael Krufky | 83ac8722 | 2006-01-09 15:25:29 -0200 | [diff] [blame] | 126 | struct dvb_pll_desc dvb_pll_thomson_dtt761x = { |
| 127 | /* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */ |
| 128 | .name = "Thomson dtt761x", |
| 129 | .min = 57000000, |
| 130 | .max = 863000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 131 | .iffreq= 44000000, |
Michael Krufky | 0d723c0 | 2005-07-07 17:58:42 -0700 | [diff] [blame] | 132 | .count = 3, |
Trent Piepho | 26aed92 | 2007-04-27 12:31:29 -0300 | [diff] [blame] | 133 | .initdata = tua603x_agc103, |
Michael Krufky | 0d723c0 | 2005-07-07 17:58:42 -0700 | [diff] [blame] | 134 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 135 | { 147000000, 62500, 0x8e, 0x39 }, |
| 136 | { 417000000, 62500, 0x8e, 0x3a }, |
| 137 | { 999999999, 62500, 0x8e, 0x3c }, |
Michael Krufky | 0d723c0 | 2005-07-07 17:58:42 -0700 | [diff] [blame] | 138 | }, |
| 139 | }; |
Michael Krufky | 83ac8722 | 2006-01-09 15:25:29 -0200 | [diff] [blame] | 140 | EXPORT_SYMBOL(dvb_pll_thomson_dtt761x); |
Michael Krufky | 0d723c0 | 2005-07-07 17:58:42 -0700 | [diff] [blame] | 141 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | struct dvb_pll_desc dvb_pll_unknown_1 = { |
| 143 | .name = "unknown 1", /* used by dntv live dvb-t */ |
| 144 | .min = 174000000, |
| 145 | .max = 862000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 146 | .iffreq= 36166667, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 147 | .count = 9, |
| 148 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 149 | { 150000000, 166667, 0xb4, 0x01 }, |
| 150 | { 173000000, 166667, 0xbc, 0x01 }, |
| 151 | { 250000000, 166667, 0xb4, 0x02 }, |
| 152 | { 400000000, 166667, 0xbc, 0x02 }, |
| 153 | { 420000000, 166667, 0xf4, 0x02 }, |
| 154 | { 470000000, 166667, 0xfc, 0x02 }, |
| 155 | { 600000000, 166667, 0xbc, 0x08 }, |
| 156 | { 730000000, 166667, 0xf4, 0x08 }, |
| 157 | { 999999999, 166667, 0xfc, 0x08 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | }, |
| 159 | }; |
| 160 | EXPORT_SYMBOL(dvb_pll_unknown_1); |
| 161 | |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 162 | /* Infineon TUA6010XS |
| 163 | * used in Thomson Cable Tuner |
| 164 | */ |
| 165 | struct dvb_pll_desc dvb_pll_tua6010xs = { |
| 166 | .name = "Infineon TUA6010XS", |
| 167 | .min = 44250000, |
| 168 | .max = 858000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 169 | .iffreq= 36125000, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 170 | .count = 3, |
| 171 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 172 | { 115750000, 62500, 0x8e, 0x03 }, |
| 173 | { 403250000, 62500, 0x8e, 0x06 }, |
| 174 | { 999999999, 62500, 0x8e, 0x85 }, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 175 | }, |
| 176 | }; |
| 177 | EXPORT_SYMBOL(dvb_pll_tua6010xs); |
| 178 | |
| 179 | /* Panasonic env57h1xd5 (some Philips PLL ?) */ |
| 180 | struct dvb_pll_desc dvb_pll_env57h1xd5 = { |
| 181 | .name = "Panasonic ENV57H1XD5", |
| 182 | .min = 44250000, |
| 183 | .max = 858000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 184 | .iffreq= 36125000, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 185 | .count = 4, |
| 186 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 187 | { 153000000, 166667, 0xc2, 0x41 }, |
| 188 | { 470000000, 166667, 0xc2, 0x42 }, |
| 189 | { 526000000, 166667, 0xc2, 0x84 }, |
| 190 | { 999999999, 166667, 0xc2, 0xa4 }, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 191 | }, |
| 192 | }; |
| 193 | EXPORT_SYMBOL(dvb_pll_env57h1xd5); |
| 194 | |
| 195 | /* Philips TDA6650/TDA6651 |
| 196 | * used in Panasonic ENV77H11D5 |
| 197 | */ |
Patrick Boettcher | 49dc82f | 2005-07-07 17:58:09 -0700 | [diff] [blame] | 198 | static void tda665x_bw(u8 *buf, u32 freq, int bandwidth) |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 199 | { |
| 200 | if (bandwidth == BANDWIDTH_8_MHZ) |
| 201 | buf[3] |= 0x08; |
| 202 | } |
| 203 | |
| 204 | struct dvb_pll_desc dvb_pll_tda665x = { |
| 205 | .name = "Philips TDA6650/TDA6651", |
| 206 | .min = 44250000, |
| 207 | .max = 858000000, |
| 208 | .setbw = tda665x_bw, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 209 | .iffreq= 36166667, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 210 | .count = 12, |
| 211 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 212 | { 93834000, 166667, 0xca, 0x61 /* 011 0 0 0 01 */ }, |
| 213 | { 123834000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ }, |
| 214 | { 161000000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ }, |
| 215 | { 163834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ }, |
| 216 | { 253834000, 166667, 0xca, 0x62 /* 011 0 0 0 10 */ }, |
| 217 | { 383834000, 166667, 0xca, 0xa2 /* 101 0 0 0 10 */ }, |
| 218 | { 443834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ }, |
| 219 | { 444000000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ }, |
| 220 | { 583834000, 166667, 0xca, 0x64 /* 011 0 0 1 00 */ }, |
| 221 | { 793834000, 166667, 0xca, 0xa4 /* 101 0 0 1 00 */ }, |
| 222 | { 444834000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ }, |
| 223 | { 861000000, 166667, 0xca, 0xe4 /* 111 0 0 1 00 */ }, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 224 | } |
| 225 | }; |
| 226 | EXPORT_SYMBOL(dvb_pll_tda665x); |
| 227 | |
| 228 | /* Infineon TUA6034 |
| 229 | * used in LG TDTP E102P |
| 230 | */ |
Patrick Boettcher | 49dc82f | 2005-07-07 17:58:09 -0700 | [diff] [blame] | 231 | static void tua6034_bw(u8 *buf, u32 freq, int bandwidth) |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 232 | { |
| 233 | if (BANDWIDTH_7_MHZ != bandwidth) |
| 234 | buf[3] |= 0x08; |
| 235 | } |
| 236 | |
| 237 | struct dvb_pll_desc dvb_pll_tua6034 = { |
| 238 | .name = "Infineon TUA6034", |
| 239 | .min = 44250000, |
| 240 | .max = 858000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 241 | .iffreq= 36166667, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 242 | .count = 3, |
| 243 | .setbw = tua6034_bw, |
| 244 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 245 | { 174500000, 62500, 0xce, 0x01 }, |
| 246 | { 230000000, 62500, 0xce, 0x02 }, |
| 247 | { 999999999, 62500, 0xce, 0x04 }, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 248 | }, |
| 249 | }; |
| 250 | EXPORT_SYMBOL(dvb_pll_tua6034); |
| 251 | |
Michael Krufky | 1963c90 | 2005-08-08 09:22:43 -0700 | [diff] [blame] | 252 | /* Infineon TUA6034 |
Michael Krufky | d9e12f2 | 2006-04-22 16:15:11 -0300 | [diff] [blame] | 253 | * used in LG TDVS-H061F, LG TDVS-H062F and LG TDVS-H064F |
Michael Krufky | 1963c90 | 2005-08-08 09:22:43 -0700 | [diff] [blame] | 254 | */ |
Michael Krufky | 30fa61a | 2006-04-27 01:31:26 -0300 | [diff] [blame] | 255 | struct dvb_pll_desc dvb_pll_lg_tdvs_h06xf = { |
Michael Krufky | d9e12f2 | 2006-04-22 16:15:11 -0300 | [diff] [blame] | 256 | .name = "LG TDVS-H06xF", |
Michael Krufky | 1963c90 | 2005-08-08 09:22:43 -0700 | [diff] [blame] | 257 | .min = 54000000, |
| 258 | .max = 863000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 259 | .iffreq= 44000000, |
Trent Piepho | 6bdcc6e | 2007-04-27 12:31:30 -0300 | [diff] [blame] | 260 | .initdata = tua603x_agc103, |
Michael Krufky | 1963c90 | 2005-08-08 09:22:43 -0700 | [diff] [blame] | 261 | .count = 3, |
| 262 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 263 | { 165000000, 62500, 0xce, 0x01 }, |
| 264 | { 450000000, 62500, 0xce, 0x02 }, |
| 265 | { 999999999, 62500, 0xce, 0x04 }, |
Michael Krufky | 1963c90 | 2005-08-08 09:22:43 -0700 | [diff] [blame] | 266 | }, |
| 267 | }; |
Michael Krufky | 30fa61a | 2006-04-27 01:31:26 -0300 | [diff] [blame] | 268 | EXPORT_SYMBOL(dvb_pll_lg_tdvs_h06xf); |
Michael Krufky | 1963c90 | 2005-08-08 09:22:43 -0700 | [diff] [blame] | 269 | |
Patrick Boettcher | 49dc82f | 2005-07-07 17:58:09 -0700 | [diff] [blame] | 270 | /* Philips FMD1216ME |
| 271 | * used in Medion Hybrid PCMCIA card and USB Box |
| 272 | */ |
| 273 | static void fmd1216me_bw(u8 *buf, u32 freq, int bandwidth) |
| 274 | { |
| 275 | if (bandwidth == BANDWIDTH_8_MHZ && freq >= 158870000) |
| 276 | buf[3] |= 0x08; |
| 277 | } |
| 278 | |
| 279 | struct dvb_pll_desc dvb_pll_fmd1216me = { |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 280 | .name = "Philips FMD1216ME", |
Patrick Boettcher | 49dc82f | 2005-07-07 17:58:09 -0700 | [diff] [blame] | 281 | .min = 50870000, |
| 282 | .max = 858000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 283 | .iffreq= 36125000, |
Patrick Boettcher | 49dc82f | 2005-07-07 17:58:09 -0700 | [diff] [blame] | 284 | .setbw = fmd1216me_bw, |
| 285 | .count = 7, |
| 286 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 287 | { 143870000, 166667, 0xbc, 0x41 }, |
| 288 | { 158870000, 166667, 0xf4, 0x41 }, |
| 289 | { 329870000, 166667, 0xbc, 0x42 }, |
| 290 | { 441870000, 166667, 0xf4, 0x42 }, |
| 291 | { 625870000, 166667, 0xbc, 0x44 }, |
| 292 | { 803870000, 166667, 0xf4, 0x44 }, |
| 293 | { 999999999, 166667, 0xfc, 0x44 }, |
Patrick Boettcher | 49dc82f | 2005-07-07 17:58:09 -0700 | [diff] [blame] | 294 | } |
| 295 | }; |
| 296 | EXPORT_SYMBOL(dvb_pll_fmd1216me); |
| 297 | |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 298 | /* ALPS TDED4 |
| 299 | * used in Nebula-Cards and USB boxes |
| 300 | */ |
| 301 | static void tded4_bw(u8 *buf, u32 freq, int bandwidth) |
| 302 | { |
| 303 | if (bandwidth == BANDWIDTH_8_MHZ) |
| 304 | buf[3] |= 0x04; |
| 305 | } |
| 306 | |
| 307 | struct dvb_pll_desc dvb_pll_tded4 = { |
| 308 | .name = "ALPS TDED4", |
| 309 | .min = 47000000, |
| 310 | .max = 863000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 311 | .iffreq= 36166667, |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 312 | .setbw = tded4_bw, |
| 313 | .count = 4, |
| 314 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 315 | { 153000000, 166667, 0x85, 0x01 }, |
| 316 | { 470000000, 166667, 0x85, 0x02 }, |
| 317 | { 823000000, 166667, 0x85, 0x08 }, |
| 318 | { 999999999, 166667, 0x85, 0x88 }, |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 319 | } |
| 320 | }; |
| 321 | EXPORT_SYMBOL(dvb_pll_tded4); |
| 322 | |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 323 | /* ALPS TDHU2 |
| 324 | * used in AverTVHD MCE A180 |
| 325 | */ |
| 326 | struct dvb_pll_desc dvb_pll_tdhu2 = { |
| 327 | .name = "ALPS TDHU2", |
| 328 | .min = 54000000, |
| 329 | .max = 864000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 330 | .iffreq= 44000000, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 331 | .count = 4, |
| 332 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 333 | { 162000000, 62500, 0x85, 0x01 }, |
| 334 | { 426000000, 62500, 0x85, 0x02 }, |
| 335 | { 782000000, 62500, 0x85, 0x08 }, |
| 336 | { 999999999, 62500, 0x85, 0x88 }, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 337 | } |
| 338 | }; |
| 339 | EXPORT_SYMBOL(dvb_pll_tdhu2); |
| 340 | |
| 341 | /* Philips TUV1236D |
| 342 | * used in ATI HDTV Wonder |
| 343 | */ |
| 344 | struct dvb_pll_desc dvb_pll_tuv1236d = { |
| 345 | .name = "Philips TUV1236D", |
Kirk Lapray | 04a4592 | 2005-11-08 21:35:46 -0800 | [diff] [blame] | 346 | .min = 54000000, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 347 | .max = 864000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 348 | .iffreq= 44000000, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 349 | .count = 3, |
| 350 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 351 | { 157250000, 62500, 0xc6, 0x41 }, |
| 352 | { 454000000, 62500, 0xc6, 0x42 }, |
| 353 | { 999999999, 62500, 0xc6, 0x44 }, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 354 | }, |
| 355 | }; |
| 356 | EXPORT_SYMBOL(dvb_pll_tuv1236d); |
| 357 | |
Michael Krufky | d76a617 | 2006-01-23 17:11:06 -0200 | [diff] [blame] | 358 | /* Samsung TBMV30111IN / TBMV30712IN1 |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 359 | * used in Air2PC ATSC - 2nd generation (nxt2002) |
| 360 | */ |
Michael Krufky | 28f3d4b | 2006-01-23 17:11:07 -0200 | [diff] [blame] | 361 | struct dvb_pll_desc dvb_pll_samsung_tbmv = { |
| 362 | .name = "Samsung TBMV30111IN / TBMV30712IN1", |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 363 | .min = 54000000, |
| 364 | .max = 860000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 365 | .iffreq= 44000000, |
Michael Krufky | 17c37ef | 2006-01-15 19:04:04 -0200 | [diff] [blame] | 366 | .count = 6, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 367 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 368 | { 172000000, 166667, 0xb4, 0x01 }, |
| 369 | { 214000000, 166667, 0xb4, 0x02 }, |
| 370 | { 467000000, 166667, 0xbc, 0x02 }, |
| 371 | { 721000000, 166667, 0xbc, 0x08 }, |
| 372 | { 841000000, 166667, 0xf4, 0x08 }, |
| 373 | { 999999999, 166667, 0xfc, 0x02 }, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 374 | } |
| 375 | }; |
Michael Krufky | 28f3d4b | 2006-01-23 17:11:07 -0200 | [diff] [blame] | 376 | EXPORT_SYMBOL(dvb_pll_samsung_tbmv); |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 377 | |
Regis Prevot | f8bf134 | 2006-01-11 23:31:53 -0200 | [diff] [blame] | 378 | /* |
| 379 | * Philips SD1878 Tuner. |
| 380 | */ |
| 381 | struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261 = { |
| 382 | .name = "Philips SD1878", |
| 383 | .min = 950000, |
| 384 | .max = 2150000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 385 | .iffreq= 249, /* zero-IF, offset 249 is to round up */ |
Regis Prevot | f8bf134 | 2006-01-11 23:31:53 -0200 | [diff] [blame] | 386 | .count = 4, |
| 387 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 388 | { 1250000, 500, 0xc4, 0x00}, |
| 389 | { 1550000, 500, 0xc4, 0x40}, |
| 390 | { 2050000, 500, 0xc4, 0x80}, |
| 391 | { 2150000, 500, 0xc4, 0xc0}, |
Regis Prevot | f8bf134 | 2006-01-11 23:31:53 -0200 | [diff] [blame] | 392 | }, |
| 393 | }; |
| 394 | EXPORT_SYMBOL(dvb_pll_philips_sd1878_tda8261); |
| 395 | |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 396 | /* |
| 397 | * Philips TD1316 Tuner. |
| 398 | */ |
| 399 | static void td1316_bw(u8 *buf, u32 freq, int bandwidth) |
| 400 | { |
| 401 | u8 band; |
| 402 | |
| 403 | /* determine band */ |
| 404 | if (freq < 161000000) |
| 405 | band = 1; |
| 406 | else if (freq < 444000000) |
| 407 | band = 2; |
| 408 | else |
| 409 | band = 4; |
| 410 | |
| 411 | buf[3] |= band; |
| 412 | |
| 413 | /* setup PLL filter */ |
| 414 | if (bandwidth == BANDWIDTH_8_MHZ) |
| 415 | buf[3] |= 1 << 3; |
| 416 | } |
| 417 | |
| 418 | struct dvb_pll_desc dvb_pll_philips_td1316 = { |
| 419 | .name = "Philips TD1316", |
| 420 | .min = 87000000, |
| 421 | .max = 895000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 422 | .iffreq= 36166667, |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 423 | .setbw = td1316_bw, |
| 424 | .count = 9, |
| 425 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 426 | { 93834000, 166667, 0xca, 0x60}, |
| 427 | { 123834000, 166667, 0xca, 0xa0}, |
| 428 | { 163834000, 166667, 0xca, 0xc0}, |
| 429 | { 253834000, 166667, 0xca, 0x60}, |
| 430 | { 383834000, 166667, 0xca, 0xa0}, |
| 431 | { 443834000, 166667, 0xca, 0xc0}, |
| 432 | { 583834000, 166667, 0xca, 0x60}, |
| 433 | { 793834000, 166667, 0xca, 0xa0}, |
| 434 | { 858834000, 166667, 0xca, 0xe0}, |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 435 | }, |
| 436 | }; |
| 437 | EXPORT_SYMBOL(dvb_pll_philips_td1316); |
| 438 | |
Chris Pascoe | 780dfef | 2006-02-28 08:34:59 -0300 | [diff] [blame] | 439 | /* FE6600 used on DViCO Hybrid */ |
Michael Krufky | 91ae329 | 2006-03-01 00:04:42 -0300 | [diff] [blame] | 440 | struct dvb_pll_desc dvb_pll_thomson_fe6600 = { |
| 441 | .name = "Thomson FE6600", |
Chris Pascoe | 780dfef | 2006-02-28 08:34:59 -0300 | [diff] [blame] | 442 | .min = 44250000, |
| 443 | .max = 858000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 444 | .iffreq= 36125000, |
Chris Pascoe | 780dfef | 2006-02-28 08:34:59 -0300 | [diff] [blame] | 445 | .count = 4, |
| 446 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 447 | { 250000000, 166667, 0xb4, 0x12 }, |
| 448 | { 455000000, 166667, 0xfe, 0x11 }, |
| 449 | { 775500000, 166667, 0xbc, 0x18 }, |
| 450 | { 999999999, 166667, 0xf4, 0x18 }, |
Chris Pascoe | 780dfef | 2006-02-28 08:34:59 -0300 | [diff] [blame] | 451 | } |
| 452 | }; |
Michael Krufky | 91ae329 | 2006-03-01 00:04:42 -0300 | [diff] [blame] | 453 | EXPORT_SYMBOL(dvb_pll_thomson_fe6600); |
Chris Pascoe | 780dfef | 2006-02-28 08:34:59 -0300 | [diff] [blame] | 454 | |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 455 | struct dvb_pll_priv { |
| 456 | /* i2c details */ |
| 457 | int pll_i2c_address; |
| 458 | struct i2c_adapter *i2c; |
| 459 | |
| 460 | /* the PLL descriptor */ |
| 461 | struct dvb_pll_desc *pll_desc; |
| 462 | |
| 463 | /* cached frequency/bandwidth */ |
| 464 | u32 frequency; |
| 465 | u32 bandwidth; |
| 466 | }; |
| 467 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 468 | /* ----------------------------------------------------------- */ |
| 469 | /* code */ |
| 470 | |
| 471 | static int debug = 0; |
| 472 | module_param(debug, int, 0644); |
| 473 | MODULE_PARM_DESC(debug, "enable verbose debug messages"); |
| 474 | |
| 475 | int dvb_pll_configure(struct dvb_pll_desc *desc, u8 *buf, |
| 476 | u32 freq, int bandwidth) |
| 477 | { |
| 478 | u32 div; |
| 479 | int i; |
| 480 | |
| 481 | if (freq != 0 && (freq < desc->min || freq > desc->max)) |
| 482 | return -EINVAL; |
| 483 | |
| 484 | for (i = 0; i < desc->count; i++) { |
| 485 | if (freq > desc->entries[i].limit) |
| 486 | continue; |
| 487 | break; |
| 488 | } |
| 489 | if (debug) |
| 490 | printk("pll: %s: freq=%d bw=%d | i=%d/%d\n", |
| 491 | desc->name, freq, bandwidth, i, desc->count); |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 492 | if (i == desc->count) |
| 493 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 494 | |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 495 | div = (freq + desc->iffreq + desc->entries[i].stepsize/2) / |
Trent Piepho | 0fd17d6 | 2007-03-19 02:23:59 -0300 | [diff] [blame] | 496 | desc->entries[i].stepsize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 497 | buf[0] = div >> 8; |
| 498 | buf[1] = div & 0xff; |
Michael Krufky | ab66b22 | 2006-01-23 17:11:11 -0200 | [diff] [blame] | 499 | buf[2] = desc->entries[i].config; |
| 500 | buf[3] = desc->entries[i].cb; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 501 | |
| 502 | if (desc->setbw) |
Patrick Boettcher | 49dc82f | 2005-07-07 17:58:09 -0700 | [diff] [blame] | 503 | desc->setbw(buf, freq, bandwidth); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 504 | |
| 505 | if (debug) |
| 506 | printk("pll: %s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n", |
| 507 | desc->name, div, buf[0], buf[1], buf[2], buf[3]); |
| 508 | |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 509 | // calculate the frequency we set it to |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 510 | return (div * desc->entries[i].stepsize) - desc->iffreq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 511 | } |
| 512 | EXPORT_SYMBOL(dvb_pll_configure); |
| 513 | |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 514 | static int dvb_pll_release(struct dvb_frontend *fe) |
| 515 | { |
Michael Krufky | 2213918 | 2006-11-19 19:49:11 -0300 | [diff] [blame] | 516 | kfree(fe->tuner_priv); |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 517 | fe->tuner_priv = NULL; |
| 518 | return 0; |
| 519 | } |
| 520 | |
| 521 | static int dvb_pll_sleep(struct dvb_frontend *fe) |
| 522 | { |
| 523 | struct dvb_pll_priv *priv = fe->tuner_priv; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 524 | |
Chris Pascoe | c162dff | 2006-08-08 15:48:08 -0300 | [diff] [blame] | 525 | if (priv->i2c == NULL) |
| 526 | return -EINVAL; |
| 527 | |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame^] | 528 | if (priv->pll_desc->sleepdata) { |
| 529 | struct i2c_msg msg = { .flags = 0, |
| 530 | .addr = priv->pll_i2c_address, |
| 531 | .buf = priv->pll_desc->sleepdata + 1, |
| 532 | .len = priv->pll_desc->sleepdata[0] }; |
| 533 | |
| 534 | int result; |
| 535 | |
| 536 | if (fe->ops.i2c_gate_ctrl) |
| 537 | fe->ops.i2c_gate_ctrl(fe, 1); |
| 538 | if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) { |
| 539 | return result; |
| 540 | } |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 541 | return 0; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 542 | } |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame^] | 543 | /* Shouldn't be called when initdata is NULL, maybe BUG()? */ |
| 544 | return -EINVAL; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 545 | } |
| 546 | |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 547 | static int dvb_pll_set_params(struct dvb_frontend *fe, |
| 548 | struct dvb_frontend_parameters *params) |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 549 | { |
| 550 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 551 | u8 buf[4]; |
| 552 | struct i2c_msg msg = |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 553 | { .addr = priv->pll_i2c_address, .flags = 0, |
| 554 | .buf = buf, .len = sizeof(buf) }; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 555 | int result; |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 556 | u32 bandwidth = 0, frequency = 0; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 557 | |
| 558 | if (priv->i2c == NULL) |
| 559 | return -EINVAL; |
| 560 | |
| 561 | // DVBT bandwidth only just now |
Patrick Boettcher | dea7486 | 2006-05-14 05:01:31 -0300 | [diff] [blame] | 562 | if (fe->ops.info.type == FE_OFDM) { |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 563 | bandwidth = params->u.ofdm.bandwidth; |
| 564 | } |
| 565 | |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 566 | if ((result = dvb_pll_configure(priv->pll_desc, buf, |
| 567 | params->frequency, bandwidth)) < 0) |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 568 | return result; |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 569 | else |
| 570 | frequency = result; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 571 | |
Patrick Boettcher | dea7486 | 2006-05-14 05:01:31 -0300 | [diff] [blame] | 572 | if (fe->ops.i2c_gate_ctrl) |
| 573 | fe->ops.i2c_gate_ctrl(fe, 1); |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 574 | if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) { |
| 575 | return result; |
| 576 | } |
| 577 | |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 578 | priv->frequency = frequency; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 579 | priv->bandwidth = bandwidth; |
| 580 | |
| 581 | return 0; |
| 582 | } |
| 583 | |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 584 | static int dvb_pll_calc_regs(struct dvb_frontend *fe, |
| 585 | struct dvb_frontend_parameters *params, |
| 586 | u8 *buf, int buf_len) |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 587 | { |
| 588 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 589 | int result; |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 590 | u32 bandwidth = 0, frequency = 0; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 591 | |
| 592 | if (buf_len < 5) |
| 593 | return -EINVAL; |
| 594 | |
| 595 | // DVBT bandwidth only just now |
Patrick Boettcher | dea7486 | 2006-05-14 05:01:31 -0300 | [diff] [blame] | 596 | if (fe->ops.info.type == FE_OFDM) { |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 597 | bandwidth = params->u.ofdm.bandwidth; |
| 598 | } |
| 599 | |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 600 | if ((result = dvb_pll_configure(priv->pll_desc, buf+1, |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 601 | params->frequency, bandwidth)) < 0) |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 602 | return result; |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 603 | else |
| 604 | frequency = result; |
| 605 | |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 606 | buf[0] = priv->pll_i2c_address; |
| 607 | |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 608 | priv->frequency = frequency; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 609 | priv->bandwidth = bandwidth; |
| 610 | |
| 611 | return 5; |
| 612 | } |
| 613 | |
| 614 | static int dvb_pll_get_frequency(struct dvb_frontend *fe, u32 *frequency) |
| 615 | { |
| 616 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 617 | *frequency = priv->frequency; |
| 618 | return 0; |
| 619 | } |
| 620 | |
| 621 | static int dvb_pll_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth) |
| 622 | { |
| 623 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 624 | *bandwidth = priv->bandwidth; |
| 625 | return 0; |
| 626 | } |
| 627 | |
Trent Piepho | 26aed92 | 2007-04-27 12:31:29 -0300 | [diff] [blame] | 628 | static int dvb_pll_init(struct dvb_frontend *fe) |
| 629 | { |
| 630 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 631 | |
| 632 | if (priv->i2c == NULL) |
| 633 | return -EINVAL; |
| 634 | |
| 635 | if (priv->pll_desc->initdata) { |
| 636 | struct i2c_msg msg = { .flags = 0, |
| 637 | .addr = priv->pll_i2c_address, |
| 638 | .buf = priv->pll_desc->initdata + 1, |
| 639 | .len = priv->pll_desc->initdata[0] }; |
| 640 | |
| 641 | int result; |
| 642 | if (fe->ops.i2c_gate_ctrl) |
| 643 | fe->ops.i2c_gate_ctrl(fe, 1); |
| 644 | if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) { |
| 645 | return result; |
| 646 | } |
| 647 | return 0; |
| 648 | } |
| 649 | /* Shouldn't be called when initdata is NULL, maybe BUG()? */ |
| 650 | return -EINVAL; |
| 651 | } |
| 652 | |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 653 | static struct dvb_tuner_ops dvb_pll_tuner_ops = { |
| 654 | .release = dvb_pll_release, |
| 655 | .sleep = dvb_pll_sleep, |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame^] | 656 | .init = dvb_pll_init, |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 657 | .set_params = dvb_pll_set_params, |
Andrew de Quincey | bd4956b | 2006-04-18 21:38:49 -0300 | [diff] [blame] | 658 | .calc_regs = dvb_pll_calc_regs, |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 659 | .get_frequency = dvb_pll_get_frequency, |
| 660 | .get_bandwidth = dvb_pll_get_bandwidth, |
| 661 | }; |
| 662 | |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 663 | struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe, int pll_addr, |
| 664 | struct i2c_adapter *i2c, |
| 665 | struct dvb_pll_desc *desc) |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 666 | { |
Andrew de Quincey | 061b623 | 2006-07-10 03:34:14 -0300 | [diff] [blame] | 667 | u8 b1 [] = { 0 }; |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 668 | struct i2c_msg msg = { .addr = pll_addr, .flags = I2C_M_RD, |
| 669 | .buf = b1, .len = 1 }; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 670 | struct dvb_pll_priv *priv = NULL; |
Andrew de Quincey | 061b623 | 2006-07-10 03:34:14 -0300 | [diff] [blame] | 671 | int ret; |
| 672 | |
Andrew de Quincey | 55c05b6 | 2006-07-16 19:41:41 -0300 | [diff] [blame] | 673 | if (i2c != NULL) { |
| 674 | if (fe->ops.i2c_gate_ctrl) |
| 675 | fe->ops.i2c_gate_ctrl(fe, 1); |
Andrew de Quincey | 061b623 | 2006-07-10 03:34:14 -0300 | [diff] [blame] | 676 | |
Andrew de Quincey | 95faba2 | 2006-07-18 16:37:13 -0300 | [diff] [blame] | 677 | ret = i2c_transfer (i2c, &msg, 1); |
| 678 | if (ret != 1) |
Andrew de Quincey | 2bfe031 | 2006-08-08 09:10:08 -0300 | [diff] [blame] | 679 | return NULL; |
Andrew de Quincey | 55c05b6 | 2006-07-16 19:41:41 -0300 | [diff] [blame] | 680 | if (fe->ops.i2c_gate_ctrl) |
| 681 | fe->ops.i2c_gate_ctrl(fe, 0); |
| 682 | } |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 683 | |
| 684 | priv = kzalloc(sizeof(struct dvb_pll_priv), GFP_KERNEL); |
| 685 | if (priv == NULL) |
Andrew de Quincey | 2bfe031 | 2006-08-08 09:10:08 -0300 | [diff] [blame] | 686 | return NULL; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 687 | |
| 688 | priv->pll_i2c_address = pll_addr; |
| 689 | priv->i2c = i2c; |
| 690 | priv->pll_desc = desc; |
| 691 | |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 692 | memcpy(&fe->ops.tuner_ops, &dvb_pll_tuner_ops, |
| 693 | sizeof(struct dvb_tuner_ops)); |
| 694 | |
Trent Piepho | 982dd1b | 2007-04-27 12:31:27 -0300 | [diff] [blame] | 695 | strncpy(fe->ops.tuner_ops.info.name, desc->name, |
| 696 | sizeof(fe->ops.tuner_ops.info.name)); |
Patrick Boettcher | dea7486 | 2006-05-14 05:01:31 -0300 | [diff] [blame] | 697 | fe->ops.tuner_ops.info.frequency_min = desc->min; |
| 698 | fe->ops.tuner_ops.info.frequency_min = desc->max; |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame^] | 699 | if (!desc->initdata) |
| 700 | fe->ops.tuner_ops.init = NULL; |
| 701 | if (!desc->sleepdata) |
| 702 | fe->ops.tuner_ops.sleep = NULL; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 703 | |
| 704 | fe->tuner_priv = priv; |
Andrew de Quincey | 2bfe031 | 2006-08-08 09:10:08 -0300 | [diff] [blame] | 705 | return fe; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 706 | } |
| 707 | EXPORT_SYMBOL(dvb_pll_attach); |
| 708 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 709 | MODULE_DESCRIPTION("dvb pll library"); |
| 710 | MODULE_AUTHOR("Gerd Knorr"); |
| 711 | MODULE_LICENSE("GPL"); |