Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-versatile/core.c |
| 3 | * |
| 4 | * Copyright (C) 1999 - 2003 ARM Limited |
| 5 | * Copyright (C) 2000 Deep Blue Solutions Ltd |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 20 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | #include <linux/init.h> |
| 22 | #include <linux/device.h> |
| 23 | #include <linux/dma-mapping.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 24 | #include <linux/platform_device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | #include <linux/sysdev.h> |
| 26 | #include <linux/interrupt.h> |
Russell King | a62c80e | 2006-01-07 13:52:45 +0000 | [diff] [blame] | 27 | #include <linux/amba/bus.h> |
| 28 | #include <linux/amba/clcd.h> |
Russell King | bbeddc4 | 2009-07-05 22:43:01 +0100 | [diff] [blame] | 29 | #include <linux/amba/pl061.h> |
Linus Walleij | 6ef297f | 2009-09-22 14:29:36 +0100 | [diff] [blame] | 30 | #include <linux/amba/mmci.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 31 | #include <linux/io.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 32 | #include <linux/gfp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | |
Russell King | 71a06da | 2008-11-08 20:13:53 +0000 | [diff] [blame] | 34 | #include <asm/clkdev.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <asm/system.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | #include <asm/irq.h> |
| 37 | #include <asm/leds.h> |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 38 | #include <asm/hardware/arm_timer.h> |
Russell King | c5a0adb | 2010-01-16 20:16:10 +0000 | [diff] [blame] | 39 | #include <asm/hardware/icst.h> |
Russell King | fa0fe48 | 2006-01-13 21:30:48 +0000 | [diff] [blame] | 40 | #include <asm/hardware/vic.h> |
Russell King | dc5bc8f | 2006-07-10 16:33:54 +0100 | [diff] [blame] | 41 | #include <asm/mach-types.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 42 | |
| 43 | #include <asm/mach/arch.h> |
| 44 | #include <asm/mach/flash.h> |
| 45 | #include <asm/mach/irq.h> |
| 46 | #include <asm/mach/time.h> |
| 47 | #include <asm/mach/map.h> |
Russell King | f4b8b31 | 2010-01-14 12:48:06 +0000 | [diff] [blame] | 48 | #include <mach/clkdev.h> |
Russell King | a285edc | 2010-01-14 19:59:37 +0000 | [diff] [blame] | 49 | #include <mach/hardware.h> |
| 50 | #include <mach/platform.h> |
Russell King | e388771 | 2010-01-14 13:30:16 +0000 | [diff] [blame] | 51 | #include <plat/timer-sp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | |
| 53 | #include "core.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | |
| 55 | /* |
| 56 | * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx |
| 57 | * is the (PA >> 12). |
| 58 | * |
| 59 | * Setup a VA for the Versatile Vectored Interrupt Controller. |
| 60 | */ |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 61 | #define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE) |
| 62 | #define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | static void sic_mask_irq(unsigned int irq) |
| 65 | { |
| 66 | irq -= IRQ_SIC_START; |
| 67 | writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); |
| 68 | } |
| 69 | |
| 70 | static void sic_unmask_irq(unsigned int irq) |
| 71 | { |
| 72 | irq -= IRQ_SIC_START; |
| 73 | writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_SET); |
| 74 | } |
| 75 | |
David Brownell | 38c677c | 2006-08-01 22:26:25 +0100 | [diff] [blame] | 76 | static struct irq_chip sic_chip = { |
| 77 | .name = "SIC", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | .ack = sic_mask_irq, |
| 79 | .mask = sic_mask_irq, |
| 80 | .unmask = sic_unmask_irq, |
| 81 | }; |
| 82 | |
| 83 | static void |
Russell King | 10dd5ce | 2006-11-23 11:41:32 +0000 | [diff] [blame] | 84 | sic_handle_irq(unsigned int irq, struct irq_desc *desc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | { |
| 86 | unsigned long status = readl(VA_SIC_BASE + SIC_IRQ_STATUS); |
| 87 | |
| 88 | if (status == 0) { |
Linus Torvalds | 0cd61b6 | 2006-10-06 10:53:39 -0700 | [diff] [blame] | 89 | do_bad_IRQ(irq, desc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 90 | return; |
| 91 | } |
| 92 | |
| 93 | do { |
| 94 | irq = ffs(status) - 1; |
| 95 | status &= ~(1 << irq); |
| 96 | |
| 97 | irq += IRQ_SIC_START; |
| 98 | |
Dmitry Baryshkov | d8aa025 | 2008-10-09 13:36:24 +0100 | [diff] [blame] | 99 | generic_handle_irq(irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 100 | } while (status); |
| 101 | } |
| 102 | |
| 103 | #if 1 |
| 104 | #define IRQ_MMCI0A IRQ_VICSOURCE22 |
| 105 | #define IRQ_AACI IRQ_VICSOURCE24 |
| 106 | #define IRQ_ETH IRQ_VICSOURCE25 |
| 107 | #define PIC_MASK 0xFFD00000 |
| 108 | #else |
| 109 | #define IRQ_MMCI0A IRQ_SIC_MMCI0A |
| 110 | #define IRQ_AACI IRQ_SIC_AACI |
| 111 | #define IRQ_ETH IRQ_SIC_ETH |
| 112 | #define PIC_MASK 0 |
| 113 | #endif |
| 114 | |
| 115 | void __init versatile_init_irq(void) |
| 116 | { |
Russell King | fa0fe48 | 2006-01-13 21:30:48 +0000 | [diff] [blame] | 117 | unsigned int i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 118 | |
Ben Dooks | c07f87f | 2009-03-24 15:30:07 +0000 | [diff] [blame] | 119 | vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 120 | |
Russell King | 56f1319e | 2006-06-10 12:42:12 +0100 | [diff] [blame] | 121 | set_irq_chained_handler(IRQ_VICSOURCE31, sic_handle_irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 122 | |
| 123 | /* Do second interrupt controller */ |
| 124 | writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); |
| 125 | |
| 126 | for (i = IRQ_SIC_START; i <= IRQ_SIC_END; i++) { |
| 127 | if ((PIC_MASK & (1 << (i - IRQ_SIC_START))) == 0) { |
| 128 | set_irq_chip(i, &sic_chip); |
Russell King | 10dd5ce | 2006-11-23 11:41:32 +0000 | [diff] [blame] | 129 | set_irq_handler(i, handle_level_irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); |
| 131 | } |
| 132 | } |
| 133 | |
| 134 | /* |
| 135 | * Interrupts on secondary controller from 0 to 8 are routed to |
| 136 | * source 31 on PIC. |
| 137 | * Interrupts from 21 to 31 are routed directly to the VIC on |
| 138 | * the corresponding number on primary controller. This is controlled |
| 139 | * by setting PIC_ENABLEx. |
| 140 | */ |
| 141 | writel(PIC_MASK, VA_SIC_BASE + SIC_INT_PIC_ENABLE); |
| 142 | } |
| 143 | |
| 144 | static struct map_desc versatile_io_desc[] __initdata = { |
Deepak Saxena | 1311521 | 2005-10-28 15:19:06 +0100 | [diff] [blame] | 145 | { |
| 146 | .virtual = IO_ADDRESS(VERSATILE_SYS_BASE), |
| 147 | .pfn = __phys_to_pfn(VERSATILE_SYS_BASE), |
| 148 | .length = SZ_4K, |
| 149 | .type = MT_DEVICE |
| 150 | }, { |
| 151 | .virtual = IO_ADDRESS(VERSATILE_SIC_BASE), |
| 152 | .pfn = __phys_to_pfn(VERSATILE_SIC_BASE), |
| 153 | .length = SZ_4K, |
| 154 | .type = MT_DEVICE |
| 155 | }, { |
| 156 | .virtual = IO_ADDRESS(VERSATILE_VIC_BASE), |
| 157 | .pfn = __phys_to_pfn(VERSATILE_VIC_BASE), |
| 158 | .length = SZ_4K, |
| 159 | .type = MT_DEVICE |
| 160 | }, { |
| 161 | .virtual = IO_ADDRESS(VERSATILE_SCTL_BASE), |
| 162 | .pfn = __phys_to_pfn(VERSATILE_SCTL_BASE), |
| 163 | .length = SZ_4K * 9, |
| 164 | .type = MT_DEVICE |
| 165 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 166 | #ifdef CONFIG_MACH_VERSATILE_AB |
Deepak Saxena | 1311521 | 2005-10-28 15:19:06 +0100 | [diff] [blame] | 167 | { |
| 168 | .virtual = IO_ADDRESS(VERSATILE_GPIO0_BASE), |
| 169 | .pfn = __phys_to_pfn(VERSATILE_GPIO0_BASE), |
| 170 | .length = SZ_4K, |
| 171 | .type = MT_DEVICE |
| 172 | }, { |
| 173 | .virtual = IO_ADDRESS(VERSATILE_IB2_BASE), |
| 174 | .pfn = __phys_to_pfn(VERSATILE_IB2_BASE), |
| 175 | .length = SZ_64M, |
| 176 | .type = MT_DEVICE |
| 177 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | #endif |
| 179 | #ifdef CONFIG_DEBUG_LL |
Deepak Saxena | 1311521 | 2005-10-28 15:19:06 +0100 | [diff] [blame] | 180 | { |
| 181 | .virtual = IO_ADDRESS(VERSATILE_UART0_BASE), |
| 182 | .pfn = __phys_to_pfn(VERSATILE_UART0_BASE), |
| 183 | .length = SZ_4K, |
| 184 | .type = MT_DEVICE |
| 185 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 186 | #endif |
Catalin Marinas | c0da085 | 2005-06-20 18:51:06 +0100 | [diff] [blame] | 187 | #ifdef CONFIG_PCI |
Deepak Saxena | 1311521 | 2005-10-28 15:19:06 +0100 | [diff] [blame] | 188 | { |
| 189 | .virtual = IO_ADDRESS(VERSATILE_PCI_CORE_BASE), |
| 190 | .pfn = __phys_to_pfn(VERSATILE_PCI_CORE_BASE), |
| 191 | .length = SZ_4K, |
| 192 | .type = MT_DEVICE |
| 193 | }, { |
Al Viro | 399ad77 | 2006-10-11 17:22:34 +0100 | [diff] [blame] | 194 | .virtual = (unsigned long)VERSATILE_PCI_VIRT_BASE, |
Deepak Saxena | 1311521 | 2005-10-28 15:19:06 +0100 | [diff] [blame] | 195 | .pfn = __phys_to_pfn(VERSATILE_PCI_BASE), |
| 196 | .length = VERSATILE_PCI_BASE_SIZE, |
| 197 | .type = MT_DEVICE |
| 198 | }, { |
Al Viro | 399ad77 | 2006-10-11 17:22:34 +0100 | [diff] [blame] | 199 | .virtual = (unsigned long)VERSATILE_PCI_CFG_VIRT_BASE, |
Deepak Saxena | 1311521 | 2005-10-28 15:19:06 +0100 | [diff] [blame] | 200 | .pfn = __phys_to_pfn(VERSATILE_PCI_CFG_BASE), |
| 201 | .length = VERSATILE_PCI_CFG_BASE_SIZE, |
| 202 | .type = MT_DEVICE |
| 203 | }, |
Catalin Marinas | c0da085 | 2005-06-20 18:51:06 +0100 | [diff] [blame] | 204 | #if 0 |
Deepak Saxena | 1311521 | 2005-10-28 15:19:06 +0100 | [diff] [blame] | 205 | { |
| 206 | .virtual = VERSATILE_PCI_VIRT_MEM_BASE0, |
| 207 | .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE0), |
| 208 | .length = SZ_16M, |
| 209 | .type = MT_DEVICE |
| 210 | }, { |
| 211 | .virtual = VERSATILE_PCI_VIRT_MEM_BASE1, |
| 212 | .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE1), |
| 213 | .length = SZ_16M, |
| 214 | .type = MT_DEVICE |
| 215 | }, { |
| 216 | .virtual = VERSATILE_PCI_VIRT_MEM_BASE2, |
| 217 | .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE2), |
| 218 | .length = SZ_16M, |
| 219 | .type = MT_DEVICE |
| 220 | }, |
Catalin Marinas | c0da085 | 2005-06-20 18:51:06 +0100 | [diff] [blame] | 221 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 222 | #endif |
| 223 | }; |
| 224 | |
| 225 | void __init versatile_map_io(void) |
| 226 | { |
| 227 | iotable_init(versatile_io_desc, ARRAY_SIZE(versatile_io_desc)); |
| 228 | } |
| 229 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 231 | #define VERSATILE_FLASHCTRL (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_FLASH_OFFSET) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 232 | |
| 233 | static int versatile_flash_init(void) |
| 234 | { |
| 235 | u32 val; |
| 236 | |
| 237 | val = __raw_readl(VERSATILE_FLASHCTRL); |
| 238 | val &= ~VERSATILE_FLASHPROG_FLVPPEN; |
| 239 | __raw_writel(val, VERSATILE_FLASHCTRL); |
| 240 | |
| 241 | return 0; |
| 242 | } |
| 243 | |
| 244 | static void versatile_flash_exit(void) |
| 245 | { |
| 246 | u32 val; |
| 247 | |
| 248 | val = __raw_readl(VERSATILE_FLASHCTRL); |
| 249 | val &= ~VERSATILE_FLASHPROG_FLVPPEN; |
| 250 | __raw_writel(val, VERSATILE_FLASHCTRL); |
| 251 | } |
| 252 | |
| 253 | static void versatile_flash_set_vpp(int on) |
| 254 | { |
| 255 | u32 val; |
| 256 | |
| 257 | val = __raw_readl(VERSATILE_FLASHCTRL); |
| 258 | if (on) |
| 259 | val |= VERSATILE_FLASHPROG_FLVPPEN; |
| 260 | else |
| 261 | val &= ~VERSATILE_FLASHPROG_FLVPPEN; |
| 262 | __raw_writel(val, VERSATILE_FLASHCTRL); |
| 263 | } |
| 264 | |
| 265 | static struct flash_platform_data versatile_flash_data = { |
| 266 | .map_name = "cfi_probe", |
| 267 | .width = 4, |
| 268 | .init = versatile_flash_init, |
| 269 | .exit = versatile_flash_exit, |
| 270 | .set_vpp = versatile_flash_set_vpp, |
| 271 | }; |
| 272 | |
| 273 | static struct resource versatile_flash_resource = { |
| 274 | .start = VERSATILE_FLASH_BASE, |
Yoav Steinberg | a0c5a64 | 2006-08-13 14:17:12 +0100 | [diff] [blame] | 275 | .end = VERSATILE_FLASH_BASE + VERSATILE_FLASH_SIZE - 1, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 276 | .flags = IORESOURCE_MEM, |
| 277 | }; |
| 278 | |
| 279 | static struct platform_device versatile_flash_device = { |
| 280 | .name = "armflash", |
| 281 | .id = 0, |
| 282 | .dev = { |
| 283 | .platform_data = &versatile_flash_data, |
| 284 | }, |
| 285 | .num_resources = 1, |
| 286 | .resource = &versatile_flash_resource, |
| 287 | }; |
| 288 | |
| 289 | static struct resource smc91x_resources[] = { |
| 290 | [0] = { |
| 291 | .start = VERSATILE_ETH_BASE, |
| 292 | .end = VERSATILE_ETH_BASE + SZ_64K - 1, |
| 293 | .flags = IORESOURCE_MEM, |
| 294 | }, |
| 295 | [1] = { |
| 296 | .start = IRQ_ETH, |
| 297 | .end = IRQ_ETH, |
| 298 | .flags = IORESOURCE_IRQ, |
| 299 | }, |
| 300 | }; |
| 301 | |
| 302 | static struct platform_device smc91x_device = { |
| 303 | .name = "smc91x", |
| 304 | .id = 0, |
| 305 | .num_resources = ARRAY_SIZE(smc91x_resources), |
| 306 | .resource = smc91x_resources, |
| 307 | }; |
| 308 | |
Russell King | 6b65cd7 | 2006-12-10 21:21:32 +0100 | [diff] [blame] | 309 | static struct resource versatile_i2c_resource = { |
| 310 | .start = VERSATILE_I2C_BASE, |
| 311 | .end = VERSATILE_I2C_BASE + SZ_4K - 1, |
| 312 | .flags = IORESOURCE_MEM, |
| 313 | }; |
| 314 | |
| 315 | static struct platform_device versatile_i2c_device = { |
| 316 | .name = "versatile-i2c", |
Catalin Marinas | 533ad5e | 2009-02-12 15:58:20 +0100 | [diff] [blame] | 317 | .id = 0, |
Russell King | 6b65cd7 | 2006-12-10 21:21:32 +0100 | [diff] [blame] | 318 | .num_resources = 1, |
| 319 | .resource = &versatile_i2c_resource, |
| 320 | }; |
| 321 | |
Catalin Marinas | 533ad5e | 2009-02-12 15:58:20 +0100 | [diff] [blame] | 322 | static struct i2c_board_info versatile_i2c_board_info[] = { |
| 323 | { |
Russell King | 64e8be6 | 2009-07-18 15:51:55 +0100 | [diff] [blame] | 324 | I2C_BOARD_INFO("ds1338", 0xd0 >> 1), |
Catalin Marinas | 533ad5e | 2009-02-12 15:58:20 +0100 | [diff] [blame] | 325 | }, |
| 326 | }; |
| 327 | |
| 328 | static int __init versatile_i2c_init(void) |
| 329 | { |
| 330 | return i2c_register_board_info(0, versatile_i2c_board_info, |
| 331 | ARRAY_SIZE(versatile_i2c_board_info)); |
| 332 | } |
| 333 | arch_initcall(versatile_i2c_init); |
| 334 | |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 335 | #define VERSATILE_SYSMCI (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_MCI_OFFSET) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 336 | |
| 337 | unsigned int mmc_status(struct device *dev) |
| 338 | { |
| 339 | struct amba_device *adev = container_of(dev, struct amba_device, dev); |
| 340 | u32 mask; |
| 341 | |
| 342 | if (adev->res.start == VERSATILE_MMCI0_BASE) |
| 343 | mask = 1; |
| 344 | else |
| 345 | mask = 2; |
| 346 | |
| 347 | return readl(VERSATILE_SYSMCI) & mask; |
| 348 | } |
| 349 | |
Linus Walleij | 6ef297f | 2009-09-22 14:29:36 +0100 | [diff] [blame] | 350 | static struct mmci_platform_data mmc0_plat_data = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 351 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
| 352 | .status = mmc_status, |
Russell King | 7fb2bbf | 2009-07-09 15:15:12 +0100 | [diff] [blame] | 353 | .gpio_wp = -1, |
| 354 | .gpio_cd = -1, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 355 | }; |
| 356 | |
| 357 | /* |
| 358 | * Clock handling |
| 359 | */ |
Russell King | 39c0cb0 | 2010-01-16 16:27:28 +0000 | [diff] [blame] | 360 | static const struct icst_params versatile_oscvco_params = { |
Russell King | 64fceb1 | 2010-01-16 17:28:44 +0000 | [diff] [blame] | 361 | .ref = 24000000, |
Russell King | 4de2edb | 2010-01-16 18:08:47 +0000 | [diff] [blame] | 362 | .vco_max = ICST307_VCO_MAX, |
Russell King | e73a46a | 2010-01-16 19:49:39 +0000 | [diff] [blame] | 363 | .vco_min = ICST307_VCO_MIN, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 364 | .vd_min = 4 + 8, |
| 365 | .vd_max = 511 + 8, |
| 366 | .rd_min = 1 + 2, |
| 367 | .rd_max = 127 + 2, |
Russell King | 232eaf7 | 2010-01-16 19:46:19 +0000 | [diff] [blame] | 368 | .s2div = icst307_s2div, |
| 369 | .idx2s = icst307_idx2s, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | }; |
| 371 | |
Russell King | 39c0cb0 | 2010-01-16 16:27:28 +0000 | [diff] [blame] | 372 | static void versatile_oscvco_set(struct clk *clk, struct icst_vco vco) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 373 | { |
Russell King | d1914c7 | 2010-01-14 20:09:34 +0000 | [diff] [blame] | 374 | void __iomem *sys_lock = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LOCK_OFFSET; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 375 | u32 val; |
| 376 | |
Russell King | d1914c7 | 2010-01-14 20:09:34 +0000 | [diff] [blame] | 377 | val = readl(clk->vcoreg) & ~0x7ffff; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 378 | val |= vco.v | (vco.r << 9) | (vco.s << 16); |
| 379 | |
| 380 | writel(0xa05f, sys_lock); |
Russell King | d1914c7 | 2010-01-14 20:09:34 +0000 | [diff] [blame] | 381 | writel(val, clk->vcoreg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 382 | writel(0, sys_lock); |
| 383 | } |
| 384 | |
Russell King | 9bf5b2e | 2010-03-01 16:18:39 +0000 | [diff] [blame] | 385 | static const struct clk_ops osc4_clk_ops = { |
| 386 | .round = icst_clk_round, |
| 387 | .set = icst_clk_set, |
Russell King | 71a06da | 2008-11-08 20:13:53 +0000 | [diff] [blame] | 388 | .setvco = versatile_oscvco_set, |
| 389 | }; |
| 390 | |
Russell King | 9bf5b2e | 2010-03-01 16:18:39 +0000 | [diff] [blame] | 391 | static struct clk osc4_clk = { |
| 392 | .ops = &osc4_clk_ops, |
| 393 | .params = &versatile_oscvco_params, |
| 394 | }; |
| 395 | |
Russell King | 71a06da | 2008-11-08 20:13:53 +0000 | [diff] [blame] | 396 | /* |
| 397 | * These are fixed clocks. |
| 398 | */ |
| 399 | static struct clk ref24_clk = { |
| 400 | .rate = 24000000, |
| 401 | }; |
| 402 | |
Rabin Vincent | 982db66 | 2009-05-18 17:29:30 +0100 | [diff] [blame] | 403 | static struct clk_lookup lookups[] = { |
Russell King | 71a06da | 2008-11-08 20:13:53 +0000 | [diff] [blame] | 404 | { /* UART0 */ |
| 405 | .dev_id = "dev:f1", |
| 406 | .clk = &ref24_clk, |
| 407 | }, { /* UART1 */ |
| 408 | .dev_id = "dev:f2", |
| 409 | .clk = &ref24_clk, |
| 410 | }, { /* UART2 */ |
| 411 | .dev_id = "dev:f3", |
| 412 | .clk = &ref24_clk, |
| 413 | }, { /* UART3 */ |
| 414 | .dev_id = "fpga:09", |
| 415 | .clk = &ref24_clk, |
| 416 | }, { /* KMI0 */ |
| 417 | .dev_id = "fpga:06", |
| 418 | .clk = &ref24_clk, |
| 419 | }, { /* KMI1 */ |
| 420 | .dev_id = "fpga:07", |
| 421 | .clk = &ref24_clk, |
| 422 | }, { /* MMC0 */ |
| 423 | .dev_id = "fpga:05", |
| 424 | .clk = &ref24_clk, |
| 425 | }, { /* MMC1 */ |
| 426 | .dev_id = "fpga:0b", |
| 427 | .clk = &ref24_clk, |
| 428 | }, { /* CLCD */ |
| 429 | .dev_id = "dev:20", |
| 430 | .clk = &osc4_clk, |
| 431 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 432 | }; |
| 433 | |
| 434 | /* |
| 435 | * CLCD support. |
| 436 | */ |
| 437 | #define SYS_CLCD_MODE_MASK (3 << 0) |
| 438 | #define SYS_CLCD_MODE_888 (0 << 0) |
| 439 | #define SYS_CLCD_MODE_5551 (1 << 0) |
| 440 | #define SYS_CLCD_MODE_565_RLSB (2 << 0) |
| 441 | #define SYS_CLCD_MODE_565_BLSB (3 << 0) |
| 442 | #define SYS_CLCD_NLCDIOON (1 << 2) |
| 443 | #define SYS_CLCD_VDDPOSSWITCH (1 << 3) |
| 444 | #define SYS_CLCD_PWR3V5SWITCH (1 << 4) |
| 445 | #define SYS_CLCD_ID_MASK (0x1f << 8) |
| 446 | #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8) |
| 447 | #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8) |
| 448 | #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8) |
| 449 | #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) |
| 450 | #define SYS_CLCD_ID_VGA (0x1f << 8) |
| 451 | |
| 452 | static struct clcd_panel vga = { |
| 453 | .mode = { |
| 454 | .name = "VGA", |
| 455 | .refresh = 60, |
| 456 | .xres = 640, |
| 457 | .yres = 480, |
| 458 | .pixclock = 39721, |
| 459 | .left_margin = 40, |
| 460 | .right_margin = 24, |
| 461 | .upper_margin = 32, |
| 462 | .lower_margin = 11, |
| 463 | .hsync_len = 96, |
| 464 | .vsync_len = 2, |
| 465 | .sync = 0, |
| 466 | .vmode = FB_VMODE_NONINTERLACED, |
| 467 | }, |
| 468 | .width = -1, |
| 469 | .height = -1, |
| 470 | .tim2 = TIM2_BCD | TIM2_IPC, |
| 471 | .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), |
| 472 | .bpp = 16, |
| 473 | }; |
| 474 | |
| 475 | static struct clcd_panel sanyo_3_8_in = { |
| 476 | .mode = { |
| 477 | .name = "Sanyo QVGA", |
| 478 | .refresh = 116, |
| 479 | .xres = 320, |
| 480 | .yres = 240, |
| 481 | .pixclock = 100000, |
| 482 | .left_margin = 6, |
| 483 | .right_margin = 6, |
| 484 | .upper_margin = 5, |
| 485 | .lower_margin = 5, |
| 486 | .hsync_len = 6, |
| 487 | .vsync_len = 6, |
| 488 | .sync = 0, |
| 489 | .vmode = FB_VMODE_NONINTERLACED, |
| 490 | }, |
| 491 | .width = -1, |
| 492 | .height = -1, |
| 493 | .tim2 = TIM2_BCD, |
| 494 | .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), |
| 495 | .bpp = 16, |
| 496 | }; |
| 497 | |
| 498 | static struct clcd_panel sanyo_2_5_in = { |
| 499 | .mode = { |
| 500 | .name = "Sanyo QVGA Portrait", |
| 501 | .refresh = 116, |
| 502 | .xres = 240, |
| 503 | .yres = 320, |
| 504 | .pixclock = 100000, |
| 505 | .left_margin = 20, |
| 506 | .right_margin = 10, |
| 507 | .upper_margin = 2, |
| 508 | .lower_margin = 2, |
| 509 | .hsync_len = 10, |
| 510 | .vsync_len = 2, |
| 511 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| 512 | .vmode = FB_VMODE_NONINTERLACED, |
| 513 | }, |
| 514 | .width = -1, |
| 515 | .height = -1, |
| 516 | .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC, |
| 517 | .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), |
| 518 | .bpp = 16, |
| 519 | }; |
| 520 | |
| 521 | static struct clcd_panel epson_2_2_in = { |
| 522 | .mode = { |
| 523 | .name = "Epson QCIF", |
| 524 | .refresh = 390, |
| 525 | .xres = 176, |
| 526 | .yres = 220, |
| 527 | .pixclock = 62500, |
| 528 | .left_margin = 3, |
| 529 | .right_margin = 2, |
| 530 | .upper_margin = 1, |
| 531 | .lower_margin = 0, |
| 532 | .hsync_len = 3, |
| 533 | .vsync_len = 2, |
| 534 | .sync = 0, |
| 535 | .vmode = FB_VMODE_NONINTERLACED, |
| 536 | }, |
| 537 | .width = -1, |
| 538 | .height = -1, |
| 539 | .tim2 = TIM2_BCD | TIM2_IPC, |
| 540 | .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), |
| 541 | .bpp = 16, |
| 542 | }; |
| 543 | |
| 544 | /* |
| 545 | * Detect which LCD panel is connected, and return the appropriate |
| 546 | * clcd_panel structure. Note: we do not have any information on |
| 547 | * the required timings for the 8.4in panel, so we presently assume |
| 548 | * VGA timings. |
| 549 | */ |
| 550 | static struct clcd_panel *versatile_clcd_panel(void) |
| 551 | { |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 552 | void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 553 | struct clcd_panel *panel = &vga; |
| 554 | u32 val; |
| 555 | |
| 556 | val = readl(sys_clcd) & SYS_CLCD_ID_MASK; |
| 557 | if (val == SYS_CLCD_ID_SANYO_3_8) |
| 558 | panel = &sanyo_3_8_in; |
| 559 | else if (val == SYS_CLCD_ID_SANYO_2_5) |
| 560 | panel = &sanyo_2_5_in; |
| 561 | else if (val == SYS_CLCD_ID_EPSON_2_2) |
| 562 | panel = &epson_2_2_in; |
| 563 | else if (val == SYS_CLCD_ID_VGA) |
| 564 | panel = &vga; |
| 565 | else { |
| 566 | printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n", |
| 567 | val); |
| 568 | panel = &vga; |
| 569 | } |
| 570 | |
| 571 | return panel; |
| 572 | } |
| 573 | |
| 574 | /* |
| 575 | * Disable all display connectors on the interface module. |
| 576 | */ |
| 577 | static void versatile_clcd_disable(struct clcd_fb *fb) |
| 578 | { |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 579 | void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 580 | u32 val; |
| 581 | |
| 582 | val = readl(sys_clcd); |
| 583 | val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH; |
| 584 | writel(val, sys_clcd); |
| 585 | |
| 586 | #ifdef CONFIG_MACH_VERSATILE_AB |
| 587 | /* |
| 588 | * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light off |
| 589 | */ |
Russell King | dc5bc8f | 2006-07-10 16:33:54 +0100 | [diff] [blame] | 590 | if (machine_is_versatile_ab() && fb->panel == &sanyo_2_5_in) { |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 591 | void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 592 | unsigned long ctrl; |
| 593 | |
| 594 | ctrl = readl(versatile_ib2_ctrl); |
| 595 | ctrl &= ~0x01; |
| 596 | writel(ctrl, versatile_ib2_ctrl); |
| 597 | } |
| 598 | #endif |
| 599 | } |
| 600 | |
| 601 | /* |
| 602 | * Enable the relevant connector on the interface module. |
| 603 | */ |
| 604 | static void versatile_clcd_enable(struct clcd_fb *fb) |
| 605 | { |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 606 | void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 607 | u32 val; |
| 608 | |
| 609 | val = readl(sys_clcd); |
| 610 | val &= ~SYS_CLCD_MODE_MASK; |
| 611 | |
| 612 | switch (fb->fb.var.green.length) { |
| 613 | case 5: |
| 614 | val |= SYS_CLCD_MODE_5551; |
| 615 | break; |
| 616 | case 6: |
Catalin Marinas | 90ef713 | 2005-06-16 18:01:11 +0100 | [diff] [blame] | 617 | val |= SYS_CLCD_MODE_565_RLSB; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 618 | break; |
| 619 | case 8: |
| 620 | val |= SYS_CLCD_MODE_888; |
| 621 | break; |
| 622 | } |
| 623 | |
| 624 | /* |
| 625 | * Set the MUX |
| 626 | */ |
| 627 | writel(val, sys_clcd); |
| 628 | |
| 629 | /* |
| 630 | * And now enable the PSUs |
| 631 | */ |
| 632 | val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH; |
| 633 | writel(val, sys_clcd); |
| 634 | |
| 635 | #ifdef CONFIG_MACH_VERSATILE_AB |
| 636 | /* |
| 637 | * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light on |
| 638 | */ |
Russell King | dc5bc8f | 2006-07-10 16:33:54 +0100 | [diff] [blame] | 639 | if (machine_is_versatile_ab() && fb->panel == &sanyo_2_5_in) { |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 640 | void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 641 | unsigned long ctrl; |
| 642 | |
| 643 | ctrl = readl(versatile_ib2_ctrl); |
| 644 | ctrl |= 0x01; |
| 645 | writel(ctrl, versatile_ib2_ctrl); |
| 646 | } |
| 647 | #endif |
| 648 | } |
| 649 | |
| 650 | static unsigned long framesize = SZ_1M; |
| 651 | |
| 652 | static int versatile_clcd_setup(struct clcd_fb *fb) |
| 653 | { |
| 654 | dma_addr_t dma; |
| 655 | |
| 656 | fb->panel = versatile_clcd_panel(); |
| 657 | |
| 658 | fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize, |
| 659 | &dma, GFP_KERNEL); |
| 660 | if (!fb->fb.screen_base) { |
| 661 | printk(KERN_ERR "CLCD: unable to map framebuffer\n"); |
| 662 | return -ENOMEM; |
| 663 | } |
| 664 | |
| 665 | fb->fb.fix.smem_start = dma; |
| 666 | fb->fb.fix.smem_len = framesize; |
| 667 | |
| 668 | return 0; |
| 669 | } |
| 670 | |
| 671 | static int versatile_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) |
| 672 | { |
| 673 | return dma_mmap_writecombine(&fb->dev->dev, vma, |
| 674 | fb->fb.screen_base, |
| 675 | fb->fb.fix.smem_start, |
| 676 | fb->fb.fix.smem_len); |
| 677 | } |
| 678 | |
| 679 | static void versatile_clcd_remove(struct clcd_fb *fb) |
| 680 | { |
| 681 | dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len, |
| 682 | fb->fb.screen_base, fb->fb.fix.smem_start); |
| 683 | } |
| 684 | |
| 685 | static struct clcd_board clcd_plat_data = { |
| 686 | .name = "Versatile", |
| 687 | .check = clcdfb_check, |
| 688 | .decode = clcdfb_decode, |
| 689 | .disable = versatile_clcd_disable, |
| 690 | .enable = versatile_clcd_enable, |
| 691 | .setup = versatile_clcd_setup, |
| 692 | .mmap = versatile_clcd_mmap, |
| 693 | .remove = versatile_clcd_remove, |
| 694 | }; |
| 695 | |
Russell King | bbeddc4 | 2009-07-05 22:43:01 +0100 | [diff] [blame] | 696 | static struct pl061_platform_data gpio0_plat_data = { |
| 697 | .gpio_base = 0, |
| 698 | .irq_base = IRQ_GPIO0_START, |
| 699 | }; |
| 700 | |
| 701 | static struct pl061_platform_data gpio1_plat_data = { |
| 702 | .gpio_base = 8, |
| 703 | .irq_base = IRQ_GPIO1_START, |
| 704 | }; |
| 705 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 706 | #define AACI_IRQ { IRQ_AACI, NO_IRQ } |
| 707 | #define AACI_DMA { 0x80, 0x81 } |
| 708 | #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } |
| 709 | #define MMCI0_DMA { 0x84, 0 } |
| 710 | #define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ } |
| 711 | #define KMI0_DMA { 0, 0 } |
| 712 | #define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ } |
| 713 | #define KMI1_DMA { 0, 0 } |
| 714 | |
| 715 | /* |
| 716 | * These devices are connected directly to the multi-layer AHB switch |
| 717 | */ |
| 718 | #define SMC_IRQ { NO_IRQ, NO_IRQ } |
| 719 | #define SMC_DMA { 0, 0 } |
| 720 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } |
| 721 | #define MPMC_DMA { 0, 0 } |
| 722 | #define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } |
| 723 | #define CLCD_DMA { 0, 0 } |
| 724 | #define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } |
| 725 | #define DMAC_DMA { 0, 0 } |
| 726 | |
| 727 | /* |
| 728 | * These devices are connected via the core APB bridge |
| 729 | */ |
| 730 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } |
| 731 | #define SCTL_DMA { 0, 0 } |
| 732 | #define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } |
| 733 | #define WATCHDOG_DMA { 0, 0 } |
| 734 | #define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } |
| 735 | #define GPIO0_DMA { 0, 0 } |
| 736 | #define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } |
| 737 | #define GPIO1_DMA { 0, 0 } |
| 738 | #define RTC_IRQ { IRQ_RTCINT, NO_IRQ } |
| 739 | #define RTC_DMA { 0, 0 } |
| 740 | |
| 741 | /* |
| 742 | * These devices are connected via the DMA APB bridge |
| 743 | */ |
| 744 | #define SCI_IRQ { IRQ_SCIINT, NO_IRQ } |
| 745 | #define SCI_DMA { 7, 6 } |
| 746 | #define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } |
| 747 | #define UART0_DMA { 15, 14 } |
| 748 | #define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } |
| 749 | #define UART1_DMA { 13, 12 } |
| 750 | #define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } |
| 751 | #define UART2_DMA { 11, 10 } |
| 752 | #define SSP_IRQ { IRQ_SSPINT, NO_IRQ } |
| 753 | #define SSP_DMA { 9, 8 } |
| 754 | |
| 755 | /* FPGA Primecells */ |
| 756 | AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); |
| 757 | AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); |
| 758 | AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL); |
| 759 | AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL); |
| 760 | |
| 761 | /* DevChip Primecells */ |
| 762 | AMBA_DEVICE(smc, "dev:00", SMC, NULL); |
| 763 | AMBA_DEVICE(mpmc, "dev:10", MPMC, NULL); |
| 764 | AMBA_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data); |
| 765 | AMBA_DEVICE(dmac, "dev:30", DMAC, NULL); |
| 766 | AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL); |
| 767 | AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); |
Russell King | bbeddc4 | 2009-07-05 22:43:01 +0100 | [diff] [blame] | 768 | AMBA_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); |
| 769 | AMBA_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 770 | AMBA_DEVICE(rtc, "dev:e8", RTC, NULL); |
| 771 | AMBA_DEVICE(sci0, "dev:f0", SCI, NULL); |
| 772 | AMBA_DEVICE(uart0, "dev:f1", UART0, NULL); |
| 773 | AMBA_DEVICE(uart1, "dev:f2", UART1, NULL); |
| 774 | AMBA_DEVICE(uart2, "dev:f3", UART2, NULL); |
| 775 | AMBA_DEVICE(ssp0, "dev:f4", SSP, NULL); |
| 776 | |
| 777 | static struct amba_device *amba_devs[] __initdata = { |
| 778 | &dmac_device, |
| 779 | &uart0_device, |
| 780 | &uart1_device, |
| 781 | &uart2_device, |
| 782 | &smc_device, |
| 783 | &mpmc_device, |
| 784 | &clcd_device, |
| 785 | &sctl_device, |
| 786 | &wdog_device, |
| 787 | &gpio0_device, |
| 788 | &gpio1_device, |
| 789 | &rtc_device, |
| 790 | &sci0_device, |
| 791 | &ssp0_device, |
| 792 | &aaci_device, |
| 793 | &mmc0_device, |
| 794 | &kmi0_device, |
| 795 | &kmi1_device, |
| 796 | }; |
| 797 | |
| 798 | #ifdef CONFIG_LEDS |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 799 | #define VA_LEDS_BASE (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LED_OFFSET) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 800 | |
| 801 | static void versatile_leds_event(led_event_t ledevt) |
| 802 | { |
| 803 | unsigned long flags; |
| 804 | u32 val; |
| 805 | |
| 806 | local_irq_save(flags); |
| 807 | val = readl(VA_LEDS_BASE); |
| 808 | |
| 809 | switch (ledevt) { |
| 810 | case led_idle_start: |
| 811 | val = val & ~VERSATILE_SYS_LED0; |
| 812 | break; |
| 813 | |
| 814 | case led_idle_end: |
| 815 | val = val | VERSATILE_SYS_LED0; |
| 816 | break; |
| 817 | |
| 818 | case led_timer: |
| 819 | val = val ^ VERSATILE_SYS_LED1; |
| 820 | break; |
| 821 | |
| 822 | case led_halted: |
| 823 | val = 0; |
| 824 | break; |
| 825 | |
| 826 | default: |
| 827 | break; |
| 828 | } |
| 829 | |
| 830 | writel(val, VA_LEDS_BASE); |
| 831 | local_irq_restore(flags); |
| 832 | } |
| 833 | #endif /* CONFIG_LEDS */ |
| 834 | |
| 835 | void __init versatile_init(void) |
| 836 | { |
| 837 | int i; |
| 838 | |
Russell King | d1914c7 | 2010-01-14 20:09:34 +0000 | [diff] [blame] | 839 | osc4_clk.vcoreg = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSCCLCD_OFFSET; |
| 840 | |
Russell King | 0a0300d | 2010-01-12 12:28:00 +0000 | [diff] [blame] | 841 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 842 | |
| 843 | platform_device_register(&versatile_flash_device); |
Russell King | 6b65cd7 | 2006-12-10 21:21:32 +0100 | [diff] [blame] | 844 | platform_device_register(&versatile_i2c_device); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 845 | platform_device_register(&smc91x_device); |
| 846 | |
| 847 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
| 848 | struct amba_device *d = amba_devs[i]; |
| 849 | amba_device_register(d, &iomem_resource); |
| 850 | } |
| 851 | |
| 852 | #ifdef CONFIG_LEDS |
| 853 | leds_event = versatile_leds_event; |
| 854 | #endif |
| 855 | } |
| 856 | |
| 857 | /* |
| 858 | * Where is the timer (VA)? |
| 859 | */ |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 860 | #define TIMER0_VA_BASE __io_address(VERSATILE_TIMER0_1_BASE) |
| 861 | #define TIMER1_VA_BASE (__io_address(VERSATILE_TIMER0_1_BASE) + 0x20) |
| 862 | #define TIMER2_VA_BASE __io_address(VERSATILE_TIMER2_3_BASE) |
| 863 | #define TIMER3_VA_BASE (__io_address(VERSATILE_TIMER2_3_BASE) + 0x20) |
Kevin Hilman | b49c87c | 2007-03-08 20:25:13 +0100 | [diff] [blame] | 864 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 865 | /* |
| 866 | * Set up timer interrupt, and return the current time in seconds. |
| 867 | */ |
| 868 | static void __init versatile_timer_init(void) |
| 869 | { |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 870 | u32 val; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 871 | |
| 872 | /* |
| 873 | * set clock frequency: |
| 874 | * VERSATILE_REFCLK is 32KHz |
| 875 | * VERSATILE_TIMCLK is 1MHz |
| 876 | */ |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 877 | val = readl(__io_address(VERSATILE_SCTL_BASE)); |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 878 | writel((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | |
| 879 | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) | |
| 880 | (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | |
| 881 | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel) | val, |
Al Viro | 2ad4f86 | 2005-09-29 00:09:02 +0100 | [diff] [blame] | 882 | __io_address(VERSATILE_SCTL_BASE)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 883 | |
| 884 | /* |
| 885 | * Initialise to a known state (all timers off) |
| 886 | */ |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 887 | writel(0, TIMER0_VA_BASE + TIMER_CTRL); |
| 888 | writel(0, TIMER1_VA_BASE + TIMER_CTRL); |
| 889 | writel(0, TIMER2_VA_BASE + TIMER_CTRL); |
| 890 | writel(0, TIMER3_VA_BASE + TIMER_CTRL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 891 | |
Russell King | e388771 | 2010-01-14 13:30:16 +0000 | [diff] [blame] | 892 | sp804_clocksource_init(TIMER3_VA_BASE); |
| 893 | sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMERINT0_1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 894 | } |
| 895 | |
| 896 | struct sys_timer versatile_timer = { |
| 897 | .init = versatile_timer_init, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 898 | }; |
Kevin Hilman | b49c87c | 2007-03-08 20:25:13 +0100 | [diff] [blame] | 899 | |