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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/mtd/nand.c
3 *
4 * Overview:
5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00007 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 * Additional technical information is available on
maximilian attems8b2b4032007-07-28 13:07:16 +02009 * http://www.linux-mtd.infradead.org/doc/nand.html
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000010 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +020012 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
Linus Torvalds1da177e2005-04-16 15:20:36 -070013 *
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +020014 * Credits:
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000015 * David Woodhouse for adding multichip support
16 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070017 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
18 * rework for 2K page size chips
19 *
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +020020 * TODO:
Linus Torvalds1da177e2005-04-16 15:20:36 -070021 * Enable cached programming for 2k page size chips
22 * Check, if mtd->ecctype should be set to MTD_ECC_HW
Brian Norris7854d3f2011-06-23 14:12:08 -070023 * if we have HW ECC support.
Artem Bityutskiyc0b8ba72007-07-23 16:06:50 +030024 * BBT table is not serialized, has to be fixed
Linus Torvalds1da177e2005-04-16 15:20:36 -070025 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070026 * This program is free software; you can redistribute it and/or modify
27 * it under the terms of the GNU General Public License version 2 as
28 * published by the Free Software Foundation.
29 *
30 */
31
David Woodhouse552d9202006-05-14 01:20:46 +010032#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#include <linux/delay.h>
34#include <linux/errno.h>
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +020035#include <linux/err.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036#include <linux/sched.h>
37#include <linux/slab.h>
38#include <linux/types.h>
39#include <linux/mtd/mtd.h>
40#include <linux/mtd/nand.h>
41#include <linux/mtd/nand_ecc.h>
Ivan Djelic193bd402011-03-11 11:05:33 +010042#include <linux/mtd/nand_bch.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070043#include <linux/interrupt.h>
44#include <linux/bitops.h>
Richard Purdie8fe833c2006-03-31 02:31:14 -080045#include <linux/leds.h>
Florian Fainelli7351d3a2010-09-07 13:23:45 +020046#include <linux/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#include <linux/mtd/partitions.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070048
49/* Define default oob placement schemes for large and small page devices */
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020050static struct nand_ecclayout nand_oob_8 = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070051 .eccbytes = 3,
52 .eccpos = {0, 1, 2},
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020053 .oobfree = {
54 {.offset = 3,
55 .length = 2},
56 {.offset = 6,
Florian Fainellif8ac0412010-09-07 13:23:43 +020057 .length = 2} }
Linus Torvalds1da177e2005-04-16 15:20:36 -070058};
59
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020060static struct nand_ecclayout nand_oob_16 = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070061 .eccbytes = 6,
62 .eccpos = {0, 1, 2, 3, 6, 7},
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020063 .oobfree = {
64 {.offset = 8,
Florian Fainellif8ac0412010-09-07 13:23:43 +020065 . length = 8} }
Linus Torvalds1da177e2005-04-16 15:20:36 -070066};
67
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020068static struct nand_ecclayout nand_oob_64 = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070069 .eccbytes = 24,
70 .eccpos = {
David Woodhousee0c7d762006-05-13 18:07:53 +010071 40, 41, 42, 43, 44, 45, 46, 47,
72 48, 49, 50, 51, 52, 53, 54, 55,
73 56, 57, 58, 59, 60, 61, 62, 63},
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020074 .oobfree = {
75 {.offset = 2,
Florian Fainellif8ac0412010-09-07 13:23:43 +020076 .length = 38} }
Linus Torvalds1da177e2005-04-16 15:20:36 -070077};
78
Thomas Gleixner81ec5362007-12-12 17:27:03 +010079static struct nand_ecclayout nand_oob_128 = {
80 .eccbytes = 48,
81 .eccpos = {
82 80, 81, 82, 83, 84, 85, 86, 87,
83 88, 89, 90, 91, 92, 93, 94, 95,
84 96, 97, 98, 99, 100, 101, 102, 103,
85 104, 105, 106, 107, 108, 109, 110, 111,
86 112, 113, 114, 115, 116, 117, 118, 119,
87 120, 121, 122, 123, 124, 125, 126, 127},
88 .oobfree = {
89 {.offset = 2,
Florian Fainellif8ac0412010-09-07 13:23:43 +020090 .length = 78} }
Thomas Gleixner81ec5362007-12-12 17:27:03 +010091};
92
Huang Shijie6a8214a2012-11-19 14:43:30 +080093static int nand_get_device(struct mtd_info *mtd, int new_state);
Linus Torvalds1da177e2005-04-16 15:20:36 -070094
Thomas Gleixner8593fbc2006-05-29 03:26:58 +020095static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
96 struct mtd_oob_ops *ops);
97
Thomas Gleixnerd470a972006-05-23 23:48:57 +020098/*
Joe Perches8e87d782008-02-03 17:22:34 +020099 * For devices which display every fart in the system on a separate LED. Is
Thomas Gleixnerd470a972006-05-23 23:48:57 +0200100 * compiled away when LED support is disabled.
101 */
102DEFINE_LED_TRIGGER(nand_led_trigger);
103
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530104static int check_offs_len(struct mtd_info *mtd,
105 loff_t ofs, uint64_t len)
106{
107 struct nand_chip *chip = mtd->priv;
108 int ret = 0;
109
110 /* Start address must align on block boundary */
Dan Carpenterdaae74c2013-08-09 12:49:05 +0300111 if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) {
Brian Norris289c0522011-07-19 10:06:09 -0700112 pr_debug("%s: unaligned address\n", __func__);
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530113 ret = -EINVAL;
114 }
115
116 /* Length must align on block boundary */
Dan Carpenterdaae74c2013-08-09 12:49:05 +0300117 if (len & ((1ULL << chip->phys_erase_shift) - 1)) {
Brian Norris289c0522011-07-19 10:06:09 -0700118 pr_debug("%s: length not block aligned\n", __func__);
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530119 ret = -EINVAL;
120 }
121
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530122 return ret;
123}
124
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125/**
126 * nand_release_device - [GENERIC] release chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700127 * @mtd: MTD device structure
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000128 *
Huang Shijieb0bb6902012-11-19 14:43:29 +0800129 * Release chip lock and wake up anyone waiting on the device.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100131static void nand_release_device(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200133 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134
Thomas Gleixnera36ed292006-05-23 11:37:03 +0200135 /* Release the controller and the chip */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200136 spin_lock(&chip->controller->lock);
137 chip->controller->active = NULL;
138 chip->state = FL_READY;
139 wake_up(&chip->controller->wq);
140 spin_unlock(&chip->controller->lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141}
142
143/**
144 * nand_read_byte - [DEFAULT] read one byte from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700145 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700147 * Default read function for 8bit buswidth
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200149static uint8_t nand_read_byte(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200151 struct nand_chip *chip = mtd->priv;
152 return readb(chip->IO_ADDR_R);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153}
154
155/**
Masanari Iida064a7692012-11-09 23:20:58 +0900156 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
Brian Norris7854d3f2011-06-23 14:12:08 -0700157 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700158 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700160 * Default read function for 16bit buswidth with endianness conversion.
161 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200163static uint8_t nand_read_byte16(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700164{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200165 struct nand_chip *chip = mtd->priv;
166 return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167}
168
169/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170 * nand_read_word - [DEFAULT] read one word from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700171 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700173 * Default read function for 16bit buswidth without endianness conversion.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174 */
175static u16 nand_read_word(struct mtd_info *mtd)
176{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200177 struct nand_chip *chip = mtd->priv;
178 return readw(chip->IO_ADDR_R);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179}
180
181/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182 * nand_select_chip - [DEFAULT] control CE line
Brian Norris8b6e50c2011-05-25 14:59:01 -0700183 * @mtd: MTD device structure
184 * @chipnr: chipnumber to select, -1 for deselect
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185 *
186 * Default select function for 1 chip devices.
187 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200188static void nand_select_chip(struct mtd_info *mtd, int chipnr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200190 struct nand_chip *chip = mtd->priv;
191
192 switch (chipnr) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193 case -1:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200194 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195 break;
196 case 0:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197 break;
198
199 default:
200 BUG();
201 }
202}
203
204/**
205 * nand_write_buf - [DEFAULT] write buffer to chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700206 * @mtd: MTD device structure
207 * @buf: data buffer
208 * @len: number of bytes to write
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700210 * Default write function for 8bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200212static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200214 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215
Alexander Shiyan76413832013-04-13 09:32:13 +0400216 iowrite8_rep(chip->IO_ADDR_W, buf, len);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700217}
218
219/**
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000220 * nand_read_buf - [DEFAULT] read chip data into buffer
Brian Norris8b6e50c2011-05-25 14:59:01 -0700221 * @mtd: MTD device structure
222 * @buf: buffer to store date
223 * @len: number of bytes to read
Linus Torvalds1da177e2005-04-16 15:20:36 -0700224 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700225 * Default read function for 8bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200227static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700228{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200229 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230
Alexander Shiyan76413832013-04-13 09:32:13 +0400231 ioread8_rep(chip->IO_ADDR_R, buf, len);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700232}
233
234/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235 * nand_write_buf16 - [DEFAULT] write buffer to chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700236 * @mtd: MTD device structure
237 * @buf: data buffer
238 * @len: number of bytes to write
Linus Torvalds1da177e2005-04-16 15:20:36 -0700239 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700240 * Default write function for 16bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200242static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200244 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245 u16 *p = (u16 *) buf;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000246
Alexander Shiyan76413832013-04-13 09:32:13 +0400247 iowrite16_rep(chip->IO_ADDR_W, p, len >> 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700248}
249
250/**
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000251 * nand_read_buf16 - [DEFAULT] read chip data into buffer
Brian Norris8b6e50c2011-05-25 14:59:01 -0700252 * @mtd: MTD device structure
253 * @buf: buffer to store date
254 * @len: number of bytes to read
Linus Torvalds1da177e2005-04-16 15:20:36 -0700255 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700256 * Default read function for 16bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200258static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700259{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200260 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700261 u16 *p = (u16 *) buf;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700262
Alexander Shiyan76413832013-04-13 09:32:13 +0400263 ioread16_rep(chip->IO_ADDR_R, p, len >> 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700264}
265
266/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700267 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700268 * @mtd: MTD device structure
269 * @ofs: offset from device start
270 * @getchip: 0, if the chip is already selected
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000272 * Check, if the block is bad.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700273 */
274static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
275{
Brian Norriscdbec052012-01-13 18:11:48 -0800276 int page, chipnr, res = 0, i = 0;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200277 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278 u16 bad;
279
Brian Norris5fb15492011-05-31 16:31:21 -0700280 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
Kevin Cernekeeb60b08b2010-05-04 20:58:10 -0700281 ofs += mtd->erasesize - mtd->writesize;
282
Thomas Knobloch1a12f462007-05-03 07:39:37 +0100283 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
284
Linus Torvalds1da177e2005-04-16 15:20:36 -0700285 if (getchip) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200286 chipnr = (int)(ofs >> chip->chip_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287
Huang Shijie6a8214a2012-11-19 14:43:30 +0800288 nand_get_device(mtd, FL_READING);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289
290 /* Select the NAND device */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200291 chip->select_chip(mtd, chipnr);
Thomas Knobloch1a12f462007-05-03 07:39:37 +0100292 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700293
Brian Norriscdbec052012-01-13 18:11:48 -0800294 do {
295 if (chip->options & NAND_BUSWIDTH_16) {
296 chip->cmdfunc(mtd, NAND_CMD_READOOB,
297 chip->badblockpos & 0xFE, page);
298 bad = cpu_to_le16(chip->read_word(mtd));
299 if (chip->badblockpos & 0x1)
300 bad >>= 8;
301 else
302 bad &= 0xFF;
303 } else {
304 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos,
305 page);
306 bad = chip->read_byte(mtd);
307 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000308
Brian Norriscdbec052012-01-13 18:11:48 -0800309 if (likely(chip->badblockbits == 8))
310 res = bad != 0xFF;
311 else
312 res = hweight8(bad) < chip->badblockbits;
313 ofs += mtd->writesize;
314 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
315 i++;
316 } while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE));
Maxim Levitskye0b58d02010-02-22 20:39:38 +0200317
Huang Shijieb0bb6902012-11-19 14:43:29 +0800318 if (getchip) {
319 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320 nand_release_device(mtd);
Huang Shijieb0bb6902012-11-19 14:43:29 +0800321 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000322
Linus Torvalds1da177e2005-04-16 15:20:36 -0700323 return res;
324}
325
326/**
Brian Norris5a0edb22013-07-30 17:52:58 -0700327 * nand_default_block_markbad - [DEFAULT] mark a block bad via bad block marker
Brian Norris8b6e50c2011-05-25 14:59:01 -0700328 * @mtd: MTD device structure
329 * @ofs: offset from device start
Linus Torvalds1da177e2005-04-16 15:20:36 -0700330 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700331 * This is the default implementation, which can be overridden by a hardware
Brian Norris5a0edb22013-07-30 17:52:58 -0700332 * specific driver. It provides the details for writing a bad block marker to a
333 * block.
334 */
335static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
336{
337 struct nand_chip *chip = mtd->priv;
338 struct mtd_oob_ops ops;
339 uint8_t buf[2] = { 0, 0 };
340 int ret = 0, res, i = 0;
341
342 ops.datbuf = NULL;
343 ops.oobbuf = buf;
344 ops.ooboffs = chip->badblockpos;
345 if (chip->options & NAND_BUSWIDTH_16) {
346 ops.ooboffs &= ~0x01;
347 ops.len = ops.ooblen = 2;
348 } else {
349 ops.len = ops.ooblen = 1;
350 }
351 ops.mode = MTD_OPS_PLACE_OOB;
352
353 /* Write to first/last page(s) if necessary */
354 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
355 ofs += mtd->erasesize - mtd->writesize;
356 do {
357 res = nand_do_write_oob(mtd, ofs, &ops);
358 if (!ret)
359 ret = res;
360
361 i++;
362 ofs += mtd->writesize;
363 } while ((chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2);
364
365 return ret;
366}
367
368/**
369 * nand_block_markbad_lowlevel - mark a block bad
370 * @mtd: MTD device structure
371 * @ofs: offset from device start
372 *
373 * This function performs the generic NAND bad block marking steps (i.e., bad
374 * block table(s) and/or marker(s)). We only allow the hardware driver to
375 * specify how to write bad block markers to OOB (chip->block_markbad).
376 *
Brian Norrisb32843b2013-07-30 17:52:59 -0700377 * We try operations in the following order:
Brian Norrise2414f42012-02-06 13:44:00 -0800378 * (1) erase the affected block, to allow OOB marker to be written cleanly
Brian Norrisb32843b2013-07-30 17:52:59 -0700379 * (2) write bad block marker to OOB area of affected block (unless flag
380 * NAND_BBT_NO_OOB_BBM is present)
381 * (3) update the BBT
382 * Note that we retain the first error encountered in (2) or (3), finish the
Brian Norrise2414f42012-02-06 13:44:00 -0800383 * procedures, and dump the error in the end.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700384*/
Brian Norris5a0edb22013-07-30 17:52:58 -0700385static int nand_block_markbad_lowlevel(struct mtd_info *mtd, loff_t ofs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700386{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200387 struct nand_chip *chip = mtd->priv;
Brian Norrisb32843b2013-07-30 17:52:59 -0700388 int res, ret = 0;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000389
Brian Norrisb32843b2013-07-30 17:52:59 -0700390 if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) {
Brian Norris00918422012-01-13 18:11:47 -0800391 struct erase_info einfo;
392
393 /* Attempt erase before marking OOB */
394 memset(&einfo, 0, sizeof(einfo));
395 einfo.mtd = mtd;
396 einfo.addr = ofs;
Dan Carpenterdaae74c2013-08-09 12:49:05 +0300397 einfo.len = 1ULL << chip->phys_erase_shift;
Brian Norris00918422012-01-13 18:11:47 -0800398 nand_erase_nand(mtd, &einfo, 0);
Brian Norris00918422012-01-13 18:11:47 -0800399
Brian Norrisb32843b2013-07-30 17:52:59 -0700400 /* Write bad block marker to OOB */
Huang Shijie6a8214a2012-11-19 14:43:30 +0800401 nand_get_device(mtd, FL_WRITING);
Brian Norris5a0edb22013-07-30 17:52:58 -0700402 ret = chip->block_markbad(mtd, ofs);
Artem Bityutskiyc0b8ba72007-07-23 16:06:50 +0300403 nand_release_device(mtd);
Thomas Gleixnerf1a28c02006-05-30 00:37:34 +0200404 }
Brian Norrise2414f42012-02-06 13:44:00 -0800405
Brian Norrisb32843b2013-07-30 17:52:59 -0700406 /* Mark block bad in BBT */
407 if (chip->bbt) {
408 res = nand_markbad_bbt(mtd, ofs);
Brian Norrise2414f42012-02-06 13:44:00 -0800409 if (!ret)
410 ret = res;
411 }
412
Thomas Gleixnerf1a28c02006-05-30 00:37:34 +0200413 if (!ret)
414 mtd->ecc_stats.badblocks++;
Artem Bityutskiyc0b8ba72007-07-23 16:06:50 +0300415
Thomas Gleixnerf1a28c02006-05-30 00:37:34 +0200416 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700417}
418
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000419/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700420 * nand_check_wp - [GENERIC] check if the chip is write protected
Brian Norris8b6e50c2011-05-25 14:59:01 -0700421 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700422 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700423 * Check, if the device is write protected. The function expects, that the
424 * device is already selected.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100426static int nand_check_wp(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200428 struct nand_chip *chip = mtd->priv;
Maxim Levitsky93edbad2010-02-22 20:39:40 +0200429
Brian Norris8b6e50c2011-05-25 14:59:01 -0700430 /* Broken xD cards report WP despite being writable */
Maxim Levitsky93edbad2010-02-22 20:39:40 +0200431 if (chip->options & NAND_BROKEN_XD)
432 return 0;
433
Linus Torvalds1da177e2005-04-16 15:20:36 -0700434 /* Check the WP bit */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200435 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
436 return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437}
438
439/**
440 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
Brian Norris8b6e50c2011-05-25 14:59:01 -0700441 * @mtd: MTD device structure
442 * @ofs: offset from device start
443 * @getchip: 0, if the chip is already selected
444 * @allowbbt: 1, if its allowed to access the bbt area
Linus Torvalds1da177e2005-04-16 15:20:36 -0700445 *
446 * Check, if the block is bad. Either by reading the bad block table or
447 * calling of the scan function.
448 */
Thomas Gleixner2c0a2be2006-05-23 11:50:56 +0200449static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,
450 int allowbbt)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700451{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200452 struct nand_chip *chip = mtd->priv;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000453
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200454 if (!chip->bbt)
455 return chip->block_bad(mtd, ofs, getchip);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000456
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457 /* Return info from the table */
David Woodhousee0c7d762006-05-13 18:07:53 +0100458 return nand_isbad_bbt(mtd, ofs, allowbbt);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700459}
460
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200461/**
462 * panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands.
Brian Norris8b6e50c2011-05-25 14:59:01 -0700463 * @mtd: MTD device structure
464 * @timeo: Timeout
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200465 *
466 * Helper function for nand_wait_ready used when needing to wait in interrupt
467 * context.
468 */
469static void panic_nand_wait_ready(struct mtd_info *mtd, unsigned long timeo)
470{
471 struct nand_chip *chip = mtd->priv;
472 int i;
473
474 /* Wait for the device to get ready */
475 for (i = 0; i < timeo; i++) {
476 if (chip->dev_ready(mtd))
477 break;
478 touch_softlockup_watchdog();
479 mdelay(1);
480 }
481}
482
Brian Norris7854d3f2011-06-23 14:12:08 -0700483/* Wait for the ready pin, after a command. The timeout is caught later. */
David Woodhouse4b648b02006-09-25 17:05:24 +0100484void nand_wait_ready(struct mtd_info *mtd)
Thomas Gleixner3b887752005-02-22 21:56:49 +0000485{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200486 struct nand_chip *chip = mtd->priv;
Matthieu CASTETca6a2482012-11-22 18:31:28 +0100487 unsigned long timeo = jiffies + msecs_to_jiffies(20);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000488
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200489 /* 400ms timeout */
490 if (in_interrupt() || oops_in_progress)
491 return panic_nand_wait_ready(mtd, 400);
492
Richard Purdie8fe833c2006-03-31 02:31:14 -0800493 led_trigger_event(nand_led_trigger, LED_FULL);
Brian Norris7854d3f2011-06-23 14:12:08 -0700494 /* Wait until command is processed or timeout occurs */
Thomas Gleixner3b887752005-02-22 21:56:49 +0000495 do {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200496 if (chip->dev_ready(mtd))
Richard Purdie8fe833c2006-03-31 02:31:14 -0800497 break;
Ingo Molnar8446f1d2005-09-06 15:16:27 -0700498 touch_softlockup_watchdog();
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000499 } while (time_before(jiffies, timeo));
Richard Purdie8fe833c2006-03-31 02:31:14 -0800500 led_trigger_event(nand_led_trigger, LED_OFF);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000501}
David Woodhouse4b648b02006-09-25 17:05:24 +0100502EXPORT_SYMBOL_GPL(nand_wait_ready);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000503
Linus Torvalds1da177e2005-04-16 15:20:36 -0700504/**
505 * nand_command - [DEFAULT] Send command to NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -0700506 * @mtd: MTD device structure
507 * @command: the command to be sent
508 * @column: the column address for this command, -1 if none
509 * @page_addr: the page address for this command, -1 if none
Linus Torvalds1da177e2005-04-16 15:20:36 -0700510 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700511 * Send command to NAND device. This function is used for small page devices
Artem Bityutskiy51148f12013-03-05 15:00:51 +0200512 * (512 Bytes per page).
Linus Torvalds1da177e2005-04-16 15:20:36 -0700513 */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200514static void nand_command(struct mtd_info *mtd, unsigned int command,
515 int column, int page_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700516{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200517 register struct nand_chip *chip = mtd->priv;
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200518 int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700519
Brian Norris8b6e50c2011-05-25 14:59:01 -0700520 /* Write out the command to the device */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700521 if (command == NAND_CMD_SEQIN) {
522 int readcmd;
523
Joern Engel28318772006-05-22 23:18:05 +0200524 if (column >= mtd->writesize) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525 /* OOB area */
Joern Engel28318772006-05-22 23:18:05 +0200526 column -= mtd->writesize;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700527 readcmd = NAND_CMD_READOOB;
528 } else if (column < 256) {
529 /* First 256 bytes --> READ0 */
530 readcmd = NAND_CMD_READ0;
531 } else {
532 column -= 256;
533 readcmd = NAND_CMD_READ1;
534 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200535 chip->cmd_ctrl(mtd, readcmd, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200536 ctrl &= ~NAND_CTRL_CHANGE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700537 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200538 chip->cmd_ctrl(mtd, command, ctrl);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700539
Brian Norris8b6e50c2011-05-25 14:59:01 -0700540 /* Address cycle, when necessary */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200541 ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
542 /* Serially input address */
543 if (column != -1) {
544 /* Adjust columns for 16 bit buswidth */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200545 if (chip->options & NAND_BUSWIDTH_16)
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200546 column >>= 1;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200547 chip->cmd_ctrl(mtd, column, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200548 ctrl &= ~NAND_CTRL_CHANGE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700549 }
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200550 if (page_addr != -1) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200551 chip->cmd_ctrl(mtd, page_addr, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200552 ctrl &= ~NAND_CTRL_CHANGE;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200553 chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200554 /* One more address cycle for devices > 32MiB */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200555 if (chip->chipsize > (32 << 20))
556 chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200557 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200558 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000559
560 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -0700561 * Program and erase have their own busy handlers status and sequential
562 * in needs no delay
David Woodhousee0c7d762006-05-13 18:07:53 +0100563 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700564 switch (command) {
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000565
Linus Torvalds1da177e2005-04-16 15:20:36 -0700566 case NAND_CMD_PAGEPROG:
567 case NAND_CMD_ERASE1:
568 case NAND_CMD_ERASE2:
569 case NAND_CMD_SEQIN:
570 case NAND_CMD_STATUS:
571 return;
572
573 case NAND_CMD_RESET:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200574 if (chip->dev_ready)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700575 break;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200576 udelay(chip->chip_delay);
577 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200578 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
Thomas Gleixner12efdde2006-05-24 22:57:09 +0200579 chip->cmd_ctrl(mtd,
580 NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Florian Fainellif8ac0412010-09-07 13:23:43 +0200581 while (!(chip->read_byte(mtd) & NAND_STATUS_READY))
582 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700583 return;
584
David Woodhousee0c7d762006-05-13 18:07:53 +0100585 /* This applies to read commands */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700586 default:
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000587 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700588 * If we don't have access to the busy pin, we apply the given
589 * command delay
David Woodhousee0c7d762006-05-13 18:07:53 +0100590 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200591 if (!chip->dev_ready) {
592 udelay(chip->chip_delay);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700593 return;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000594 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700595 }
Brian Norris8b6e50c2011-05-25 14:59:01 -0700596 /*
597 * Apply this short delay always to ensure that we do wait tWB in
598 * any case on any machine.
599 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100600 ndelay(100);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000601
602 nand_wait_ready(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700603}
604
605/**
606 * nand_command_lp - [DEFAULT] Send command to NAND large page device
Brian Norris8b6e50c2011-05-25 14:59:01 -0700607 * @mtd: MTD device structure
608 * @command: the command to be sent
609 * @column: the column address for this command, -1 if none
610 * @page_addr: the page address for this command, -1 if none
Linus Torvalds1da177e2005-04-16 15:20:36 -0700611 *
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200612 * Send command to NAND device. This is the version for the new large page
Brian Norris7854d3f2011-06-23 14:12:08 -0700613 * devices. We don't have the separate regions as we have in the small page
614 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700615 */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200616static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
617 int column, int page_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700618{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200619 register struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700620
621 /* Emulate NAND_CMD_READOOB */
622 if (command == NAND_CMD_READOOB) {
Joern Engel28318772006-05-22 23:18:05 +0200623 column += mtd->writesize;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700624 command = NAND_CMD_READ0;
625 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000626
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200627 /* Command latch cycle */
Alexander Shiyanfb066ad2013-02-28 12:02:19 +0400628 chip->cmd_ctrl(mtd, command, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700629
630 if (column != -1 || page_addr != -1) {
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200631 int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700632
633 /* Serially input address */
634 if (column != -1) {
635 /* Adjust columns for 16 bit buswidth */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200636 if (chip->options & NAND_BUSWIDTH_16)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637 column >>= 1;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200638 chip->cmd_ctrl(mtd, column, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200639 ctrl &= ~NAND_CTRL_CHANGE;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200640 chip->cmd_ctrl(mtd, column >> 8, ctrl);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000641 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700642 if (page_addr != -1) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200643 chip->cmd_ctrl(mtd, page_addr, ctrl);
644 chip->cmd_ctrl(mtd, page_addr >> 8,
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200645 NAND_NCE | NAND_ALE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700646 /* One more address cycle for devices > 128MiB */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200647 if (chip->chipsize > (128 << 20))
648 chip->cmd_ctrl(mtd, page_addr >> 16,
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200649 NAND_NCE | NAND_ALE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700650 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700651 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200652 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000653
654 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -0700655 * Program and erase have their own busy handlers status, sequential
656 * in, and deplete1 need no delay.
David A. Marlin30f464b2005-01-17 18:35:25 +0000657 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700658 switch (command) {
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000659
Linus Torvalds1da177e2005-04-16 15:20:36 -0700660 case NAND_CMD_CACHEDPROG:
661 case NAND_CMD_PAGEPROG:
662 case NAND_CMD_ERASE1:
663 case NAND_CMD_ERASE2:
664 case NAND_CMD_SEQIN:
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200665 case NAND_CMD_RNDIN:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700666 case NAND_CMD_STATUS:
David A. Marlin30f464b2005-01-17 18:35:25 +0000667 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700668
669 case NAND_CMD_RESET:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200670 if (chip->dev_ready)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700671 break;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200672 udelay(chip->chip_delay);
Thomas Gleixner12efdde2006-05-24 22:57:09 +0200673 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
674 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
675 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
676 NAND_NCE | NAND_CTRL_CHANGE);
Florian Fainellif8ac0412010-09-07 13:23:43 +0200677 while (!(chip->read_byte(mtd) & NAND_STATUS_READY))
678 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700679 return;
680
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200681 case NAND_CMD_RNDOUT:
682 /* No ready / busy check necessary */
683 chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
684 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
685 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
686 NAND_NCE | NAND_CTRL_CHANGE);
687 return;
688
Linus Torvalds1da177e2005-04-16 15:20:36 -0700689 case NAND_CMD_READ0:
Thomas Gleixner12efdde2006-05-24 22:57:09 +0200690 chip->cmd_ctrl(mtd, NAND_CMD_READSTART,
691 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
692 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
693 NAND_NCE | NAND_CTRL_CHANGE);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000694
David Woodhousee0c7d762006-05-13 18:07:53 +0100695 /* This applies to read commands */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700696 default:
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000697 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700698 * If we don't have access to the busy pin, we apply the given
Brian Norris8b6e50c2011-05-25 14:59:01 -0700699 * command delay.
David Woodhousee0c7d762006-05-13 18:07:53 +0100700 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200701 if (!chip->dev_ready) {
702 udelay(chip->chip_delay);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700703 return;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000704 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700705 }
Thomas Gleixner3b887752005-02-22 21:56:49 +0000706
Brian Norris8b6e50c2011-05-25 14:59:01 -0700707 /*
708 * Apply this short delay always to ensure that we do wait tWB in
709 * any case on any machine.
710 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100711 ndelay(100);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000712
713 nand_wait_ready(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700714}
715
716/**
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200717 * panic_nand_get_device - [GENERIC] Get chip for selected access
Brian Norris8b6e50c2011-05-25 14:59:01 -0700718 * @chip: the nand chip descriptor
719 * @mtd: MTD device structure
720 * @new_state: the state which is requested
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200721 *
722 * Used when in panic, no locks are taken.
723 */
724static void panic_nand_get_device(struct nand_chip *chip,
725 struct mtd_info *mtd, int new_state)
726{
Brian Norris7854d3f2011-06-23 14:12:08 -0700727 /* Hardware controller shared among independent devices */
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200728 chip->controller->active = chip;
729 chip->state = new_state;
730}
731
732/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700733 * nand_get_device - [GENERIC] Get chip for selected access
Brian Norris8b6e50c2011-05-25 14:59:01 -0700734 * @mtd: MTD device structure
735 * @new_state: the state which is requested
Linus Torvalds1da177e2005-04-16 15:20:36 -0700736 *
737 * Get the device and lock it for exclusive access
738 */
Thomas Gleixner2c0a2be2006-05-23 11:50:56 +0200739static int
Huang Shijie6a8214a2012-11-19 14:43:30 +0800740nand_get_device(struct mtd_info *mtd, int new_state)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700741{
Huang Shijie6a8214a2012-11-19 14:43:30 +0800742 struct nand_chip *chip = mtd->priv;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200743 spinlock_t *lock = &chip->controller->lock;
744 wait_queue_head_t *wq = &chip->controller->wq;
David Woodhousee0c7d762006-05-13 18:07:53 +0100745 DECLARE_WAITQUEUE(wait, current);
Florian Fainelli7351d3a2010-09-07 13:23:45 +0200746retry:
Thomas Gleixner0dfc6242005-05-31 20:39:20 +0100747 spin_lock(lock);
748
vimal singhb8b3ee92009-07-09 20:41:22 +0530749 /* Hardware controller shared among independent devices */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200750 if (!chip->controller->active)
751 chip->controller->active = chip;
Thomas Gleixnera36ed292006-05-23 11:37:03 +0200752
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200753 if (chip->controller->active == chip && chip->state == FL_READY) {
754 chip->state = new_state;
Thomas Gleixner0dfc6242005-05-31 20:39:20 +0100755 spin_unlock(lock);
Vitaly Wool962034f2005-09-15 14:58:53 +0100756 return 0;
757 }
758 if (new_state == FL_PM_SUSPENDED) {
Li Yang6b0d9a82009-11-17 14:45:49 -0800759 if (chip->controller->active->state == FL_PM_SUSPENDED) {
760 chip->state = FL_PM_SUSPENDED;
761 spin_unlock(lock);
762 return 0;
Li Yang6b0d9a82009-11-17 14:45:49 -0800763 }
Thomas Gleixner0dfc6242005-05-31 20:39:20 +0100764 }
765 set_current_state(TASK_UNINTERRUPTIBLE);
766 add_wait_queue(wq, &wait);
767 spin_unlock(lock);
768 schedule();
769 remove_wait_queue(wq, &wait);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700770 goto retry;
771}
772
773/**
Brian Norris8b6e50c2011-05-25 14:59:01 -0700774 * panic_nand_wait - [GENERIC] wait until the command is done
775 * @mtd: MTD device structure
776 * @chip: NAND chip structure
777 * @timeo: timeout
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200778 *
779 * Wait for command done. This is a helper function for nand_wait used when
780 * we are in interrupt context. May happen when in panic and trying to write
Uwe Kleine-Königb5950762010-11-01 15:38:34 -0400781 * an oops through mtdoops.
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200782 */
783static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,
784 unsigned long timeo)
785{
786 int i;
787 for (i = 0; i < timeo; i++) {
788 if (chip->dev_ready) {
789 if (chip->dev_ready(mtd))
790 break;
791 } else {
792 if (chip->read_byte(mtd) & NAND_STATUS_READY)
793 break;
794 }
795 mdelay(1);
Florian Fainellif8ac0412010-09-07 13:23:43 +0200796 }
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200797}
798
799/**
Brian Norris8b6e50c2011-05-25 14:59:01 -0700800 * nand_wait - [DEFAULT] wait until the command is done
801 * @mtd: MTD device structure
802 * @chip: NAND chip structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700803 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700804 * Wait for command done. This applies to erase and program only. Erase can
805 * take up to 400ms and program up to 20ms according to general NAND and
806 * SmartMedia specs.
Randy Dunlap844d3b42006-06-28 21:48:27 -0700807 */
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200808static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700809{
810
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200811 int status, state = chip->state;
Huang Shijie6d2559f2013-01-30 10:03:56 +0800812 unsigned long timeo = (state == FL_ERASING ? 400 : 20);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700813
Richard Purdie8fe833c2006-03-31 02:31:14 -0800814 led_trigger_event(nand_led_trigger, LED_FULL);
815
Brian Norris8b6e50c2011-05-25 14:59:01 -0700816 /*
817 * Apply this short delay always to ensure that we do wait tWB in any
818 * case on any machine.
819 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100820 ndelay(100);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700821
Artem Bityutskiy14c65782013-03-04 14:21:34 +0200822 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700823
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200824 if (in_interrupt() || oops_in_progress)
825 panic_nand_wait(mtd, chip, timeo);
826 else {
Huang Shijie6d2559f2013-01-30 10:03:56 +0800827 timeo = jiffies + msecs_to_jiffies(timeo);
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200828 while (time_before(jiffies, timeo)) {
829 if (chip->dev_ready) {
830 if (chip->dev_ready(mtd))
831 break;
832 } else {
833 if (chip->read_byte(mtd) & NAND_STATUS_READY)
834 break;
835 }
836 cond_resched();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700837 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700838 }
Richard Purdie8fe833c2006-03-31 02:31:14 -0800839 led_trigger_event(nand_led_trigger, LED_OFF);
840
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200841 status = (int)chip->read_byte(mtd);
Matthieu CASTETf251b8d2012-11-05 15:00:44 +0100842 /* This can happen if in case of timeout or buggy dev_ready */
843 WARN_ON(!(status & NAND_STATUS_READY));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700844 return status;
845}
846
847/**
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700848 * __nand_unlock - [REPLACEABLE] unlocks specified locked blocks
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700849 * @mtd: mtd info
850 * @ofs: offset to start unlock from
851 * @len: length to unlock
Brian Norris8b6e50c2011-05-25 14:59:01 -0700852 * @invert: when = 0, unlock the range of blocks within the lower and
853 * upper boundary address
854 * when = 1, unlock the range of blocks outside the boundaries
855 * of the lower and upper boundary address
Vimal Singh7d70f332010-02-08 15:50:49 +0530856 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700857 * Returs unlock status.
Vimal Singh7d70f332010-02-08 15:50:49 +0530858 */
859static int __nand_unlock(struct mtd_info *mtd, loff_t ofs,
860 uint64_t len, int invert)
861{
862 int ret = 0;
863 int status, page;
864 struct nand_chip *chip = mtd->priv;
865
866 /* Submit address of first page to unlock */
867 page = ofs >> chip->page_shift;
868 chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask);
869
870 /* Submit address of last page to unlock */
871 page = (ofs + len) >> chip->page_shift;
872 chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1,
873 (page | invert) & chip->pagemask);
874
875 /* Call wait ready function */
876 status = chip->waitfunc(mtd, chip);
Vimal Singh7d70f332010-02-08 15:50:49 +0530877 /* See if device thinks it succeeded */
Huang Shijie74830962012-10-14 23:47:24 -0400878 if (status & NAND_STATUS_FAIL) {
Brian Norris289c0522011-07-19 10:06:09 -0700879 pr_debug("%s: error status = 0x%08x\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530880 __func__, status);
881 ret = -EIO;
882 }
883
884 return ret;
885}
886
887/**
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700888 * nand_unlock - [REPLACEABLE] unlocks specified locked blocks
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700889 * @mtd: mtd info
890 * @ofs: offset to start unlock from
891 * @len: length to unlock
Vimal Singh7d70f332010-02-08 15:50:49 +0530892 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700893 * Returns unlock status.
Vimal Singh7d70f332010-02-08 15:50:49 +0530894 */
895int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
896{
897 int ret = 0;
898 int chipnr;
899 struct nand_chip *chip = mtd->priv;
900
Brian Norris289c0522011-07-19 10:06:09 -0700901 pr_debug("%s: start = 0x%012llx, len = %llu\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530902 __func__, (unsigned long long)ofs, len);
903
904 if (check_offs_len(mtd, ofs, len))
905 ret = -EINVAL;
906
907 /* Align to last block address if size addresses end of the device */
908 if (ofs + len == mtd->size)
909 len -= mtd->erasesize;
910
Huang Shijie6a8214a2012-11-19 14:43:30 +0800911 nand_get_device(mtd, FL_UNLOCKING);
Vimal Singh7d70f332010-02-08 15:50:49 +0530912
913 /* Shift to get chip number */
914 chipnr = ofs >> chip->chip_shift;
915
916 chip->select_chip(mtd, chipnr);
917
918 /* Check, if it is write protected */
919 if (nand_check_wp(mtd)) {
Brian Norris289c0522011-07-19 10:06:09 -0700920 pr_debug("%s: device is write protected!\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530921 __func__);
922 ret = -EIO;
923 goto out;
924 }
925
926 ret = __nand_unlock(mtd, ofs, len, 0);
927
928out:
Huang Shijieb0bb6902012-11-19 14:43:29 +0800929 chip->select_chip(mtd, -1);
Vimal Singh7d70f332010-02-08 15:50:49 +0530930 nand_release_device(mtd);
931
932 return ret;
933}
Florian Fainelli7351d3a2010-09-07 13:23:45 +0200934EXPORT_SYMBOL(nand_unlock);
Vimal Singh7d70f332010-02-08 15:50:49 +0530935
936/**
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700937 * nand_lock - [REPLACEABLE] locks all blocks present in the device
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700938 * @mtd: mtd info
939 * @ofs: offset to start unlock from
940 * @len: length to unlock
Vimal Singh7d70f332010-02-08 15:50:49 +0530941 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700942 * This feature is not supported in many NAND parts. 'Micron' NAND parts do
943 * have this feature, but it allows only to lock all blocks, not for specified
944 * range for block. Implementing 'lock' feature by making use of 'unlock', for
945 * now.
Vimal Singh7d70f332010-02-08 15:50:49 +0530946 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700947 * Returns lock status.
Vimal Singh7d70f332010-02-08 15:50:49 +0530948 */
949int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
950{
951 int ret = 0;
952 int chipnr, status, page;
953 struct nand_chip *chip = mtd->priv;
954
Brian Norris289c0522011-07-19 10:06:09 -0700955 pr_debug("%s: start = 0x%012llx, len = %llu\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530956 __func__, (unsigned long long)ofs, len);
957
958 if (check_offs_len(mtd, ofs, len))
959 ret = -EINVAL;
960
Huang Shijie6a8214a2012-11-19 14:43:30 +0800961 nand_get_device(mtd, FL_LOCKING);
Vimal Singh7d70f332010-02-08 15:50:49 +0530962
963 /* Shift to get chip number */
964 chipnr = ofs >> chip->chip_shift;
965
966 chip->select_chip(mtd, chipnr);
967
968 /* Check, if it is write protected */
969 if (nand_check_wp(mtd)) {
Brian Norris289c0522011-07-19 10:06:09 -0700970 pr_debug("%s: device is write protected!\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530971 __func__);
972 status = MTD_ERASE_FAILED;
973 ret = -EIO;
974 goto out;
975 }
976
977 /* Submit address of first page to lock */
978 page = ofs >> chip->page_shift;
979 chip->cmdfunc(mtd, NAND_CMD_LOCK, -1, page & chip->pagemask);
980
981 /* Call wait ready function */
982 status = chip->waitfunc(mtd, chip);
Vimal Singh7d70f332010-02-08 15:50:49 +0530983 /* See if device thinks it succeeded */
Huang Shijie74830962012-10-14 23:47:24 -0400984 if (status & NAND_STATUS_FAIL) {
Brian Norris289c0522011-07-19 10:06:09 -0700985 pr_debug("%s: error status = 0x%08x\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530986 __func__, status);
987 ret = -EIO;
988 goto out;
989 }
990
991 ret = __nand_unlock(mtd, ofs, len, 0x1);
992
993out:
Huang Shijieb0bb6902012-11-19 14:43:29 +0800994 chip->select_chip(mtd, -1);
Vimal Singh7d70f332010-02-08 15:50:49 +0530995 nand_release_device(mtd);
996
997 return ret;
998}
Florian Fainelli7351d3a2010-09-07 13:23:45 +0200999EXPORT_SYMBOL(nand_lock);
Vimal Singh7d70f332010-02-08 15:50:49 +05301000
1001/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001002 * nand_read_page_raw - [INTERN] read raw page data without ecc
Brian Norris8b6e50c2011-05-25 14:59:01 -07001003 * @mtd: mtd info structure
1004 * @chip: nand chip info structure
1005 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001006 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001007 * @page: page number to read
David Brownell52ff49d2009-03-04 12:01:36 -08001008 *
Brian Norris7854d3f2011-06-23 14:12:08 -07001009 * Not for syndrome calculating ECC controllers, which use a special oob layout.
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001010 */
1011static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001012 uint8_t *buf, int oob_required, int page)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001013{
1014 chip->read_buf(mtd, buf, mtd->writesize);
Brian Norris279f08d2012-05-02 10:15:03 -07001015 if (oob_required)
1016 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001017 return 0;
1018}
1019
1020/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001021 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
Brian Norris8b6e50c2011-05-25 14:59:01 -07001022 * @mtd: mtd info structure
1023 * @chip: nand chip info structure
1024 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001025 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001026 * @page: page number to read
David Brownell52ff49d2009-03-04 12:01:36 -08001027 *
1028 * We need a special oob layout and handling even when OOB isn't used.
1029 */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001030static int nand_read_page_raw_syndrome(struct mtd_info *mtd,
Brian Norris1fbb9382012-05-02 10:14:55 -07001031 struct nand_chip *chip, uint8_t *buf,
1032 int oob_required, int page)
David Brownell52ff49d2009-03-04 12:01:36 -08001033{
1034 int eccsize = chip->ecc.size;
1035 int eccbytes = chip->ecc.bytes;
1036 uint8_t *oob = chip->oob_poi;
1037 int steps, size;
1038
1039 for (steps = chip->ecc.steps; steps > 0; steps--) {
1040 chip->read_buf(mtd, buf, eccsize);
1041 buf += eccsize;
1042
1043 if (chip->ecc.prepad) {
1044 chip->read_buf(mtd, oob, chip->ecc.prepad);
1045 oob += chip->ecc.prepad;
1046 }
1047
1048 chip->read_buf(mtd, oob, eccbytes);
1049 oob += eccbytes;
1050
1051 if (chip->ecc.postpad) {
1052 chip->read_buf(mtd, oob, chip->ecc.postpad);
1053 oob += chip->ecc.postpad;
1054 }
1055 }
1056
1057 size = mtd->oobsize - (oob - chip->oob_poi);
1058 if (size)
1059 chip->read_buf(mtd, oob, size);
1060
1061 return 0;
1062}
1063
1064/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001065 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001066 * @mtd: mtd info structure
1067 * @chip: nand chip info structure
1068 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001069 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001070 * @page: page number to read
David A. Marlin068e3c02005-01-24 03:07:46 +00001071 */
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001072static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001073 uint8_t *buf, int oob_required, int page)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001074{
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001075 int i, eccsize = chip->ecc.size;
1076 int eccbytes = chip->ecc.bytes;
1077 int eccsteps = chip->ecc.steps;
1078 uint8_t *p = buf;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001079 uint8_t *ecc_calc = chip->buffers->ecccalc;
1080 uint8_t *ecc_code = chip->buffers->ecccode;
Ben Dooks8b099a32007-05-28 19:17:54 +01001081 uint32_t *eccpos = chip->ecc.layout->eccpos;
Mike Dunn3f91e942012-04-25 12:06:09 -07001082 unsigned int max_bitflips = 0;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001083
Brian Norris1fbb9382012-05-02 10:14:55 -07001084 chip->ecc.read_page_raw(mtd, chip, buf, 1, page);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001085
1086 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
1087 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1088
1089 for (i = 0; i < chip->ecc.total; i++)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001090 ecc_code[i] = chip->oob_poi[eccpos[i]];
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001091
1092 eccsteps = chip->ecc.steps;
1093 p = buf;
1094
1095 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1096 int stat;
1097
1098 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Mike Dunn3f91e942012-04-25 12:06:09 -07001099 if (stat < 0) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001100 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001101 } else {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001102 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001103 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1104 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001105 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001106 return max_bitflips;
Thomas Gleixner22c60f52005-04-04 19:56:32 +01001107}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001108
Linus Torvalds1da177e2005-04-16 15:20:36 -07001109/**
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05301110 * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001111 * @mtd: mtd info structure
1112 * @chip: nand chip info structure
1113 * @data_offs: offset of requested data within the page
1114 * @readlen: data length
1115 * @bufpoi: buffer to store read data
Alexey Korolev3d459552008-05-15 17:23:18 +01001116 */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001117static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
1118 uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi)
Alexey Korolev3d459552008-05-15 17:23:18 +01001119{
1120 int start_step, end_step, num_steps;
1121 uint32_t *eccpos = chip->ecc.layout->eccpos;
1122 uint8_t *p;
1123 int data_col_addr, i, gaps = 0;
1124 int datafrag_len, eccfrag_len, aligned_len, aligned_pos;
1125 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001126 int index = 0;
Mike Dunn3f91e942012-04-25 12:06:09 -07001127 unsigned int max_bitflips = 0;
Alexey Korolev3d459552008-05-15 17:23:18 +01001128
Brian Norris7854d3f2011-06-23 14:12:08 -07001129 /* Column address within the page aligned to ECC size (256bytes) */
Alexey Korolev3d459552008-05-15 17:23:18 +01001130 start_step = data_offs / chip->ecc.size;
1131 end_step = (data_offs + readlen - 1) / chip->ecc.size;
1132 num_steps = end_step - start_step + 1;
1133
Brian Norris8b6e50c2011-05-25 14:59:01 -07001134 /* Data size aligned to ECC ecc.size */
Alexey Korolev3d459552008-05-15 17:23:18 +01001135 datafrag_len = num_steps * chip->ecc.size;
1136 eccfrag_len = num_steps * chip->ecc.bytes;
1137
1138 data_col_addr = start_step * chip->ecc.size;
1139 /* If we read not a page aligned data */
1140 if (data_col_addr != 0)
1141 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
1142
1143 p = bufpoi + data_col_addr;
1144 chip->read_buf(mtd, p, datafrag_len);
1145
Brian Norris8b6e50c2011-05-25 14:59:01 -07001146 /* Calculate ECC */
Alexey Korolev3d459552008-05-15 17:23:18 +01001147 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
1148 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);
1149
Brian Norris8b6e50c2011-05-25 14:59:01 -07001150 /*
1151 * The performance is faster if we position offsets according to
Brian Norris7854d3f2011-06-23 14:12:08 -07001152 * ecc.pos. Let's make sure that there are no gaps in ECC positions.
Brian Norris8b6e50c2011-05-25 14:59:01 -07001153 */
Alexey Korolev3d459552008-05-15 17:23:18 +01001154 for (i = 0; i < eccfrag_len - 1; i++) {
1155 if (eccpos[i + start_step * chip->ecc.bytes] + 1 !=
1156 eccpos[i + start_step * chip->ecc.bytes + 1]) {
1157 gaps = 1;
1158 break;
1159 }
1160 }
1161 if (gaps) {
1162 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
1163 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1164 } else {
Brian Norris8b6e50c2011-05-25 14:59:01 -07001165 /*
Brian Norris7854d3f2011-06-23 14:12:08 -07001166 * Send the command to read the particular ECC bytes take care
Brian Norris8b6e50c2011-05-25 14:59:01 -07001167 * about buswidth alignment in read_buf.
1168 */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001169 index = start_step * chip->ecc.bytes;
1170
1171 aligned_pos = eccpos[index] & ~(busw - 1);
Alexey Korolev3d459552008-05-15 17:23:18 +01001172 aligned_len = eccfrag_len;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001173 if (eccpos[index] & (busw - 1))
Alexey Korolev3d459552008-05-15 17:23:18 +01001174 aligned_len++;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001175 if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1))
Alexey Korolev3d459552008-05-15 17:23:18 +01001176 aligned_len++;
1177
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001178 chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
1179 mtd->writesize + aligned_pos, -1);
Alexey Korolev3d459552008-05-15 17:23:18 +01001180 chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len);
1181 }
1182
1183 for (i = 0; i < eccfrag_len; i++)
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001184 chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]];
Alexey Korolev3d459552008-05-15 17:23:18 +01001185
1186 p = bufpoi + data_col_addr;
1187 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {
1188 int stat;
1189
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001190 stat = chip->ecc.correct(mtd, p,
1191 &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]);
Mike Dunn3f91e942012-04-25 12:06:09 -07001192 if (stat < 0) {
Alexey Korolev3d459552008-05-15 17:23:18 +01001193 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001194 } else {
Alexey Korolev3d459552008-05-15 17:23:18 +01001195 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001196 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1197 }
Alexey Korolev3d459552008-05-15 17:23:18 +01001198 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001199 return max_bitflips;
Alexey Korolev3d459552008-05-15 17:23:18 +01001200}
1201
1202/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001203 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001204 * @mtd: mtd info structure
1205 * @chip: nand chip info structure
1206 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001207 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001208 * @page: page number to read
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001209 *
Brian Norris7854d3f2011-06-23 14:12:08 -07001210 * Not for syndrome calculating ECC controllers which need a special oob layout.
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001211 */
1212static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001213 uint8_t *buf, int oob_required, int page)
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001214{
1215 int i, eccsize = chip->ecc.size;
1216 int eccbytes = chip->ecc.bytes;
1217 int eccsteps = chip->ecc.steps;
1218 uint8_t *p = buf;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001219 uint8_t *ecc_calc = chip->buffers->ecccalc;
1220 uint8_t *ecc_code = chip->buffers->ecccode;
Ben Dooks8b099a32007-05-28 19:17:54 +01001221 uint32_t *eccpos = chip->ecc.layout->eccpos;
Mike Dunn3f91e942012-04-25 12:06:09 -07001222 unsigned int max_bitflips = 0;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001223
1224 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1225 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1226 chip->read_buf(mtd, p, eccsize);
1227 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1228 }
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001229 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001230
1231 for (i = 0; i < chip->ecc.total; i++)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001232 ecc_code[i] = chip->oob_poi[eccpos[i]];
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001233
1234 eccsteps = chip->ecc.steps;
1235 p = buf;
1236
1237 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1238 int stat;
1239
1240 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Mike Dunn3f91e942012-04-25 12:06:09 -07001241 if (stat < 0) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001242 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001243 } else {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001244 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001245 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1246 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001247 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001248 return max_bitflips;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001249}
1250
1251/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001252 * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first
Brian Norris8b6e50c2011-05-25 14:59:01 -07001253 * @mtd: mtd info structure
1254 * @chip: nand chip info structure
1255 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001256 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001257 * @page: page number to read
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001258 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001259 * Hardware ECC for large page chips, require OOB to be read first. For this
1260 * ECC mode, the write_page method is re-used from ECC_HW. These methods
1261 * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with
1262 * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from
1263 * the data area, by overwriting the NAND manufacturer bad block markings.
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001264 */
1265static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
Brian Norris1fbb9382012-05-02 10:14:55 -07001266 struct nand_chip *chip, uint8_t *buf, int oob_required, int page)
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001267{
1268 int i, eccsize = chip->ecc.size;
1269 int eccbytes = chip->ecc.bytes;
1270 int eccsteps = chip->ecc.steps;
1271 uint8_t *p = buf;
1272 uint8_t *ecc_code = chip->buffers->ecccode;
1273 uint32_t *eccpos = chip->ecc.layout->eccpos;
1274 uint8_t *ecc_calc = chip->buffers->ecccalc;
Mike Dunn3f91e942012-04-25 12:06:09 -07001275 unsigned int max_bitflips = 0;
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001276
1277 /* Read the OOB area first */
1278 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
1279 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1280 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1281
1282 for (i = 0; i < chip->ecc.total; i++)
1283 ecc_code[i] = chip->oob_poi[eccpos[i]];
1284
1285 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1286 int stat;
1287
1288 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1289 chip->read_buf(mtd, p, eccsize);
1290 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1291
1292 stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
Mike Dunn3f91e942012-04-25 12:06:09 -07001293 if (stat < 0) {
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001294 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001295 } else {
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001296 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001297 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1298 }
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001299 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001300 return max_bitflips;
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001301}
1302
1303/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001304 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
Brian Norris8b6e50c2011-05-25 14:59:01 -07001305 * @mtd: mtd info structure
1306 * @chip: nand chip info structure
1307 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001308 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001309 * @page: page number to read
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001310 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001311 * The hw generator calculates the error syndrome automatically. Therefore we
1312 * need a special oob layout and handling.
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001313 */
1314static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001315 uint8_t *buf, int oob_required, int page)
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001316{
1317 int i, eccsize = chip->ecc.size;
1318 int eccbytes = chip->ecc.bytes;
1319 int eccsteps = chip->ecc.steps;
1320 uint8_t *p = buf;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001321 uint8_t *oob = chip->oob_poi;
Mike Dunn3f91e942012-04-25 12:06:09 -07001322 unsigned int max_bitflips = 0;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001323
1324 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1325 int stat;
1326
1327 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1328 chip->read_buf(mtd, p, eccsize);
1329
1330 if (chip->ecc.prepad) {
1331 chip->read_buf(mtd, oob, chip->ecc.prepad);
1332 oob += chip->ecc.prepad;
1333 }
1334
1335 chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
1336 chip->read_buf(mtd, oob, eccbytes);
1337 stat = chip->ecc.correct(mtd, p, oob, NULL);
1338
Mike Dunn3f91e942012-04-25 12:06:09 -07001339 if (stat < 0) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001340 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001341 } else {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001342 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001343 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1344 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001345
1346 oob += eccbytes;
1347
1348 if (chip->ecc.postpad) {
1349 chip->read_buf(mtd, oob, chip->ecc.postpad);
1350 oob += chip->ecc.postpad;
1351 }
1352 }
1353
1354 /* Calculate remaining oob bytes */
Vitaly Wool7e4178f2006-06-07 09:34:37 +04001355 i = mtd->oobsize - (oob - chip->oob_poi);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001356 if (i)
1357 chip->read_buf(mtd, oob, i);
1358
Mike Dunn3f91e942012-04-25 12:06:09 -07001359 return max_bitflips;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001360}
1361
1362/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001363 * nand_transfer_oob - [INTERN] Transfer oob to client buffer
Brian Norris8b6e50c2011-05-25 14:59:01 -07001364 * @chip: nand chip structure
1365 * @oob: oob destination address
1366 * @ops: oob ops structure
1367 * @len: size of oob to transfer
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001368 */
1369static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
Vitaly Wool70145682006-11-03 18:20:38 +03001370 struct mtd_oob_ops *ops, size_t len)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001371{
Florian Fainellif8ac0412010-09-07 13:23:43 +02001372 switch (ops->mode) {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001373
Brian Norris0612b9d2011-08-30 18:45:40 -07001374 case MTD_OPS_PLACE_OOB:
1375 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001376 memcpy(oob, chip->oob_poi + ops->ooboffs, len);
1377 return oob + len;
1378
Brian Norris0612b9d2011-08-30 18:45:40 -07001379 case MTD_OPS_AUTO_OOB: {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001380 struct nand_oobfree *free = chip->ecc.layout->oobfree;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001381 uint32_t boffs = 0, roffs = ops->ooboffs;
1382 size_t bytes = 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001383
Florian Fainellif8ac0412010-09-07 13:23:43 +02001384 for (; free->length && len; free++, len -= bytes) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07001385 /* Read request not from offset 0? */
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001386 if (unlikely(roffs)) {
1387 if (roffs >= free->length) {
1388 roffs -= free->length;
1389 continue;
1390 }
1391 boffs = free->offset + roffs;
1392 bytes = min_t(size_t, len,
1393 (free->length - roffs));
1394 roffs = 0;
1395 } else {
1396 bytes = min_t(size_t, len, free->length);
1397 boffs = free->offset;
1398 }
1399 memcpy(oob, chip->oob_poi + boffs, bytes);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001400 oob += bytes;
1401 }
1402 return oob;
1403 }
1404 default:
1405 BUG();
1406 }
1407 return NULL;
1408}
1409
1410/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001411 * nand_do_read_ops - [INTERN] Read data with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07001412 * @mtd: MTD device structure
1413 * @from: offset to read from
1414 * @ops: oob ops structure
David A. Marlin068e3c02005-01-24 03:07:46 +00001415 *
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001416 * Internal function. Called with chip held.
David A. Marlin068e3c02005-01-24 03:07:46 +00001417 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001418static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1419 struct mtd_oob_ops *ops)
David A. Marlin068e3c02005-01-24 03:07:46 +00001420{
Brian Norrise47f3db2012-05-02 10:14:56 -07001421 int chipnr, page, realpage, col, bytes, aligned, oob_required;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001422 struct nand_chip *chip = mtd->priv;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001423 struct mtd_ecc_stats stats;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001424 int ret = 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001425 uint32_t readlen = ops->len;
Vitaly Wool70145682006-11-03 18:20:38 +03001426 uint32_t oobreadlen = ops->ooblen;
Brian Norris0612b9d2011-08-30 18:45:40 -07001427 uint32_t max_oobsize = ops->mode == MTD_OPS_AUTO_OOB ?
Maxim Levitsky9aca3342010-02-22 20:39:35 +02001428 mtd->oobavail : mtd->oobsize;
1429
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001430 uint8_t *bufpoi, *oob, *buf;
Mike Dunnedbc45402012-04-25 12:06:11 -07001431 unsigned int max_bitflips = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001432
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001433 stats = mtd->ecc_stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001434
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001435 chipnr = (int)(from >> chip->chip_shift);
1436 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001437
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001438 realpage = (int)(from >> chip->page_shift);
1439 page = realpage & chip->pagemask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001440
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001441 col = (int)(from & (mtd->writesize - 1));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001442
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001443 buf = ops->datbuf;
1444 oob = ops->oobbuf;
Brian Norrise47f3db2012-05-02 10:14:56 -07001445 oob_required = oob ? 1 : 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001446
Florian Fainellif8ac0412010-09-07 13:23:43 +02001447 while (1) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001448 bytes = min(mtd->writesize - col, readlen);
1449 aligned = (bytes == mtd->writesize);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001450
Brian Norris8b6e50c2011-05-25 14:59:01 -07001451 /* Is the current page in the buffer? */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001452 if (realpage != chip->pagebuf || oob) {
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001453 bufpoi = aligned ? buf : chip->buffers->databuf;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001454
Brian Norrisc00a0992012-05-01 17:12:54 -07001455 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001456
Mike Dunnedbc45402012-04-25 12:06:11 -07001457 /*
1458 * Now read the page into the buffer. Absent an error,
1459 * the read methods return max bitflips per ecc step.
1460 */
Brian Norris0612b9d2011-08-30 18:45:40 -07001461 if (unlikely(ops->mode == MTD_OPS_RAW))
Brian Norris1fbb9382012-05-02 10:14:55 -07001462 ret = chip->ecc.read_page_raw(mtd, chip, bufpoi,
Brian Norrise47f3db2012-05-02 10:14:56 -07001463 oob_required,
1464 page);
Jeff Westfahla5ff4f12012-08-13 16:35:30 -05001465 else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) &&
1466 !oob)
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001467 ret = chip->ecc.read_subpage(mtd, chip,
1468 col, bytes, bufpoi);
David Woodhouse956e9442006-09-25 17:12:39 +01001469 else
Sneha Narnakaje46a8cf22009-09-18 12:51:46 -07001470 ret = chip->ecc.read_page(mtd, chip, bufpoi,
Brian Norrise47f3db2012-05-02 10:14:56 -07001471 oob_required, page);
Brian Norris6d77b9d2011-09-07 13:13:40 -07001472 if (ret < 0) {
1473 if (!aligned)
1474 /* Invalidate page cache */
1475 chip->pagebuf = -1;
David Woodhousee0c7d762006-05-13 18:07:53 +01001476 break;
Brian Norris6d77b9d2011-09-07 13:13:40 -07001477 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001478
Mike Dunnedbc45402012-04-25 12:06:11 -07001479 max_bitflips = max_t(unsigned int, max_bitflips, ret);
1480
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001481 /* Transfer not aligned data */
1482 if (!aligned) {
Jeff Westfahla5ff4f12012-08-13 16:35:30 -05001483 if (!NAND_HAS_SUBPAGE_READ(chip) && !oob &&
Brian Norris6d77b9d2011-09-07 13:13:40 -07001484 !(mtd->ecc_stats.failed - stats.failed) &&
Mike Dunnedbc45402012-04-25 12:06:11 -07001485 (ops->mode != MTD_OPS_RAW)) {
Alexey Korolev3d459552008-05-15 17:23:18 +01001486 chip->pagebuf = realpage;
Mike Dunnedbc45402012-04-25 12:06:11 -07001487 chip->pagebuf_bitflips = ret;
1488 } else {
Brian Norris6d77b9d2011-09-07 13:13:40 -07001489 /* Invalidate page cache */
1490 chip->pagebuf = -1;
Mike Dunnedbc45402012-04-25 12:06:11 -07001491 }
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001492 memcpy(buf, chip->buffers->databuf + col, bytes);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001493 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001494
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001495 buf += bytes;
1496
1497 if (unlikely(oob)) {
Maxim Levitskyb64d39d2010-02-22 20:39:37 +02001498 int toread = min(oobreadlen, max_oobsize);
1499
1500 if (toread) {
1501 oob = nand_transfer_oob(chip,
1502 oob, ops, toread);
1503 oobreadlen -= toread;
1504 }
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001505 }
Brian Norris5bc7c332013-03-13 09:51:31 -07001506
1507 if (chip->options & NAND_NEED_READRDY) {
1508 /* Apply delay or wait for ready/busy pin */
1509 if (!chip->dev_ready)
1510 udelay(chip->chip_delay);
1511 else
1512 nand_wait_ready(mtd);
1513 }
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001514 } else {
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001515 memcpy(buf, chip->buffers->databuf + col, bytes);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001516 buf += bytes;
Mike Dunnedbc45402012-04-25 12:06:11 -07001517 max_bitflips = max_t(unsigned int, max_bitflips,
1518 chip->pagebuf_bitflips);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001519 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001520
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001521 readlen -= bytes;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001522
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001523 if (!readlen)
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001524 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001525
Brian Norris8b6e50c2011-05-25 14:59:01 -07001526 /* For subsequent reads align to page boundary */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001527 col = 0;
1528 /* Increment page address */
1529 realpage++;
1530
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001531 page = realpage & chip->pagemask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001532 /* Check, if we cross a chip boundary */
1533 if (!page) {
1534 chipnr++;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001535 chip->select_chip(mtd, -1);
1536 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001537 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001538 }
Huang Shijieb0bb6902012-11-19 14:43:29 +08001539 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001540
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001541 ops->retlen = ops->len - (size_t) readlen;
Vitaly Wool70145682006-11-03 18:20:38 +03001542 if (oob)
1543 ops->oobretlen = ops->ooblen - oobreadlen;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001544
Mike Dunn3f91e942012-04-25 12:06:09 -07001545 if (ret < 0)
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001546 return ret;
1547
Thomas Gleixner9a1fcdf2006-05-29 14:56:39 +02001548 if (mtd->ecc_stats.failed - stats.failed)
1549 return -EBADMSG;
1550
Mike Dunnedbc45402012-04-25 12:06:11 -07001551 return max_bitflips;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001552}
1553
1554/**
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001555 * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc
Brian Norris8b6e50c2011-05-25 14:59:01 -07001556 * @mtd: MTD device structure
1557 * @from: offset to read from
1558 * @len: number of bytes to read
1559 * @retlen: pointer to variable to store the number of read bytes
1560 * @buf: the databuffer to put data
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001561 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001562 * Get hold of the chip and call nand_do_read.
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001563 */
1564static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
1565 size_t *retlen, uint8_t *buf)
1566{
Brian Norris4a89ff82011-08-30 18:45:45 -07001567 struct mtd_oob_ops ops;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001568 int ret;
1569
Huang Shijie6a8214a2012-11-19 14:43:30 +08001570 nand_get_device(mtd, FL_READING);
Brian Norris4a89ff82011-08-30 18:45:45 -07001571 ops.len = len;
1572 ops.datbuf = buf;
1573 ops.oobbuf = NULL;
Huang Shijie11041ae2012-07-03 16:44:14 +08001574 ops.mode = MTD_OPS_PLACE_OOB;
Brian Norris4a89ff82011-08-30 18:45:45 -07001575 ret = nand_do_read_ops(mtd, from, &ops);
Brian Norris4a89ff82011-08-30 18:45:45 -07001576 *retlen = ops.retlen;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001577 nand_release_device(mtd);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001578 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001579}
1580
1581/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001582 * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001583 * @mtd: mtd info structure
1584 * @chip: nand chip info structure
1585 * @page: page number to read
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001586 */
1587static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001588 int page)
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001589{
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001590 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001591 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001592 return 0;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001593}
1594
1595/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001596 * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001597 * with syndromes
Brian Norris8b6e50c2011-05-25 14:59:01 -07001598 * @mtd: mtd info structure
1599 * @chip: nand chip info structure
1600 * @page: page number to read
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001601 */
1602static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001603 int page)
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001604{
1605 uint8_t *buf = chip->oob_poi;
1606 int length = mtd->oobsize;
1607 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1608 int eccsize = chip->ecc.size;
1609 uint8_t *bufpoi = buf;
1610 int i, toread, sndrnd = 0, pos;
1611
1612 chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page);
1613 for (i = 0; i < chip->ecc.steps; i++) {
1614 if (sndrnd) {
1615 pos = eccsize + i * (eccsize + chunk);
1616 if (mtd->writesize > 512)
1617 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1);
1618 else
1619 chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page);
1620 } else
1621 sndrnd = 1;
1622 toread = min_t(int, length, chunk);
1623 chip->read_buf(mtd, bufpoi, toread);
1624 bufpoi += toread;
1625 length -= toread;
1626 }
1627 if (length > 0)
1628 chip->read_buf(mtd, bufpoi, length);
1629
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001630 return 0;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001631}
1632
1633/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001634 * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001635 * @mtd: mtd info structure
1636 * @chip: nand chip info structure
1637 * @page: page number to write
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001638 */
1639static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1640 int page)
1641{
1642 int status = 0;
1643 const uint8_t *buf = chip->oob_poi;
1644 int length = mtd->oobsize;
1645
1646 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page);
1647 chip->write_buf(mtd, buf, length);
1648 /* Send command to program the OOB data */
1649 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1650
1651 status = chip->waitfunc(mtd, chip);
1652
Savin Zlobec0d420f92006-06-21 11:51:20 +02001653 return status & NAND_STATUS_FAIL ? -EIO : 0;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001654}
1655
1656/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001657 * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07001658 * with syndrome - only for large page flash
1659 * @mtd: mtd info structure
1660 * @chip: nand chip info structure
1661 * @page: page number to write
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001662 */
1663static int nand_write_oob_syndrome(struct mtd_info *mtd,
1664 struct nand_chip *chip, int page)
1665{
1666 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1667 int eccsize = chip->ecc.size, length = mtd->oobsize;
1668 int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps;
1669 const uint8_t *bufpoi = chip->oob_poi;
1670
1671 /*
1672 * data-ecc-data-ecc ... ecc-oob
1673 * or
1674 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
1675 */
1676 if (!chip->ecc.prepad && !chip->ecc.postpad) {
1677 pos = steps * (eccsize + chunk);
1678 steps = 0;
1679 } else
Vitaly Wool8b0036e2006-07-11 09:11:25 +02001680 pos = eccsize;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001681
1682 chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
1683 for (i = 0; i < steps; i++) {
1684 if (sndcmd) {
1685 if (mtd->writesize <= 512) {
1686 uint32_t fill = 0xFFFFFFFF;
1687
1688 len = eccsize;
1689 while (len > 0) {
1690 int num = min_t(int, len, 4);
1691 chip->write_buf(mtd, (uint8_t *)&fill,
1692 num);
1693 len -= num;
1694 }
1695 } else {
1696 pos = eccsize + i * (eccsize + chunk);
1697 chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1);
1698 }
1699 } else
1700 sndcmd = 1;
1701 len = min_t(int, length, chunk);
1702 chip->write_buf(mtd, bufpoi, len);
1703 bufpoi += len;
1704 length -= len;
1705 }
1706 if (length > 0)
1707 chip->write_buf(mtd, bufpoi, length);
1708
1709 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1710 status = chip->waitfunc(mtd, chip);
1711
1712 return status & NAND_STATUS_FAIL ? -EIO : 0;
1713}
1714
1715/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001716 * nand_do_read_oob - [INTERN] NAND read out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07001717 * @mtd: MTD device structure
1718 * @from: offset to read from
1719 * @ops: oob operations description structure
Linus Torvalds1da177e2005-04-16 15:20:36 -07001720 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001721 * NAND read out-of-band data from the spare area.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001722 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001723static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
1724 struct mtd_oob_ops *ops)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001725{
Brian Norrisc00a0992012-05-01 17:12:54 -07001726 int page, realpage, chipnr;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001727 struct nand_chip *chip = mtd->priv;
Brian Norris041e4572011-06-23 16:45:24 -07001728 struct mtd_ecc_stats stats;
Vitaly Wool70145682006-11-03 18:20:38 +03001729 int readlen = ops->ooblen;
1730 int len;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001731 uint8_t *buf = ops->oobbuf;
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001732 int ret = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001733
Brian Norris289c0522011-07-19 10:06:09 -07001734 pr_debug("%s: from = 0x%08Lx, len = %i\n",
vimal singh20d8e242009-07-07 15:49:49 +05301735 __func__, (unsigned long long)from, readlen);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001736
Brian Norris041e4572011-06-23 16:45:24 -07001737 stats = mtd->ecc_stats;
1738
Brian Norris0612b9d2011-08-30 18:45:40 -07001739 if (ops->mode == MTD_OPS_AUTO_OOB)
Vitaly Wool70145682006-11-03 18:20:38 +03001740 len = chip->ecc.layout->oobavail;
Adrian Hunter03736152007-01-31 17:58:29 +02001741 else
1742 len = mtd->oobsize;
1743
1744 if (unlikely(ops->ooboffs >= len)) {
Brian Norris289c0522011-07-19 10:06:09 -07001745 pr_debug("%s: attempt to start read outside oob\n",
1746 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02001747 return -EINVAL;
1748 }
1749
1750 /* Do not allow reads past end of device */
1751 if (unlikely(from >= mtd->size ||
1752 ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) -
1753 (from >> chip->page_shift)) * len)) {
Brian Norris289c0522011-07-19 10:06:09 -07001754 pr_debug("%s: attempt to read beyond end of device\n",
1755 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02001756 return -EINVAL;
1757 }
Vitaly Wool70145682006-11-03 18:20:38 +03001758
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02001759 chipnr = (int)(from >> chip->chip_shift);
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001760 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001761
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02001762 /* Shift to get page */
1763 realpage = (int)(from >> chip->page_shift);
1764 page = realpage & chip->pagemask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001765
Florian Fainellif8ac0412010-09-07 13:23:43 +02001766 while (1) {
Brian Norris0612b9d2011-08-30 18:45:40 -07001767 if (ops->mode == MTD_OPS_RAW)
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001768 ret = chip->ecc.read_oob_raw(mtd, chip, page);
Brian Norrisc46f6482011-08-30 18:45:38 -07001769 else
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001770 ret = chip->ecc.read_oob(mtd, chip, page);
1771
1772 if (ret < 0)
1773 break;
Vitaly Wool70145682006-11-03 18:20:38 +03001774
1775 len = min(len, readlen);
1776 buf = nand_transfer_oob(chip, buf, ops, len);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001777
Brian Norris5bc7c332013-03-13 09:51:31 -07001778 if (chip->options & NAND_NEED_READRDY) {
1779 /* Apply delay or wait for ready/busy pin */
1780 if (!chip->dev_ready)
1781 udelay(chip->chip_delay);
1782 else
1783 nand_wait_ready(mtd);
1784 }
1785
Vitaly Wool70145682006-11-03 18:20:38 +03001786 readlen -= len;
Savin Zlobec0d420f92006-06-21 11:51:20 +02001787 if (!readlen)
1788 break;
1789
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02001790 /* Increment page address */
1791 realpage++;
1792
1793 page = realpage & chip->pagemask;
1794 /* Check, if we cross a chip boundary */
1795 if (!page) {
1796 chipnr++;
1797 chip->select_chip(mtd, -1);
1798 chip->select_chip(mtd, chipnr);
1799 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001800 }
Huang Shijieb0bb6902012-11-19 14:43:29 +08001801 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001802
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001803 ops->oobretlen = ops->ooblen - readlen;
1804
1805 if (ret < 0)
1806 return ret;
Brian Norris041e4572011-06-23 16:45:24 -07001807
1808 if (mtd->ecc_stats.failed - stats.failed)
1809 return -EBADMSG;
1810
1811 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001812}
1813
1814/**
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001815 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07001816 * @mtd: MTD device structure
1817 * @from: offset to read from
1818 * @ops: oob operation description structure
Linus Torvalds1da177e2005-04-16 15:20:36 -07001819 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001820 * NAND read data and/or out-of-band data.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001821 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001822static int nand_read_oob(struct mtd_info *mtd, loff_t from,
1823 struct mtd_oob_ops *ops)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001824{
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001825 int ret = -ENOTSUPP;
1826
1827 ops->retlen = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001828
1829 /* Do not allow reads past end of device */
Vitaly Wool70145682006-11-03 18:20:38 +03001830 if (ops->datbuf && (from + ops->len) > mtd->size) {
Brian Norris289c0522011-07-19 10:06:09 -07001831 pr_debug("%s: attempt to read beyond end of device\n",
1832 __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001833 return -EINVAL;
1834 }
1835
Huang Shijie6a8214a2012-11-19 14:43:30 +08001836 nand_get_device(mtd, FL_READING);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001837
Florian Fainellif8ac0412010-09-07 13:23:43 +02001838 switch (ops->mode) {
Brian Norris0612b9d2011-08-30 18:45:40 -07001839 case MTD_OPS_PLACE_OOB:
1840 case MTD_OPS_AUTO_OOB:
1841 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001842 break;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001843
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001844 default:
1845 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001846 }
1847
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001848 if (!ops->datbuf)
1849 ret = nand_do_read_oob(mtd, from, ops);
1850 else
1851 ret = nand_do_read_ops(mtd, from, ops);
1852
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001853out:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001854 nand_release_device(mtd);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001855 return ret;
1856}
1857
1858
1859/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001860 * nand_write_page_raw - [INTERN] raw page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001861 * @mtd: mtd info structure
1862 * @chip: nand chip info structure
1863 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001864 * @oob_required: must write chip->oob_poi to OOB
David Brownell52ff49d2009-03-04 12:01:36 -08001865 *
Brian Norris7854d3f2011-06-23 14:12:08 -07001866 * Not for syndrome calculating ECC controllers, which use a special oob layout.
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001867 */
Josh Wufdbad98d2012-06-25 18:07:45 +08001868static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001869 const uint8_t *buf, int oob_required)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001870{
1871 chip->write_buf(mtd, buf, mtd->writesize);
Brian Norris279f08d2012-05-02 10:15:03 -07001872 if (oob_required)
1873 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
Josh Wufdbad98d2012-06-25 18:07:45 +08001874
1875 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001876}
1877
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001878/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001879 * nand_write_page_raw_syndrome - [INTERN] raw page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001880 * @mtd: mtd info structure
1881 * @chip: nand chip info structure
1882 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001883 * @oob_required: must write chip->oob_poi to OOB
David Brownell52ff49d2009-03-04 12:01:36 -08001884 *
1885 * We need a special oob layout and handling even when ECC isn't checked.
1886 */
Josh Wufdbad98d2012-06-25 18:07:45 +08001887static int nand_write_page_raw_syndrome(struct mtd_info *mtd,
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001888 struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001889 const uint8_t *buf, int oob_required)
David Brownell52ff49d2009-03-04 12:01:36 -08001890{
1891 int eccsize = chip->ecc.size;
1892 int eccbytes = chip->ecc.bytes;
1893 uint8_t *oob = chip->oob_poi;
1894 int steps, size;
1895
1896 for (steps = chip->ecc.steps; steps > 0; steps--) {
1897 chip->write_buf(mtd, buf, eccsize);
1898 buf += eccsize;
1899
1900 if (chip->ecc.prepad) {
1901 chip->write_buf(mtd, oob, chip->ecc.prepad);
1902 oob += chip->ecc.prepad;
1903 }
1904
1905 chip->read_buf(mtd, oob, eccbytes);
1906 oob += eccbytes;
1907
1908 if (chip->ecc.postpad) {
1909 chip->write_buf(mtd, oob, chip->ecc.postpad);
1910 oob += chip->ecc.postpad;
1911 }
1912 }
1913
1914 size = mtd->oobsize - (oob - chip->oob_poi);
1915 if (size)
1916 chip->write_buf(mtd, oob, size);
Josh Wufdbad98d2012-06-25 18:07:45 +08001917
1918 return 0;
David Brownell52ff49d2009-03-04 12:01:36 -08001919}
1920/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001921 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001922 * @mtd: mtd info structure
1923 * @chip: nand chip info structure
1924 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001925 * @oob_required: must write chip->oob_poi to OOB
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001926 */
Josh Wufdbad98d2012-06-25 18:07:45 +08001927static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001928 const uint8_t *buf, int oob_required)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001929{
1930 int i, eccsize = chip->ecc.size;
1931 int eccbytes = chip->ecc.bytes;
1932 int eccsteps = chip->ecc.steps;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001933 uint8_t *ecc_calc = chip->buffers->ecccalc;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001934 const uint8_t *p = buf;
Ben Dooks8b099a32007-05-28 19:17:54 +01001935 uint32_t *eccpos = chip->ecc.layout->eccpos;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001936
Brian Norris7854d3f2011-06-23 14:12:08 -07001937 /* Software ECC calculation */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001938 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
1939 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001940
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001941 for (i = 0; i < chip->ecc.total; i++)
1942 chip->oob_poi[eccpos[i]] = ecc_calc[i];
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001943
Josh Wufdbad98d2012-06-25 18:07:45 +08001944 return chip->ecc.write_page_raw(mtd, chip, buf, 1);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001945}
1946
1947/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001948 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001949 * @mtd: mtd info structure
1950 * @chip: nand chip info structure
1951 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001952 * @oob_required: must write chip->oob_poi to OOB
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001953 */
Josh Wufdbad98d2012-06-25 18:07:45 +08001954static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001955 const uint8_t *buf, int oob_required)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001956{
1957 int i, eccsize = chip->ecc.size;
1958 int eccbytes = chip->ecc.bytes;
1959 int eccsteps = chip->ecc.steps;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001960 uint8_t *ecc_calc = chip->buffers->ecccalc;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001961 const uint8_t *p = buf;
Ben Dooks8b099a32007-05-28 19:17:54 +01001962 uint32_t *eccpos = chip->ecc.layout->eccpos;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001963
1964 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1965 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
David Woodhouse29da9ce2006-05-26 23:05:44 +01001966 chip->write_buf(mtd, p, eccsize);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001967 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1968 }
1969
1970 for (i = 0; i < chip->ecc.total; i++)
1971 chip->oob_poi[eccpos[i]] = ecc_calc[i];
1972
1973 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
Josh Wufdbad98d2012-06-25 18:07:45 +08001974
1975 return 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001976}
1977
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05301978
1979/**
1980 * nand_write_subpage_hwecc - [REPLACABLE] hardware ECC based subpage write
1981 * @mtd: mtd info structure
1982 * @chip: nand chip info structure
Brian Norrisd6a950802013-08-08 17:16:36 -07001983 * @offset: column address of subpage within the page
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05301984 * @data_len: data length
Brian Norrisd6a950802013-08-08 17:16:36 -07001985 * @buf: data buffer
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05301986 * @oob_required: must write chip->oob_poi to OOB
1987 */
1988static int nand_write_subpage_hwecc(struct mtd_info *mtd,
1989 struct nand_chip *chip, uint32_t offset,
Brian Norrisd6a950802013-08-08 17:16:36 -07001990 uint32_t data_len, const uint8_t *buf,
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05301991 int oob_required)
1992{
1993 uint8_t *oob_buf = chip->oob_poi;
1994 uint8_t *ecc_calc = chip->buffers->ecccalc;
1995 int ecc_size = chip->ecc.size;
1996 int ecc_bytes = chip->ecc.bytes;
1997 int ecc_steps = chip->ecc.steps;
1998 uint32_t *eccpos = chip->ecc.layout->eccpos;
1999 uint32_t start_step = offset / ecc_size;
2000 uint32_t end_step = (offset + data_len - 1) / ecc_size;
2001 int oob_bytes = mtd->oobsize / ecc_steps;
2002 int step, i;
2003
2004 for (step = 0; step < ecc_steps; step++) {
2005 /* configure controller for WRITE access */
2006 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
2007
2008 /* write data (untouched subpages already masked by 0xFF) */
Brian Norrisd6a950802013-08-08 17:16:36 -07002009 chip->write_buf(mtd, buf, ecc_size);
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05302010
2011 /* mask ECC of un-touched subpages by padding 0xFF */
2012 if ((step < start_step) || (step > end_step))
2013 memset(ecc_calc, 0xff, ecc_bytes);
2014 else
Brian Norrisd6a950802013-08-08 17:16:36 -07002015 chip->ecc.calculate(mtd, buf, ecc_calc);
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05302016
2017 /* mask OOB of un-touched subpages by padding 0xFF */
2018 /* if oob_required, preserve OOB metadata of written subpage */
2019 if (!oob_required || (step < start_step) || (step > end_step))
2020 memset(oob_buf, 0xff, oob_bytes);
2021
Brian Norrisd6a950802013-08-08 17:16:36 -07002022 buf += ecc_size;
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05302023 ecc_calc += ecc_bytes;
2024 oob_buf += oob_bytes;
2025 }
2026
2027 /* copy calculated ECC for whole page to chip->buffer->oob */
2028 /* this include masked-value(0xFF) for unwritten subpages */
2029 ecc_calc = chip->buffers->ecccalc;
2030 for (i = 0; i < chip->ecc.total; i++)
2031 chip->oob_poi[eccpos[i]] = ecc_calc[i];
2032
2033 /* write OOB buffer to NAND device */
2034 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
2035
2036 return 0;
2037}
2038
2039
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002040/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002041 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
Brian Norris8b6e50c2011-05-25 14:59:01 -07002042 * @mtd: mtd info structure
2043 * @chip: nand chip info structure
2044 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07002045 * @oob_required: must write chip->oob_poi to OOB
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002046 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002047 * The hw generator calculates the error syndrome automatically. Therefore we
2048 * need a special oob layout and handling.
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002049 */
Josh Wufdbad98d2012-06-25 18:07:45 +08002050static int nand_write_page_syndrome(struct mtd_info *mtd,
Brian Norris1fbb9382012-05-02 10:14:55 -07002051 struct nand_chip *chip,
2052 const uint8_t *buf, int oob_required)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002053{
2054 int i, eccsize = chip->ecc.size;
2055 int eccbytes = chip->ecc.bytes;
2056 int eccsteps = chip->ecc.steps;
2057 const uint8_t *p = buf;
2058 uint8_t *oob = chip->oob_poi;
2059
2060 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
2061
2062 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
2063 chip->write_buf(mtd, p, eccsize);
2064
2065 if (chip->ecc.prepad) {
2066 chip->write_buf(mtd, oob, chip->ecc.prepad);
2067 oob += chip->ecc.prepad;
2068 }
2069
2070 chip->ecc.calculate(mtd, p, oob);
2071 chip->write_buf(mtd, oob, eccbytes);
2072 oob += eccbytes;
2073
2074 if (chip->ecc.postpad) {
2075 chip->write_buf(mtd, oob, chip->ecc.postpad);
2076 oob += chip->ecc.postpad;
2077 }
2078 }
2079
2080 /* Calculate remaining oob bytes */
Vitaly Wool7e4178f2006-06-07 09:34:37 +04002081 i = mtd->oobsize - (oob - chip->oob_poi);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002082 if (i)
2083 chip->write_buf(mtd, oob, i);
Josh Wufdbad98d2012-06-25 18:07:45 +08002084
2085 return 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002086}
2087
2088/**
David Woodhouse956e9442006-09-25 17:12:39 +01002089 * nand_write_page - [REPLACEABLE] write one page
Brian Norris8b6e50c2011-05-25 14:59:01 -07002090 * @mtd: MTD device structure
2091 * @chip: NAND chip descriptor
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05302092 * @offset: address offset within the page
2093 * @data_len: length of actual data to be written
Brian Norris8b6e50c2011-05-25 14:59:01 -07002094 * @buf: the data to write
Brian Norris1fbb9382012-05-02 10:14:55 -07002095 * @oob_required: must write chip->oob_poi to OOB
Brian Norris8b6e50c2011-05-25 14:59:01 -07002096 * @page: page number to write
2097 * @cached: cached programming
2098 * @raw: use _raw version of write_page
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002099 */
2100static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05302101 uint32_t offset, int data_len, const uint8_t *buf,
2102 int oob_required, int page, int cached, int raw)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002103{
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05302104 int status, subpage;
2105
2106 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
2107 chip->ecc.write_subpage)
2108 subpage = offset || (data_len < mtd->writesize);
2109 else
2110 subpage = 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002111
2112 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
2113
David Woodhouse956e9442006-09-25 17:12:39 +01002114 if (unlikely(raw))
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05302115 status = chip->ecc.write_page_raw(mtd, chip, buf,
2116 oob_required);
2117 else if (subpage)
2118 status = chip->ecc.write_subpage(mtd, chip, offset, data_len,
2119 buf, oob_required);
David Woodhouse956e9442006-09-25 17:12:39 +01002120 else
Josh Wufdbad98d2012-06-25 18:07:45 +08002121 status = chip->ecc.write_page(mtd, chip, buf, oob_required);
2122
2123 if (status < 0)
2124 return status;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002125
2126 /*
Brian Norris7854d3f2011-06-23 14:12:08 -07002127 * Cached progamming disabled for now. Not sure if it's worth the
Brian Norris8b6e50c2011-05-25 14:59:01 -07002128 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s).
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002129 */
2130 cached = 0;
2131
Artem Bityutskiy3239a6c2013-03-04 14:56:18 +02002132 if (!cached || !NAND_HAS_CACHEPROG(chip)) {
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002133
2134 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002135 status = chip->waitfunc(mtd, chip);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002136 /*
2137 * See if operation failed and additional status checks are
Brian Norris8b6e50c2011-05-25 14:59:01 -07002138 * available.
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002139 */
2140 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
2141 status = chip->errstat(mtd, chip, FL_WRITING, status,
2142 page);
2143
2144 if (status & NAND_STATUS_FAIL)
2145 return -EIO;
2146 } else {
2147 chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1);
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002148 status = chip->waitfunc(mtd, chip);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002149 }
2150
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002151 return 0;
2152}
2153
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002154/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002155 * nand_fill_oob - [INTERN] Transfer client buffer to oob
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002156 * @mtd: MTD device structure
Brian Norris8b6e50c2011-05-25 14:59:01 -07002157 * @oob: oob data buffer
2158 * @len: oob data write length
2159 * @ops: oob ops structure
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002160 */
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002161static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len,
2162 struct mtd_oob_ops *ops)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002163{
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002164 struct nand_chip *chip = mtd->priv;
2165
2166 /*
2167 * Initialise to all 0xFF, to avoid the possibility of left over OOB
2168 * data from a previous OOB read.
2169 */
2170 memset(chip->oob_poi, 0xff, mtd->oobsize);
2171
Florian Fainellif8ac0412010-09-07 13:23:43 +02002172 switch (ops->mode) {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002173
Brian Norris0612b9d2011-08-30 18:45:40 -07002174 case MTD_OPS_PLACE_OOB:
2175 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002176 memcpy(chip->oob_poi + ops->ooboffs, oob, len);
2177 return oob + len;
2178
Brian Norris0612b9d2011-08-30 18:45:40 -07002179 case MTD_OPS_AUTO_OOB: {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002180 struct nand_oobfree *free = chip->ecc.layout->oobfree;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002181 uint32_t boffs = 0, woffs = ops->ooboffs;
2182 size_t bytes = 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002183
Florian Fainellif8ac0412010-09-07 13:23:43 +02002184 for (; free->length && len; free++, len -= bytes) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07002185 /* Write request not from offset 0? */
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002186 if (unlikely(woffs)) {
2187 if (woffs >= free->length) {
2188 woffs -= free->length;
2189 continue;
2190 }
2191 boffs = free->offset + woffs;
2192 bytes = min_t(size_t, len,
2193 (free->length - woffs));
2194 woffs = 0;
2195 } else {
2196 bytes = min_t(size_t, len, free->length);
2197 boffs = free->offset;
2198 }
Vitaly Wool8b0036e2006-07-11 09:11:25 +02002199 memcpy(chip->oob_poi + boffs, oob, bytes);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002200 oob += bytes;
2201 }
2202 return oob;
2203 }
2204 default:
2205 BUG();
2206 }
2207 return NULL;
2208}
2209
Florian Fainellif8ac0412010-09-07 13:23:43 +02002210#define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002211
2212/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002213 * nand_do_write_ops - [INTERN] NAND write with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07002214 * @mtd: MTD device structure
2215 * @to: offset to write to
2216 * @ops: oob operations description structure
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002217 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002218 * NAND write with ECC.
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002219 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002220static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
2221 struct mtd_oob_ops *ops)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002222{
Thomas Gleixner29072b92006-09-28 15:38:36 +02002223 int chipnr, realpage, page, blockmask, column;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002224 struct nand_chip *chip = mtd->priv;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002225 uint32_t writelen = ops->len;
Maxim Levitsky782ce792010-02-22 20:39:36 +02002226
2227 uint32_t oobwritelen = ops->ooblen;
Brian Norris0612b9d2011-08-30 18:45:40 -07002228 uint32_t oobmaxlen = ops->mode == MTD_OPS_AUTO_OOB ?
Maxim Levitsky782ce792010-02-22 20:39:36 +02002229 mtd->oobavail : mtd->oobsize;
2230
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002231 uint8_t *oob = ops->oobbuf;
2232 uint8_t *buf = ops->datbuf;
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05302233 int ret;
Brian Norrise47f3db2012-05-02 10:14:56 -07002234 int oob_required = oob ? 1 : 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002235
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002236 ops->retlen = 0;
Thomas Gleixner29072b92006-09-28 15:38:36 +02002237 if (!writelen)
2238 return 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002239
Brian Norris8b6e50c2011-05-25 14:59:01 -07002240 /* Reject writes, which are not page aligned */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002241 if (NOTALIGNED(to) || NOTALIGNED(ops->len)) {
Brian Norrisd0370212011-07-19 10:06:08 -07002242 pr_notice("%s: attempt to write non page aligned data\n",
2243 __func__);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002244 return -EINVAL;
2245 }
2246
Thomas Gleixner29072b92006-09-28 15:38:36 +02002247 column = to & (mtd->writesize - 1);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002248
Thomas Gleixner6a930962006-06-28 00:11:45 +02002249 chipnr = (int)(to >> chip->chip_shift);
2250 chip->select_chip(mtd, chipnr);
2251
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002252 /* Check, if it is write protected */
Huang Shijieb0bb6902012-11-19 14:43:29 +08002253 if (nand_check_wp(mtd)) {
2254 ret = -EIO;
2255 goto err_out;
2256 }
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002257
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002258 realpage = (int)(to >> chip->page_shift);
2259 page = realpage & chip->pagemask;
2260 blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
2261
2262 /* Invalidate the page cache, when we write to the cached page */
2263 if (to <= (chip->pagebuf << chip->page_shift) &&
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002264 (chip->pagebuf << chip->page_shift) < (to + ops->len))
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002265 chip->pagebuf = -1;
2266
Maxim Levitsky782ce792010-02-22 20:39:36 +02002267 /* Don't allow multipage oob writes with offset */
Huang Shijieb0bb6902012-11-19 14:43:29 +08002268 if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) {
2269 ret = -EINVAL;
2270 goto err_out;
2271 }
Maxim Levitsky782ce792010-02-22 20:39:36 +02002272
Florian Fainellif8ac0412010-09-07 13:23:43 +02002273 while (1) {
Thomas Gleixner29072b92006-09-28 15:38:36 +02002274 int bytes = mtd->writesize;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002275 int cached = writelen > bytes && page != blockmask;
Thomas Gleixner29072b92006-09-28 15:38:36 +02002276 uint8_t *wbuf = buf;
2277
Brian Norris8b6e50c2011-05-25 14:59:01 -07002278 /* Partial page write? */
Thomas Gleixner29072b92006-09-28 15:38:36 +02002279 if (unlikely(column || writelen < (mtd->writesize - 1))) {
2280 cached = 0;
2281 bytes = min_t(int, bytes - column, (int) writelen);
2282 chip->pagebuf = -1;
2283 memset(chip->buffers->databuf, 0xff, mtd->writesize);
2284 memcpy(&chip->buffers->databuf[column], buf, bytes);
2285 wbuf = chip->buffers->databuf;
2286 }
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002287
Maxim Levitsky782ce792010-02-22 20:39:36 +02002288 if (unlikely(oob)) {
2289 size_t len = min(oobwritelen, oobmaxlen);
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002290 oob = nand_fill_oob(mtd, oob, len, ops);
Maxim Levitsky782ce792010-02-22 20:39:36 +02002291 oobwritelen -= len;
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002292 } else {
2293 /* We still need to erase leftover OOB data */
2294 memset(chip->oob_poi, 0xff, mtd->oobsize);
Maxim Levitsky782ce792010-02-22 20:39:36 +02002295 }
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05302296 ret = chip->write_page(mtd, chip, column, bytes, wbuf,
2297 oob_required, page, cached,
2298 (ops->mode == MTD_OPS_RAW));
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002299 if (ret)
2300 break;
2301
2302 writelen -= bytes;
2303 if (!writelen)
2304 break;
2305
Thomas Gleixner29072b92006-09-28 15:38:36 +02002306 column = 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002307 buf += bytes;
2308 realpage++;
2309
2310 page = realpage & chip->pagemask;
2311 /* Check, if we cross a chip boundary */
2312 if (!page) {
2313 chipnr++;
2314 chip->select_chip(mtd, -1);
2315 chip->select_chip(mtd, chipnr);
2316 }
2317 }
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002318
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002319 ops->retlen = ops->len - writelen;
Vitaly Wool70145682006-11-03 18:20:38 +03002320 if (unlikely(oob))
2321 ops->oobretlen = ops->ooblen;
Huang Shijieb0bb6902012-11-19 14:43:29 +08002322
2323err_out:
2324 chip->select_chip(mtd, -1);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002325 return ret;
2326}
2327
2328/**
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002329 * panic_nand_write - [MTD Interface] NAND write with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07002330 * @mtd: MTD device structure
2331 * @to: offset to write to
2332 * @len: number of bytes to write
2333 * @retlen: pointer to variable to store the number of written bytes
2334 * @buf: the data to write
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002335 *
2336 * NAND write with ECC. Used when performing writes in interrupt context, this
2337 * may for example be called by mtdoops when writing an oops while in panic.
2338 */
2339static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
2340 size_t *retlen, const uint8_t *buf)
2341{
2342 struct nand_chip *chip = mtd->priv;
Brian Norris4a89ff82011-08-30 18:45:45 -07002343 struct mtd_oob_ops ops;
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002344 int ret;
2345
Brian Norris8b6e50c2011-05-25 14:59:01 -07002346 /* Wait for the device to get ready */
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002347 panic_nand_wait(mtd, chip, 400);
2348
Brian Norris8b6e50c2011-05-25 14:59:01 -07002349 /* Grab the device */
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002350 panic_nand_get_device(chip, mtd, FL_WRITING);
2351
Brian Norris4a89ff82011-08-30 18:45:45 -07002352 ops.len = len;
2353 ops.datbuf = (uint8_t *)buf;
2354 ops.oobbuf = NULL;
Huang Shijie11041ae2012-07-03 16:44:14 +08002355 ops.mode = MTD_OPS_PLACE_OOB;
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002356
Brian Norris4a89ff82011-08-30 18:45:45 -07002357 ret = nand_do_write_ops(mtd, to, &ops);
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002358
Brian Norris4a89ff82011-08-30 18:45:45 -07002359 *retlen = ops.retlen;
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002360 return ret;
2361}
2362
2363/**
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002364 * nand_write - [MTD Interface] NAND write with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07002365 * @mtd: MTD device structure
2366 * @to: offset to write to
2367 * @len: number of bytes to write
2368 * @retlen: pointer to variable to store the number of written bytes
2369 * @buf: the data to write
Linus Torvalds1da177e2005-04-16 15:20:36 -07002370 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002371 * NAND write with ECC.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002372 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002373static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02002374 size_t *retlen, const uint8_t *buf)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002375{
Brian Norris4a89ff82011-08-30 18:45:45 -07002376 struct mtd_oob_ops ops;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002377 int ret;
2378
Huang Shijie6a8214a2012-11-19 14:43:30 +08002379 nand_get_device(mtd, FL_WRITING);
Brian Norris4a89ff82011-08-30 18:45:45 -07002380 ops.len = len;
2381 ops.datbuf = (uint8_t *)buf;
2382 ops.oobbuf = NULL;
Huang Shijie11041ae2012-07-03 16:44:14 +08002383 ops.mode = MTD_OPS_PLACE_OOB;
Brian Norris4a89ff82011-08-30 18:45:45 -07002384 ret = nand_do_write_ops(mtd, to, &ops);
Brian Norris4a89ff82011-08-30 18:45:45 -07002385 *retlen = ops.retlen;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002386 nand_release_device(mtd);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002387 return ret;
2388}
2389
2390/**
2391 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07002392 * @mtd: MTD device structure
2393 * @to: offset to write to
2394 * @ops: oob operation description structure
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002395 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002396 * NAND write out-of-band.
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002397 */
2398static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
2399 struct mtd_oob_ops *ops)
2400{
Adrian Hunter03736152007-01-31 17:58:29 +02002401 int chipnr, page, status, len;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002402 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002403
Brian Norris289c0522011-07-19 10:06:09 -07002404 pr_debug("%s: to = 0x%08x, len = %i\n",
vimal singh20d8e242009-07-07 15:49:49 +05302405 __func__, (unsigned int)to, (int)ops->ooblen);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002406
Brian Norris0612b9d2011-08-30 18:45:40 -07002407 if (ops->mode == MTD_OPS_AUTO_OOB)
Adrian Hunter03736152007-01-31 17:58:29 +02002408 len = chip->ecc.layout->oobavail;
2409 else
2410 len = mtd->oobsize;
2411
Linus Torvalds1da177e2005-04-16 15:20:36 -07002412 /* Do not allow write past end of page */
Adrian Hunter03736152007-01-31 17:58:29 +02002413 if ((ops->ooboffs + ops->ooblen) > len) {
Brian Norris289c0522011-07-19 10:06:09 -07002414 pr_debug("%s: attempt to write past end of page\n",
2415 __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002416 return -EINVAL;
2417 }
2418
Adrian Hunter03736152007-01-31 17:58:29 +02002419 if (unlikely(ops->ooboffs >= len)) {
Brian Norris289c0522011-07-19 10:06:09 -07002420 pr_debug("%s: attempt to start write outside oob\n",
2421 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02002422 return -EINVAL;
2423 }
2424
Jason Liu775adc32011-02-25 13:06:18 +08002425 /* Do not allow write past end of device */
Adrian Hunter03736152007-01-31 17:58:29 +02002426 if (unlikely(to >= mtd->size ||
2427 ops->ooboffs + ops->ooblen >
2428 ((mtd->size >> chip->page_shift) -
2429 (to >> chip->page_shift)) * len)) {
Brian Norris289c0522011-07-19 10:06:09 -07002430 pr_debug("%s: attempt to write beyond end of device\n",
2431 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02002432 return -EINVAL;
2433 }
2434
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02002435 chipnr = (int)(to >> chip->chip_shift);
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002436 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002437
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02002438 /* Shift to get page */
2439 page = (int)(to >> chip->page_shift);
2440
2441 /*
2442 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
2443 * of my DiskOnChip 2000 test units) will clear the whole data page too
2444 * if we don't do this. I have no clue why, but I seem to have 'fixed'
2445 * it in the doc2000 driver in August 1999. dwmw2.
2446 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002447 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002448
2449 /* Check, if it is write protected */
Huang Shijieb0bb6902012-11-19 14:43:29 +08002450 if (nand_check_wp(mtd)) {
2451 chip->select_chip(mtd, -1);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002452 return -EROFS;
Huang Shijieb0bb6902012-11-19 14:43:29 +08002453 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002454
Linus Torvalds1da177e2005-04-16 15:20:36 -07002455 /* Invalidate the page cache, if we write to the cached page */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002456 if (page == chip->pagebuf)
2457 chip->pagebuf = -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002458
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002459 nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops);
Brian Norris9ce244b2011-08-30 18:45:37 -07002460
Brian Norris0612b9d2011-08-30 18:45:40 -07002461 if (ops->mode == MTD_OPS_RAW)
Brian Norris9ce244b2011-08-30 18:45:37 -07002462 status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask);
2463 else
2464 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002465
Huang Shijieb0bb6902012-11-19 14:43:29 +08002466 chip->select_chip(mtd, -1);
2467
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002468 if (status)
2469 return status;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002470
Vitaly Wool70145682006-11-03 18:20:38 +03002471 ops->oobretlen = ops->ooblen;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002472
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002473 return 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002474}
Linus Torvalds1da177e2005-04-16 15:20:36 -07002475
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002476/**
2477 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07002478 * @mtd: MTD device structure
2479 * @to: offset to write to
2480 * @ops: oob operation description structure
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002481 */
2482static int nand_write_oob(struct mtd_info *mtd, loff_t to,
2483 struct mtd_oob_ops *ops)
2484{
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002485 int ret = -ENOTSUPP;
2486
2487 ops->retlen = 0;
2488
2489 /* Do not allow writes past end of device */
Vitaly Wool70145682006-11-03 18:20:38 +03002490 if (ops->datbuf && (to + ops->len) > mtd->size) {
Brian Norris289c0522011-07-19 10:06:09 -07002491 pr_debug("%s: attempt to write beyond end of device\n",
2492 __func__);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002493 return -EINVAL;
2494 }
2495
Huang Shijie6a8214a2012-11-19 14:43:30 +08002496 nand_get_device(mtd, FL_WRITING);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002497
Florian Fainellif8ac0412010-09-07 13:23:43 +02002498 switch (ops->mode) {
Brian Norris0612b9d2011-08-30 18:45:40 -07002499 case MTD_OPS_PLACE_OOB:
2500 case MTD_OPS_AUTO_OOB:
2501 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002502 break;
2503
2504 default:
2505 goto out;
2506 }
2507
2508 if (!ops->datbuf)
2509 ret = nand_do_write_oob(mtd, to, ops);
2510 else
2511 ret = nand_do_write_ops(mtd, to, ops);
2512
Florian Fainelli7351d3a2010-09-07 13:23:45 +02002513out:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002514 nand_release_device(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002515 return ret;
2516}
2517
Linus Torvalds1da177e2005-04-16 15:20:36 -07002518/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002519 * single_erase_cmd - [GENERIC] NAND standard block erase command function
Brian Norris8b6e50c2011-05-25 14:59:01 -07002520 * @mtd: MTD device structure
2521 * @page: the page address of the block which will be erased
Linus Torvalds1da177e2005-04-16 15:20:36 -07002522 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002523 * Standard erase command for NAND chips.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002524 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002525static void single_erase_cmd(struct mtd_info *mtd, int page)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002526{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002527 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002528 /* Send commands to erase a block */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002529 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
2530 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002531}
2532
2533/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07002534 * nand_erase - [MTD Interface] erase block(s)
Brian Norris8b6e50c2011-05-25 14:59:01 -07002535 * @mtd: MTD device structure
2536 * @instr: erase instruction
Linus Torvalds1da177e2005-04-16 15:20:36 -07002537 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002538 * Erase one ore more blocks.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002539 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002540static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002541{
David Woodhousee0c7d762006-05-13 18:07:53 +01002542 return nand_erase_nand(mtd, instr, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002543}
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002544
Linus Torvalds1da177e2005-04-16 15:20:36 -07002545/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002546 * nand_erase_nand - [INTERN] erase block(s)
Brian Norris8b6e50c2011-05-25 14:59:01 -07002547 * @mtd: MTD device structure
2548 * @instr: erase instruction
2549 * @allowbbt: allow erasing the bbt area
Linus Torvalds1da177e2005-04-16 15:20:36 -07002550 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002551 * Erase one ore more blocks.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002552 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002553int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2554 int allowbbt)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002555{
Adrian Hunter69423d92008-12-10 13:37:21 +00002556 int page, status, pages_per_block, ret, chipnr;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002557 struct nand_chip *chip = mtd->priv;
Adrian Hunter69423d92008-12-10 13:37:21 +00002558 loff_t len;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002559
Brian Norris289c0522011-07-19 10:06:09 -07002560 pr_debug("%s: start = 0x%012llx, len = %llu\n",
2561 __func__, (unsigned long long)instr->addr,
2562 (unsigned long long)instr->len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002563
Vimal Singh6fe5a6a2010-02-03 14:12:24 +05302564 if (check_offs_len(mtd, instr->addr, instr->len))
Linus Torvalds1da177e2005-04-16 15:20:36 -07002565 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002566
Linus Torvalds1da177e2005-04-16 15:20:36 -07002567 /* Grab the lock and see if the device is available */
Huang Shijie6a8214a2012-11-19 14:43:30 +08002568 nand_get_device(mtd, FL_ERASING);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002569
2570 /* Shift to get first page */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002571 page = (int)(instr->addr >> chip->page_shift);
2572 chipnr = (int)(instr->addr >> chip->chip_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002573
2574 /* Calculate pages in each block */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002575 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002576
2577 /* Select the NAND device */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002578 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002579
Linus Torvalds1da177e2005-04-16 15:20:36 -07002580 /* Check, if it is write protected */
2581 if (nand_check_wp(mtd)) {
Brian Norris289c0522011-07-19 10:06:09 -07002582 pr_debug("%s: device is write protected!\n",
2583 __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002584 instr->state = MTD_ERASE_FAILED;
2585 goto erase_exit;
2586 }
2587
2588 /* Loop through the pages */
2589 len = instr->len;
2590
2591 instr->state = MTD_ERASING;
2592
2593 while (len) {
Wolfram Sang12183a22011-12-21 23:01:20 +01002594 /* Check if we have a bad block, we do not erase bad blocks! */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002595 if (nand_block_checkbad(mtd, ((loff_t) page) <<
2596 chip->page_shift, 0, allowbbt)) {
Brian Norrisd0370212011-07-19 10:06:08 -07002597 pr_warn("%s: attempt to erase a bad block at page 0x%08x\n",
2598 __func__, page);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002599 instr->state = MTD_ERASE_FAILED;
2600 goto erase_exit;
2601 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002602
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002603 /*
2604 * Invalidate the page cache, if we erase the block which
Brian Norris8b6e50c2011-05-25 14:59:01 -07002605 * contains the current cached page.
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002606 */
2607 if (page <= chip->pagebuf && chip->pagebuf <
2608 (page + pages_per_block))
2609 chip->pagebuf = -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002610
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002611 chip->erase_cmd(mtd, page & chip->pagemask);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002612
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002613 status = chip->waitfunc(mtd, chip);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002614
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002615 /*
2616 * See if operation failed and additional status checks are
2617 * available
2618 */
2619 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
2620 status = chip->errstat(mtd, chip, FL_ERASING,
2621 status, page);
David A. Marlin068e3c02005-01-24 03:07:46 +00002622
Linus Torvalds1da177e2005-04-16 15:20:36 -07002623 /* See if block erase succeeded */
David A. Marlina4ab4c52005-01-23 18:30:53 +00002624 if (status & NAND_STATUS_FAIL) {
Brian Norris289c0522011-07-19 10:06:09 -07002625 pr_debug("%s: failed erase, page 0x%08x\n",
2626 __func__, page);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002627 instr->state = MTD_ERASE_FAILED;
Adrian Hunter69423d92008-12-10 13:37:21 +00002628 instr->fail_addr =
2629 ((loff_t)page << chip->page_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002630 goto erase_exit;
2631 }
David A. Marlin30f464b2005-01-17 18:35:25 +00002632
Linus Torvalds1da177e2005-04-16 15:20:36 -07002633 /* Increment page address and decrement length */
Dan Carpenterdaae74c2013-08-09 12:49:05 +03002634 len -= (1ULL << chip->phys_erase_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002635 page += pages_per_block;
2636
2637 /* Check, if we cross a chip boundary */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002638 if (len && !(page & chip->pagemask)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002639 chipnr++;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002640 chip->select_chip(mtd, -1);
2641 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002642 }
2643 }
2644 instr->state = MTD_ERASE_DONE;
2645
Florian Fainelli7351d3a2010-09-07 13:23:45 +02002646erase_exit:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002647
2648 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002649
2650 /* Deselect and wake up anyone waiting on the device */
Huang Shijieb0bb6902012-11-19 14:43:29 +08002651 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002652 nand_release_device(mtd);
2653
David Woodhouse49defc02007-10-06 15:01:59 -04002654 /* Do call back function */
2655 if (!ret)
2656 mtd_erase_callback(instr);
2657
Linus Torvalds1da177e2005-04-16 15:20:36 -07002658 /* Return more or less happy */
2659 return ret;
2660}
2661
2662/**
2663 * nand_sync - [MTD Interface] sync
Brian Norris8b6e50c2011-05-25 14:59:01 -07002664 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -07002665 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002666 * Sync is actually a wait for chip ready function.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002667 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002668static void nand_sync(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002669{
Brian Norris289c0522011-07-19 10:06:09 -07002670 pr_debug("%s: called\n", __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002671
2672 /* Grab the lock and see if the device is available */
Huang Shijie6a8214a2012-11-19 14:43:30 +08002673 nand_get_device(mtd, FL_SYNCING);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002674 /* Release it and go back */
David Woodhousee0c7d762006-05-13 18:07:53 +01002675 nand_release_device(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002676}
2677
Linus Torvalds1da177e2005-04-16 15:20:36 -07002678/**
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002679 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
Brian Norris8b6e50c2011-05-25 14:59:01 -07002680 * @mtd: MTD device structure
2681 * @offs: offset relative to mtd start
Linus Torvalds1da177e2005-04-16 15:20:36 -07002682 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002683static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002684{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002685 return nand_block_checkbad(mtd, offs, 1, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002686}
2687
2688/**
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002689 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
Brian Norris8b6e50c2011-05-25 14:59:01 -07002690 * @mtd: MTD device structure
2691 * @ofs: offset relative to mtd start
Linus Torvalds1da177e2005-04-16 15:20:36 -07002692 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002693static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002694{
Linus Torvalds1da177e2005-04-16 15:20:36 -07002695 int ret;
2696
Florian Fainellif8ac0412010-09-07 13:23:43 +02002697 ret = nand_block_isbad(mtd, ofs);
2698 if (ret) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07002699 /* If it was bad already, return success and do nothing */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002700 if (ret > 0)
2701 return 0;
David Woodhousee0c7d762006-05-13 18:07:53 +01002702 return ret;
2703 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002704
Brian Norris5a0edb22013-07-30 17:52:58 -07002705 return nand_block_markbad_lowlevel(mtd, ofs);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002706}
2707
2708/**
Huang Shijie7db03ec2012-09-13 14:57:52 +08002709 * nand_onfi_set_features- [REPLACEABLE] set features for ONFI nand
2710 * @mtd: MTD device structure
2711 * @chip: nand chip info structure
2712 * @addr: feature address.
2713 * @subfeature_param: the subfeature parameters, a four bytes array.
2714 */
2715static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,
2716 int addr, uint8_t *subfeature_param)
2717{
2718 int status;
2719
David Mosbergerd914c932013-05-29 15:30:13 +03002720 if (!chip->onfi_version ||
2721 !(le16_to_cpu(chip->onfi_params.opt_cmd)
2722 & ONFI_OPT_CMD_SET_GET_FEATURES))
Huang Shijie7db03ec2012-09-13 14:57:52 +08002723 return -EINVAL;
2724
2725 chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1);
2726 chip->write_buf(mtd, subfeature_param, ONFI_SUBFEATURE_PARAM_LEN);
2727 status = chip->waitfunc(mtd, chip);
2728 if (status & NAND_STATUS_FAIL)
2729 return -EIO;
2730 return 0;
2731}
2732
2733/**
2734 * nand_onfi_get_features- [REPLACEABLE] get features for ONFI nand
2735 * @mtd: MTD device structure
2736 * @chip: nand chip info structure
2737 * @addr: feature address.
2738 * @subfeature_param: the subfeature parameters, a four bytes array.
2739 */
2740static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,
2741 int addr, uint8_t *subfeature_param)
2742{
David Mosbergerd914c932013-05-29 15:30:13 +03002743 if (!chip->onfi_version ||
2744 !(le16_to_cpu(chip->onfi_params.opt_cmd)
2745 & ONFI_OPT_CMD_SET_GET_FEATURES))
Huang Shijie7db03ec2012-09-13 14:57:52 +08002746 return -EINVAL;
2747
2748 /* clear the sub feature parameters */
2749 memset(subfeature_param, 0, ONFI_SUBFEATURE_PARAM_LEN);
2750
2751 chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1);
2752 chip->read_buf(mtd, subfeature_param, ONFI_SUBFEATURE_PARAM_LEN);
2753 return 0;
2754}
2755
2756/**
Vitaly Wool962034f2005-09-15 14:58:53 +01002757 * nand_suspend - [MTD Interface] Suspend the NAND flash
Brian Norris8b6e50c2011-05-25 14:59:01 -07002758 * @mtd: MTD device structure
Vitaly Wool962034f2005-09-15 14:58:53 +01002759 */
2760static int nand_suspend(struct mtd_info *mtd)
2761{
Huang Shijie6a8214a2012-11-19 14:43:30 +08002762 return nand_get_device(mtd, FL_PM_SUSPENDED);
Vitaly Wool962034f2005-09-15 14:58:53 +01002763}
2764
2765/**
2766 * nand_resume - [MTD Interface] Resume the NAND flash
Brian Norris8b6e50c2011-05-25 14:59:01 -07002767 * @mtd: MTD device structure
Vitaly Wool962034f2005-09-15 14:58:53 +01002768 */
2769static void nand_resume(struct mtd_info *mtd)
2770{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002771 struct nand_chip *chip = mtd->priv;
Vitaly Wool962034f2005-09-15 14:58:53 +01002772
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002773 if (chip->state == FL_PM_SUSPENDED)
Vitaly Wool962034f2005-09-15 14:58:53 +01002774 nand_release_device(mtd);
2775 else
Brian Norrisd0370212011-07-19 10:06:08 -07002776 pr_err("%s called for a chip which is not in suspended state\n",
2777 __func__);
Vitaly Wool962034f2005-09-15 14:58:53 +01002778}
2779
Brian Norris8b6e50c2011-05-25 14:59:01 -07002780/* Set default functions */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002781static void nand_set_defaults(struct nand_chip *chip, int busw)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002782{
Linus Torvalds1da177e2005-04-16 15:20:36 -07002783 /* check for proper chip_delay setup, set 20us if not */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002784 if (!chip->chip_delay)
2785 chip->chip_delay = 20;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002786
2787 /* check, if a user supplied command function given */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002788 if (chip->cmdfunc == NULL)
2789 chip->cmdfunc = nand_command;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002790
2791 /* check, if a user supplied wait function given */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002792 if (chip->waitfunc == NULL)
2793 chip->waitfunc = nand_wait;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002794
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002795 if (!chip->select_chip)
2796 chip->select_chip = nand_select_chip;
Brian Norris68e80782013-07-18 01:17:02 -07002797
Huang Shijie4204ccc2013-08-16 10:10:07 +08002798 /* set for ONFI nand */
2799 if (!chip->onfi_set_features)
2800 chip->onfi_set_features = nand_onfi_set_features;
2801 if (!chip->onfi_get_features)
2802 chip->onfi_get_features = nand_onfi_get_features;
2803
Brian Norris68e80782013-07-18 01:17:02 -07002804 /* If called twice, pointers that depend on busw may need to be reset */
2805 if (!chip->read_byte || chip->read_byte == nand_read_byte)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002806 chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;
2807 if (!chip->read_word)
2808 chip->read_word = nand_read_word;
2809 if (!chip->block_bad)
2810 chip->block_bad = nand_block_bad;
2811 if (!chip->block_markbad)
2812 chip->block_markbad = nand_default_block_markbad;
Brian Norris68e80782013-07-18 01:17:02 -07002813 if (!chip->write_buf || chip->write_buf == nand_write_buf)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002814 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
Brian Norris68e80782013-07-18 01:17:02 -07002815 if (!chip->read_buf || chip->read_buf == nand_read_buf)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002816 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002817 if (!chip->scan_bbt)
2818 chip->scan_bbt = nand_default_bbt;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002819
2820 if (!chip->controller) {
2821 chip->controller = &chip->hwcontrol;
2822 spin_lock_init(&chip->controller->lock);
2823 init_waitqueue_head(&chip->controller->wq);
2824 }
2825
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002826}
2827
Brian Norris8b6e50c2011-05-25 14:59:01 -07002828/* Sanitize ONFI strings so we can safely print them */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002829static void sanitize_string(uint8_t *s, size_t len)
2830{
2831 ssize_t i;
2832
Brian Norris8b6e50c2011-05-25 14:59:01 -07002833 /* Null terminate */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002834 s[len - 1] = 0;
2835
Brian Norris8b6e50c2011-05-25 14:59:01 -07002836 /* Remove non printable chars */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002837 for (i = 0; i < len - 1; i++) {
2838 if (s[i] < ' ' || s[i] > 127)
2839 s[i] = '?';
2840 }
2841
Brian Norris8b6e50c2011-05-25 14:59:01 -07002842 /* Remove trailing spaces */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002843 strim(s);
2844}
2845
2846static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)
2847{
2848 int i;
2849 while (len--) {
2850 crc ^= *p++ << 8;
2851 for (i = 0; i < 8; i++)
2852 crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0);
2853 }
2854
2855 return crc;
2856}
2857
Huang Shijie6dcbe0c2013-05-22 10:28:27 +08002858/* Parse the Extended Parameter Page. */
2859static int nand_flash_detect_ext_param_page(struct mtd_info *mtd,
2860 struct nand_chip *chip, struct nand_onfi_params *p)
2861{
2862 struct onfi_ext_param_page *ep;
2863 struct onfi_ext_section *s;
2864 struct onfi_ext_ecc_info *ecc;
2865 uint8_t *cursor;
2866 int ret = -EINVAL;
2867 int len;
2868 int i;
2869
2870 len = le16_to_cpu(p->ext_param_page_length) * 16;
2871 ep = kmalloc(len, GFP_KERNEL);
2872 if (!ep) {
2873 ret = -ENOMEM;
2874 goto ext_out;
2875 }
2876
2877 /* Send our own NAND_CMD_PARAM. */
2878 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
2879
2880 /* Use the Change Read Column command to skip the ONFI param pages. */
2881 chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
2882 sizeof(*p) * p->num_of_param_pages , -1);
2883
2884 /* Read out the Extended Parameter Page. */
2885 chip->read_buf(mtd, (uint8_t *)ep, len);
2886 if ((onfi_crc16(ONFI_CRC_BASE, ((uint8_t *)ep) + 2, len - 2)
2887 != le16_to_cpu(ep->crc))) {
2888 pr_debug("fail in the CRC.\n");
2889 goto ext_out;
2890 }
2891
2892 /*
2893 * Check the signature.
2894 * Do not strictly follow the ONFI spec, maybe changed in future.
2895 */
2896 if (strncmp(ep->sig, "EPPS", 4)) {
2897 pr_debug("The signature is invalid.\n");
2898 goto ext_out;
2899 }
2900
2901 /* find the ECC section. */
2902 cursor = (uint8_t *)(ep + 1);
2903 for (i = 0; i < ONFI_EXT_SECTION_MAX; i++) {
2904 s = ep->sections + i;
2905 if (s->type == ONFI_SECTION_TYPE_2)
2906 break;
2907 cursor += s->length * 16;
2908 }
2909 if (i == ONFI_EXT_SECTION_MAX) {
2910 pr_debug("We can not find the ECC section.\n");
2911 goto ext_out;
2912 }
2913
2914 /* get the info we want. */
2915 ecc = (struct onfi_ext_ecc_info *)cursor;
2916
2917 if (ecc->codeword_size) {
2918 chip->ecc_strength_ds = ecc->ecc_bits;
2919 chip->ecc_step_ds = 1 << ecc->codeword_size;
2920 }
2921
2922 pr_info("ONFI extended param page detected.\n");
2923 return 0;
2924
2925ext_out:
2926 kfree(ep);
2927 return ret;
2928}
2929
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002930/*
Brian Norris8b6e50c2011-05-25 14:59:01 -07002931 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002932 */
2933static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
Matthieu CASTET08c248f2011-06-26 18:26:55 +02002934 int *busw)
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002935{
2936 struct nand_onfi_params *p = &chip->onfi_params;
2937 int i;
2938 int val;
2939
Matthieu CASTET0ce82b72013-01-16 15:25:45 +01002940 /* ONFI need to be probed in 8 bits mode, and 16 bits should be selected with NAND_BUSWIDTH_AUTO */
2941 if (chip->options & NAND_BUSWIDTH_16) {
2942 pr_err("Trying ONFI probe in 16 bits mode, aborting !\n");
2943 return 0;
2944 }
Brian Norris7854d3f2011-06-23 14:12:08 -07002945 /* Try ONFI for unknown chip or LP */
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002946 chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
2947 if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
2948 chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I')
2949 return 0;
2950
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002951 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
2952 for (i = 0; i < 3; i++) {
2953 chip->read_buf(mtd, (uint8_t *)p, sizeof(*p));
2954 if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==
2955 le16_to_cpu(p->crc)) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07002956 pr_info("ONFI param page %d valid\n", i);
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002957 break;
2958 }
2959 }
2960
2961 if (i == 3)
2962 return 0;
2963
Brian Norris8b6e50c2011-05-25 14:59:01 -07002964 /* Check version */
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002965 val = le16_to_cpu(p->revision);
Brian Norrisb7b1a292010-12-12 00:23:33 -08002966 if (val & (1 << 5))
2967 chip->onfi_version = 23;
2968 else if (val & (1 << 4))
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002969 chip->onfi_version = 22;
2970 else if (val & (1 << 3))
2971 chip->onfi_version = 21;
2972 else if (val & (1 << 2))
2973 chip->onfi_version = 20;
Brian Norrisb7b1a292010-12-12 00:23:33 -08002974 else if (val & (1 << 1))
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002975 chip->onfi_version = 10;
Brian Norrisb7b1a292010-12-12 00:23:33 -08002976
2977 if (!chip->onfi_version) {
Brian Norrisd0370212011-07-19 10:06:08 -07002978 pr_info("%s: unsupported ONFI version: %d\n", __func__, val);
Brian Norrisb7b1a292010-12-12 00:23:33 -08002979 return 0;
2980 }
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002981
2982 sanitize_string(p->manufacturer, sizeof(p->manufacturer));
2983 sanitize_string(p->model, sizeof(p->model));
2984 if (!mtd->name)
2985 mtd->name = p->model;
2986 mtd->writesize = le32_to_cpu(p->byte_per_page);
2987 mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
2988 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
Matthieu CASTET63795752012-03-19 15:35:25 +01002989 chip->chipsize = le32_to_cpu(p->blocks_per_lun);
2990 chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
Huang Shijiee2985fc2013-05-17 11:17:30 +08002991
2992 if (onfi_feature(chip) & ONFI_FEATURE_16_BIT_BUS)
Matthieu CASTET08c248f2011-06-26 18:26:55 +02002993 *busw = NAND_BUSWIDTH_16;
Huang Shijiee2985fc2013-05-17 11:17:30 +08002994 else
2995 *busw = 0;
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002996
Huang Shijie10c86ba2013-05-17 11:17:26 +08002997 if (p->ecc_bits != 0xff) {
2998 chip->ecc_strength_ds = p->ecc_bits;
2999 chip->ecc_step_ds = 512;
Huang Shijie6dcbe0c2013-05-22 10:28:27 +08003000 } else if (chip->onfi_version >= 21 &&
3001 (onfi_feature(chip) & ONFI_FEATURE_EXT_PARAM_PAGE)) {
3002
3003 /*
3004 * The nand_flash_detect_ext_param_page() uses the
3005 * Change Read Column command which maybe not supported
3006 * by the chip->cmdfunc. So try to update the chip->cmdfunc
3007 * now. We do not replace user supplied command function.
3008 */
3009 if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
3010 chip->cmdfunc = nand_command_lp;
3011
3012 /* The Extended Parameter Page is supported since ONFI 2.1. */
3013 if (nand_flash_detect_ext_param_page(mtd, chip, p))
3014 pr_info("Failed to detect the extended param page.\n");
Huang Shijie10c86ba2013-05-17 11:17:26 +08003015 }
3016
Huang Shijied42b5de2012-02-17 11:22:37 +08003017 pr_info("ONFI flash detected\n");
Florian Fainelli6fb277b2010-09-01 22:28:59 +02003018 return 1;
3019}
3020
3021/*
Brian Norrise3b88bd2012-09-24 20:40:52 -07003022 * nand_id_has_period - Check if an ID string has a given wraparound period
3023 * @id_data: the ID string
3024 * @arrlen: the length of the @id_data array
3025 * @period: the period of repitition
3026 *
3027 * Check if an ID string is repeated within a given sequence of bytes at
3028 * specific repetition interval period (e.g., {0x20,0x01,0x7F,0x20} has a
Brian Norrisd4d4f1b2012-11-14 21:54:20 -08003029 * period of 3). This is a helper function for nand_id_len(). Returns non-zero
Brian Norrise3b88bd2012-09-24 20:40:52 -07003030 * if the repetition has a period of @period; otherwise, returns zero.
3031 */
3032static int nand_id_has_period(u8 *id_data, int arrlen, int period)
3033{
3034 int i, j;
3035 for (i = 0; i < period; i++)
3036 for (j = i + period; j < arrlen; j += period)
3037 if (id_data[i] != id_data[j])
3038 return 0;
3039 return 1;
3040}
3041
3042/*
3043 * nand_id_len - Get the length of an ID string returned by CMD_READID
3044 * @id_data: the ID string
3045 * @arrlen: the length of the @id_data array
3046
3047 * Returns the length of the ID string, according to known wraparound/trailing
3048 * zero patterns. If no pattern exists, returns the length of the array.
3049 */
3050static int nand_id_len(u8 *id_data, int arrlen)
3051{
3052 int last_nonzero, period;
3053
3054 /* Find last non-zero byte */
3055 for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--)
3056 if (id_data[last_nonzero])
3057 break;
3058
3059 /* All zeros */
3060 if (last_nonzero < 0)
3061 return 0;
3062
3063 /* Calculate wraparound period */
3064 for (period = 1; period < arrlen; period++)
3065 if (nand_id_has_period(id_data, arrlen, period))
3066 break;
3067
3068 /* There's a repeated pattern */
3069 if (period < arrlen)
3070 return period;
3071
3072 /* There are trailing zeros */
3073 if (last_nonzero < arrlen - 1)
3074 return last_nonzero + 1;
3075
3076 /* No pattern detected */
3077 return arrlen;
3078}
3079
3080/*
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003081 * Many new NAND share similar device ID codes, which represent the size of the
3082 * chip. The rest of the parameters must be decoded according to generic or
3083 * manufacturer-specific "extended ID" decoding patterns.
3084 */
3085static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,
3086 u8 id_data[8], int *busw)
3087{
Brian Norrise3b88bd2012-09-24 20:40:52 -07003088 int extid, id_len;
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003089 /* The 3rd id byte holds MLC / multichip data */
3090 chip->cellinfo = id_data[2];
3091 /* The 4th id byte is the important one */
3092 extid = id_data[3];
3093
Brian Norrise3b88bd2012-09-24 20:40:52 -07003094 id_len = nand_id_len(id_data, 8);
3095
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003096 /*
3097 * Field definitions are in the following datasheets:
3098 * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)
Brian Norrisaf451af2012-10-09 23:26:06 -07003099 * New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44)
Brian Norris73ca3922012-09-24 20:40:54 -07003100 * Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22)
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003101 *
Brian Norrisaf451af2012-10-09 23:26:06 -07003102 * Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung
3103 * ID to decide what to do.
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003104 */
Brian Norrisaf451af2012-10-09 23:26:06 -07003105 if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG &&
Brian Norris6924d992012-11-14 21:46:30 -08003106 (chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
Brian Norrisaf451af2012-10-09 23:26:06 -07003107 id_data[5] != 0x00) {
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003108 /* Calc pagesize */
3109 mtd->writesize = 2048 << (extid & 0x03);
3110 extid >>= 2;
3111 /* Calc oobsize */
Brian Norrise2d3a352012-09-24 20:40:55 -07003112 switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003113 case 1:
3114 mtd->oobsize = 128;
3115 break;
3116 case 2:
3117 mtd->oobsize = 218;
3118 break;
3119 case 3:
3120 mtd->oobsize = 400;
3121 break;
Brian Norrise2d3a352012-09-24 20:40:55 -07003122 case 4:
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003123 mtd->oobsize = 436;
3124 break;
Brian Norrise2d3a352012-09-24 20:40:55 -07003125 case 5:
3126 mtd->oobsize = 512;
3127 break;
3128 case 6:
3129 default: /* Other cases are "reserved" (unknown) */
3130 mtd->oobsize = 640;
3131 break;
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003132 }
3133 extid >>= 2;
3134 /* Calc blocksize */
3135 mtd->erasesize = (128 * 1024) <<
3136 (((extid >> 1) & 0x04) | (extid & 0x03));
3137 *busw = 0;
Brian Norris73ca3922012-09-24 20:40:54 -07003138 } else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX &&
3139 (chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
3140 unsigned int tmp;
3141
3142 /* Calc pagesize */
3143 mtd->writesize = 2048 << (extid & 0x03);
3144 extid >>= 2;
3145 /* Calc oobsize */
3146 switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
3147 case 0:
3148 mtd->oobsize = 128;
3149 break;
3150 case 1:
3151 mtd->oobsize = 224;
3152 break;
3153 case 2:
3154 mtd->oobsize = 448;
3155 break;
3156 case 3:
3157 mtd->oobsize = 64;
3158 break;
3159 case 4:
3160 mtd->oobsize = 32;
3161 break;
3162 case 5:
3163 mtd->oobsize = 16;
3164 break;
3165 default:
3166 mtd->oobsize = 640;
3167 break;
3168 }
3169 extid >>= 2;
3170 /* Calc blocksize */
3171 tmp = ((extid >> 1) & 0x04) | (extid & 0x03);
3172 if (tmp < 0x03)
3173 mtd->erasesize = (128 * 1024) << tmp;
3174 else if (tmp == 0x03)
3175 mtd->erasesize = 768 * 1024;
3176 else
3177 mtd->erasesize = (64 * 1024) << tmp;
3178 *busw = 0;
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003179 } else {
3180 /* Calc pagesize */
3181 mtd->writesize = 1024 << (extid & 0x03);
3182 extid >>= 2;
3183 /* Calc oobsize */
3184 mtd->oobsize = (8 << (extid & 0x01)) *
3185 (mtd->writesize >> 9);
3186 extid >>= 2;
3187 /* Calc blocksize. Blocksize is multiples of 64KiB */
3188 mtd->erasesize = (64 * 1024) << (extid & 0x03);
3189 extid >>= 2;
3190 /* Get buswidth information */
3191 *busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
Brian Norris60c67382013-06-25 13:17:59 -07003192
3193 /*
3194 * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
3195 * 512B page. For Toshiba SLC, we decode the 5th/6th byte as
3196 * follows:
3197 * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm,
3198 * 110b -> 24nm
3199 * - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC
3200 */
3201 if (id_len >= 6 && id_data[0] == NAND_MFR_TOSHIBA &&
3202 !(chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3203 (id_data[5] & 0x7) == 0x6 /* 24nm */ &&
3204 !(id_data[4] & 0x80) /* !BENAND */) {
3205 mtd->oobsize = 32 * mtd->writesize >> 9;
3206 }
3207
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003208 }
3209}
3210
3211/*
Brian Norrisf23a4812012-09-24 20:40:51 -07003212 * Old devices have chip data hardcoded in the device ID table. nand_decode_id
3213 * decodes a matching ID table entry and assigns the MTD size parameters for
3214 * the chip.
3215 */
3216static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip,
3217 struct nand_flash_dev *type, u8 id_data[8],
3218 int *busw)
3219{
3220 int maf_id = id_data[0];
3221
3222 mtd->erasesize = type->erasesize;
3223 mtd->writesize = type->pagesize;
3224 mtd->oobsize = mtd->writesize / 32;
3225 *busw = type->options & NAND_BUSWIDTH_16;
3226
3227 /*
3228 * Check for Spansion/AMD ID + repeating 5th, 6th byte since
3229 * some Spansion chips have erasesize that conflicts with size
3230 * listed in nand_ids table.
3231 * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
3232 */
3233 if (maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && id_data[5] == 0x00
3234 && id_data[6] == 0x00 && id_data[7] == 0x00
3235 && mtd->writesize == 512) {
3236 mtd->erasesize = 128 * 1024;
3237 mtd->erasesize <<= ((id_data[3] & 0x03) << 1);
3238 }
3239}
3240
3241/*
Brian Norris7e74c2d2012-09-24 20:40:49 -07003242 * Set the bad block marker/indicator (BBM/BBI) patterns according to some
3243 * heuristic patterns using various detected parameters (e.g., manufacturer,
3244 * page size, cell-type information).
3245 */
3246static void nand_decode_bbm_options(struct mtd_info *mtd,
3247 struct nand_chip *chip, u8 id_data[8])
3248{
3249 int maf_id = id_data[0];
3250
3251 /* Set the bad block position */
3252 if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16))
3253 chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
3254 else
3255 chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
3256
3257 /*
3258 * Bad block marker is stored in the last page of each block on Samsung
3259 * and Hynix MLC devices; stored in first two pages of each block on
3260 * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,
3261 * AMD/Spansion, and Macronix. All others scan only the first page.
3262 */
3263 if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3264 (maf_id == NAND_MFR_SAMSUNG ||
3265 maf_id == NAND_MFR_HYNIX))
3266 chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
3267 else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3268 (maf_id == NAND_MFR_SAMSUNG ||
3269 maf_id == NAND_MFR_HYNIX ||
3270 maf_id == NAND_MFR_TOSHIBA ||
3271 maf_id == NAND_MFR_AMD ||
3272 maf_id == NAND_MFR_MACRONIX)) ||
3273 (mtd->writesize == 2048 &&
3274 maf_id == NAND_MFR_MICRON))
3275 chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
3276}
3277
Huang Shijieec6e87e2013-03-15 11:01:00 +08003278static inline bool is_full_id_nand(struct nand_flash_dev *type)
3279{
3280 return type->id_len;
3281}
3282
3283static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip,
3284 struct nand_flash_dev *type, u8 *id_data, int *busw)
3285{
3286 if (!strncmp(type->id, id_data, type->id_len)) {
3287 mtd->writesize = type->pagesize;
3288 mtd->erasesize = type->erasesize;
3289 mtd->oobsize = type->oobsize;
3290
3291 chip->cellinfo = id_data[2];
3292 chip->chipsize = (uint64_t)type->chipsize << 20;
3293 chip->options |= type->options;
Huang Shijie57219342013-05-17 11:17:32 +08003294 chip->ecc_strength_ds = NAND_ECC_STRENGTH(type);
3295 chip->ecc_step_ds = NAND_ECC_STEP(type);
Huang Shijieec6e87e2013-03-15 11:01:00 +08003296
3297 *busw = type->options & NAND_BUSWIDTH_16;
3298
3299 return true;
3300 }
3301 return false;
3302}
3303
Brian Norris7e74c2d2012-09-24 20:40:49 -07003304/*
Brian Norris8b6e50c2011-05-25 14:59:01 -07003305 * Get the flash and manufacturer id and lookup if the type is supported.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003306 */
3307static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003308 struct nand_chip *chip,
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003309 int busw,
3310 int *maf_id, int *dev_id,
David Woodhouse5e81e882010-02-26 18:32:56 +00003311 struct nand_flash_dev *type)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003312{
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003313 int i, maf_idx;
Kevin Cernekee426c4572010-05-04 20:58:03 -07003314 u8 id_data[8];
Linus Torvalds1da177e2005-04-16 15:20:36 -07003315
3316 /* Select the device */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003317 chip->select_chip(mtd, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003318
Karl Beldanef89a882008-09-15 14:37:29 +02003319 /*
3320 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
Brian Norris8b6e50c2011-05-25 14:59:01 -07003321 * after power-up.
Karl Beldanef89a882008-09-15 14:37:29 +02003322 */
3323 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
3324
Linus Torvalds1da177e2005-04-16 15:20:36 -07003325 /* Send the command for reading device ID */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003326 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003327
3328 /* Read manufacturer and device IDs */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003329 *maf_id = chip->read_byte(mtd);
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003330 *dev_id = chip->read_byte(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003331
Brian Norris8b6e50c2011-05-25 14:59:01 -07003332 /*
3333 * Try again to make sure, as some systems the bus-hold or other
Ben Dooksed8165c2008-04-14 14:58:58 +01003334 * interface concerns can cause random data which looks like a
3335 * possibly credible NAND flash to appear. If the two results do
3336 * not match, ignore the device completely.
3337 */
3338
3339 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
3340
Brian Norris4aef9b72012-09-24 20:40:48 -07003341 /* Read entire ID string */
3342 for (i = 0; i < 8; i++)
Kevin Cernekee426c4572010-05-04 20:58:03 -07003343 id_data[i] = chip->read_byte(mtd);
Ben Dooksed8165c2008-04-14 14:58:58 +01003344
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003345 if (id_data[0] != *maf_id || id_data[1] != *dev_id) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003346 pr_info("%s: second ID read did not match "
Brian Norrisd0370212011-07-19 10:06:08 -07003347 "%02x,%02x against %02x,%02x\n", __func__,
3348 *maf_id, *dev_id, id_data[0], id_data[1]);
Ben Dooksed8165c2008-04-14 14:58:58 +01003349 return ERR_PTR(-ENODEV);
3350 }
3351
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003352 if (!type)
David Woodhouse5e81e882010-02-26 18:32:56 +00003353 type = nand_flash_ids;
3354
Huang Shijieec6e87e2013-03-15 11:01:00 +08003355 for (; type->name != NULL; type++) {
3356 if (is_full_id_nand(type)) {
3357 if (find_full_id_nand(mtd, chip, type, id_data, &busw))
3358 goto ident_done;
3359 } else if (*dev_id == type->dev_id) {
3360 break;
3361 }
3362 }
David Woodhouse5e81e882010-02-26 18:32:56 +00003363
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003364 chip->onfi_version = 0;
3365 if (!type->name || !type->pagesize) {
Florian Fainelli6fb277b2010-09-01 22:28:59 +02003366 /* Check is chip is ONFI compliant */
Brian Norris47450b32012-09-24 20:40:47 -07003367 if (nand_flash_detect_onfi(mtd, chip, &busw))
Florian Fainelli6fb277b2010-09-01 22:28:59 +02003368 goto ident_done;
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003369 }
3370
David Woodhouse5e81e882010-02-26 18:32:56 +00003371 if (!type->name)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003372 return ERR_PTR(-ENODEV);
3373
Thomas Gleixnerba0251f2006-05-27 01:02:13 +02003374 if (!mtd->name)
3375 mtd->name = type->name;
3376
Adrian Hunter69423d92008-12-10 13:37:21 +00003377 chip->chipsize = (uint64_t)type->chipsize << 20;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003378
Huang Shijie12a40a52010-09-27 10:43:53 +08003379 if (!type->pagesize && chip->init_size) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07003380 /* Set the pagesize, oobsize, erasesize by the driver */
Huang Shijie12a40a52010-09-27 10:43:53 +08003381 busw = chip->init_size(mtd, chip, id_data);
3382 } else if (!type->pagesize) {
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003383 /* Decode parameters from extended ID */
3384 nand_decode_ext_id(mtd, chip, id_data, &busw);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003385 } else {
Brian Norrisf23a4812012-09-24 20:40:51 -07003386 nand_decode_id(mtd, chip, type, id_data, &busw);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003387 }
Brian Norrisbf7a01b2012-07-13 09:28:24 -07003388 /* Get chip options */
3389 chip->options |= type->options;
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003390
Brian Norris8b6e50c2011-05-25 14:59:01 -07003391 /*
3392 * Check if chip is not a Samsung device. Do not clear the
3393 * options for chips which do not have an extended id.
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003394 */
3395 if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)
3396 chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
3397ident_done:
3398
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003399 /* Try to identify manufacturer */
David Woodhouse9a909862006-07-15 13:26:18 +01003400 for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003401 if (nand_manuf_ids[maf_idx].id == *maf_id)
3402 break;
3403 }
3404
Matthieu CASTET64b37b22012-11-06 11:51:44 +01003405 if (chip->options & NAND_BUSWIDTH_AUTO) {
3406 WARN_ON(chip->options & NAND_BUSWIDTH_16);
3407 chip->options |= busw;
3408 nand_set_defaults(chip, busw);
3409 } else if (busw != (chip->options & NAND_BUSWIDTH_16)) {
3410 /*
3411 * Check, if buswidth is correct. Hardware drivers should set
3412 * chip correct!
3413 */
Brian Norris9a4d4d62011-07-19 10:06:07 -07003414 pr_info("NAND device: Manufacturer ID:"
Brian Norrisd0370212011-07-19 10:06:08 -07003415 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
3416 *dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
Brian Norris9a4d4d62011-07-19 10:06:07 -07003417 pr_warn("NAND bus width %d instead %d bit\n",
Brian Norrisd0370212011-07-19 10:06:08 -07003418 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
3419 busw ? 16 : 8);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003420 return ERR_PTR(-EINVAL);
3421 }
3422
Brian Norris7e74c2d2012-09-24 20:40:49 -07003423 nand_decode_bbm_options(mtd, chip, id_data);
3424
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003425 /* Calculate the address shift from the page size */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003426 chip->page_shift = ffs(mtd->writesize) - 1;
Brian Norris8b6e50c2011-05-25 14:59:01 -07003427 /* Convert chipsize to number of pages per chip -1 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003428 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003429
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003430 chip->bbt_erase_shift = chip->phys_erase_shift =
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003431 ffs(mtd->erasesize) - 1;
Adrian Hunter69423d92008-12-10 13:37:21 +00003432 if (chip->chipsize & 0xffffffff)
3433 chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003434 else {
3435 chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32));
3436 chip->chip_shift += 32 - 1;
3437 }
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003438
Artem Bityutskiy26d9be12011-04-28 20:26:59 +03003439 chip->badblockbits = 8;
Artem Bityutskiy14c65782013-03-04 14:21:34 +02003440 chip->erase_cmd = single_erase_cmd;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003441
Brian Norris8b6e50c2011-05-25 14:59:01 -07003442 /* Do not replace user supplied command function! */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003443 if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
3444 chip->cmdfunc = nand_command_lp;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003445
Huang Shijie886bd332012-04-09 11:41:37 +08003446 pr_info("NAND device: Manufacturer ID: 0x%02x, Chip ID: 0x%02x (%s %s),"
Matthieu CASTET2fd71a22012-11-22 18:33:40 +01003447 " %dMiB, page size: %d, OOB size: %d\n",
Huang Shijie886bd332012-04-09 11:41:37 +08003448 *maf_id, *dev_id, nand_manuf_ids[maf_idx].name,
3449 chip->onfi_version ? chip->onfi_params.model : type->name,
Matthieu CASTET2fd71a22012-11-22 18:33:40 +01003450 (int)(chip->chipsize >> 20), mtd->writesize, mtd->oobsize);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003451
3452 return type;
3453}
3454
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003455/**
David Woodhouse3b85c322006-09-25 17:06:53 +01003456 * nand_scan_ident - [NAND Interface] Scan for the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003457 * @mtd: MTD device structure
3458 * @maxchips: number of chips to scan for
3459 * @table: alternative NAND ID table
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003460 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07003461 * This is the first phase of the normal nand_scan() function. It reads the
3462 * flash ID and sets up MTD fields accordingly.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003463 *
David Woodhouse3b85c322006-09-25 17:06:53 +01003464 * The mtd->owner field must be set to the module of the caller.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003465 */
David Woodhouse5e81e882010-02-26 18:32:56 +00003466int nand_scan_ident(struct mtd_info *mtd, int maxchips,
3467 struct nand_flash_dev *table)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003468{
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003469 int i, busw, nand_maf_id, nand_dev_id;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003470 struct nand_chip *chip = mtd->priv;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003471 struct nand_flash_dev *type;
3472
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003473 /* Get buswidth to select the correct functions */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003474 busw = chip->options & NAND_BUSWIDTH_16;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003475 /* Set the default functions */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003476 nand_set_defaults(chip, busw);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003477
3478 /* Read the flash type */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003479 type = nand_get_flash_type(mtd, chip, busw,
3480 &nand_maf_id, &nand_dev_id, table);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003481
3482 if (IS_ERR(type)) {
Ben Dooksb1c6e6d2009-11-02 18:12:33 +00003483 if (!(chip->options & NAND_SCAN_SILENT_NODEV))
Brian Norrisd0370212011-07-19 10:06:08 -07003484 pr_warn("No NAND device found\n");
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003485 chip->select_chip(mtd, -1);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003486 return PTR_ERR(type);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003487 }
3488
Huang Shijie07300162012-11-09 16:23:45 +08003489 chip->select_chip(mtd, -1);
3490
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003491 /* Check for a chip array */
David Woodhousee0c7d762006-05-13 18:07:53 +01003492 for (i = 1; i < maxchips; i++) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003493 chip->select_chip(mtd, i);
Karl Beldanef89a882008-09-15 14:37:29 +02003494 /* See comment in nand_get_flash_type for reset */
3495 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003496 /* Send the command for reading device ID */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003497 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003498 /* Read manufacturer and device IDs */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003499 if (nand_maf_id != chip->read_byte(mtd) ||
Huang Shijie07300162012-11-09 16:23:45 +08003500 nand_dev_id != chip->read_byte(mtd)) {
3501 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003502 break;
Huang Shijie07300162012-11-09 16:23:45 +08003503 }
3504 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003505 }
3506 if (i > 1)
Brian Norris9a4d4d62011-07-19 10:06:07 -07003507 pr_info("%d NAND chips detected\n", i);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003508
Linus Torvalds1da177e2005-04-16 15:20:36 -07003509 /* Store the number of chips and calc total size for mtd */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003510 chip->numchips = i;
3511 mtd->size = i * chip->chipsize;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003512
David Woodhouse3b85c322006-09-25 17:06:53 +01003513 return 0;
3514}
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003515EXPORT_SYMBOL(nand_scan_ident);
David Woodhouse3b85c322006-09-25 17:06:53 +01003516
3517
3518/**
3519 * nand_scan_tail - [NAND Interface] Scan for the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003520 * @mtd: MTD device structure
David Woodhouse3b85c322006-09-25 17:06:53 +01003521 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07003522 * This is the second phase of the normal nand_scan() function. It fills out
3523 * all the uninitialized function pointers with the defaults and scans for a
3524 * bad block table if appropriate.
David Woodhouse3b85c322006-09-25 17:06:53 +01003525 */
3526int nand_scan_tail(struct mtd_info *mtd)
3527{
3528 int i;
3529 struct nand_chip *chip = mtd->priv;
3530
Brian Norrise2414f42012-02-06 13:44:00 -08003531 /* New bad blocks should be marked in OOB, flash-based BBT, or both */
3532 BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
3533 !(chip->bbt_options & NAND_BBT_USE_FLASH));
3534
David Woodhouse4bf63fc2006-09-25 17:08:04 +01003535 if (!(chip->options & NAND_OWN_BUFFERS))
3536 chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL);
3537 if (!chip->buffers)
3538 return -ENOMEM;
3539
David Woodhouse7dcdcbef2006-10-21 17:09:53 +01003540 /* Set the internal oob buffer location, just after the page data */
David Woodhouse784f4d52006-10-22 01:47:45 +01003541 chip->oob_poi = chip->buffers->databuf + mtd->writesize;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003542
3543 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -07003544 * If no default placement scheme is given, select an appropriate one.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003545 */
Ivan Djelic193bd402011-03-11 11:05:33 +01003546 if (!chip->ecc.layout && (chip->ecc.mode != NAND_ECC_SOFT_BCH)) {
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003547 switch (mtd->oobsize) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003548 case 8:
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003549 chip->ecc.layout = &nand_oob_8;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003550 break;
3551 case 16:
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003552 chip->ecc.layout = &nand_oob_16;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003553 break;
3554 case 64:
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003555 chip->ecc.layout = &nand_oob_64;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003556 break;
Thomas Gleixner81ec5362007-12-12 17:27:03 +01003557 case 128:
3558 chip->ecc.layout = &nand_oob_128;
3559 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003560 default:
Brian Norrisd0370212011-07-19 10:06:08 -07003561 pr_warn("No oob scheme defined for oobsize %d\n",
3562 mtd->oobsize);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003563 BUG();
3564 }
3565 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003566
David Woodhouse956e9442006-09-25 17:12:39 +01003567 if (!chip->write_page)
3568 chip->write_page = nand_write_page;
3569
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003570 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -07003571 * Check ECC mode, default to software if 3byte/512byte hardware ECC is
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003572 * selected and we have 256 byte pagesize fallback to software ECC
David Woodhousee0c7d762006-05-13 18:07:53 +01003573 */
David Woodhouse956e9442006-09-25 17:12:39 +01003574
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003575 switch (chip->ecc.mode) {
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07003576 case NAND_ECC_HW_OOB_FIRST:
3577 /* Similar to NAND_ECC_HW, but a separate read_page handle */
3578 if (!chip->ecc.calculate || !chip->ecc.correct ||
3579 !chip->ecc.hwctl) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003580 pr_warn("No ECC functions supplied; "
Brian Norrisd0370212011-07-19 10:06:08 -07003581 "hardware ECC not possible\n");
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07003582 BUG();
3583 }
3584 if (!chip->ecc.read_page)
3585 chip->ecc.read_page = nand_read_page_hwecc_oob_first;
3586
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003587 case NAND_ECC_HW:
Brian Norris8b6e50c2011-05-25 14:59:01 -07003588 /* Use standard hwecc read page function? */
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003589 if (!chip->ecc.read_page)
3590 chip->ecc.read_page = nand_read_page_hwecc;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02003591 if (!chip->ecc.write_page)
3592 chip->ecc.write_page = nand_write_page_hwecc;
David Brownell52ff49d2009-03-04 12:01:36 -08003593 if (!chip->ecc.read_page_raw)
3594 chip->ecc.read_page_raw = nand_read_page_raw;
3595 if (!chip->ecc.write_page_raw)
3596 chip->ecc.write_page_raw = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003597 if (!chip->ecc.read_oob)
3598 chip->ecc.read_oob = nand_read_oob_std;
3599 if (!chip->ecc.write_oob)
3600 chip->ecc.write_oob = nand_write_oob_std;
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05303601 if (!chip->ecc.read_subpage)
3602 chip->ecc.read_subpage = nand_read_subpage;
3603 if (!chip->ecc.write_subpage)
3604 chip->ecc.write_subpage = nand_write_subpage_hwecc;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003605
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003606 case NAND_ECC_HW_SYNDROME:
Scott Wood78b65172007-12-13 11:15:28 -06003607 if ((!chip->ecc.calculate || !chip->ecc.correct ||
3608 !chip->ecc.hwctl) &&
3609 (!chip->ecc.read_page ||
Scott Wood1c45f602008-01-16 10:36:03 -06003610 chip->ecc.read_page == nand_read_page_hwecc ||
Scott Wood78b65172007-12-13 11:15:28 -06003611 !chip->ecc.write_page ||
Scott Wood1c45f602008-01-16 10:36:03 -06003612 chip->ecc.write_page == nand_write_page_hwecc)) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003613 pr_warn("No ECC functions supplied; "
Brian Norrisd0370212011-07-19 10:06:08 -07003614 "hardware ECC not possible\n");
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003615 BUG();
3616 }
Brian Norris8b6e50c2011-05-25 14:59:01 -07003617 /* Use standard syndrome read/write page function? */
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003618 if (!chip->ecc.read_page)
3619 chip->ecc.read_page = nand_read_page_syndrome;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02003620 if (!chip->ecc.write_page)
3621 chip->ecc.write_page = nand_write_page_syndrome;
David Brownell52ff49d2009-03-04 12:01:36 -08003622 if (!chip->ecc.read_page_raw)
3623 chip->ecc.read_page_raw = nand_read_page_raw_syndrome;
3624 if (!chip->ecc.write_page_raw)
3625 chip->ecc.write_page_raw = nand_write_page_raw_syndrome;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003626 if (!chip->ecc.read_oob)
3627 chip->ecc.read_oob = nand_read_oob_syndrome;
3628 if (!chip->ecc.write_oob)
3629 chip->ecc.write_oob = nand_write_oob_syndrome;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003630
Mike Dunne2788c92012-04-25 12:06:10 -07003631 if (mtd->writesize >= chip->ecc.size) {
3632 if (!chip->ecc.strength) {
3633 pr_warn("Driver must set ecc.strength when using hardware ECC\n");
3634 BUG();
3635 }
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003636 break;
Mike Dunne2788c92012-04-25 12:06:10 -07003637 }
Brian Norris9a4d4d62011-07-19 10:06:07 -07003638 pr_warn("%d byte HW ECC not possible on "
Brian Norrisd0370212011-07-19 10:06:08 -07003639 "%d byte page size, fallback to SW ECC\n",
3640 chip->ecc.size, mtd->writesize);
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003641 chip->ecc.mode = NAND_ECC_SOFT;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003642
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003643 case NAND_ECC_SOFT:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003644 chip->ecc.calculate = nand_calculate_ecc;
3645 chip->ecc.correct = nand_correct_data;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003646 chip->ecc.read_page = nand_read_page_swecc;
Alexey Korolev3d459552008-05-15 17:23:18 +01003647 chip->ecc.read_subpage = nand_read_subpage;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02003648 chip->ecc.write_page = nand_write_page_swecc;
David Brownell52ff49d2009-03-04 12:01:36 -08003649 chip->ecc.read_page_raw = nand_read_page_raw;
3650 chip->ecc.write_page_raw = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003651 chip->ecc.read_oob = nand_read_oob_std;
3652 chip->ecc.write_oob = nand_write_oob_std;
Singh, Vimal9a732902008-12-12 00:10:57 +00003653 if (!chip->ecc.size)
3654 chip->ecc.size = 256;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003655 chip->ecc.bytes = 3;
Mike Dunn6a918ba2012-03-11 14:21:11 -07003656 chip->ecc.strength = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003657 break;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003658
Ivan Djelic193bd402011-03-11 11:05:33 +01003659 case NAND_ECC_SOFT_BCH:
3660 if (!mtd_nand_has_bch()) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003661 pr_warn("CONFIG_MTD_ECC_BCH not enabled\n");
Ivan Djelic193bd402011-03-11 11:05:33 +01003662 BUG();
3663 }
3664 chip->ecc.calculate = nand_bch_calculate_ecc;
3665 chip->ecc.correct = nand_bch_correct_data;
3666 chip->ecc.read_page = nand_read_page_swecc;
3667 chip->ecc.read_subpage = nand_read_subpage;
3668 chip->ecc.write_page = nand_write_page_swecc;
3669 chip->ecc.read_page_raw = nand_read_page_raw;
3670 chip->ecc.write_page_raw = nand_write_page_raw;
3671 chip->ecc.read_oob = nand_read_oob_std;
3672 chip->ecc.write_oob = nand_write_oob_std;
3673 /*
3674 * Board driver should supply ecc.size and ecc.bytes values to
3675 * select how many bits are correctable; see nand_bch_init()
Brian Norris8b6e50c2011-05-25 14:59:01 -07003676 * for details. Otherwise, default to 4 bits for large page
3677 * devices.
Ivan Djelic193bd402011-03-11 11:05:33 +01003678 */
3679 if (!chip->ecc.size && (mtd->oobsize >= 64)) {
3680 chip->ecc.size = 512;
3681 chip->ecc.bytes = 7;
3682 }
3683 chip->ecc.priv = nand_bch_init(mtd,
3684 chip->ecc.size,
3685 chip->ecc.bytes,
3686 &chip->ecc.layout);
3687 if (!chip->ecc.priv) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003688 pr_warn("BCH ECC initialization failed!\n");
Ivan Djelic193bd402011-03-11 11:05:33 +01003689 BUG();
3690 }
Mike Dunn6a918ba2012-03-11 14:21:11 -07003691 chip->ecc.strength =
Mike Dunne2788c92012-04-25 12:06:10 -07003692 chip->ecc.bytes * 8 / fls(8 * chip->ecc.size);
Ivan Djelic193bd402011-03-11 11:05:33 +01003693 break;
3694
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003695 case NAND_ECC_NONE:
Brian Norris9a4d4d62011-07-19 10:06:07 -07003696 pr_warn("NAND_ECC_NONE selected by board driver. "
Brian Norrisd0370212011-07-19 10:06:08 -07003697 "This is not recommended!\n");
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02003698 chip->ecc.read_page = nand_read_page_raw;
3699 chip->ecc.write_page = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003700 chip->ecc.read_oob = nand_read_oob_std;
David Brownell52ff49d2009-03-04 12:01:36 -08003701 chip->ecc.read_page_raw = nand_read_page_raw;
3702 chip->ecc.write_page_raw = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003703 chip->ecc.write_oob = nand_write_oob_std;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003704 chip->ecc.size = mtd->writesize;
3705 chip->ecc.bytes = 0;
Mike Dunn6a918ba2012-03-11 14:21:11 -07003706 chip->ecc.strength = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003707 break;
David Woodhouse956e9442006-09-25 17:12:39 +01003708
Linus Torvalds1da177e2005-04-16 15:20:36 -07003709 default:
Brian Norrisd0370212011-07-19 10:06:08 -07003710 pr_warn("Invalid NAND_ECC_MODE %d\n", chip->ecc.mode);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003711 BUG();
3712 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003713
Brian Norris9ce244b2011-08-30 18:45:37 -07003714 /* For many systems, the standard OOB write also works for raw */
Brian Norrisc46f6482011-08-30 18:45:38 -07003715 if (!chip->ecc.read_oob_raw)
3716 chip->ecc.read_oob_raw = chip->ecc.read_oob;
Brian Norris9ce244b2011-08-30 18:45:37 -07003717 if (!chip->ecc.write_oob_raw)
3718 chip->ecc.write_oob_raw = chip->ecc.write_oob;
3719
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003720 /*
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003721 * The number of bytes available for a client to place data into
Brian Norris8b6e50c2011-05-25 14:59:01 -07003722 * the out of band area.
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003723 */
3724 chip->ecc.layout->oobavail = 0;
David Brownell81d19b02009-04-21 19:51:20 -07003725 for (i = 0; chip->ecc.layout->oobfree[i].length
3726 && i < ARRAY_SIZE(chip->ecc.layout->oobfree); i++)
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003727 chip->ecc.layout->oobavail +=
3728 chip->ecc.layout->oobfree[i].length;
Vitaly Wool1f922672007-03-06 16:56:34 +03003729 mtd->oobavail = chip->ecc.layout->oobavail;
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003730
3731 /*
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003732 * Set the number of read / write steps for one page depending on ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07003733 * mode.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003734 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003735 chip->ecc.steps = mtd->writesize / chip->ecc.size;
Florian Fainellif8ac0412010-09-07 13:23:43 +02003736 if (chip->ecc.steps * chip->ecc.size != mtd->writesize) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003737 pr_warn("Invalid ECC parameters\n");
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003738 BUG();
Linus Torvalds1da177e2005-04-16 15:20:36 -07003739 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003740 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003741
Brian Norris8b6e50c2011-05-25 14:59:01 -07003742 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
Thomas Gleixner29072b92006-09-28 15:38:36 +02003743 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
3744 !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
Florian Fainellif8ac0412010-09-07 13:23:43 +02003745 switch (chip->ecc.steps) {
Thomas Gleixner29072b92006-09-28 15:38:36 +02003746 case 2:
3747 mtd->subpage_sft = 1;
3748 break;
3749 case 4:
3750 case 8:
Thomas Gleixner81ec5362007-12-12 17:27:03 +01003751 case 16:
Thomas Gleixner29072b92006-09-28 15:38:36 +02003752 mtd->subpage_sft = 2;
3753 break;
3754 }
3755 }
3756 chip->subpagesize = mtd->writesize >> mtd->subpage_sft;
3757
Thomas Gleixner04bbd0e2006-05-25 09:45:29 +02003758 /* Initialize state */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003759 chip->state = FL_READY;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003760
Linus Torvalds1da177e2005-04-16 15:20:36 -07003761 /* Invalidate the pagebuffer reference */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003762 chip->pagebuf = -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003763
Jeff Westfahla5ff4f12012-08-13 16:35:30 -05003764 /* Large page NAND with SOFT_ECC should support subpage reads */
3765 if ((chip->ecc.mode == NAND_ECC_SOFT) && (chip->page_shift > 9))
3766 chip->options |= NAND_SUBPAGE_READ;
3767
Linus Torvalds1da177e2005-04-16 15:20:36 -07003768 /* Fill in remaining MTD driver data */
3769 mtd->type = MTD_NANDFLASH;
Maxim Levitsky93edbad2010-02-22 20:39:40 +02003770 mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM :
3771 MTD_CAP_NANDFLASH;
Artem Bityutskiy3c3c10b2012-01-30 14:58:32 +02003772 mtd->_erase = nand_erase;
3773 mtd->_point = NULL;
3774 mtd->_unpoint = NULL;
3775 mtd->_read = nand_read;
3776 mtd->_write = nand_write;
3777 mtd->_panic_write = panic_nand_write;
3778 mtd->_read_oob = nand_read_oob;
3779 mtd->_write_oob = nand_write_oob;
3780 mtd->_sync = nand_sync;
3781 mtd->_lock = NULL;
3782 mtd->_unlock = NULL;
3783 mtd->_suspend = nand_suspend;
3784 mtd->_resume = nand_resume;
3785 mtd->_block_isbad = nand_block_isbad;
3786 mtd->_block_markbad = nand_block_markbad;
Anatolij Gustschincbcab652010-12-16 23:42:16 +01003787 mtd->writebufsize = mtd->writesize;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003788
Mike Dunn6a918ba2012-03-11 14:21:11 -07003789 /* propagate ecc info to mtd_info */
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003790 mtd->ecclayout = chip->ecc.layout;
Mike Dunn86c20722012-04-25 12:06:05 -07003791 mtd->ecc_strength = chip->ecc.strength;
Huang Shijiebdf69c42013-08-16 10:10:06 +08003792 mtd->ecc_step_size = chip->ecc.size;
Shmulik Ladkaniea3b2ea2012-06-08 18:29:06 +03003793 /*
3794 * Initialize bitflip_threshold to its default prior scan_bbt() call.
3795 * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be
3796 * properly set.
3797 */
3798 if (!mtd->bitflip_threshold)
3799 mtd->bitflip_threshold = mtd->ecc_strength;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003800
Thomas Gleixner0040bf32005-02-09 12:20:00 +00003801 /* Check, if we should skip the bad block table scan */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003802 if (chip->options & NAND_SKIP_BBTSCAN)
Thomas Gleixner0040bf32005-02-09 12:20:00 +00003803 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003804
3805 /* Build bad block table */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003806 return chip->scan_bbt(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003807}
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003808EXPORT_SYMBOL(nand_scan_tail);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003809
Brian Norris8b6e50c2011-05-25 14:59:01 -07003810/*
3811 * is_module_text_address() isn't exported, and it's mostly a pointless
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003812 * test if this is a module _anyway_ -- they'd have to try _really_ hard
Brian Norris8b6e50c2011-05-25 14:59:01 -07003813 * to call us from in-kernel code if the core NAND support is modular.
3814 */
David Woodhouse3b85c322006-09-25 17:06:53 +01003815#ifdef MODULE
3816#define caller_is_module() (1)
3817#else
3818#define caller_is_module() \
Rusty Russella6e6abd2009-03-31 13:05:31 -06003819 is_module_text_address((unsigned long)__builtin_return_address(0))
David Woodhouse3b85c322006-09-25 17:06:53 +01003820#endif
3821
3822/**
3823 * nand_scan - [NAND Interface] Scan for the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003824 * @mtd: MTD device structure
3825 * @maxchips: number of chips to scan for
David Woodhouse3b85c322006-09-25 17:06:53 +01003826 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07003827 * This fills out all the uninitialized function pointers with the defaults.
3828 * The flash ID is read and the mtd/chip structures are filled with the
3829 * appropriate values. The mtd->owner field must be set to the module of the
3830 * caller.
David Woodhouse3b85c322006-09-25 17:06:53 +01003831 */
3832int nand_scan(struct mtd_info *mtd, int maxchips)
3833{
3834 int ret;
3835
3836 /* Many callers got this wrong, so check for it for a while... */
3837 if (!mtd->owner && caller_is_module()) {
Brian Norrisd0370212011-07-19 10:06:08 -07003838 pr_crit("%s called with NULL mtd->owner!\n", __func__);
David Woodhouse3b85c322006-09-25 17:06:53 +01003839 BUG();
3840 }
3841
David Woodhouse5e81e882010-02-26 18:32:56 +00003842 ret = nand_scan_ident(mtd, maxchips, NULL);
David Woodhouse3b85c322006-09-25 17:06:53 +01003843 if (!ret)
3844 ret = nand_scan_tail(mtd);
3845 return ret;
3846}
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003847EXPORT_SYMBOL(nand_scan);
David Woodhouse3b85c322006-09-25 17:06:53 +01003848
Linus Torvalds1da177e2005-04-16 15:20:36 -07003849/**
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003850 * nand_release - [NAND Interface] Free resources held by the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003851 * @mtd: MTD device structure
3852 */
David Woodhousee0c7d762006-05-13 18:07:53 +01003853void nand_release(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003854{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003855 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003856
Ivan Djelic193bd402011-03-11 11:05:33 +01003857 if (chip->ecc.mode == NAND_ECC_SOFT_BCH)
3858 nand_bch_free((struct nand_bch_control *)chip->ecc.priv);
3859
Jamie Iles5ffcaf32011-05-23 10:22:46 +01003860 mtd_device_unregister(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003861
Jesper Juhlfa671642005-11-07 01:01:27 -08003862 /* Free bad block table memory */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003863 kfree(chip->bbt);
David Woodhouse4bf63fc2006-09-25 17:08:04 +01003864 if (!(chip->options & NAND_OWN_BUFFERS))
3865 kfree(chip->buffers);
Brian Norris58373ff2010-07-15 12:15:44 -07003866
3867 /* Free bad block descriptor memory */
3868 if (chip->badblock_pattern && chip->badblock_pattern->options
3869 & NAND_BBT_DYNAMICSTRUCT)
3870 kfree(chip->badblock_pattern);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003871}
David Woodhousee0c7d762006-05-13 18:07:53 +01003872EXPORT_SYMBOL_GPL(nand_release);
Richard Purdie8fe833c2006-03-31 02:31:14 -08003873
3874static int __init nand_base_init(void)
3875{
3876 led_trigger_register_simple("nand-disk", &nand_led_trigger);
3877 return 0;
3878}
3879
3880static void __exit nand_base_exit(void)
3881{
3882 led_trigger_unregister_simple(nand_led_trigger);
3883}
3884
3885module_init(nand_base_init);
3886module_exit(nand_base_exit);
3887
David Woodhousee0c7d762006-05-13 18:07:53 +01003888MODULE_LICENSE("GPL");
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003889MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>");
3890MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
David Woodhousee0c7d762006-05-13 18:07:53 +01003891MODULE_DESCRIPTION("Generic NAND flash driver code");