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Will Deaconc36ef4b2011-11-23 11:28:25 +01001#include <asm/unwind.h>
2
Russell King6323f0c2011-01-16 18:02:17 +00003#if __LINUX_ARM_ARCH__ >= 6
Will Deaconc36ef4b2011-11-23 11:28:25 +01004 .macro bitop, name, instr
5ENTRY( \name )
6UNWIND( .fnstart )
Russell Kinga16ede32011-01-16 17:59:44 +00007 ands ip, r1, #3
8 strneb r1, [ip] @ assert word-aligned
Russell King54ea06f2005-07-16 15:21:51 +01009 mov r2, #1
Russell King6323f0c2011-01-16 18:02:17 +000010 and r3, r0, #31 @ Get bit offset
11 mov r0, r0, lsr #5
12 add r1, r1, r0, lsl #2 @ Get word offset
Will Deacond779c072013-06-27 12:01:51 +010013#if __LINUX_ARM_ARCH__ >= 7
14 .arch_extension mp
15 ALT_SMP(W(pldw) [r1])
16 ALT_UP(W(nop))
17#endif
Russell King54ea06f2005-07-16 15:21:51 +010018 mov r3, r2, lsl r3
Russell King6323f0c2011-01-16 18:02:17 +0000191: ldrex r2, [r1]
Russell King54ea06f2005-07-16 15:21:51 +010020 \instr r2, r2, r3
Russell King6323f0c2011-01-16 18:02:17 +000021 strex r0, r2, [r1]
Russell Kinge7ec0292005-07-28 20:36:26 +010022 cmp r0, #0
Russell King54ea06f2005-07-16 15:21:51 +010023 bne 1b
Dave Martin3ba6e692011-02-08 12:09:52 +010024 bx lr
Will Deaconc36ef4b2011-11-23 11:28:25 +010025UNWIND( .fnend )
26ENDPROC(\name )
Russell King54ea06f2005-07-16 15:21:51 +010027 .endm
28
Will Deaconc36ef4b2011-11-23 11:28:25 +010029 .macro testop, name, instr, store
30ENTRY( \name )
31UNWIND( .fnstart )
Russell Kinga16ede32011-01-16 17:59:44 +000032 ands ip, r1, #3
33 strneb r1, [ip] @ assert word-aligned
Russell King54ea06f2005-07-16 15:21:51 +010034 mov r2, #1
Russell King6323f0c2011-01-16 18:02:17 +000035 and r3, r0, #31 @ Get bit offset
36 mov r0, r0, lsr #5
37 add r1, r1, r0, lsl #2 @ Get word offset
Russell King54ea06f2005-07-16 15:21:51 +010038 mov r3, r2, lsl r3 @ create mask
Russell Kingbac4e962009-05-25 20:58:00 +010039 smp_dmb
Russell King6323f0c2011-01-16 18:02:17 +0000401: ldrex r2, [r1]
Russell King54ea06f2005-07-16 15:21:51 +010041 ands r0, r2, r3 @ save old value of bit
Russell King6323f0c2011-01-16 18:02:17 +000042 \instr r2, r2, r3 @ toggle bit
43 strex ip, r2, [r1]
Russell King614d73e2005-07-27 23:00:05 +010044 cmp ip, #0
Russell King54ea06f2005-07-16 15:21:51 +010045 bne 1b
Russell Kingbac4e962009-05-25 20:58:00 +010046 smp_dmb
Russell King54ea06f2005-07-16 15:21:51 +010047 cmp r0, #0
48 movne r0, #1
Dave Martin3ba6e692011-02-08 12:09:52 +0100492: bx lr
Will Deaconc36ef4b2011-11-23 11:28:25 +010050UNWIND( .fnend )
51ENDPROC(\name )
Russell King54ea06f2005-07-16 15:21:51 +010052 .endm
53#else
Will Deaconc36ef4b2011-11-23 11:28:25 +010054 .macro bitop, name, instr
55ENTRY( \name )
56UNWIND( .fnstart )
Russell Kinga16ede32011-01-16 17:59:44 +000057 ands ip, r1, #3
58 strneb r1, [ip] @ assert word-aligned
Russell King6323f0c2011-01-16 18:02:17 +000059 and r2, r0, #31
60 mov r0, r0, lsr #5
Russell King7a55fd02005-04-18 22:50:01 +010061 mov r3, #1
62 mov r3, r3, lsl r2
Russell King59d1ff32005-11-09 15:04:22 +000063 save_and_disable_irqs ip
Russell King6323f0c2011-01-16 18:02:17 +000064 ldr r2, [r1, r0, lsl #2]
Russell King7a55fd02005-04-18 22:50:01 +010065 \instr r2, r2, r3
Russell King6323f0c2011-01-16 18:02:17 +000066 str r2, [r1, r0, lsl #2]
Russell King7a55fd02005-04-18 22:50:01 +010067 restore_irqs ip
68 mov pc, lr
Will Deaconc36ef4b2011-11-23 11:28:25 +010069UNWIND( .fnend )
70ENDPROC(\name )
Russell King7a55fd02005-04-18 22:50:01 +010071 .endm
72
73/**
74 * testop - implement a test_and_xxx_bit operation.
75 * @instr: operational instruction
76 * @store: store instruction
77 *
78 * Note: we can trivially conditionalise the store instruction
Simon Arlott6cbdc8c2007-05-11 20:40:30 +010079 * to avoid dirtying the data cache.
Russell King7a55fd02005-04-18 22:50:01 +010080 */
Will Deaconc36ef4b2011-11-23 11:28:25 +010081 .macro testop, name, instr, store
82ENTRY( \name )
83UNWIND( .fnstart )
Russell Kinga16ede32011-01-16 17:59:44 +000084 ands ip, r1, #3
85 strneb r1, [ip] @ assert word-aligned
Russell King6323f0c2011-01-16 18:02:17 +000086 and r3, r0, #31
87 mov r0, r0, lsr #5
Russell King59d1ff32005-11-09 15:04:22 +000088 save_and_disable_irqs ip
Russell King6323f0c2011-01-16 18:02:17 +000089 ldr r2, [r1, r0, lsl #2]!
90 mov r0, #1
Russell King7a55fd02005-04-18 22:50:01 +010091 tst r2, r0, lsl r3
92 \instr r2, r2, r0, lsl r3
93 \store r2, [r1]
Russell King7a55fd02005-04-18 22:50:01 +010094 moveq r0, #0
Uwe Kleine-König0d928b02009-08-13 20:38:17 +020095 restore_irqs ip
Russell King7a55fd02005-04-18 22:50:01 +010096 mov pc, lr
Will Deaconc36ef4b2011-11-23 11:28:25 +010097UNWIND( .fnend )
98ENDPROC(\name )
Russell King7a55fd02005-04-18 22:50:01 +010099 .endm
Russell King54ea06f2005-07-16 15:21:51 +0100100#endif