Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 1 | /* |
| 2 | * OMAP Voltage Controller (VC) interface |
| 3 | * |
| 4 | * Copyright (C) 2011 Texas Instruments, Inc. |
| 5 | * |
| 6 | * This file is licensed under the terms of the GNU General Public |
| 7 | * License version 2. This program is licensed "as is" without any |
| 8 | * warranty of any kind, whether express or implied. |
| 9 | */ |
| 10 | #include <linux/kernel.h> |
| 11 | #include <linux/delay.h> |
| 12 | #include <linux/init.h> |
| 13 | |
| 14 | #include <plat/cpu.h> |
| 15 | |
| 16 | #include "voltage.h" |
| 17 | #include "vc.h" |
| 18 | #include "prm-regbits-34xx.h" |
| 19 | #include "prm-regbits-44xx.h" |
| 20 | #include "prm44xx.h" |
| 21 | |
Kevin Hilman | 8abc0b5 | 2011-06-02 17:28:13 -0700 | [diff] [blame] | 22 | /** |
| 23 | * struct omap_vc_channel_cfg - describe the cfg_channel bitfield |
| 24 | * @sa: bit for slave address |
| 25 | * @rav: bit for voltage configuration register |
| 26 | * @rac: bit for command configuration register |
| 27 | * @racen: enable bit for RAC |
| 28 | * @cmd: bit for command value set selection |
| 29 | * |
| 30 | * Channel configuration bits, common for OMAP3+ |
Kevin Hilman | 24d3194 | 2011-03-29 15:57:16 -0700 | [diff] [blame] | 31 | * OMAP3 register: PRM_VC_CH_CONF |
| 32 | * OMAP4 register: PRM_VC_CFG_CHANNEL |
Kevin Hilman | 8abc0b5 | 2011-06-02 17:28:13 -0700 | [diff] [blame] | 33 | * OMAP5 register: PRM_VC_SMPS_<voltdm>_CONFIG |
Kevin Hilman | 24d3194 | 2011-03-29 15:57:16 -0700 | [diff] [blame] | 34 | */ |
Kevin Hilman | 8abc0b5 | 2011-06-02 17:28:13 -0700 | [diff] [blame] | 35 | struct omap_vc_channel_cfg { |
| 36 | u8 sa; |
| 37 | u8 rav; |
| 38 | u8 rac; |
| 39 | u8 racen; |
| 40 | u8 cmd; |
| 41 | }; |
| 42 | |
| 43 | static struct omap_vc_channel_cfg vc_default_channel_cfg = { |
| 44 | .sa = BIT(0), |
| 45 | .rav = BIT(1), |
| 46 | .rac = BIT(2), |
| 47 | .racen = BIT(3), |
| 48 | .cmd = BIT(4), |
| 49 | }; |
| 50 | |
| 51 | /* |
| 52 | * On OMAP3+, all VC channels have the above default bitfield |
| 53 | * configuration, except the OMAP4 MPU channel. This appears |
| 54 | * to be a freak accident as every other VC channel has the |
| 55 | * default configuration, thus creating a mutant channel config. |
| 56 | */ |
| 57 | static struct omap_vc_channel_cfg vc_mutant_channel_cfg = { |
| 58 | .sa = BIT(0), |
| 59 | .rav = BIT(2), |
| 60 | .rac = BIT(3), |
| 61 | .racen = BIT(4), |
| 62 | .cmd = BIT(1), |
| 63 | }; |
| 64 | |
| 65 | static struct omap_vc_channel_cfg *vc_cfg_bits; |
| 66 | #define CFG_CHANNEL_MASK 0x1f |
Kevin Hilman | 24d3194 | 2011-03-29 15:57:16 -0700 | [diff] [blame] | 67 | |
| 68 | /** |
| 69 | * omap_vc_config_channel - configure VC channel to PMIC mappings |
| 70 | * @voltdm: pointer to voltagdomain defining the desired VC channel |
| 71 | * |
| 72 | * Configures the VC channel to PMIC mappings for the following |
| 73 | * PMIC settings |
| 74 | * - i2c slave address (SA) |
| 75 | * - voltage configuration address (RAV) |
| 76 | * - command configuration address (RAC) and enable bit (RACEN) |
| 77 | * - command values for ON, ONLP, RET and OFF (CMD) |
| 78 | * |
| 79 | * This function currently only allows flexible configuration of the |
| 80 | * non-default channel. Starting with OMAP4, there are more than 2 |
| 81 | * channels, with one defined as the default (on OMAP4, it's MPU.) |
| 82 | * Only the non-default channel can be configured. |
| 83 | */ |
| 84 | static int omap_vc_config_channel(struct voltagedomain *voltdm) |
| 85 | { |
| 86 | struct omap_vc_channel *vc = voltdm->vc; |
| 87 | |
| 88 | /* |
| 89 | * For default channel, the only configurable bit is RACEN. |
| 90 | * All others must stay at zero (see function comment above.) |
| 91 | */ |
| 92 | if (vc->flags & OMAP_VC_CHANNEL_DEFAULT) |
Kevin Hilman | 8abc0b5 | 2011-06-02 17:28:13 -0700 | [diff] [blame] | 93 | vc->cfg_channel &= vc_cfg_bits->racen; |
Kevin Hilman | 24d3194 | 2011-03-29 15:57:16 -0700 | [diff] [blame] | 94 | |
| 95 | voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift, |
| 96 | vc->cfg_channel << vc->cfg_channel_sa_shift, |
| 97 | vc->common->cfg_channel_reg); |
| 98 | |
| 99 | return 0; |
| 100 | } |
| 101 | |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 102 | /* Voltage scale and accessory APIs */ |
| 103 | int omap_vc_pre_scale(struct voltagedomain *voltdm, |
| 104 | unsigned long target_volt, |
| 105 | u8 *target_vsel, u8 *current_vsel) |
| 106 | { |
Kevin Hilman | d84adcf | 2011-03-22 16:14:57 -0700 | [diff] [blame] | 107 | struct omap_vc_channel *vc = voltdm->vc; |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 108 | struct omap_vdd_info *vdd = voltdm->vdd; |
| 109 | struct omap_volt_data *volt_data; |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 110 | const struct omap_vp_common_data *vp_common; |
| 111 | u32 vc_cmdval, vp_errgain_val; |
| 112 | |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 113 | vp_common = vdd->vp_data->vp_common; |
| 114 | |
| 115 | /* Check if sufficient pmic info is available for this vdd */ |
Kevin Hilman | ce8ebe0 | 2011-03-30 11:01:10 -0700 | [diff] [blame] | 116 | if (!voltdm->pmic) { |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 117 | pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", |
| 118 | __func__, voltdm->name); |
| 119 | return -EINVAL; |
| 120 | } |
| 121 | |
Kevin Hilman | ce8ebe0 | 2011-03-30 11:01:10 -0700 | [diff] [blame] | 122 | if (!voltdm->pmic->uv_to_vsel) { |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 123 | pr_err("%s: PMIC function to convert voltage in uV to" |
| 124 | "vsel not registered. Hence unable to scale voltage" |
| 125 | "for vdd_%s\n", __func__, voltdm->name); |
| 126 | return -ENODATA; |
| 127 | } |
| 128 | |
Kevin Hilman | 4bcc475 | 2011-03-28 10:40:15 -0700 | [diff] [blame] | 129 | if (!voltdm->read || !voltdm->write) { |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 130 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", |
| 131 | __func__, voltdm->name); |
| 132 | return -EINVAL; |
| 133 | } |
| 134 | |
| 135 | /* Get volt_data corresponding to target_volt */ |
| 136 | volt_data = omap_voltage_get_voltdata(voltdm, target_volt); |
| 137 | if (IS_ERR(volt_data)) |
| 138 | volt_data = NULL; |
| 139 | |
Kevin Hilman | ce8ebe0 | 2011-03-30 11:01:10 -0700 | [diff] [blame] | 140 | *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); |
Kevin Hilman | d7b0de2 | 2011-07-18 15:31:00 -0700 | [diff] [blame^] | 141 | *current_vsel = voltdm->pmic->uv_to_vsel(vdd->curr_volt); |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 142 | |
| 143 | /* Setting the ON voltage to the new target voltage */ |
Kevin Hilman | 4bcc475 | 2011-03-28 10:40:15 -0700 | [diff] [blame] | 144 | vc_cmdval = voltdm->read(vc->cmdval_reg); |
Kevin Hilman | d84adcf | 2011-03-22 16:14:57 -0700 | [diff] [blame] | 145 | vc_cmdval &= ~vc->common->cmd_on_mask; |
| 146 | vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift); |
Kevin Hilman | 4bcc475 | 2011-03-28 10:40:15 -0700 | [diff] [blame] | 147 | voltdm->write(vc_cmdval, vc->cmdval_reg); |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 148 | |
| 149 | /* Setting vp errorgain based on the voltage */ |
| 150 | if (volt_data) { |
Kevin Hilman | 4bcc475 | 2011-03-28 10:40:15 -0700 | [diff] [blame] | 151 | vp_errgain_val = voltdm->read(vdd->vp_data->vpconfig); |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 152 | vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; |
| 153 | vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; |
| 154 | vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << |
| 155 | vp_common->vpconfig_errorgain_shift; |
Kevin Hilman | 4bcc475 | 2011-03-28 10:40:15 -0700 | [diff] [blame] | 156 | voltdm->write(vp_errgain_val, vdd->vp_data->vpconfig); |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 157 | } |
| 158 | |
| 159 | return 0; |
| 160 | } |
| 161 | |
| 162 | void omap_vc_post_scale(struct voltagedomain *voltdm, |
| 163 | unsigned long target_volt, |
| 164 | u8 target_vsel, u8 current_vsel) |
| 165 | { |
| 166 | struct omap_vdd_info *vdd = voltdm->vdd; |
| 167 | u32 smps_steps = 0, smps_delay = 0; |
| 168 | |
| 169 | smps_steps = abs(target_vsel - current_vsel); |
| 170 | /* SMPS slew rate / step size. 2us added as buffer. */ |
Kevin Hilman | ce8ebe0 | 2011-03-30 11:01:10 -0700 | [diff] [blame] | 171 | smps_delay = ((smps_steps * voltdm->pmic->step_size) / |
| 172 | voltdm->pmic->slew_rate) + 2; |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 173 | udelay(smps_delay); |
| 174 | |
| 175 | vdd->curr_volt = target_volt; |
| 176 | } |
| 177 | |
Kevin Hilman | d84adcf | 2011-03-22 16:14:57 -0700 | [diff] [blame] | 178 | /* vc_bypass_scale - VC bypass method of voltage scaling */ |
| 179 | int omap_vc_bypass_scale(struct voltagedomain *voltdm, |
| 180 | unsigned long target_volt) |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 181 | { |
Kevin Hilman | d84adcf | 2011-03-22 16:14:57 -0700 | [diff] [blame] | 182 | struct omap_vc_channel *vc = voltdm->vc; |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 183 | u32 loop_cnt = 0, retries_cnt = 0; |
| 184 | u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; |
| 185 | u8 target_vsel, current_vsel; |
| 186 | int ret; |
| 187 | |
| 188 | ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); |
| 189 | if (ret) |
| 190 | return ret; |
| 191 | |
Kevin Hilman | d84adcf | 2011-03-22 16:14:57 -0700 | [diff] [blame] | 192 | vc_valid = vc->common->valid; |
| 193 | vc_bypass_val_reg = vc->common->bypass_val_reg; |
| 194 | vc_bypass_value = (target_vsel << vc->common->data_shift) | |
Kevin Hilman | 78614e0 | 2011-03-29 14:24:47 -0700 | [diff] [blame] | 195 | (vc->volt_reg_addr << vc->common->regaddr_shift) | |
| 196 | (vc->i2c_slave_addr << vc->common->slaveaddr_shift); |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 197 | |
Kevin Hilman | 4bcc475 | 2011-03-28 10:40:15 -0700 | [diff] [blame] | 198 | voltdm->write(vc_bypass_value, vc_bypass_val_reg); |
| 199 | voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg); |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 200 | |
Kevin Hilman | 4bcc475 | 2011-03-28 10:40:15 -0700 | [diff] [blame] | 201 | vc_bypass_value = voltdm->read(vc_bypass_val_reg); |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 202 | /* |
| 203 | * Loop till the bypass command is acknowledged from the SMPS. |
| 204 | * NOTE: This is legacy code. The loop count and retry count needs |
| 205 | * to be revisited. |
| 206 | */ |
| 207 | while (!(vc_bypass_value & vc_valid)) { |
| 208 | loop_cnt++; |
| 209 | |
| 210 | if (retries_cnt > 10) { |
| 211 | pr_warning("%s: Retry count exceeded\n", __func__); |
| 212 | return -ETIMEDOUT; |
| 213 | } |
| 214 | |
| 215 | if (loop_cnt > 50) { |
| 216 | retries_cnt++; |
| 217 | loop_cnt = 0; |
| 218 | udelay(10); |
| 219 | } |
Kevin Hilman | 4bcc475 | 2011-03-28 10:40:15 -0700 | [diff] [blame] | 220 | vc_bypass_value = voltdm->read(vc_bypass_val_reg); |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 221 | } |
| 222 | |
| 223 | omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); |
| 224 | return 0; |
| 225 | } |
| 226 | |
| 227 | static void __init omap3_vfsm_init(struct voltagedomain *voltdm) |
| 228 | { |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 229 | /* |
| 230 | * Voltage Manager FSM parameters init |
| 231 | * XXX This data should be passed in from the board file |
| 232 | */ |
Kevin Hilman | 4bcc475 | 2011-03-28 10:40:15 -0700 | [diff] [blame] | 233 | voltdm->write(OMAP3_CLKSETUP, OMAP3_PRM_CLKSETUP_OFFSET); |
| 234 | voltdm->write(OMAP3_VOLTOFFSET, OMAP3_PRM_VOLTOFFSET_OFFSET); |
| 235 | voltdm->write(OMAP3_VOLTSETUP2, OMAP3_PRM_VOLTSETUP2_OFFSET); |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 236 | } |
| 237 | |
| 238 | static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) |
| 239 | { |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 240 | static bool is_initialized; |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 241 | |
| 242 | if (is_initialized) |
| 243 | return; |
| 244 | |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 245 | omap3_vfsm_init(voltdm); |
| 246 | |
| 247 | is_initialized = true; |
| 248 | } |
| 249 | |
| 250 | |
| 251 | /* OMAP4 specific voltage init functions */ |
| 252 | static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) |
| 253 | { |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 254 | static bool is_initialized; |
| 255 | u32 vc_val; |
| 256 | |
| 257 | if (is_initialized) |
| 258 | return; |
| 259 | |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 260 | /* XXX These are magic numbers and do not belong! */ |
| 261 | vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); |
Kevin Hilman | 4bcc475 | 2011-03-28 10:40:15 -0700 | [diff] [blame] | 262 | voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 263 | |
| 264 | is_initialized = true; |
| 265 | } |
| 266 | |
Kevin Hilman | f539548 | 2011-03-30 16:36:30 -0700 | [diff] [blame] | 267 | /** |
| 268 | * omap_vc_i2c_init - initialize I2C interface to PMIC |
| 269 | * @voltdm: voltage domain containing VC data |
| 270 | * |
| 271 | * Use PMIC supplied seetings for I2C high-speed mode and |
| 272 | * master code (if set) and program the VC I2C configuration |
| 273 | * register. |
| 274 | * |
| 275 | * The VC I2C configuration is common to all VC channels, |
| 276 | * so this function only configures I2C for the first VC |
| 277 | * channel registers. All other VC channels will use the |
| 278 | * same configuration. |
| 279 | */ |
| 280 | static void __init omap_vc_i2c_init(struct voltagedomain *voltdm) |
| 281 | { |
| 282 | struct omap_vc_channel *vc = voltdm->vc; |
| 283 | static bool initialized; |
| 284 | static bool i2c_high_speed; |
| 285 | u8 mcode; |
| 286 | |
| 287 | if (initialized) { |
| 288 | if (voltdm->pmic->i2c_high_speed != i2c_high_speed) |
| 289 | pr_warn("%s: I2C config for all channels must match.", |
| 290 | __func__); |
| 291 | return; |
| 292 | } |
| 293 | |
| 294 | i2c_high_speed = voltdm->pmic->i2c_high_speed; |
| 295 | if (i2c_high_speed) |
| 296 | voltdm->rmw(vc->common->i2c_cfg_hsen_mask, |
| 297 | vc->common->i2c_cfg_hsen_mask, |
| 298 | vc->common->i2c_cfg_reg); |
| 299 | |
| 300 | mcode = voltdm->pmic->i2c_mcode; |
| 301 | if (mcode) |
| 302 | voltdm->rmw(vc->common->i2c_mcode_mask, |
| 303 | mcode << __ffs(vc->common->i2c_mcode_mask), |
| 304 | vc->common->i2c_cfg_reg); |
| 305 | |
| 306 | initialized = true; |
| 307 | } |
| 308 | |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 309 | void __init omap_vc_init_channel(struct voltagedomain *voltdm) |
| 310 | { |
Kevin Hilman | d84adcf | 2011-03-22 16:14:57 -0700 | [diff] [blame] | 311 | struct omap_vc_channel *vc = voltdm->vc; |
Kevin Hilman | 08d1c9a | 2011-03-29 15:14:38 -0700 | [diff] [blame] | 312 | u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; |
| 313 | u32 val; |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 314 | |
Kevin Hilman | ce8ebe0 | 2011-03-30 11:01:10 -0700 | [diff] [blame] | 315 | if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 316 | pr_err("%s: PMIC info requried to configure vc for" |
| 317 | "vdd_%s not populated.Hence cannot initialize vc\n", |
| 318 | __func__, voltdm->name); |
| 319 | return; |
| 320 | } |
| 321 | |
Kevin Hilman | 4bcc475 | 2011-03-28 10:40:15 -0700 | [diff] [blame] | 322 | if (!voltdm->read || !voltdm->write) { |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 323 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", |
| 324 | __func__, voltdm->name); |
| 325 | return; |
| 326 | } |
| 327 | |
Kevin Hilman | 24d3194 | 2011-03-29 15:57:16 -0700 | [diff] [blame] | 328 | vc->cfg_channel = 0; |
Kevin Hilman | 8abc0b5 | 2011-06-02 17:28:13 -0700 | [diff] [blame] | 329 | if (vc->flags & OMAP_VC_CHANNEL_CFG_MUTANT) |
| 330 | vc_cfg_bits = &vc_mutant_channel_cfg; |
| 331 | else |
| 332 | vc_cfg_bits = &vc_default_channel_cfg; |
Kevin Hilman | 24d3194 | 2011-03-29 15:57:16 -0700 | [diff] [blame] | 333 | |
Kevin Hilman | ba112a4 | 2011-03-29 14:02:36 -0700 | [diff] [blame] | 334 | /* get PMIC/board specific settings */ |
Kevin Hilman | ce8ebe0 | 2011-03-30 11:01:10 -0700 | [diff] [blame] | 335 | vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr; |
| 336 | vc->volt_reg_addr = voltdm->pmic->volt_reg_addr; |
| 337 | vc->cmd_reg_addr = voltdm->pmic->cmd_reg_addr; |
| 338 | vc->setup_time = voltdm->pmic->volt_setup_time; |
Kevin Hilman | ba112a4 | 2011-03-29 14:02:36 -0700 | [diff] [blame] | 339 | |
| 340 | /* Configure the i2c slave address for this VC */ |
| 341 | voltdm->rmw(vc->smps_sa_mask, |
| 342 | vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), |
| 343 | vc->common->smps_sa_reg); |
Kevin Hilman | 8abc0b5 | 2011-06-02 17:28:13 -0700 | [diff] [blame] | 344 | vc->cfg_channel |= vc_cfg_bits->sa; |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 345 | |
Kevin Hilman | e4e021c | 2011-06-09 11:01:55 -0700 | [diff] [blame] | 346 | /* |
| 347 | * Configure the PMIC register addresses. |
| 348 | */ |
| 349 | voltdm->rmw(vc->smps_volra_mask, |
| 350 | vc->volt_reg_addr << __ffs(vc->smps_volra_mask), |
| 351 | vc->common->smps_volra_reg); |
Kevin Hilman | 8abc0b5 | 2011-06-02 17:28:13 -0700 | [diff] [blame] | 352 | vc->cfg_channel |= vc_cfg_bits->rav; |
Kevin Hilman | 24d3194 | 2011-03-29 15:57:16 -0700 | [diff] [blame] | 353 | |
| 354 | if (vc->cmd_reg_addr) { |
Kevin Hilman | e4e021c | 2011-06-09 11:01:55 -0700 | [diff] [blame] | 355 | voltdm->rmw(vc->smps_cmdra_mask, |
| 356 | vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask), |
| 357 | vc->common->smps_cmdra_reg); |
Kevin Hilman | 8abc0b5 | 2011-06-02 17:28:13 -0700 | [diff] [blame] | 358 | vc->cfg_channel |= vc_cfg_bits->rac | vc_cfg_bits->racen; |
Kevin Hilman | 24d3194 | 2011-03-29 15:57:16 -0700 | [diff] [blame] | 359 | } |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 360 | |
Kevin Hilman | 08d1c9a | 2011-03-29 15:14:38 -0700 | [diff] [blame] | 361 | /* Set up the on, inactive, retention and off voltage */ |
Kevin Hilman | ce8ebe0 | 2011-03-30 11:01:10 -0700 | [diff] [blame] | 362 | on_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->on_volt); |
| 363 | onlp_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->onlp_volt); |
| 364 | ret_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->ret_volt); |
| 365 | off_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->off_volt); |
Kevin Hilman | 08d1c9a | 2011-03-29 15:14:38 -0700 | [diff] [blame] | 366 | val = ((on_vsel << vc->common->cmd_on_shift) | |
| 367 | (onlp_vsel << vc->common->cmd_onlp_shift) | |
| 368 | (ret_vsel << vc->common->cmd_ret_shift) | |
| 369 | (off_vsel << vc->common->cmd_off_shift)); |
| 370 | voltdm->write(val, vc->cmdval_reg); |
Kevin Hilman | 8abc0b5 | 2011-06-02 17:28:13 -0700 | [diff] [blame] | 371 | vc->cfg_channel |= vc_cfg_bits->cmd; |
Kevin Hilman | 24d3194 | 2011-03-29 15:57:16 -0700 | [diff] [blame] | 372 | |
| 373 | /* Channel configuration */ |
| 374 | omap_vc_config_channel(voltdm); |
Kevin Hilman | 08d1c9a | 2011-03-29 15:14:38 -0700 | [diff] [blame] | 375 | |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 376 | /* Configure the setup times */ |
Kevin Hilman | 5892bb1 | 2011-03-29 14:36:04 -0700 | [diff] [blame] | 377 | voltdm->rmw(voltdm->vfsm->voltsetup_mask, |
| 378 | vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask), |
| 379 | voltdm->vfsm->voltsetup_reg); |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 380 | |
Kevin Hilman | f539548 | 2011-03-30 16:36:30 -0700 | [diff] [blame] | 381 | omap_vc_i2c_init(voltdm); |
| 382 | |
Kevin Hilman | ccd5ca7 | 2011-03-21 14:08:55 -0700 | [diff] [blame] | 383 | if (cpu_is_omap34xx()) |
| 384 | omap3_vc_init_channel(voltdm); |
| 385 | else if (cpu_is_omap44xx()) |
| 386 | omap4_vc_init_channel(voltdm); |
| 387 | } |
| 388 | |