Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * srmmu.c: SRMMU specific routines for memory management. |
| 3 | * |
| 4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) |
| 5 | * Copyright (C) 1995,2002 Pete Zaitcev (zaitcev@yahoo.com) |
| 6 | * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) |
| 7 | * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) |
| 8 | * Copyright (C) 1999,2000 Anton Blanchard (anton@samba.org) |
| 9 | */ |
| 10 | |
Sam Ravnborg | 4a049b0 | 2012-07-26 11:02:12 +0000 | [diff] [blame] | 11 | #include <linux/seq_file.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | #include <linux/spinlock.h> |
| 13 | #include <linux/bootmem.h> |
Sam Ravnborg | 4a049b0 | 2012-07-26 11:02:12 +0000 | [diff] [blame] | 14 | #include <linux/pagemap.h> |
| 15 | #include <linux/vmalloc.h> |
Christoph Hellwig | 1eeb66a | 2007-05-08 00:27:03 -0700 | [diff] [blame] | 16 | #include <linux/kdebug.h> |
Sam Ravnborg | 4a049b0 | 2012-07-26 11:02:12 +0000 | [diff] [blame] | 17 | #include <linux/kernel.h> |
| 18 | #include <linux/init.h> |
Robert P. J. Day | 949e827 | 2009-04-24 03:58:24 +0000 | [diff] [blame] | 19 | #include <linux/log2.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 20 | #include <linux/gfp.h> |
Sam Ravnborg | 4a049b0 | 2012-07-26 11:02:12 +0000 | [diff] [blame] | 21 | #include <linux/fs.h> |
| 22 | #include <linux/mm.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #include <asm/mmu_context.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | #include <asm/cacheflush.h> |
| 26 | #include <asm/tlbflush.h> |
Sam Ravnborg | 4a049b0 | 2012-07-26 11:02:12 +0000 | [diff] [blame] | 27 | #include <asm/io-unit.h> |
| 28 | #include <asm/pgalloc.h> |
| 29 | #include <asm/pgtable.h> |
| 30 | #include <asm/bitext.h> |
| 31 | #include <asm/vaddrs.h> |
| 32 | #include <asm/cache.h> |
| 33 | #include <asm/traps.h> |
| 34 | #include <asm/oplib.h> |
| 35 | #include <asm/mbus.h> |
| 36 | #include <asm/page.h> |
| 37 | #include <asm/asi.h> |
| 38 | #include <asm/msi.h> |
| 39 | #include <asm/smp.h> |
| 40 | #include <asm/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | |
| 42 | /* Now the cpu specific definitions. */ |
Sam Ravnborg | 4a049b0 | 2012-07-26 11:02:12 +0000 | [diff] [blame] | 43 | #include <asm/turbosparc.h> |
| 44 | #include <asm/tsunami.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | #include <asm/viking.h> |
Sam Ravnborg | 4a049b0 | 2012-07-26 11:02:12 +0000 | [diff] [blame] | 46 | #include <asm/swift.h> |
| 47 | #include <asm/leon.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | #include <asm/mxcc.h> |
| 49 | #include <asm/ross.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | |
Sam Ravnborg | accf032 | 2012-05-19 20:02:49 +0000 | [diff] [blame] | 51 | #include "srmmu.h" |
| 52 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 53 | enum mbus_module srmmu_modtype; |
Adrian Bunk | 50215d6 | 2008-06-05 11:41:51 -0700 | [diff] [blame] | 54 | static unsigned int hwbug_bitmask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | int vac_cache_size; |
| 56 | int vac_line_size; |
| 57 | |
| 58 | extern struct resource sparc_iomap; |
| 59 | |
| 60 | extern unsigned long last_valid_pfn; |
| 61 | |
Adrian Bunk | 50215d6 | 2008-06-05 11:41:51 -0700 | [diff] [blame] | 62 | static pgd_t *srmmu_swapper_pg_dir; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 64 | const struct sparc32_cachetlb_ops *sparc32_cachetlb_ops; |
| 65 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | #ifdef CONFIG_SMP |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 67 | const struct sparc32_cachetlb_ops *local_ops; |
| 68 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | #define FLUSH_BEGIN(mm) |
| 70 | #define FLUSH_END |
| 71 | #else |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 72 | #define FLUSH_BEGIN(mm) if ((mm)->context != NO_CONTEXT) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | #define FLUSH_END } |
| 74 | #endif |
| 75 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | int flush_page_for_dma_global = 1; |
| 77 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | char *srmmu_name; |
| 79 | |
| 80 | ctxd_t *srmmu_ctx_table_phys; |
Adrian Bunk | 50215d6 | 2008-06-05 11:41:51 -0700 | [diff] [blame] | 81 | static ctxd_t *srmmu_context_table; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 82 | |
| 83 | int viking_mxcc_present; |
| 84 | static DEFINE_SPINLOCK(srmmu_context_spinlock); |
| 85 | |
Adrian Bunk | 50215d6 | 2008-06-05 11:41:51 -0700 | [diff] [blame] | 86 | static int is_hypersparc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 87 | |
Adrian Bunk | 50215d6 | 2008-06-05 11:41:51 -0700 | [diff] [blame] | 88 | static int srmmu_cache_pagetables; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 89 | |
| 90 | /* these will be initialized in srmmu_nocache_calcsize() */ |
Adrian Bunk | 50215d6 | 2008-06-05 11:41:51 -0700 | [diff] [blame] | 91 | static unsigned long srmmu_nocache_size; |
| 92 | static unsigned long srmmu_nocache_end; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 93 | |
| 94 | /* 1 bit <=> 256 bytes of nocache <=> 64 PTEs */ |
| 95 | #define SRMMU_NOCACHE_BITMAP_SHIFT (PAGE_SHIFT - 4) |
| 96 | |
| 97 | /* The context table is a nocache user with the biggest alignment needs. */ |
| 98 | #define SRMMU_NOCACHE_ALIGN_MAX (sizeof(ctxd_t)*SRMMU_MAX_CONTEXTS) |
| 99 | |
| 100 | void *srmmu_nocache_pool; |
| 101 | void *srmmu_nocache_bitmap; |
| 102 | static struct bit_map srmmu_nocache_map; |
| 103 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 104 | static inline int srmmu_pmd_none(pmd_t pmd) |
| 105 | { return !(pmd_val(pmd) & 0xFFFFFFF); } |
| 106 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 107 | /* XXX should we hyper_flush_whole_icache here - Anton */ |
| 108 | static inline void srmmu_ctxd_set(ctxd_t *ctxp, pgd_t *pgdp) |
David S. Miller | 62875cf | 2012-05-12 13:39:23 -0700 | [diff] [blame] | 109 | { set_pte((pte_t *)ctxp, (SRMMU_ET_PTD | (__nocache_pa((unsigned long) pgdp) >> 4))); } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 110 | |
Sam Ravnborg | 642ea3e | 2012-05-13 08:40:27 +0200 | [diff] [blame] | 111 | void pmd_set(pmd_t *pmdp, pte_t *ptep) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | { |
| 113 | unsigned long ptp; /* Physical address, shifted right by 4 */ |
| 114 | int i; |
| 115 | |
| 116 | ptp = __nocache_pa((unsigned long) ptep) >> 4; |
| 117 | for (i = 0; i < PTRS_PER_PTE/SRMMU_REAL_PTRS_PER_PTE; i++) { |
David S. Miller | 62875cf | 2012-05-12 13:39:23 -0700 | [diff] [blame] | 118 | set_pte((pte_t *)&pmdp->pmdv[i], SRMMU_ET_PTD | ptp); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 119 | ptp += (SRMMU_REAL_PTRS_PER_PTE*sizeof(pte_t) >> 4); |
| 120 | } |
| 121 | } |
| 122 | |
Sam Ravnborg | 642ea3e | 2012-05-13 08:40:27 +0200 | [diff] [blame] | 123 | void pmd_populate(struct mm_struct *mm, pmd_t *pmdp, struct page *ptep) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 124 | { |
| 125 | unsigned long ptp; /* Physical address, shifted right by 4 */ |
| 126 | int i; |
| 127 | |
| 128 | ptp = page_to_pfn(ptep) << (PAGE_SHIFT-4); /* watch for overflow */ |
| 129 | for (i = 0; i < PTRS_PER_PTE/SRMMU_REAL_PTRS_PER_PTE; i++) { |
David S. Miller | 62875cf | 2012-05-12 13:39:23 -0700 | [diff] [blame] | 130 | set_pte((pte_t *)&pmdp->pmdv[i], SRMMU_ET_PTD | ptp); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 131 | ptp += (SRMMU_REAL_PTRS_PER_PTE*sizeof(pte_t) >> 4); |
| 132 | } |
| 133 | } |
| 134 | |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 135 | /* Find an entry in the third-level page table.. */ |
| 136 | pte_t *pte_offset_kernel(pmd_t *dir, unsigned long address) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | { |
| 138 | void *pte; |
| 139 | |
| 140 | pte = __nocache_va((dir->pmdv[0] & SRMMU_PTD_PMASK) << 4); |
| 141 | return (pte_t *) pte + |
| 142 | ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)); |
| 143 | } |
| 144 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 145 | /* |
| 146 | * size: bytes to allocate in the nocache area. |
| 147 | * align: bytes, number to align at. |
| 148 | * Returns the virtual address of the allocated area. |
| 149 | */ |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 150 | static void *__srmmu_get_nocache(int size, int align) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | { |
| 152 | int offset; |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 153 | unsigned long addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | |
| 155 | if (size < SRMMU_NOCACHE_BITMAP_SHIFT) { |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 156 | printk(KERN_ERR "Size 0x%x too small for nocache request\n", |
| 157 | size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | size = SRMMU_NOCACHE_BITMAP_SHIFT; |
| 159 | } |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 160 | if (size & (SRMMU_NOCACHE_BITMAP_SHIFT - 1)) { |
| 161 | printk(KERN_ERR "Size 0x%x unaligned int nocache request\n", |
| 162 | size); |
| 163 | size += SRMMU_NOCACHE_BITMAP_SHIFT - 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 164 | } |
| 165 | BUG_ON(align > SRMMU_NOCACHE_ALIGN_MAX); |
| 166 | |
| 167 | offset = bit_map_string_get(&srmmu_nocache_map, |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 168 | size >> SRMMU_NOCACHE_BITMAP_SHIFT, |
| 169 | align >> SRMMU_NOCACHE_BITMAP_SHIFT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 170 | if (offset == -1) { |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 171 | printk(KERN_ERR "srmmu: out of nocache %d: %d/%d\n", |
| 172 | size, (int) srmmu_nocache_size, |
| 173 | srmmu_nocache_map.used << SRMMU_NOCACHE_BITMAP_SHIFT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 174 | return 0; |
| 175 | } |
| 176 | |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 177 | addr = SRMMU_NOCACHE_VADDR + (offset << SRMMU_NOCACHE_BITMAP_SHIFT); |
| 178 | return (void *)addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 179 | } |
| 180 | |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 181 | void *srmmu_get_nocache(int size, int align) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 182 | { |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 183 | void *tmp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 184 | |
| 185 | tmp = __srmmu_get_nocache(size, align); |
| 186 | |
| 187 | if (tmp) |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 188 | memset(tmp, 0, size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 189 | |
| 190 | return tmp; |
| 191 | } |
| 192 | |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 193 | void srmmu_free_nocache(void *addr, int size) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 194 | { |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 195 | unsigned long vaddr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 196 | int offset; |
| 197 | |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 198 | vaddr = (unsigned long)addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 199 | if (vaddr < SRMMU_NOCACHE_VADDR) { |
| 200 | printk("Vaddr %lx is smaller than nocache base 0x%lx\n", |
| 201 | vaddr, (unsigned long)SRMMU_NOCACHE_VADDR); |
| 202 | BUG(); |
| 203 | } |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 204 | if (vaddr + size > srmmu_nocache_end) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 205 | printk("Vaddr %lx is bigger than nocache end 0x%lx\n", |
| 206 | vaddr, srmmu_nocache_end); |
| 207 | BUG(); |
| 208 | } |
Robert P. J. Day | 949e827 | 2009-04-24 03:58:24 +0000 | [diff] [blame] | 209 | if (!is_power_of_2(size)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 210 | printk("Size 0x%x is not a power of 2\n", size); |
| 211 | BUG(); |
| 212 | } |
| 213 | if (size < SRMMU_NOCACHE_BITMAP_SHIFT) { |
| 214 | printk("Size 0x%x is too small\n", size); |
| 215 | BUG(); |
| 216 | } |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 217 | if (vaddr & (size - 1)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 218 | printk("Vaddr %lx is not aligned to size 0x%x\n", vaddr, size); |
| 219 | BUG(); |
| 220 | } |
| 221 | |
| 222 | offset = (vaddr - SRMMU_NOCACHE_VADDR) >> SRMMU_NOCACHE_BITMAP_SHIFT; |
| 223 | size = size >> SRMMU_NOCACHE_BITMAP_SHIFT; |
| 224 | |
| 225 | bit_map_clear(&srmmu_nocache_map, offset, size); |
| 226 | } |
| 227 | |
Adrian Bunk | 50215d6 | 2008-06-05 11:41:51 -0700 | [diff] [blame] | 228 | static void srmmu_early_allocate_ptable_skeleton(unsigned long start, |
| 229 | unsigned long end); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | |
| 231 | extern unsigned long probe_memory(void); /* in fault.c */ |
| 232 | |
| 233 | /* |
| 234 | * Reserve nocache dynamically proportionally to the amount of |
| 235 | * system RAM. -- Tomas Szepe <szepe@pinerecords.com>, June 2002 |
| 236 | */ |
Sam Ravnborg | 3244246 | 2012-07-26 11:02:11 +0000 | [diff] [blame] | 237 | static void __init srmmu_nocache_calcsize(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 238 | { |
| 239 | unsigned long sysmemavail = probe_memory() / 1024; |
| 240 | int srmmu_nocache_npages; |
| 241 | |
| 242 | srmmu_nocache_npages = |
| 243 | sysmemavail / SRMMU_NOCACHE_ALCRATIO / 1024 * 256; |
| 244 | |
| 245 | /* P3 XXX The 4x overuse: corroborated by /proc/meminfo. */ |
| 246 | // if (srmmu_nocache_npages < 256) srmmu_nocache_npages = 256; |
| 247 | if (srmmu_nocache_npages < SRMMU_MIN_NOCACHE_PAGES) |
| 248 | srmmu_nocache_npages = SRMMU_MIN_NOCACHE_PAGES; |
| 249 | |
| 250 | /* anything above 1280 blows up */ |
| 251 | if (srmmu_nocache_npages > SRMMU_MAX_NOCACHE_PAGES) |
| 252 | srmmu_nocache_npages = SRMMU_MAX_NOCACHE_PAGES; |
| 253 | |
| 254 | srmmu_nocache_size = srmmu_nocache_npages * PAGE_SIZE; |
| 255 | srmmu_nocache_end = SRMMU_NOCACHE_VADDR + srmmu_nocache_size; |
| 256 | } |
| 257 | |
Adrian Bunk | 50215d6 | 2008-06-05 11:41:51 -0700 | [diff] [blame] | 258 | static void __init srmmu_nocache_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | { |
| 260 | unsigned int bitmap_bits; |
| 261 | pgd_t *pgd; |
| 262 | pmd_t *pmd; |
| 263 | pte_t *pte; |
| 264 | unsigned long paddr, vaddr; |
| 265 | unsigned long pteval; |
| 266 | |
| 267 | bitmap_bits = srmmu_nocache_size >> SRMMU_NOCACHE_BITMAP_SHIFT; |
| 268 | |
| 269 | srmmu_nocache_pool = __alloc_bootmem(srmmu_nocache_size, |
| 270 | SRMMU_NOCACHE_ALIGN_MAX, 0UL); |
| 271 | memset(srmmu_nocache_pool, 0, srmmu_nocache_size); |
| 272 | |
| 273 | srmmu_nocache_bitmap = __alloc_bootmem(bitmap_bits >> 3, SMP_CACHE_BYTES, 0UL); |
| 274 | bit_map_init(&srmmu_nocache_map, srmmu_nocache_bitmap, bitmap_bits); |
| 275 | |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 276 | srmmu_swapper_pg_dir = __srmmu_get_nocache(SRMMU_PGD_TABLE_SIZE, SRMMU_PGD_TABLE_SIZE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 277 | memset(__nocache_fix(srmmu_swapper_pg_dir), 0, SRMMU_PGD_TABLE_SIZE); |
| 278 | init_mm.pgd = srmmu_swapper_pg_dir; |
| 279 | |
| 280 | srmmu_early_allocate_ptable_skeleton(SRMMU_NOCACHE_VADDR, srmmu_nocache_end); |
| 281 | |
| 282 | paddr = __pa((unsigned long)srmmu_nocache_pool); |
| 283 | vaddr = SRMMU_NOCACHE_VADDR; |
| 284 | |
| 285 | while (vaddr < srmmu_nocache_end) { |
| 286 | pgd = pgd_offset_k(vaddr); |
Sam Ravnborg | 9701b26 | 2012-05-13 10:21:25 +0200 | [diff] [blame] | 287 | pmd = pmd_offset(__nocache_fix(pgd), vaddr); |
| 288 | pte = pte_offset_kernel(__nocache_fix(pmd), vaddr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 289 | |
| 290 | pteval = ((paddr >> 4) | SRMMU_ET_PTE | SRMMU_PRIV); |
| 291 | |
| 292 | if (srmmu_cache_pagetables) |
| 293 | pteval |= SRMMU_CACHE; |
| 294 | |
David S. Miller | 62875cf | 2012-05-12 13:39:23 -0700 | [diff] [blame] | 295 | set_pte(__nocache_fix(pte), __pte(pteval)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 296 | |
| 297 | vaddr += PAGE_SIZE; |
| 298 | paddr += PAGE_SIZE; |
| 299 | } |
| 300 | |
| 301 | flush_cache_all(); |
| 302 | flush_tlb_all(); |
| 303 | } |
| 304 | |
Sam Ravnborg | 642ea3e | 2012-05-13 08:40:27 +0200 | [diff] [blame] | 305 | pgd_t *get_pgd_fast(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 306 | { |
| 307 | pgd_t *pgd = NULL; |
| 308 | |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 309 | pgd = __srmmu_get_nocache(SRMMU_PGD_TABLE_SIZE, SRMMU_PGD_TABLE_SIZE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | if (pgd) { |
| 311 | pgd_t *init = pgd_offset_k(0); |
| 312 | memset(pgd, 0, USER_PTRS_PER_PGD * sizeof(pgd_t)); |
| 313 | memcpy(pgd + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD, |
| 314 | (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); |
| 315 | } |
| 316 | |
| 317 | return pgd; |
| 318 | } |
| 319 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 320 | /* |
| 321 | * Hardware needs alignment to 256 only, but we align to whole page size |
| 322 | * to reduce fragmentation problems due to the buddy principle. |
| 323 | * XXX Provide actual fragmentation statistics in /proc. |
| 324 | * |
| 325 | * Alignments up to the page size are the same for physical and virtual |
| 326 | * addresses of the nocache area. |
| 327 | */ |
Sam Ravnborg | 642ea3e | 2012-05-13 08:40:27 +0200 | [diff] [blame] | 328 | pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 329 | { |
| 330 | unsigned long pte; |
Martin Schwidefsky | 2f569af | 2008-02-08 04:22:04 -0800 | [diff] [blame] | 331 | struct page *page; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 332 | |
Sam Ravnborg | 642ea3e | 2012-05-13 08:40:27 +0200 | [diff] [blame] | 333 | if ((pte = (unsigned long)pte_alloc_one_kernel(mm, address)) == 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 334 | return NULL; |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 335 | page = pfn_to_page(__nocache_pa(pte) >> PAGE_SHIFT); |
Martin Schwidefsky | 2f569af | 2008-02-08 04:22:04 -0800 | [diff] [blame] | 336 | pgtable_page_ctor(page); |
| 337 | return page; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | } |
| 339 | |
Sam Ravnborg | 642ea3e | 2012-05-13 08:40:27 +0200 | [diff] [blame] | 340 | void pte_free(struct mm_struct *mm, pgtable_t pte) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 341 | { |
| 342 | unsigned long p; |
| 343 | |
Martin Schwidefsky | 2f569af | 2008-02-08 04:22:04 -0800 | [diff] [blame] | 344 | pgtable_page_dtor(pte); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 345 | p = (unsigned long)page_address(pte); /* Cached address (for test) */ |
| 346 | if (p == 0) |
| 347 | BUG(); |
| 348 | p = page_to_pfn(pte) << PAGE_SHIFT; /* Physical address */ |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 349 | |
| 350 | /* free non cached virtual address*/ |
| 351 | srmmu_free_nocache(__nocache_va(p), PTE_SIZE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 352 | } |
| 353 | |
Sam Ravnborg | b585e85 | 2012-07-26 11:02:24 +0000 | [diff] [blame] | 354 | /* context handling - a dynamically sized pool is used */ |
| 355 | #define NO_CONTEXT -1 |
| 356 | |
| 357 | struct ctx_list { |
| 358 | struct ctx_list *next; |
| 359 | struct ctx_list *prev; |
| 360 | unsigned int ctx_number; |
| 361 | struct mm_struct *ctx_mm; |
| 362 | }; |
| 363 | |
| 364 | static struct ctx_list *ctx_list_pool; |
| 365 | static struct ctx_list ctx_free; |
| 366 | static struct ctx_list ctx_used; |
| 367 | |
| 368 | /* At boot time we determine the number of contexts */ |
| 369 | static int num_contexts; |
| 370 | |
| 371 | static inline void remove_from_ctx_list(struct ctx_list *entry) |
| 372 | { |
| 373 | entry->next->prev = entry->prev; |
| 374 | entry->prev->next = entry->next; |
| 375 | } |
| 376 | |
| 377 | static inline void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry) |
| 378 | { |
| 379 | entry->next = head; |
| 380 | (entry->prev = head->prev)->next = entry; |
| 381 | head->prev = entry; |
| 382 | } |
| 383 | #define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry) |
| 384 | #define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry) |
| 385 | |
| 386 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 387 | static inline void alloc_context(struct mm_struct *old_mm, struct mm_struct *mm) |
| 388 | { |
| 389 | struct ctx_list *ctxp; |
| 390 | |
| 391 | ctxp = ctx_free.next; |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 392 | if (ctxp != &ctx_free) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 393 | remove_from_ctx_list(ctxp); |
| 394 | add_to_used_ctxlist(ctxp); |
| 395 | mm->context = ctxp->ctx_number; |
| 396 | ctxp->ctx_mm = mm; |
| 397 | return; |
| 398 | } |
| 399 | ctxp = ctx_used.next; |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 400 | if (ctxp->ctx_mm == old_mm) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 401 | ctxp = ctxp->next; |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 402 | if (ctxp == &ctx_used) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 403 | panic("out of mmu contexts"); |
| 404 | flush_cache_mm(ctxp->ctx_mm); |
| 405 | flush_tlb_mm(ctxp->ctx_mm); |
| 406 | remove_from_ctx_list(ctxp); |
| 407 | add_to_used_ctxlist(ctxp); |
| 408 | ctxp->ctx_mm->context = NO_CONTEXT; |
| 409 | ctxp->ctx_mm = mm; |
| 410 | mm->context = ctxp->ctx_number; |
| 411 | } |
| 412 | |
| 413 | static inline void free_context(int context) |
| 414 | { |
| 415 | struct ctx_list *ctx_old; |
| 416 | |
| 417 | ctx_old = ctx_list_pool + context; |
| 418 | remove_from_ctx_list(ctx_old); |
| 419 | add_to_free_ctxlist(ctx_old); |
| 420 | } |
| 421 | |
Sam Ravnborg | b585e85 | 2012-07-26 11:02:24 +0000 | [diff] [blame] | 422 | static void __init sparc_context_init(int numctx) |
| 423 | { |
| 424 | int ctx; |
| 425 | unsigned long size; |
| 426 | |
| 427 | size = numctx * sizeof(struct ctx_list); |
| 428 | ctx_list_pool = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL); |
| 429 | |
| 430 | for (ctx = 0; ctx < numctx; ctx++) { |
| 431 | struct ctx_list *clist; |
| 432 | |
| 433 | clist = (ctx_list_pool + ctx); |
| 434 | clist->ctx_number = ctx; |
| 435 | clist->ctx_mm = NULL; |
| 436 | } |
| 437 | ctx_free.next = ctx_free.prev = &ctx_free; |
| 438 | ctx_used.next = ctx_used.prev = &ctx_used; |
| 439 | for (ctx = 0; ctx < numctx; ctx++) |
| 440 | add_to_free_ctxlist(ctx_list_pool + ctx); |
| 441 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 442 | |
Sam Ravnborg | 34d4acc | 2012-05-12 08:04:11 +0000 | [diff] [blame] | 443 | void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, |
| 444 | struct task_struct *tsk) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 445 | { |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 446 | if (mm->context == NO_CONTEXT) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 447 | spin_lock(&srmmu_context_spinlock); |
| 448 | alloc_context(old_mm, mm); |
| 449 | spin_unlock(&srmmu_context_spinlock); |
| 450 | srmmu_ctxd_set(&srmmu_context_table[mm->context], mm->pgd); |
| 451 | } |
| 452 | |
Konrad Eisele | 75d9e34 | 2009-08-17 00:13:33 +0000 | [diff] [blame] | 453 | if (sparc_cpu_model == sparc_leon) |
| 454 | leon_switch_mm(); |
| 455 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 456 | if (is_hypersparc) |
| 457 | hyper_flush_whole_icache(); |
| 458 | |
| 459 | srmmu_set_context(mm->context); |
| 460 | } |
| 461 | |
| 462 | /* Low level IO area allocation on the SRMMU. */ |
| 463 | static inline void srmmu_mapioaddr(unsigned long physaddr, |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 464 | unsigned long virt_addr, int bus_type) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | { |
| 466 | pgd_t *pgdp; |
| 467 | pmd_t *pmdp; |
| 468 | pte_t *ptep; |
| 469 | unsigned long tmp; |
| 470 | |
| 471 | physaddr &= PAGE_MASK; |
| 472 | pgdp = pgd_offset_k(virt_addr); |
Sam Ravnborg | 9701b26 | 2012-05-13 10:21:25 +0200 | [diff] [blame] | 473 | pmdp = pmd_offset(pgdp, virt_addr); |
| 474 | ptep = pte_offset_kernel(pmdp, virt_addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 475 | tmp = (physaddr >> 4) | SRMMU_ET_PTE; |
| 476 | |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 477 | /* I need to test whether this is consistent over all |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 478 | * sun4m's. The bus_type represents the upper 4 bits of |
| 479 | * 36-bit physical address on the I/O space lines... |
| 480 | */ |
| 481 | tmp |= (bus_type << 28); |
| 482 | tmp |= SRMMU_PRIV; |
| 483 | __flush_page_to_ram(virt_addr); |
David S. Miller | 62875cf | 2012-05-12 13:39:23 -0700 | [diff] [blame] | 484 | set_pte(ptep, __pte(tmp)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 485 | } |
| 486 | |
Sam Ravnborg | 9701b26 | 2012-05-13 10:21:25 +0200 | [diff] [blame] | 487 | void srmmu_mapiorange(unsigned int bus, unsigned long xpa, |
| 488 | unsigned long xva, unsigned int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 489 | { |
| 490 | while (len != 0) { |
| 491 | len -= PAGE_SIZE; |
| 492 | srmmu_mapioaddr(xpa, xva, bus); |
| 493 | xva += PAGE_SIZE; |
| 494 | xpa += PAGE_SIZE; |
| 495 | } |
| 496 | flush_tlb_all(); |
| 497 | } |
| 498 | |
| 499 | static inline void srmmu_unmapioaddr(unsigned long virt_addr) |
| 500 | { |
| 501 | pgd_t *pgdp; |
| 502 | pmd_t *pmdp; |
| 503 | pte_t *ptep; |
| 504 | |
| 505 | pgdp = pgd_offset_k(virt_addr); |
Sam Ravnborg | 9701b26 | 2012-05-13 10:21:25 +0200 | [diff] [blame] | 506 | pmdp = pmd_offset(pgdp, virt_addr); |
| 507 | ptep = pte_offset_kernel(pmdp, virt_addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 508 | |
| 509 | /* No need to flush uncacheable page. */ |
David S. Miller | a46d605 | 2012-05-12 12:26:47 -0700 | [diff] [blame] | 510 | __pte_clear(ptep); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 511 | } |
| 512 | |
Sam Ravnborg | 9701b26 | 2012-05-13 10:21:25 +0200 | [diff] [blame] | 513 | void srmmu_unmapiorange(unsigned long virt_addr, unsigned int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 514 | { |
| 515 | while (len != 0) { |
| 516 | len -= PAGE_SIZE; |
| 517 | srmmu_unmapioaddr(virt_addr); |
| 518 | virt_addr += PAGE_SIZE; |
| 519 | } |
| 520 | flush_tlb_all(); |
| 521 | } |
| 522 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 523 | /* tsunami.S */ |
| 524 | extern void tsunami_flush_cache_all(void); |
| 525 | extern void tsunami_flush_cache_mm(struct mm_struct *mm); |
| 526 | extern void tsunami_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); |
| 527 | extern void tsunami_flush_cache_page(struct vm_area_struct *vma, unsigned long page); |
| 528 | extern void tsunami_flush_page_to_ram(unsigned long page); |
| 529 | extern void tsunami_flush_page_for_dma(unsigned long page); |
| 530 | extern void tsunami_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr); |
| 531 | extern void tsunami_flush_tlb_all(void); |
| 532 | extern void tsunami_flush_tlb_mm(struct mm_struct *mm); |
| 533 | extern void tsunami_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); |
| 534 | extern void tsunami_flush_tlb_page(struct vm_area_struct *vma, unsigned long page); |
| 535 | extern void tsunami_setup_blockops(void); |
| 536 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 537 | /* swift.S */ |
| 538 | extern void swift_flush_cache_all(void); |
| 539 | extern void swift_flush_cache_mm(struct mm_struct *mm); |
| 540 | extern void swift_flush_cache_range(struct vm_area_struct *vma, |
| 541 | unsigned long start, unsigned long end); |
| 542 | extern void swift_flush_cache_page(struct vm_area_struct *vma, unsigned long page); |
| 543 | extern void swift_flush_page_to_ram(unsigned long page); |
| 544 | extern void swift_flush_page_for_dma(unsigned long page); |
| 545 | extern void swift_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr); |
| 546 | extern void swift_flush_tlb_all(void); |
| 547 | extern void swift_flush_tlb_mm(struct mm_struct *mm); |
| 548 | extern void swift_flush_tlb_range(struct vm_area_struct *vma, |
| 549 | unsigned long start, unsigned long end); |
| 550 | extern void swift_flush_tlb_page(struct vm_area_struct *vma, unsigned long page); |
| 551 | |
| 552 | #if 0 /* P3: deadwood to debug precise flushes on Swift. */ |
| 553 | void swift_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) |
| 554 | { |
| 555 | int cctx, ctx1; |
| 556 | |
| 557 | page &= PAGE_MASK; |
| 558 | if ((ctx1 = vma->vm_mm->context) != -1) { |
| 559 | cctx = srmmu_get_context(); |
| 560 | /* Is context # ever different from current context? P3 */ |
| 561 | if (cctx != ctx1) { |
| 562 | printk("flush ctx %02x curr %02x\n", ctx1, cctx); |
| 563 | srmmu_set_context(ctx1); |
| 564 | swift_flush_page(page); |
| 565 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : |
| 566 | "r" (page), "i" (ASI_M_FLUSH_PROBE)); |
| 567 | srmmu_set_context(cctx); |
| 568 | } else { |
| 569 | /* Rm. prot. bits from virt. c. */ |
| 570 | /* swift_flush_cache_all(); */ |
| 571 | /* swift_flush_cache_page(vma, page); */ |
| 572 | swift_flush_page(page); |
| 573 | |
| 574 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : |
| 575 | "r" (page), "i" (ASI_M_FLUSH_PROBE)); |
| 576 | /* same as above: srmmu_flush_tlb_page() */ |
| 577 | } |
| 578 | } |
| 579 | } |
| 580 | #endif |
| 581 | |
| 582 | /* |
| 583 | * The following are all MBUS based SRMMU modules, and therefore could |
| 584 | * be found in a multiprocessor configuration. On the whole, these |
| 585 | * chips seems to be much more touchy about DVMA and page tables |
| 586 | * with respect to cache coherency. |
| 587 | */ |
| 588 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 589 | /* viking.S */ |
| 590 | extern void viking_flush_cache_all(void); |
| 591 | extern void viking_flush_cache_mm(struct mm_struct *mm); |
| 592 | extern void viking_flush_cache_range(struct vm_area_struct *vma, unsigned long start, |
| 593 | unsigned long end); |
| 594 | extern void viking_flush_cache_page(struct vm_area_struct *vma, unsigned long page); |
| 595 | extern void viking_flush_page_to_ram(unsigned long page); |
| 596 | extern void viking_flush_page_for_dma(unsigned long page); |
| 597 | extern void viking_flush_sig_insns(struct mm_struct *mm, unsigned long addr); |
| 598 | extern void viking_flush_page(unsigned long page); |
| 599 | extern void viking_mxcc_flush_page(unsigned long page); |
| 600 | extern void viking_flush_tlb_all(void); |
| 601 | extern void viking_flush_tlb_mm(struct mm_struct *mm); |
| 602 | extern void viking_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, |
| 603 | unsigned long end); |
| 604 | extern void viking_flush_tlb_page(struct vm_area_struct *vma, |
| 605 | unsigned long page); |
| 606 | extern void sun4dsmp_flush_tlb_all(void); |
| 607 | extern void sun4dsmp_flush_tlb_mm(struct mm_struct *mm); |
| 608 | extern void sun4dsmp_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, |
| 609 | unsigned long end); |
| 610 | extern void sun4dsmp_flush_tlb_page(struct vm_area_struct *vma, |
| 611 | unsigned long page); |
| 612 | |
| 613 | /* hypersparc.S */ |
| 614 | extern void hypersparc_flush_cache_all(void); |
| 615 | extern void hypersparc_flush_cache_mm(struct mm_struct *mm); |
| 616 | extern void hypersparc_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); |
| 617 | extern void hypersparc_flush_cache_page(struct vm_area_struct *vma, unsigned long page); |
| 618 | extern void hypersparc_flush_page_to_ram(unsigned long page); |
| 619 | extern void hypersparc_flush_page_for_dma(unsigned long page); |
| 620 | extern void hypersparc_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr); |
| 621 | extern void hypersparc_flush_tlb_all(void); |
| 622 | extern void hypersparc_flush_tlb_mm(struct mm_struct *mm); |
| 623 | extern void hypersparc_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); |
| 624 | extern void hypersparc_flush_tlb_page(struct vm_area_struct *vma, unsigned long page); |
| 625 | extern void hypersparc_setup_blockops(void); |
| 626 | |
| 627 | /* |
| 628 | * NOTE: All of this startup code assumes the low 16mb (approx.) of |
| 629 | * kernel mappings are done with one single contiguous chunk of |
| 630 | * ram. On small ram machines (classics mainly) we only get |
| 631 | * around 8mb mapped for us. |
| 632 | */ |
| 633 | |
Adrian Bunk | 50215d6 | 2008-06-05 11:41:51 -0700 | [diff] [blame] | 634 | static void __init early_pgtable_allocfail(char *type) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 635 | { |
| 636 | prom_printf("inherit_prom_mappings: Cannot alloc kernel %s.\n", type); |
| 637 | prom_halt(); |
| 638 | } |
| 639 | |
Adrian Bunk | 50215d6 | 2008-06-05 11:41:51 -0700 | [diff] [blame] | 640 | static void __init srmmu_early_allocate_ptable_skeleton(unsigned long start, |
| 641 | unsigned long end) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 642 | { |
| 643 | pgd_t *pgdp; |
| 644 | pmd_t *pmdp; |
| 645 | pte_t *ptep; |
| 646 | |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 647 | while (start < end) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 648 | pgdp = pgd_offset_k(start); |
David S. Miller | 7d9fa4a | 2012-05-12 13:13:16 -0700 | [diff] [blame] | 649 | if (pgd_none(*(pgd_t *)__nocache_fix(pgdp))) { |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 650 | pmdp = __srmmu_get_nocache( |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 651 | SRMMU_PMD_TABLE_SIZE, SRMMU_PMD_TABLE_SIZE); |
| 652 | if (pmdp == NULL) |
| 653 | early_pgtable_allocfail("pmd"); |
| 654 | memset(__nocache_fix(pmdp), 0, SRMMU_PMD_TABLE_SIZE); |
Sam Ravnborg | 642ea3e | 2012-05-13 08:40:27 +0200 | [diff] [blame] | 655 | pgd_set(__nocache_fix(pgdp), pmdp); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 656 | } |
Sam Ravnborg | 9701b26 | 2012-05-13 10:21:25 +0200 | [diff] [blame] | 657 | pmdp = pmd_offset(__nocache_fix(pgdp), start); |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 658 | if (srmmu_pmd_none(*(pmd_t *)__nocache_fix(pmdp))) { |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 659 | ptep = __srmmu_get_nocache(PTE_SIZE, PTE_SIZE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 660 | if (ptep == NULL) |
| 661 | early_pgtable_allocfail("pte"); |
| 662 | memset(__nocache_fix(ptep), 0, PTE_SIZE); |
Sam Ravnborg | 642ea3e | 2012-05-13 08:40:27 +0200 | [diff] [blame] | 663 | pmd_set(__nocache_fix(pmdp), ptep); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 664 | } |
| 665 | if (start > (0xffffffffUL - PMD_SIZE)) |
| 666 | break; |
| 667 | start = (start + PMD_SIZE) & PMD_MASK; |
| 668 | } |
| 669 | } |
| 670 | |
Adrian Bunk | 50215d6 | 2008-06-05 11:41:51 -0700 | [diff] [blame] | 671 | static void __init srmmu_allocate_ptable_skeleton(unsigned long start, |
| 672 | unsigned long end) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 673 | { |
| 674 | pgd_t *pgdp; |
| 675 | pmd_t *pmdp; |
| 676 | pte_t *ptep; |
| 677 | |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 678 | while (start < end) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 679 | pgdp = pgd_offset_k(start); |
David S. Miller | 7d9fa4a | 2012-05-12 13:13:16 -0700 | [diff] [blame] | 680 | if (pgd_none(*pgdp)) { |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 681 | pmdp = __srmmu_get_nocache(SRMMU_PMD_TABLE_SIZE, SRMMU_PMD_TABLE_SIZE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 682 | if (pmdp == NULL) |
| 683 | early_pgtable_allocfail("pmd"); |
| 684 | memset(pmdp, 0, SRMMU_PMD_TABLE_SIZE); |
Sam Ravnborg | 642ea3e | 2012-05-13 08:40:27 +0200 | [diff] [blame] | 685 | pgd_set(pgdp, pmdp); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 686 | } |
Sam Ravnborg | 9701b26 | 2012-05-13 10:21:25 +0200 | [diff] [blame] | 687 | pmdp = pmd_offset(pgdp, start); |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 688 | if (srmmu_pmd_none(*pmdp)) { |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 689 | ptep = __srmmu_get_nocache(PTE_SIZE, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 690 | PTE_SIZE); |
| 691 | if (ptep == NULL) |
| 692 | early_pgtable_allocfail("pte"); |
| 693 | memset(ptep, 0, PTE_SIZE); |
Sam Ravnborg | 642ea3e | 2012-05-13 08:40:27 +0200 | [diff] [blame] | 694 | pmd_set(pmdp, ptep); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 695 | } |
| 696 | if (start > (0xffffffffUL - PMD_SIZE)) |
| 697 | break; |
| 698 | start = (start + PMD_SIZE) & PMD_MASK; |
| 699 | } |
| 700 | } |
| 701 | |
Sam Ravnborg | 805918f | 2012-05-25 21:20:19 +0000 | [diff] [blame] | 702 | /* These flush types are not available on all chips... */ |
| 703 | static inline unsigned long srmmu_probe(unsigned long vaddr) |
| 704 | { |
| 705 | unsigned long retval; |
| 706 | |
| 707 | if (sparc_cpu_model != sparc_leon) { |
| 708 | |
| 709 | vaddr &= PAGE_MASK; |
| 710 | __asm__ __volatile__("lda [%1] %2, %0\n\t" : |
| 711 | "=r" (retval) : |
| 712 | "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE)); |
| 713 | } else { |
| 714 | retval = leon_swprobe(vaddr, 0); |
| 715 | } |
| 716 | return retval; |
| 717 | } |
| 718 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 719 | /* |
| 720 | * This is much cleaner than poking around physical address space |
| 721 | * looking at the prom's page table directly which is what most |
| 722 | * other OS's do. Yuck... this is much better. |
| 723 | */ |
Adrian Bunk | 50215d6 | 2008-06-05 11:41:51 -0700 | [diff] [blame] | 724 | static void __init srmmu_inherit_prom_mappings(unsigned long start, |
| 725 | unsigned long end) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 726 | { |
Sam Ravnborg | 7cdfbc7 | 2012-07-26 11:02:15 +0000 | [diff] [blame] | 727 | unsigned long probed; |
| 728 | unsigned long addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 729 | pgd_t *pgdp; |
| 730 | pmd_t *pmdp; |
| 731 | pte_t *ptep; |
Sam Ravnborg | 7cdfbc7 | 2012-07-26 11:02:15 +0000 | [diff] [blame] | 732 | int what; /* 0 = normal-pte, 1 = pmd-level pte, 2 = pgd-level pte */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 733 | |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 734 | while (start <= end) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 735 | if (start == 0) |
| 736 | break; /* probably wrap around */ |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 737 | if (start == 0xfef00000) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 738 | start = KADB_DEBUGGER_BEGVM; |
Sam Ravnborg | 7cdfbc7 | 2012-07-26 11:02:15 +0000 | [diff] [blame] | 739 | probed = srmmu_probe(start); |
| 740 | if (!probed) { |
| 741 | /* continue probing until we find an entry */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 742 | start += PAGE_SIZE; |
| 743 | continue; |
| 744 | } |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 745 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 746 | /* A red snapper, see what it really is. */ |
| 747 | what = 0; |
Sam Ravnborg | 7cdfbc7 | 2012-07-26 11:02:15 +0000 | [diff] [blame] | 748 | addr = start - PAGE_SIZE; |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 749 | |
| 750 | if (!(start & ~(SRMMU_REAL_PMD_MASK))) { |
Sam Ravnborg | 7cdfbc7 | 2012-07-26 11:02:15 +0000 | [diff] [blame] | 751 | if (srmmu_probe(addr + SRMMU_REAL_PMD_SIZE) == probed) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 752 | what = 1; |
| 753 | } |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 754 | |
| 755 | if (!(start & ~(SRMMU_PGDIR_MASK))) { |
Sam Ravnborg | 7cdfbc7 | 2012-07-26 11:02:15 +0000 | [diff] [blame] | 756 | if (srmmu_probe(addr + SRMMU_PGDIR_SIZE) == probed) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | what = 2; |
| 758 | } |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 759 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 760 | pgdp = pgd_offset_k(start); |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 761 | if (what == 2) { |
Sam Ravnborg | 7cdfbc7 | 2012-07-26 11:02:15 +0000 | [diff] [blame] | 762 | *(pgd_t *)__nocache_fix(pgdp) = __pgd(probed); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 763 | start += SRMMU_PGDIR_SIZE; |
| 764 | continue; |
| 765 | } |
David S. Miller | 7d9fa4a | 2012-05-12 13:13:16 -0700 | [diff] [blame] | 766 | if (pgd_none(*(pgd_t *)__nocache_fix(pgdp))) { |
Sam Ravnborg | 7cdfbc7 | 2012-07-26 11:02:15 +0000 | [diff] [blame] | 767 | pmdp = __srmmu_get_nocache(SRMMU_PMD_TABLE_SIZE, |
| 768 | SRMMU_PMD_TABLE_SIZE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 769 | if (pmdp == NULL) |
| 770 | early_pgtable_allocfail("pmd"); |
| 771 | memset(__nocache_fix(pmdp), 0, SRMMU_PMD_TABLE_SIZE); |
Sam Ravnborg | 642ea3e | 2012-05-13 08:40:27 +0200 | [diff] [blame] | 772 | pgd_set(__nocache_fix(pgdp), pmdp); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 773 | } |
Sam Ravnborg | 9701b26 | 2012-05-13 10:21:25 +0200 | [diff] [blame] | 774 | pmdp = pmd_offset(__nocache_fix(pgdp), start); |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 775 | if (srmmu_pmd_none(*(pmd_t *)__nocache_fix(pmdp))) { |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 776 | ptep = __srmmu_get_nocache(PTE_SIZE, PTE_SIZE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 777 | if (ptep == NULL) |
| 778 | early_pgtable_allocfail("pte"); |
| 779 | memset(__nocache_fix(ptep), 0, PTE_SIZE); |
Sam Ravnborg | 642ea3e | 2012-05-13 08:40:27 +0200 | [diff] [blame] | 780 | pmd_set(__nocache_fix(pmdp), ptep); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 781 | } |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 782 | if (what == 1) { |
| 783 | /* We bend the rule where all 16 PTPs in a pmd_t point |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 784 | * inside the same PTE page, and we leak a perfectly |
| 785 | * good hardware PTE piece. Alternatives seem worse. |
| 786 | */ |
| 787 | unsigned int x; /* Index of HW PMD in soft cluster */ |
Sam Ravnborg | 7cdfbc7 | 2012-07-26 11:02:15 +0000 | [diff] [blame] | 788 | unsigned long *val; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 789 | x = (start >> PMD_SHIFT) & 15; |
Sam Ravnborg | 7cdfbc7 | 2012-07-26 11:02:15 +0000 | [diff] [blame] | 790 | val = &pmdp->pmdv[x]; |
| 791 | *(unsigned long *)__nocache_fix(val) = probed; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 792 | start += SRMMU_REAL_PMD_SIZE; |
| 793 | continue; |
| 794 | } |
Sam Ravnborg | 9701b26 | 2012-05-13 10:21:25 +0200 | [diff] [blame] | 795 | ptep = pte_offset_kernel(__nocache_fix(pmdp), start); |
Sam Ravnborg | 7cdfbc7 | 2012-07-26 11:02:15 +0000 | [diff] [blame] | 796 | *(pte_t *)__nocache_fix(ptep) = __pte(probed); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 797 | start += PAGE_SIZE; |
| 798 | } |
| 799 | } |
| 800 | |
| 801 | #define KERNEL_PTE(page_shifted) ((page_shifted)|SRMMU_CACHE|SRMMU_PRIV|SRMMU_VALID) |
| 802 | |
| 803 | /* Create a third-level SRMMU 16MB page mapping. */ |
| 804 | static void __init do_large_mapping(unsigned long vaddr, unsigned long phys_base) |
| 805 | { |
| 806 | pgd_t *pgdp = pgd_offset_k(vaddr); |
| 807 | unsigned long big_pte; |
| 808 | |
| 809 | big_pte = KERNEL_PTE(phys_base >> 4); |
| 810 | *(pgd_t *)__nocache_fix(pgdp) = __pgd(big_pte); |
| 811 | } |
| 812 | |
| 813 | /* Map sp_bank entry SP_ENTRY, starting at virtual address VBASE. */ |
| 814 | static unsigned long __init map_spbank(unsigned long vbase, int sp_entry) |
| 815 | { |
| 816 | unsigned long pstart = (sp_banks[sp_entry].base_addr & SRMMU_PGDIR_MASK); |
| 817 | unsigned long vstart = (vbase & SRMMU_PGDIR_MASK); |
| 818 | unsigned long vend = SRMMU_PGDIR_ALIGN(vbase + sp_banks[sp_entry].num_bytes); |
| 819 | /* Map "low" memory only */ |
| 820 | const unsigned long min_vaddr = PAGE_OFFSET; |
| 821 | const unsigned long max_vaddr = PAGE_OFFSET + SRMMU_MAXMEM; |
| 822 | |
| 823 | if (vstart < min_vaddr || vstart >= max_vaddr) |
| 824 | return vstart; |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 825 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 826 | if (vend > max_vaddr || vend < min_vaddr) |
| 827 | vend = max_vaddr; |
| 828 | |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 829 | while (vstart < vend) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 830 | do_large_mapping(vstart, pstart); |
| 831 | vstart += SRMMU_PGDIR_SIZE; pstart += SRMMU_PGDIR_SIZE; |
| 832 | } |
| 833 | return vstart; |
| 834 | } |
| 835 | |
Sam Ravnborg | 3244246 | 2012-07-26 11:02:11 +0000 | [diff] [blame] | 836 | static void __init map_kernel(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 837 | { |
| 838 | int i; |
| 839 | |
| 840 | if (phys_base > 0) { |
| 841 | do_large_mapping(PAGE_OFFSET, phys_base); |
| 842 | } |
| 843 | |
| 844 | for (i = 0; sp_banks[i].num_bytes != 0; i++) { |
| 845 | map_spbank((unsigned long)__va(sp_banks[i].base_addr), i); |
| 846 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 847 | } |
| 848 | |
Al Viro | 409832f | 2008-11-22 17:33:54 +0000 | [diff] [blame] | 849 | void (*poke_srmmu)(void) __cpuinitdata = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 850 | |
| 851 | extern unsigned long bootmem_init(unsigned long *pages_avail); |
| 852 | |
| 853 | void __init srmmu_paging_init(void) |
| 854 | { |
Andres Salomon | 8d12556 | 2010-10-08 14:18:11 -0700 | [diff] [blame] | 855 | int i; |
| 856 | phandle cpunode; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 857 | char node_str[128]; |
| 858 | pgd_t *pgd; |
| 859 | pmd_t *pmd; |
| 860 | pte_t *pte; |
| 861 | unsigned long pages_avail; |
| 862 | |
Sam Ravnborg | b585e85 | 2012-07-26 11:02:24 +0000 | [diff] [blame] | 863 | init_mm.context = (unsigned long) NO_CONTEXT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 864 | sparc_iomap.start = SUN4M_IOBASE_VADDR; /* 16MB of IOSPACE on all sun4m's. */ |
| 865 | |
| 866 | if (sparc_cpu_model == sun4d) |
| 867 | num_contexts = 65536; /* We know it is Viking */ |
| 868 | else { |
| 869 | /* Find the number of contexts on the srmmu. */ |
| 870 | cpunode = prom_getchild(prom_root_node); |
| 871 | num_contexts = 0; |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 872 | while (cpunode != 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 873 | prom_getstring(cpunode, "device_type", node_str, sizeof(node_str)); |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 874 | if (!strcmp(node_str, "cpu")) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 875 | num_contexts = prom_getintdefault(cpunode, "mmu-nctx", 0x8); |
| 876 | break; |
| 877 | } |
| 878 | cpunode = prom_getsibling(cpunode); |
| 879 | } |
| 880 | } |
| 881 | |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 882 | if (!num_contexts) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 883 | prom_printf("Something wrong, can't find cpu node in paging_init.\n"); |
| 884 | prom_halt(); |
| 885 | } |
| 886 | |
| 887 | pages_avail = 0; |
| 888 | last_valid_pfn = bootmem_init(&pages_avail); |
| 889 | |
| 890 | srmmu_nocache_calcsize(); |
| 891 | srmmu_nocache_init(); |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 892 | srmmu_inherit_prom_mappings(0xfe400000, (LINUX_OPPROM_ENDVM - PAGE_SIZE)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 893 | map_kernel(); |
| 894 | |
| 895 | /* ctx table has to be physically aligned to its size */ |
Sam Ravnborg | f71a2aa | 2012-07-26 11:02:14 +0000 | [diff] [blame] | 896 | srmmu_context_table = __srmmu_get_nocache(num_contexts * sizeof(ctxd_t), num_contexts * sizeof(ctxd_t)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 897 | srmmu_ctx_table_phys = (ctxd_t *)__nocache_pa((unsigned long)srmmu_context_table); |
| 898 | |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 899 | for (i = 0; i < num_contexts; i++) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 900 | srmmu_ctxd_set((ctxd_t *)__nocache_fix(&srmmu_context_table[i]), srmmu_swapper_pg_dir); |
| 901 | |
| 902 | flush_cache_all(); |
| 903 | srmmu_set_ctable_ptr((unsigned long)srmmu_ctx_table_phys); |
Bob Breuer | a54123e | 2006-03-23 22:36:19 -0800 | [diff] [blame] | 904 | #ifdef CONFIG_SMP |
| 905 | /* Stop from hanging here... */ |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 906 | local_ops->tlb_all(); |
Bob Breuer | a54123e | 2006-03-23 22:36:19 -0800 | [diff] [blame] | 907 | #else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 908 | flush_tlb_all(); |
Bob Breuer | a54123e | 2006-03-23 22:36:19 -0800 | [diff] [blame] | 909 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 910 | poke_srmmu(); |
| 911 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 912 | srmmu_allocate_ptable_skeleton(sparc_iomap.start, IOBASE_END); |
| 913 | srmmu_allocate_ptable_skeleton(DVMA_VADDR, DVMA_END); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 914 | |
| 915 | srmmu_allocate_ptable_skeleton( |
| 916 | __fix_to_virt(__end_of_fixed_addresses - 1), FIXADDR_TOP); |
| 917 | srmmu_allocate_ptable_skeleton(PKMAP_BASE, PKMAP_END); |
| 918 | |
| 919 | pgd = pgd_offset_k(PKMAP_BASE); |
Sam Ravnborg | 9701b26 | 2012-05-13 10:21:25 +0200 | [diff] [blame] | 920 | pmd = pmd_offset(pgd, PKMAP_BASE); |
| 921 | pte = pte_offset_kernel(pmd, PKMAP_BASE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 922 | pkmap_page_table = pte; |
| 923 | |
| 924 | flush_cache_all(); |
| 925 | flush_tlb_all(); |
| 926 | |
| 927 | sparc_context_init(num_contexts); |
| 928 | |
| 929 | kmap_init(); |
| 930 | |
| 931 | { |
| 932 | unsigned long zones_size[MAX_NR_ZONES]; |
| 933 | unsigned long zholes_size[MAX_NR_ZONES]; |
| 934 | unsigned long npages; |
| 935 | int znum; |
| 936 | |
| 937 | for (znum = 0; znum < MAX_NR_ZONES; znum++) |
| 938 | zones_size[znum] = zholes_size[znum] = 0; |
| 939 | |
| 940 | npages = max_low_pfn - pfn_base; |
| 941 | |
| 942 | zones_size[ZONE_DMA] = npages; |
| 943 | zholes_size[ZONE_DMA] = npages - pages_avail; |
| 944 | |
| 945 | npages = highend_pfn - max_low_pfn; |
| 946 | zones_size[ZONE_HIGHMEM] = npages; |
| 947 | zholes_size[ZONE_HIGHMEM] = npages - calc_highpages(); |
| 948 | |
Johannes Weiner | 9109fb7 | 2008-07-23 21:27:20 -0700 | [diff] [blame] | 949 | free_area_init_node(0, zones_size, pfn_base, zholes_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 950 | } |
| 951 | } |
| 952 | |
Sam Ravnborg | 9701b26 | 2012-05-13 10:21:25 +0200 | [diff] [blame] | 953 | void mmu_info(struct seq_file *m) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 954 | { |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 955 | seq_printf(m, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 956 | "MMU type\t: %s\n" |
| 957 | "contexts\t: %d\n" |
| 958 | "nocache total\t: %ld\n" |
| 959 | "nocache used\t: %d\n", |
| 960 | srmmu_name, |
| 961 | num_contexts, |
| 962 | srmmu_nocache_size, |
| 963 | srmmu_nocache_map.used << SRMMU_NOCACHE_BITMAP_SHIFT); |
| 964 | } |
| 965 | |
Sam Ravnborg | b585e85 | 2012-07-26 11:02:24 +0000 | [diff] [blame] | 966 | int init_new_context(struct task_struct *tsk, struct mm_struct *mm) |
| 967 | { |
| 968 | mm->context = NO_CONTEXT; |
| 969 | return 0; |
| 970 | } |
| 971 | |
Sam Ravnborg | b796c6d | 2012-05-13 10:30:54 +0200 | [diff] [blame] | 972 | void destroy_context(struct mm_struct *mm) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 973 | { |
| 974 | |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 975 | if (mm->context != NO_CONTEXT) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 976 | flush_cache_mm(mm); |
| 977 | srmmu_ctxd_set(&srmmu_context_table[mm->context], srmmu_swapper_pg_dir); |
| 978 | flush_tlb_mm(mm); |
| 979 | spin_lock(&srmmu_context_spinlock); |
| 980 | free_context(mm->context); |
| 981 | spin_unlock(&srmmu_context_spinlock); |
| 982 | mm->context = NO_CONTEXT; |
| 983 | } |
| 984 | } |
| 985 | |
| 986 | /* Init various srmmu chip types. */ |
| 987 | static void __init srmmu_is_bad(void) |
| 988 | { |
| 989 | prom_printf("Could not determine SRMMU chip type.\n"); |
| 990 | prom_halt(); |
| 991 | } |
| 992 | |
| 993 | static void __init init_vac_layout(void) |
| 994 | { |
Andres Salomon | 8d12556 | 2010-10-08 14:18:11 -0700 | [diff] [blame] | 995 | phandle nd; |
| 996 | int cache_lines; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 997 | char node_str[128]; |
| 998 | #ifdef CONFIG_SMP |
| 999 | int cpu = 0; |
| 1000 | unsigned long max_size = 0; |
| 1001 | unsigned long min_line_size = 0x10000000; |
| 1002 | #endif |
| 1003 | |
| 1004 | nd = prom_getchild(prom_root_node); |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1005 | while ((nd = prom_getsibling(nd)) != 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1006 | prom_getstring(nd, "device_type", node_str, sizeof(node_str)); |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1007 | if (!strcmp(node_str, "cpu")) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1008 | vac_line_size = prom_getint(nd, "cache-line-size"); |
| 1009 | if (vac_line_size == -1) { |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1010 | prom_printf("can't determine cache-line-size, halting.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1011 | prom_halt(); |
| 1012 | } |
| 1013 | cache_lines = prom_getint(nd, "cache-nlines"); |
| 1014 | if (cache_lines == -1) { |
| 1015 | prom_printf("can't determine cache-nlines, halting.\n"); |
| 1016 | prom_halt(); |
| 1017 | } |
| 1018 | |
| 1019 | vac_cache_size = cache_lines * vac_line_size; |
| 1020 | #ifdef CONFIG_SMP |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1021 | if (vac_cache_size > max_size) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1022 | max_size = vac_cache_size; |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1023 | if (vac_line_size < min_line_size) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1024 | min_line_size = vac_line_size; |
Bob Breuer | a54123e | 2006-03-23 22:36:19 -0800 | [diff] [blame] | 1025 | //FIXME: cpus not contiguous!! |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1026 | cpu++; |
Rusty Russell | ec7c14b | 2009-03-16 14:40:24 +1030 | [diff] [blame] | 1027 | if (cpu >= nr_cpu_ids || !cpu_online(cpu)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1028 | break; |
| 1029 | #else |
| 1030 | break; |
| 1031 | #endif |
| 1032 | } |
| 1033 | } |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1034 | if (nd == 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1035 | prom_printf("No CPU nodes found, halting.\n"); |
| 1036 | prom_halt(); |
| 1037 | } |
| 1038 | #ifdef CONFIG_SMP |
| 1039 | vac_cache_size = max_size; |
| 1040 | vac_line_size = min_line_size; |
| 1041 | #endif |
| 1042 | printk("SRMMU: Using VAC size of %d bytes, line size %d bytes.\n", |
| 1043 | (int)vac_cache_size, (int)vac_line_size); |
| 1044 | } |
| 1045 | |
Al Viro | 409832f | 2008-11-22 17:33:54 +0000 | [diff] [blame] | 1046 | static void __cpuinit poke_hypersparc(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1047 | { |
| 1048 | volatile unsigned long clear; |
| 1049 | unsigned long mreg = srmmu_get_mmureg(); |
| 1050 | |
| 1051 | hyper_flush_unconditional_combined(); |
| 1052 | |
| 1053 | mreg &= ~(HYPERSPARC_CWENABLE); |
| 1054 | mreg |= (HYPERSPARC_CENABLE | HYPERSPARC_WBENABLE); |
| 1055 | mreg |= (HYPERSPARC_CMODE); |
| 1056 | |
| 1057 | srmmu_set_mmureg(mreg); |
| 1058 | |
| 1059 | #if 0 /* XXX I think this is bad news... -DaveM */ |
| 1060 | hyper_clear_all_tags(); |
| 1061 | #endif |
| 1062 | |
| 1063 | put_ross_icr(HYPERSPARC_ICCR_FTD | HYPERSPARC_ICCR_ICE); |
| 1064 | hyper_flush_whole_icache(); |
| 1065 | clear = srmmu_get_faddr(); |
| 1066 | clear = srmmu_get_fstatus(); |
| 1067 | } |
| 1068 | |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1069 | static const struct sparc32_cachetlb_ops hypersparc_ops = { |
| 1070 | .cache_all = hypersparc_flush_cache_all, |
| 1071 | .cache_mm = hypersparc_flush_cache_mm, |
| 1072 | .cache_page = hypersparc_flush_cache_page, |
| 1073 | .cache_range = hypersparc_flush_cache_range, |
| 1074 | .tlb_all = hypersparc_flush_tlb_all, |
| 1075 | .tlb_mm = hypersparc_flush_tlb_mm, |
| 1076 | .tlb_page = hypersparc_flush_tlb_page, |
| 1077 | .tlb_range = hypersparc_flush_tlb_range, |
| 1078 | .page_to_ram = hypersparc_flush_page_to_ram, |
| 1079 | .sig_insns = hypersparc_flush_sig_insns, |
| 1080 | .page_for_dma = hypersparc_flush_page_for_dma, |
| 1081 | }; |
| 1082 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1083 | static void __init init_hypersparc(void) |
| 1084 | { |
| 1085 | srmmu_name = "ROSS HyperSparc"; |
| 1086 | srmmu_modtype = HyperSparc; |
| 1087 | |
| 1088 | init_vac_layout(); |
| 1089 | |
| 1090 | is_hypersparc = 1; |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1091 | sparc32_cachetlb_ops = &hypersparc_ops; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1092 | |
| 1093 | poke_srmmu = poke_hypersparc; |
| 1094 | |
| 1095 | hypersparc_setup_blockops(); |
| 1096 | } |
| 1097 | |
Al Viro | 409832f | 2008-11-22 17:33:54 +0000 | [diff] [blame] | 1098 | static void __cpuinit poke_swift(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1099 | { |
| 1100 | unsigned long mreg; |
| 1101 | |
| 1102 | /* Clear any crap from the cache or else... */ |
| 1103 | swift_flush_cache_all(); |
| 1104 | |
| 1105 | /* Enable I & D caches */ |
| 1106 | mreg = srmmu_get_mmureg(); |
| 1107 | mreg |= (SWIFT_IE | SWIFT_DE); |
| 1108 | /* |
| 1109 | * The Swift branch folding logic is completely broken. At |
| 1110 | * trap time, if things are just right, if can mistakenly |
| 1111 | * think that a trap is coming from kernel mode when in fact |
| 1112 | * it is coming from user mode (it mis-executes the branch in |
| 1113 | * the trap code). So you see things like crashme completely |
| 1114 | * hosing your machine which is completely unacceptable. Turn |
| 1115 | * this shit off... nice job Fujitsu. |
| 1116 | */ |
| 1117 | mreg &= ~(SWIFT_BF); |
| 1118 | srmmu_set_mmureg(mreg); |
| 1119 | } |
| 1120 | |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1121 | static const struct sparc32_cachetlb_ops swift_ops = { |
| 1122 | .cache_all = swift_flush_cache_all, |
| 1123 | .cache_mm = swift_flush_cache_mm, |
| 1124 | .cache_page = swift_flush_cache_page, |
| 1125 | .cache_range = swift_flush_cache_range, |
| 1126 | .tlb_all = swift_flush_tlb_all, |
| 1127 | .tlb_mm = swift_flush_tlb_mm, |
| 1128 | .tlb_page = swift_flush_tlb_page, |
| 1129 | .tlb_range = swift_flush_tlb_range, |
| 1130 | .page_to_ram = swift_flush_page_to_ram, |
| 1131 | .sig_insns = swift_flush_sig_insns, |
| 1132 | .page_for_dma = swift_flush_page_for_dma, |
| 1133 | }; |
| 1134 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1135 | #define SWIFT_MASKID_ADDR 0x10003018 |
| 1136 | static void __init init_swift(void) |
| 1137 | { |
| 1138 | unsigned long swift_rev; |
| 1139 | |
| 1140 | __asm__ __volatile__("lda [%1] %2, %0\n\t" |
| 1141 | "srl %0, 0x18, %0\n\t" : |
| 1142 | "=r" (swift_rev) : |
| 1143 | "r" (SWIFT_MASKID_ADDR), "i" (ASI_M_BYPASS)); |
| 1144 | srmmu_name = "Fujitsu Swift"; |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1145 | switch (swift_rev) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1146 | case 0x11: |
| 1147 | case 0x20: |
| 1148 | case 0x23: |
| 1149 | case 0x30: |
| 1150 | srmmu_modtype = Swift_lots_o_bugs; |
| 1151 | hwbug_bitmask |= (HWBUG_KERN_ACCBROKEN | HWBUG_KERN_CBITBROKEN); |
| 1152 | /* |
| 1153 | * Gee george, I wonder why Sun is so hush hush about |
| 1154 | * this hardware bug... really braindamage stuff going |
| 1155 | * on here. However I think we can find a way to avoid |
| 1156 | * all of the workaround overhead under Linux. Basically, |
| 1157 | * any page fault can cause kernel pages to become user |
| 1158 | * accessible (the mmu gets confused and clears some of |
| 1159 | * the ACC bits in kernel ptes). Aha, sounds pretty |
| 1160 | * horrible eh? But wait, after extensive testing it appears |
| 1161 | * that if you use pgd_t level large kernel pte's (like the |
| 1162 | * 4MB pages on the Pentium) the bug does not get tripped |
| 1163 | * at all. This avoids almost all of the major overhead. |
| 1164 | * Welcome to a world where your vendor tells you to, |
| 1165 | * "apply this kernel patch" instead of "sorry for the |
| 1166 | * broken hardware, send it back and we'll give you |
| 1167 | * properly functioning parts" |
| 1168 | */ |
| 1169 | break; |
| 1170 | case 0x25: |
| 1171 | case 0x31: |
| 1172 | srmmu_modtype = Swift_bad_c; |
| 1173 | hwbug_bitmask |= HWBUG_KERN_CBITBROKEN; |
| 1174 | /* |
| 1175 | * You see Sun allude to this hardware bug but never |
| 1176 | * admit things directly, they'll say things like, |
| 1177 | * "the Swift chip cache problems" or similar. |
| 1178 | */ |
| 1179 | break; |
| 1180 | default: |
| 1181 | srmmu_modtype = Swift_ok; |
| 1182 | break; |
Joe Perches | 6cb79b3 | 2011-06-03 14:45:23 +0000 | [diff] [blame] | 1183 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1184 | |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1185 | sparc32_cachetlb_ops = &swift_ops; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1186 | flush_page_for_dma_global = 0; |
| 1187 | |
| 1188 | /* |
| 1189 | * Are you now convinced that the Swift is one of the |
| 1190 | * biggest VLSI abortions of all time? Bravo Fujitsu! |
| 1191 | * Fujitsu, the !#?!%$'d up processor people. I bet if |
| 1192 | * you examined the microcode of the Swift you'd find |
| 1193 | * XXX's all over the place. |
| 1194 | */ |
| 1195 | poke_srmmu = poke_swift; |
| 1196 | } |
| 1197 | |
| 1198 | static void turbosparc_flush_cache_all(void) |
| 1199 | { |
| 1200 | flush_user_windows(); |
| 1201 | turbosparc_idflash_clear(); |
| 1202 | } |
| 1203 | |
| 1204 | static void turbosparc_flush_cache_mm(struct mm_struct *mm) |
| 1205 | { |
| 1206 | FLUSH_BEGIN(mm) |
| 1207 | flush_user_windows(); |
| 1208 | turbosparc_idflash_clear(); |
| 1209 | FLUSH_END |
| 1210 | } |
| 1211 | |
| 1212 | static void turbosparc_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) |
| 1213 | { |
| 1214 | FLUSH_BEGIN(vma->vm_mm) |
| 1215 | flush_user_windows(); |
| 1216 | turbosparc_idflash_clear(); |
| 1217 | FLUSH_END |
| 1218 | } |
| 1219 | |
| 1220 | static void turbosparc_flush_cache_page(struct vm_area_struct *vma, unsigned long page) |
| 1221 | { |
| 1222 | FLUSH_BEGIN(vma->vm_mm) |
| 1223 | flush_user_windows(); |
| 1224 | if (vma->vm_flags & VM_EXEC) |
| 1225 | turbosparc_flush_icache(); |
| 1226 | turbosparc_flush_dcache(); |
| 1227 | FLUSH_END |
| 1228 | } |
| 1229 | |
| 1230 | /* TurboSparc is copy-back, if we turn it on, but this does not work. */ |
| 1231 | static void turbosparc_flush_page_to_ram(unsigned long page) |
| 1232 | { |
| 1233 | #ifdef TURBOSPARC_WRITEBACK |
| 1234 | volatile unsigned long clear; |
| 1235 | |
Sam Ravnborg | 805918f | 2012-05-25 21:20:19 +0000 | [diff] [blame] | 1236 | if (srmmu_probe(page)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1237 | turbosparc_flush_page_cache(page); |
| 1238 | clear = srmmu_get_fstatus(); |
| 1239 | #endif |
| 1240 | } |
| 1241 | |
| 1242 | static void turbosparc_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr) |
| 1243 | { |
| 1244 | } |
| 1245 | |
| 1246 | static void turbosparc_flush_page_for_dma(unsigned long page) |
| 1247 | { |
| 1248 | turbosparc_flush_dcache(); |
| 1249 | } |
| 1250 | |
| 1251 | static void turbosparc_flush_tlb_all(void) |
| 1252 | { |
| 1253 | srmmu_flush_whole_tlb(); |
| 1254 | } |
| 1255 | |
| 1256 | static void turbosparc_flush_tlb_mm(struct mm_struct *mm) |
| 1257 | { |
| 1258 | FLUSH_BEGIN(mm) |
| 1259 | srmmu_flush_whole_tlb(); |
| 1260 | FLUSH_END |
| 1261 | } |
| 1262 | |
| 1263 | static void turbosparc_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) |
| 1264 | { |
| 1265 | FLUSH_BEGIN(vma->vm_mm) |
| 1266 | srmmu_flush_whole_tlb(); |
| 1267 | FLUSH_END |
| 1268 | } |
| 1269 | |
| 1270 | static void turbosparc_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) |
| 1271 | { |
| 1272 | FLUSH_BEGIN(vma->vm_mm) |
| 1273 | srmmu_flush_whole_tlb(); |
| 1274 | FLUSH_END |
| 1275 | } |
| 1276 | |
| 1277 | |
Al Viro | 409832f | 2008-11-22 17:33:54 +0000 | [diff] [blame] | 1278 | static void __cpuinit poke_turbosparc(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1279 | { |
| 1280 | unsigned long mreg = srmmu_get_mmureg(); |
| 1281 | unsigned long ccreg; |
| 1282 | |
| 1283 | /* Clear any crap from the cache or else... */ |
| 1284 | turbosparc_flush_cache_all(); |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1285 | /* Temporarily disable I & D caches */ |
| 1286 | mreg &= ~(TURBOSPARC_ICENABLE | TURBOSPARC_DCENABLE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1287 | mreg &= ~(TURBOSPARC_PCENABLE); /* Don't check parity */ |
| 1288 | srmmu_set_mmureg(mreg); |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1289 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1290 | ccreg = turbosparc_get_ccreg(); |
| 1291 | |
| 1292 | #ifdef TURBOSPARC_WRITEBACK |
| 1293 | ccreg |= (TURBOSPARC_SNENABLE); /* Do DVMA snooping in Dcache */ |
| 1294 | ccreg &= ~(TURBOSPARC_uS2 | TURBOSPARC_WTENABLE); |
| 1295 | /* Write-back D-cache, emulate VLSI |
| 1296 | * abortion number three, not number one */ |
| 1297 | #else |
| 1298 | /* For now let's play safe, optimize later */ |
| 1299 | ccreg |= (TURBOSPARC_SNENABLE | TURBOSPARC_WTENABLE); |
| 1300 | /* Do DVMA snooping in Dcache, Write-thru D-cache */ |
| 1301 | ccreg &= ~(TURBOSPARC_uS2); |
| 1302 | /* Emulate VLSI abortion number three, not number one */ |
| 1303 | #endif |
| 1304 | |
| 1305 | switch (ccreg & 7) { |
| 1306 | case 0: /* No SE cache */ |
| 1307 | case 7: /* Test mode */ |
| 1308 | break; |
| 1309 | default: |
| 1310 | ccreg |= (TURBOSPARC_SCENABLE); |
| 1311 | } |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1312 | turbosparc_set_ccreg(ccreg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1313 | |
| 1314 | mreg |= (TURBOSPARC_ICENABLE | TURBOSPARC_DCENABLE); /* I & D caches on */ |
| 1315 | mreg |= (TURBOSPARC_ICSNOOP); /* Icache snooping on */ |
| 1316 | srmmu_set_mmureg(mreg); |
| 1317 | } |
| 1318 | |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1319 | static const struct sparc32_cachetlb_ops turbosparc_ops = { |
| 1320 | .cache_all = turbosparc_flush_cache_all, |
| 1321 | .cache_mm = turbosparc_flush_cache_mm, |
| 1322 | .cache_page = turbosparc_flush_cache_page, |
| 1323 | .cache_range = turbosparc_flush_cache_range, |
| 1324 | .tlb_all = turbosparc_flush_tlb_all, |
| 1325 | .tlb_mm = turbosparc_flush_tlb_mm, |
| 1326 | .tlb_page = turbosparc_flush_tlb_page, |
| 1327 | .tlb_range = turbosparc_flush_tlb_range, |
| 1328 | .page_to_ram = turbosparc_flush_page_to_ram, |
| 1329 | .sig_insns = turbosparc_flush_sig_insns, |
| 1330 | .page_for_dma = turbosparc_flush_page_for_dma, |
| 1331 | }; |
| 1332 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1333 | static void __init init_turbosparc(void) |
| 1334 | { |
| 1335 | srmmu_name = "Fujitsu TurboSparc"; |
| 1336 | srmmu_modtype = TurboSparc; |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1337 | sparc32_cachetlb_ops = &turbosparc_ops; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1338 | poke_srmmu = poke_turbosparc; |
| 1339 | } |
| 1340 | |
Al Viro | 409832f | 2008-11-22 17:33:54 +0000 | [diff] [blame] | 1341 | static void __cpuinit poke_tsunami(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1342 | { |
| 1343 | unsigned long mreg = srmmu_get_mmureg(); |
| 1344 | |
| 1345 | tsunami_flush_icache(); |
| 1346 | tsunami_flush_dcache(); |
| 1347 | mreg &= ~TSUNAMI_ITD; |
| 1348 | mreg |= (TSUNAMI_IENAB | TSUNAMI_DENAB); |
| 1349 | srmmu_set_mmureg(mreg); |
| 1350 | } |
| 1351 | |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1352 | static const struct sparc32_cachetlb_ops tsunami_ops = { |
| 1353 | .cache_all = tsunami_flush_cache_all, |
| 1354 | .cache_mm = tsunami_flush_cache_mm, |
| 1355 | .cache_page = tsunami_flush_cache_page, |
| 1356 | .cache_range = tsunami_flush_cache_range, |
| 1357 | .tlb_all = tsunami_flush_tlb_all, |
| 1358 | .tlb_mm = tsunami_flush_tlb_mm, |
| 1359 | .tlb_page = tsunami_flush_tlb_page, |
| 1360 | .tlb_range = tsunami_flush_tlb_range, |
| 1361 | .page_to_ram = tsunami_flush_page_to_ram, |
| 1362 | .sig_insns = tsunami_flush_sig_insns, |
| 1363 | .page_for_dma = tsunami_flush_page_for_dma, |
| 1364 | }; |
| 1365 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1366 | static void __init init_tsunami(void) |
| 1367 | { |
| 1368 | /* |
| 1369 | * Tsunami's pretty sane, Sun and TI actually got it |
| 1370 | * somewhat right this time. Fujitsu should have |
| 1371 | * taken some lessons from them. |
| 1372 | */ |
| 1373 | |
| 1374 | srmmu_name = "TI Tsunami"; |
| 1375 | srmmu_modtype = Tsunami; |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1376 | sparc32_cachetlb_ops = &tsunami_ops; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1377 | poke_srmmu = poke_tsunami; |
| 1378 | |
| 1379 | tsunami_setup_blockops(); |
| 1380 | } |
| 1381 | |
Al Viro | 409832f | 2008-11-22 17:33:54 +0000 | [diff] [blame] | 1382 | static void __cpuinit poke_viking(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1383 | { |
| 1384 | unsigned long mreg = srmmu_get_mmureg(); |
| 1385 | static int smp_catch; |
| 1386 | |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1387 | if (viking_mxcc_present) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1388 | unsigned long mxcc_control = mxcc_get_creg(); |
| 1389 | |
| 1390 | mxcc_control |= (MXCC_CTL_ECE | MXCC_CTL_PRE | MXCC_CTL_MCE); |
| 1391 | mxcc_control &= ~(MXCC_CTL_RRC); |
| 1392 | mxcc_set_creg(mxcc_control); |
| 1393 | |
| 1394 | /* |
| 1395 | * We don't need memory parity checks. |
| 1396 | * XXX This is a mess, have to dig out later. ecd. |
| 1397 | viking_mxcc_turn_off_parity(&mreg, &mxcc_control); |
| 1398 | */ |
| 1399 | |
| 1400 | /* We do cache ptables on MXCC. */ |
| 1401 | mreg |= VIKING_TCENABLE; |
| 1402 | } else { |
| 1403 | unsigned long bpreg; |
| 1404 | |
| 1405 | mreg &= ~(VIKING_TCENABLE); |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1406 | if (smp_catch++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1407 | /* Must disable mixed-cmd mode here for other cpu's. */ |
| 1408 | bpreg = viking_get_bpreg(); |
| 1409 | bpreg &= ~(VIKING_ACTION_MIX); |
| 1410 | viking_set_bpreg(bpreg); |
| 1411 | |
| 1412 | /* Just in case PROM does something funny. */ |
| 1413 | msi_set_sync(); |
| 1414 | } |
| 1415 | } |
| 1416 | |
| 1417 | mreg |= VIKING_SPENABLE; |
| 1418 | mreg |= (VIKING_ICENABLE | VIKING_DCENABLE); |
| 1419 | mreg |= VIKING_SBENABLE; |
| 1420 | mreg &= ~(VIKING_ACENABLE); |
| 1421 | srmmu_set_mmureg(mreg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1422 | } |
| 1423 | |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1424 | static struct sparc32_cachetlb_ops viking_ops = { |
| 1425 | .cache_all = viking_flush_cache_all, |
| 1426 | .cache_mm = viking_flush_cache_mm, |
| 1427 | .cache_page = viking_flush_cache_page, |
| 1428 | .cache_range = viking_flush_cache_range, |
| 1429 | .tlb_all = viking_flush_tlb_all, |
| 1430 | .tlb_mm = viking_flush_tlb_mm, |
| 1431 | .tlb_page = viking_flush_tlb_page, |
| 1432 | .tlb_range = viking_flush_tlb_range, |
| 1433 | .page_to_ram = viking_flush_page_to_ram, |
| 1434 | .sig_insns = viking_flush_sig_insns, |
| 1435 | .page_for_dma = viking_flush_page_for_dma, |
| 1436 | }; |
| 1437 | |
| 1438 | #ifdef CONFIG_SMP |
| 1439 | /* On sun4d the cpu broadcasts local TLB flushes, so we can just |
| 1440 | * perform the local TLB flush and all the other cpus will see it. |
| 1441 | * But, unfortunately, there is a bug in the sun4d XBUS backplane |
| 1442 | * that requires that we add some synchronization to these flushes. |
| 1443 | * |
| 1444 | * The bug is that the fifo which keeps track of all the pending TLB |
| 1445 | * broadcasts in the system is an entry or two too small, so if we |
| 1446 | * have too many going at once we'll overflow that fifo and lose a TLB |
| 1447 | * flush resulting in corruption. |
| 1448 | * |
| 1449 | * Our workaround is to take a global spinlock around the TLB flushes, |
| 1450 | * which guarentees we won't ever have too many pending. It's a big |
| 1451 | * hammer, but a semaphore like system to make sure we only have N TLB |
| 1452 | * flushes going at once will require SMP locking anyways so there's |
| 1453 | * no real value in trying any harder than this. |
| 1454 | */ |
| 1455 | static struct sparc32_cachetlb_ops viking_sun4d_smp_ops = { |
| 1456 | .cache_all = viking_flush_cache_all, |
| 1457 | .cache_mm = viking_flush_cache_mm, |
| 1458 | .cache_page = viking_flush_cache_page, |
| 1459 | .cache_range = viking_flush_cache_range, |
| 1460 | .tlb_all = sun4dsmp_flush_tlb_all, |
| 1461 | .tlb_mm = sun4dsmp_flush_tlb_mm, |
| 1462 | .tlb_page = sun4dsmp_flush_tlb_page, |
| 1463 | .tlb_range = sun4dsmp_flush_tlb_range, |
| 1464 | .page_to_ram = viking_flush_page_to_ram, |
| 1465 | .sig_insns = viking_flush_sig_insns, |
| 1466 | .page_for_dma = viking_flush_page_for_dma, |
| 1467 | }; |
| 1468 | #endif |
| 1469 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1470 | static void __init init_viking(void) |
| 1471 | { |
| 1472 | unsigned long mreg = srmmu_get_mmureg(); |
| 1473 | |
| 1474 | /* Ahhh, the viking. SRMMU VLSI abortion number two... */ |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1475 | if (mreg & VIKING_MMODE) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1476 | srmmu_name = "TI Viking"; |
| 1477 | viking_mxcc_present = 0; |
| 1478 | msi_set_sync(); |
| 1479 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1480 | /* |
| 1481 | * We need this to make sure old viking takes no hits |
| 1482 | * on it's cache for dma snoops to workaround the |
| 1483 | * "load from non-cacheable memory" interrupt bug. |
| 1484 | * This is only necessary because of the new way in |
| 1485 | * which we use the IOMMU. |
| 1486 | */ |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1487 | viking_ops.page_for_dma = viking_flush_page; |
| 1488 | #ifdef CONFIG_SMP |
| 1489 | viking_sun4d_smp_ops.page_for_dma = viking_flush_page; |
| 1490 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1491 | flush_page_for_dma_global = 0; |
| 1492 | } else { |
| 1493 | srmmu_name = "TI Viking/MXCC"; |
| 1494 | viking_mxcc_present = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1495 | srmmu_cache_pagetables = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1496 | } |
| 1497 | |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1498 | sparc32_cachetlb_ops = (const struct sparc32_cachetlb_ops *) |
| 1499 | &viking_ops; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1500 | #ifdef CONFIG_SMP |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1501 | if (sparc_cpu_model == sun4d) |
| 1502 | sparc32_cachetlb_ops = (const struct sparc32_cachetlb_ops *) |
| 1503 | &viking_sun4d_smp_ops; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1504 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1505 | |
| 1506 | poke_srmmu = poke_viking; |
| 1507 | } |
| 1508 | |
| 1509 | /* Probe for the srmmu chip version. */ |
| 1510 | static void __init get_srmmu_type(void) |
| 1511 | { |
| 1512 | unsigned long mreg, psr; |
| 1513 | unsigned long mod_typ, mod_rev, psr_typ, psr_vers; |
| 1514 | |
| 1515 | srmmu_modtype = SRMMU_INVAL_MOD; |
| 1516 | hwbug_bitmask = 0; |
| 1517 | |
| 1518 | mreg = srmmu_get_mmureg(); psr = get_psr(); |
| 1519 | mod_typ = (mreg & 0xf0000000) >> 28; |
| 1520 | mod_rev = (mreg & 0x0f000000) >> 24; |
| 1521 | psr_typ = (psr >> 28) & 0xf; |
| 1522 | psr_vers = (psr >> 24) & 0xf; |
| 1523 | |
Konrad Eisele | 75d9e34 | 2009-08-17 00:13:33 +0000 | [diff] [blame] | 1524 | /* First, check for sparc-leon. */ |
| 1525 | if (sparc_cpu_model == sparc_leon) { |
Konrad Eisele | 75d9e34 | 2009-08-17 00:13:33 +0000 | [diff] [blame] | 1526 | init_leon(); |
| 1527 | return; |
| 1528 | } |
| 1529 | |
| 1530 | /* Second, check for HyperSparc or Cypress. */ |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1531 | if (mod_typ == 1) { |
| 1532 | switch (mod_rev) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1533 | case 7: |
| 1534 | /* UP or MP Hypersparc */ |
| 1535 | init_hypersparc(); |
| 1536 | break; |
| 1537 | case 0: |
| 1538 | case 2: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1539 | case 10: |
| 1540 | case 11: |
| 1541 | case 12: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1542 | case 13: |
| 1543 | case 14: |
| 1544 | case 15: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1545 | default: |
David S. Miller | c7020eb | 2012-05-14 22:02:08 -0700 | [diff] [blame] | 1546 | prom_printf("Sparc-Linux Cypress support does not longer exit.\n"); |
| 1547 | prom_halt(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1548 | break; |
Joe Perches | 6cb79b3 | 2011-06-03 14:45:23 +0000 | [diff] [blame] | 1549 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1550 | return; |
| 1551 | } |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1552 | |
| 1553 | /* Now Fujitsu TurboSparc. It might happen that it is |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1554 | * in Swift emulation mode, so we will check later... |
| 1555 | */ |
| 1556 | if (psr_typ == 0 && psr_vers == 5) { |
| 1557 | init_turbosparc(); |
| 1558 | return; |
| 1559 | } |
| 1560 | |
| 1561 | /* Next check for Fujitsu Swift. */ |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1562 | if (psr_typ == 0 && psr_vers == 4) { |
Andres Salomon | 8d12556 | 2010-10-08 14:18:11 -0700 | [diff] [blame] | 1563 | phandle cpunode; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1564 | char node_str[128]; |
| 1565 | |
| 1566 | /* Look if it is not a TurboSparc emulating Swift... */ |
| 1567 | cpunode = prom_getchild(prom_root_node); |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1568 | while ((cpunode = prom_getsibling(cpunode)) != 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1569 | prom_getstring(cpunode, "device_type", node_str, sizeof(node_str)); |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1570 | if (!strcmp(node_str, "cpu")) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1571 | if (!prom_getintdefault(cpunode, "psr-implementation", 1) && |
| 1572 | prom_getintdefault(cpunode, "psr-version", 1) == 5) { |
| 1573 | init_turbosparc(); |
| 1574 | return; |
| 1575 | } |
| 1576 | break; |
| 1577 | } |
| 1578 | } |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1579 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1580 | init_swift(); |
| 1581 | return; |
| 1582 | } |
| 1583 | |
| 1584 | /* Now the Viking family of srmmu. */ |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1585 | if (psr_typ == 4 && |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1586 | ((psr_vers == 0) || |
| 1587 | ((psr_vers == 1) && (mod_typ == 0) && (mod_rev == 0)))) { |
| 1588 | init_viking(); |
| 1589 | return; |
| 1590 | } |
| 1591 | |
| 1592 | /* Finally the Tsunami. */ |
Sam Ravnborg | 605ae96 | 2012-07-26 11:02:13 +0000 | [diff] [blame] | 1593 | if (psr_typ == 4 && psr_vers == 1 && (mod_typ || mod_rev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1594 | init_tsunami(); |
| 1595 | return; |
| 1596 | } |
| 1597 | |
| 1598 | /* Oh well */ |
| 1599 | srmmu_is_bad(); |
| 1600 | } |
| 1601 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1602 | #ifdef CONFIG_SMP |
| 1603 | /* Local cross-calls. */ |
| 1604 | static void smp_flush_page_for_dma(unsigned long page) |
| 1605 | { |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1606 | xc1((smpfunc_t) local_ops->page_for_dma, page); |
| 1607 | local_ops->page_for_dma(page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1608 | } |
| 1609 | |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1610 | static void smp_flush_cache_all(void) |
| 1611 | { |
| 1612 | xc0((smpfunc_t) local_ops->cache_all); |
| 1613 | local_ops->cache_all(); |
| 1614 | } |
| 1615 | |
| 1616 | static void smp_flush_tlb_all(void) |
| 1617 | { |
| 1618 | xc0((smpfunc_t) local_ops->tlb_all); |
| 1619 | local_ops->tlb_all(); |
| 1620 | } |
| 1621 | |
| 1622 | static void smp_flush_cache_mm(struct mm_struct *mm) |
| 1623 | { |
| 1624 | if (mm->context != NO_CONTEXT) { |
| 1625 | cpumask_t cpu_mask; |
| 1626 | cpumask_copy(&cpu_mask, mm_cpumask(mm)); |
| 1627 | cpumask_clear_cpu(smp_processor_id(), &cpu_mask); |
| 1628 | if (!cpumask_empty(&cpu_mask)) |
| 1629 | xc1((smpfunc_t) local_ops->cache_mm, (unsigned long) mm); |
| 1630 | local_ops->cache_mm(mm); |
| 1631 | } |
| 1632 | } |
| 1633 | |
| 1634 | static void smp_flush_tlb_mm(struct mm_struct *mm) |
| 1635 | { |
| 1636 | if (mm->context != NO_CONTEXT) { |
| 1637 | cpumask_t cpu_mask; |
| 1638 | cpumask_copy(&cpu_mask, mm_cpumask(mm)); |
| 1639 | cpumask_clear_cpu(smp_processor_id(), &cpu_mask); |
| 1640 | if (!cpumask_empty(&cpu_mask)) { |
| 1641 | xc1((smpfunc_t) local_ops->tlb_mm, (unsigned long) mm); |
| 1642 | if (atomic_read(&mm->mm_users) == 1 && current->active_mm == mm) |
| 1643 | cpumask_copy(mm_cpumask(mm), |
| 1644 | cpumask_of(smp_processor_id())); |
| 1645 | } |
| 1646 | local_ops->tlb_mm(mm); |
| 1647 | } |
| 1648 | } |
| 1649 | |
| 1650 | static void smp_flush_cache_range(struct vm_area_struct *vma, |
| 1651 | unsigned long start, |
| 1652 | unsigned long end) |
| 1653 | { |
| 1654 | struct mm_struct *mm = vma->vm_mm; |
| 1655 | |
| 1656 | if (mm->context != NO_CONTEXT) { |
| 1657 | cpumask_t cpu_mask; |
| 1658 | cpumask_copy(&cpu_mask, mm_cpumask(mm)); |
| 1659 | cpumask_clear_cpu(smp_processor_id(), &cpu_mask); |
| 1660 | if (!cpumask_empty(&cpu_mask)) |
| 1661 | xc3((smpfunc_t) local_ops->cache_range, |
| 1662 | (unsigned long) vma, start, end); |
| 1663 | local_ops->cache_range(vma, start, end); |
| 1664 | } |
| 1665 | } |
| 1666 | |
| 1667 | static void smp_flush_tlb_range(struct vm_area_struct *vma, |
| 1668 | unsigned long start, |
| 1669 | unsigned long end) |
| 1670 | { |
| 1671 | struct mm_struct *mm = vma->vm_mm; |
| 1672 | |
| 1673 | if (mm->context != NO_CONTEXT) { |
| 1674 | cpumask_t cpu_mask; |
| 1675 | cpumask_copy(&cpu_mask, mm_cpumask(mm)); |
| 1676 | cpumask_clear_cpu(smp_processor_id(), &cpu_mask); |
| 1677 | if (!cpumask_empty(&cpu_mask)) |
| 1678 | xc3((smpfunc_t) local_ops->tlb_range, |
| 1679 | (unsigned long) vma, start, end); |
| 1680 | local_ops->tlb_range(vma, start, end); |
| 1681 | } |
| 1682 | } |
| 1683 | |
| 1684 | static void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page) |
| 1685 | { |
| 1686 | struct mm_struct *mm = vma->vm_mm; |
| 1687 | |
| 1688 | if (mm->context != NO_CONTEXT) { |
| 1689 | cpumask_t cpu_mask; |
| 1690 | cpumask_copy(&cpu_mask, mm_cpumask(mm)); |
| 1691 | cpumask_clear_cpu(smp_processor_id(), &cpu_mask); |
| 1692 | if (!cpumask_empty(&cpu_mask)) |
| 1693 | xc2((smpfunc_t) local_ops->cache_page, |
| 1694 | (unsigned long) vma, page); |
| 1695 | local_ops->cache_page(vma, page); |
| 1696 | } |
| 1697 | } |
| 1698 | |
| 1699 | static void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) |
| 1700 | { |
| 1701 | struct mm_struct *mm = vma->vm_mm; |
| 1702 | |
| 1703 | if (mm->context != NO_CONTEXT) { |
| 1704 | cpumask_t cpu_mask; |
| 1705 | cpumask_copy(&cpu_mask, mm_cpumask(mm)); |
| 1706 | cpumask_clear_cpu(smp_processor_id(), &cpu_mask); |
| 1707 | if (!cpumask_empty(&cpu_mask)) |
| 1708 | xc2((smpfunc_t) local_ops->tlb_page, |
| 1709 | (unsigned long) vma, page); |
| 1710 | local_ops->tlb_page(vma, page); |
| 1711 | } |
| 1712 | } |
| 1713 | |
| 1714 | static void smp_flush_page_to_ram(unsigned long page) |
| 1715 | { |
| 1716 | /* Current theory is that those who call this are the one's |
| 1717 | * who have just dirtied their cache with the pages contents |
| 1718 | * in kernel space, therefore we only run this on local cpu. |
| 1719 | * |
| 1720 | * XXX This experiment failed, research further... -DaveM |
| 1721 | */ |
| 1722 | #if 1 |
| 1723 | xc1((smpfunc_t) local_ops->page_to_ram, page); |
| 1724 | #endif |
| 1725 | local_ops->page_to_ram(page); |
| 1726 | } |
| 1727 | |
| 1728 | static void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr) |
| 1729 | { |
| 1730 | cpumask_t cpu_mask; |
| 1731 | cpumask_copy(&cpu_mask, mm_cpumask(mm)); |
| 1732 | cpumask_clear_cpu(smp_processor_id(), &cpu_mask); |
| 1733 | if (!cpumask_empty(&cpu_mask)) |
| 1734 | xc2((smpfunc_t) local_ops->sig_insns, |
| 1735 | (unsigned long) mm, insn_addr); |
| 1736 | local_ops->sig_insns(mm, insn_addr); |
| 1737 | } |
| 1738 | |
| 1739 | static struct sparc32_cachetlb_ops smp_cachetlb_ops = { |
| 1740 | .cache_all = smp_flush_cache_all, |
| 1741 | .cache_mm = smp_flush_cache_mm, |
| 1742 | .cache_page = smp_flush_cache_page, |
| 1743 | .cache_range = smp_flush_cache_range, |
| 1744 | .tlb_all = smp_flush_tlb_all, |
| 1745 | .tlb_mm = smp_flush_tlb_mm, |
| 1746 | .tlb_page = smp_flush_tlb_page, |
| 1747 | .tlb_range = smp_flush_tlb_range, |
| 1748 | .page_to_ram = smp_flush_page_to_ram, |
| 1749 | .sig_insns = smp_flush_sig_insns, |
| 1750 | .page_for_dma = smp_flush_page_for_dma, |
| 1751 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1752 | #endif |
| 1753 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1754 | /* Load up routines and constants for sun4m and sun4d mmu */ |
Sam Ravnborg | a3c5c66 | 2012-05-12 20:35:52 +0200 | [diff] [blame] | 1755 | void __init load_mmu(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1756 | { |
| 1757 | extern void ld_mmu_iommu(void); |
| 1758 | extern void ld_mmu_iounit(void); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1759 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1760 | /* Functions */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1761 | get_srmmu_type(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1762 | |
| 1763 | #ifdef CONFIG_SMP |
| 1764 | /* El switcheroo... */ |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1765 | local_ops = sparc32_cachetlb_ops; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1766 | |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1767 | if (sparc_cpu_model == sun4d || sparc_cpu_model == sparc_leon) { |
| 1768 | smp_cachetlb_ops.tlb_all = local_ops->tlb_all; |
| 1769 | smp_cachetlb_ops.tlb_mm = local_ops->tlb_mm; |
| 1770 | smp_cachetlb_ops.tlb_range = local_ops->tlb_range; |
| 1771 | smp_cachetlb_ops.tlb_page = local_ops->tlb_page; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1772 | } |
David S. Miller | 64273d0 | 2008-11-26 01:00:58 -0800 | [diff] [blame] | 1773 | |
| 1774 | if (poke_srmmu == poke_viking) { |
| 1775 | /* Avoid unnecessary cross calls. */ |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1776 | smp_cachetlb_ops.cache_all = local_ops->cache_all; |
| 1777 | smp_cachetlb_ops.cache_mm = local_ops->cache_mm; |
| 1778 | smp_cachetlb_ops.cache_range = local_ops->cache_range; |
| 1779 | smp_cachetlb_ops.cache_page = local_ops->cache_page; |
| 1780 | |
| 1781 | smp_cachetlb_ops.page_to_ram = local_ops->page_to_ram; |
| 1782 | smp_cachetlb_ops.sig_insns = local_ops->sig_insns; |
| 1783 | smp_cachetlb_ops.page_for_dma = local_ops->page_for_dma; |
David S. Miller | 64273d0 | 2008-11-26 01:00:58 -0800 | [diff] [blame] | 1784 | } |
David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 1785 | |
| 1786 | /* It really is const after this point. */ |
| 1787 | sparc32_cachetlb_ops = (const struct sparc32_cachetlb_ops *) |
| 1788 | &smp_cachetlb_ops; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1789 | #endif |
| 1790 | |
| 1791 | if (sparc_cpu_model == sun4d) |
| 1792 | ld_mmu_iounit(); |
| 1793 | else |
| 1794 | ld_mmu_iommu(); |
| 1795 | #ifdef CONFIG_SMP |
| 1796 | if (sparc_cpu_model == sun4d) |
| 1797 | sun4d_init_smp(); |
Konrad Eisele | 8401707 | 2009-08-31 22:08:13 +0000 | [diff] [blame] | 1798 | else if (sparc_cpu_model == sparc_leon) |
| 1799 | leon_init_smp(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1800 | else |
| 1801 | sun4m_init_smp(); |
| 1802 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1803 | } |