blob: 194e5cf8c763d8055e988ea14d1c5c43a8819029 [file] [log] [blame]
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001/*
2 * New driver for Marvell Yukon 2 chipset.
3 * Based on earlier sk98lin, and skge driver.
4 *
5 * This driver intentionally does not support all the features
6 * of the original driver such as link fail-over and link management because
7 * those should be done at higher levels.
8 *
9 * Copyright (C) 2005 Stephen Hemminger <shemminger@osdl.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
Stephen Hemminger798b6b12006-10-22 20:16:57 -070013 * the Free Software Foundation; either version 2 of the License.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070014 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Stephen Hemminger793b8832005-09-14 16:06:14 -070017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070018 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
Joe Perchesada1db52010-02-17 15:01:59 +000025#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26
Stephen Hemminger793b8832005-09-14 16:06:14 -070027#include <linux/crc32.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070028#include <linux/kernel.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070029#include <linux/module.h>
30#include <linux/netdevice.h>
Andrew Mortond0bbccf2005-11-10 15:29:27 -080031#include <linux/dma-mapping.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070032#include <linux/etherdevice.h>
33#include <linux/ethtool.h>
34#include <linux/pci.h>
35#include <linux/ip.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090036#include <linux/slab.h>
Arnaldo Carvalho de Meloc9bdd4b2007-03-12 20:09:15 -030037#include <net/ip.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070038#include <linux/tcp.h>
39#include <linux/in.h>
40#include <linux/delay.h>
Stephen Hemminger91c86df2005-12-09 11:34:57 -080041#include <linux/workqueue.h>
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070042#include <linux/if_vlan.h>
Stephen Hemmingerd70cd512005-12-09 11:35:09 -080043#include <linux/prefetch.h>
Stephen Hemminger3cf26752007-07-09 15:33:35 -070044#include <linux/debugfs.h>
shemminger@osdl.orgef743d32005-11-30 11:45:12 -080045#include <linux/mii.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070046
47#include <asm/irq.h>
48
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070049#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
50#define SKY2_VLAN_TAG_USED 1
51#endif
52
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070053#include "sky2.h"
54
55#define DRV_NAME "sky2"
stephen hemmingere0a67e22010-05-13 06:12:53 +000056#define DRV_VERSION "1.28"
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070057
58/*
59 * The Yukon II chipset takes 64 bit command blocks (called list elements)
60 * that are organized into three (receive, transmit, status) different rings
Stephen Hemminger14d02632006-09-26 11:57:43 -070061 * similar to Tigon3.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070062 */
63
Stephen Hemminger14d02632006-09-26 11:57:43 -070064#define RX_LE_SIZE 1024
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070065#define RX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le))
Stephen Hemminger14d02632006-09-26 11:57:43 -070066#define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
shemminger@osdl.org13210ce2005-11-30 11:45:14 -080067#define RX_DEF_PENDING RX_MAX_PENDING
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070068
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +000069/* This is the worst case number of transmit list elements for a single skb:
Stephen Hemminger07e31632009-09-14 06:12:55 +000070 VLAN:GSO + CKSUM + Data + skb_frags * DMA */
71#define MAX_SKB_TX_LE (2 + (sizeof(dma_addr_t)/sizeof(u32))*(MAX_SKB_FRAGS+1))
Stephen Hemmingere9c1be82009-06-17 07:30:37 +000072#define TX_MIN_PENDING (MAX_SKB_TX_LE+1)
stephen hemmingerefe91932010-04-22 13:42:56 +000073#define TX_MAX_PENDING 1024
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +000074#define TX_DEF_PENDING 127
Stephen Hemminger793b8832005-09-14 16:06:14 -070075
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070076#define TX_WATCHDOG (5 * HZ)
77#define NAPI_WEIGHT 64
78#define PHY_RETRIES 1000
79
Stephen Hemmingerf4331a62007-07-09 15:33:39 -070080#define SKY2_EEPROM_MAGIC 0x9955aabb
81
Mike McCormack060b9462010-07-29 03:34:52 +000082#define RING_NEXT(x, s) (((x)+1) & ((s)-1))
Stephen Hemmingercb5d9542006-05-08 15:11:29 -070083
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070084static const u32 default_msg =
Stephen Hemminger793b8832005-09-14 16:06:14 -070085 NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
86 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
Stephen Hemminger3be92a72006-01-17 13:43:17 -080087 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070088
Stephen Hemminger793b8832005-09-14 16:06:14 -070089static int debug = -1; /* defaults above */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070090module_param(debug, int, 0);
91MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92
Stephen Hemminger14d02632006-09-26 11:57:43 -070093static int copybreak __read_mostly = 128;
Stephen Hemmingerbdb5c582005-12-09 11:34:55 -080094module_param(copybreak, int, 0);
95MODULE_PARM_DESC(copybreak, "Receive copy threshold");
96
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -080097static int disable_msi = 0;
98module_param(disable_msi, int, 0);
99MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
100
Stephen Hemmingere6cac9b2008-06-17 09:04:26 -0700101static DEFINE_PCI_DEVICE_TABLE(sky2_id_table) = {
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800102 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
103 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
Stephen Hemmingere30a4ac2009-10-29 06:37:05 +0000104 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E01) }, /* SK-9E21M */
Stephen Hemminger2d2a3872006-05-17 14:37:04 -0700105 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
Stephen Hemminger2f4a66a2006-09-01 14:52:04 -0700106 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
Stephen Hemminger508f89e2006-12-01 14:29:34 -0800107 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800108 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B03) }, /* DGE-550T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800109 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, /* 88E8021 */
110 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, /* 88E8022 */
111 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, /* 88E8061 */
112 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, /* 88E8062 */
113 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, /* 88E8021 */
114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, /* 88E8022 */
115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, /* 88E8061 */
116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, /* 88E8062 */
117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, /* 88E8035 */
118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, /* 88E8036 */
119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, /* 88E8038 */
120 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, /* 88E8039 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700121 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4354) }, /* 88E8040 */
Stephen Hemmingera3b4fce2008-06-14 10:32:15 -0700122 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4355) }, /* 88E8040T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800123 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4356) }, /* 88EC033 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800124 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4357) }, /* 88E8042 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700125 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x435A) }, /* 88E8048 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800126 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, /* 88E8052 */
127 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */
128 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */
129 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */
130 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700131 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4365) }, /* 88E8070 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800132 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */
133 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */
134 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800135 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4369) }, /* 88EC042 */
136 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436A) }, /* 88E8058 */
Stephen Hemminger69161612007-06-04 17:23:26 -0700137 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436B) }, /* 88E8071 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800138 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436C) }, /* 88E8072 */
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800139 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */
140 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700141 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4380) }, /* 88E8057 */
Stephen Hemminger0f5aac72009-10-29 06:37:09 +0000142 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4381) }, /* 88E8059 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700143 { 0 }
144};
Stephen Hemminger793b8832005-09-14 16:06:14 -0700145
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700146MODULE_DEVICE_TABLE(pci, sky2_id_table);
147
148/* Avoid conditionals by using array */
149static const unsigned txqaddr[] = { Q_XA1, Q_XA2 };
150static const unsigned rxqaddr[] = { Q_R1, Q_R2 };
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -0700151static const u32 portirq_msk[] = { Y2_IS_PORT_1, Y2_IS_PORT_2 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700152
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +0100153static void sky2_set_multicast(struct net_device *dev);
154
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800155/* Access to PHY via serial interconnect */
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800156static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700157{
158 int i;
159
160 gma_write16(hw, port, GM_SMI_DATA, val);
161 gma_write16(hw, port, GM_SMI_CTRL,
162 GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) | GM_SMI_CT_REG_AD(reg));
163
164 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800165 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
166 if (ctrl == 0xffff)
167 goto io_error;
168
169 if (!(ctrl & GM_SMI_CT_BUSY))
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800170 return 0;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800171
172 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700173 }
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800174
Mike McCormack060b9462010-07-29 03:34:52 +0000175 dev_warn(&hw->pdev->dev, "%s: phy write timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800176 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800177
178io_error:
179 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
180 return -EIO;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700181}
182
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800183static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700184{
185 int i;
186
Stephen Hemminger793b8832005-09-14 16:06:14 -0700187 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700188 | GM_SMI_CT_REG_AD(reg) | GM_SMI_CT_OP_RD);
189
190 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800191 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
192 if (ctrl == 0xffff)
193 goto io_error;
194
195 if (ctrl & GM_SMI_CT_RD_VAL) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800196 *val = gma_read16(hw, port, GM_SMI_DATA);
197 return 0;
198 }
199
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800200 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700201 }
202
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800203 dev_warn(&hw->pdev->dev, "%s: phy read timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800204 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800205io_error:
206 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
207 return -EIO;
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800208}
209
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800210static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800211{
212 u16 v;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800213 __gm_phy_read(hw, port, reg, &v);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800214 return v;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700215}
216
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800217
218static void sky2_power_on(struct sky2_hw *hw)
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700219{
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800220 /* switch power to VCC (WA for VAUX problem) */
221 sky2_write8(hw, B0_POWER_CTRL,
222 PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700223
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800224 /* disable Core Clock Division, */
225 sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700226
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000227 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1)
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800228 /* enable bits are inverted */
229 sky2_write8(hw, B2_Y2_CLK_GATE,
230 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
231 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
232 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
233 else
234 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700235
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700236 if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700237 u32 reg;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700238
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800239 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700240
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800241 reg = sky2_pci_read32(hw, PCI_DEV_REG4);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700242 /* set all bits to 0 except bits 15..12 and 8 */
243 reg &= P_ASPM_CONTROL_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800244 sky2_pci_write32(hw, PCI_DEV_REG4, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700245
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800246 reg = sky2_pci_read32(hw, PCI_DEV_REG5);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700247 /* set all bits to 0 except bits 28 & 27 */
248 reg &= P_CTL_TIM_VMAIN_AV_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800249 sky2_pci_write32(hw, PCI_DEV_REG5, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700250
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800251 sky2_pci_write32(hw, PCI_CFG_REG_1, 0);
Stephen Hemminger8f709202007-06-04 17:23:25 -0700252
stephen hemminger5f8ae5c2010-02-12 06:57:59 +0000253 sky2_write16(hw, B0_CTST, Y2_HW_WOL_ON);
254
Stephen Hemminger8f709202007-06-04 17:23:25 -0700255 /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
256 reg = sky2_read32(hw, B2_GP_IO);
257 reg |= GLB_GPIO_STAT_RACE_DIS;
258 sky2_write32(hw, B2_GP_IO, reg);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700259
260 sky2_read32(hw, B2_GP_IO);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700261 }
Stephen Hemminger10547ae2009-08-31 07:31:41 +0000262
263 /* Turn on "driver loaded" LED */
264 sky2_write16(hw, B0_CTST, Y2_LED_STAT_ON);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800265}
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700266
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800267static void sky2_power_aux(struct sky2_hw *hw)
268{
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000269 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1)
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800270 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
271 else
272 /* enable bits are inverted */
273 sky2_write8(hw, B2_Y2_CLK_GATE,
274 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
275 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
276 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
277
Stephen Hemmingerc23ddf82009-09-03 06:16:25 +0000278 /* switch power to VAUX if supported and PME from D3cold */
279 if ( (sky2_read32(hw, B0_CTST) & Y2_VAUX_AVAIL) &&
280 pci_pme_capable(hw->pdev, PCI_D3cold))
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800281 sky2_write8(hw, B0_POWER_CTRL,
282 (PC_VAUX_ENA | PC_VCC_ENA |
283 PC_VAUX_ON | PC_VCC_OFF));
Stephen Hemminger10547ae2009-08-31 07:31:41 +0000284
285 /* turn off "driver loaded LED" */
286 sky2_write16(hw, B0_CTST, Y2_LED_STAT_OFF);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700287}
288
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700289static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700290{
291 u16 reg;
292
293 /* disable all GMAC IRQ's */
294 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700295
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700296 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */
297 gma_write16(hw, port, GM_MC_ADDR_H2, 0);
298 gma_write16(hw, port, GM_MC_ADDR_H3, 0);
299 gma_write16(hw, port, GM_MC_ADDR_H4, 0);
300
301 reg = gma_read16(hw, port, GM_RX_CTRL);
302 reg |= GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA;
303 gma_write16(hw, port, GM_RX_CTRL, reg);
304}
305
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700306/* flow control to advertise bits */
307static const u16 copper_fc_adv[] = {
308 [FC_NONE] = 0,
309 [FC_TX] = PHY_M_AN_ASP,
310 [FC_RX] = PHY_M_AN_PC,
311 [FC_BOTH] = PHY_M_AN_PC | PHY_M_AN_ASP,
312};
313
314/* flow control to advertise bits when using 1000BaseX */
315static const u16 fiber_fc_adv[] = {
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700316 [FC_NONE] = PHY_M_P_NO_PAUSE_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700317 [FC_TX] = PHY_M_P_ASYM_MD_X,
318 [FC_RX] = PHY_M_P_SYM_MD_X,
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700319 [FC_BOTH] = PHY_M_P_BOTH_MD_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700320};
321
322/* flow control to GMA disable bits */
323static const u16 gm_fc_disable[] = {
324 [FC_NONE] = GM_GPCR_FC_RX_DIS | GM_GPCR_FC_TX_DIS,
325 [FC_TX] = GM_GPCR_FC_RX_DIS,
326 [FC_RX] = GM_GPCR_FC_TX_DIS,
327 [FC_BOTH] = 0,
328};
329
330
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700331static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
332{
333 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700334 u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700335
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700336 if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) &&
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700337 !(hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700338 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);
339
340 ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
Stephen Hemminger793b8832005-09-14 16:06:14 -0700341 PHY_M_EC_MAC_S_MSK);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700342 ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
343
Stephen Hemminger53419c62007-05-14 12:38:11 -0700344 /* on PHY 88E1040 Rev.D0 (and newer) downshift control changed */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700345 if (hw->chip_id == CHIP_ID_YUKON_EC)
Stephen Hemminger53419c62007-05-14 12:38:11 -0700346 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700347 ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA;
348 else
Stephen Hemminger53419c62007-05-14 12:38:11 -0700349 /* set master & slave downshift counter to 1x */
350 ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700351
352 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl);
353 }
354
355 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700356 if (sky2_is_copper(hw)) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700357 if (!(hw->flags & SKY2_HW_GIGABIT)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700358 /* enable automatic crossover */
359 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
Stephen Hemminger6d3105d2007-09-24 19:34:51 -0700360
361 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
362 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
363 u16 spec;
364
365 /* Enable Class A driver for FE+ A0 */
366 spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2);
367 spec |= PHY_M_FESC_SEL_CL_A;
368 gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec);
369 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700370 } else {
371 /* disable energy detect */
372 ctrl &= ~PHY_M_PC_EN_DET_MSK;
373
374 /* enable automatic crossover */
375 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
376
Stephen Hemminger53419c62007-05-14 12:38:11 -0700377 /* downshift on PHY 88E1112 and 88E1149 is changed */
Joe Perches8e95a202009-12-03 07:58:21 +0000378 if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) &&
379 (hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemminger53419c62007-05-14 12:38:11 -0700380 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700381 ctrl &= ~PHY_M_PC_DSC_MSK;
382 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
383 }
384 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700385 } else {
386 /* workaround for deviation #4.88 (CRC errors) */
387 /* disable Automatic Crossover */
388
389 ctrl &= ~PHY_M_PC_MDIX_MSK;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700390 }
391
392 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
393
394 /* special setup for PHY 88E1112 Fiber */
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700395 if (hw->chip_id == CHIP_ID_YUKON_XL && (hw->flags & SKY2_HW_FIBRE_PHY)) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700396 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
397
398 /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
399 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
400 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
401 ctrl &= ~PHY_M_MAC_MD_MSK;
402 ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700403 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
404
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700405 if (hw->pmd_type == 'P') {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700406 /* select page 1 to access Fiber registers */
407 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700408
409 /* for SFP-module set SIGDET polarity to low */
410 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
411 ctrl |= PHY_M_FIB_SIGD_POL;
Stephen Hemminger34dd9622007-05-24 15:22:45 -0700412 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700413 }
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700414
415 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700416 }
417
Stephen Hemminger7800fdd2006-10-17 10:24:10 -0700418 ctrl = PHY_CT_RESET;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700419 ct1000 = 0;
420 adv = PHY_AN_CSMA;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700421 reg = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700422
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700423 if (sky2->flags & SKY2_FLAG_AUTO_SPEED) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700424 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700425 if (sky2->advertising & ADVERTISED_1000baseT_Full)
426 ct1000 |= PHY_M_1000C_AFD;
427 if (sky2->advertising & ADVERTISED_1000baseT_Half)
428 ct1000 |= PHY_M_1000C_AHD;
429 if (sky2->advertising & ADVERTISED_100baseT_Full)
430 adv |= PHY_M_AN_100_FD;
431 if (sky2->advertising & ADVERTISED_100baseT_Half)
432 adv |= PHY_M_AN_100_HD;
433 if (sky2->advertising & ADVERTISED_10baseT_Full)
434 adv |= PHY_M_AN_10_FD;
435 if (sky2->advertising & ADVERTISED_10baseT_Half)
436 adv |= PHY_M_AN_10_HD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700437
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700438 } else { /* special defines for FIBER (88E1040S only) */
439 if (sky2->advertising & ADVERTISED_1000baseT_Full)
440 adv |= PHY_M_AN_1000X_AFD;
441 if (sky2->advertising & ADVERTISED_1000baseT_Half)
442 adv |= PHY_M_AN_1000X_AHD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700443 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700444
445 /* Restart Auto-negotiation */
446 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
447 } else {
448 /* forced speed/duplex settings */
449 ct1000 = PHY_M_1000C_MSE;
450
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700451 /* Disable auto update for duplex flow control and duplex */
452 reg |= GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_SPD_DIS;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700453
454 switch (sky2->speed) {
455 case SPEED_1000:
456 ctrl |= PHY_CT_SP1000;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700457 reg |= GM_GPCR_SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700458 break;
459 case SPEED_100:
460 ctrl |= PHY_CT_SP100;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700461 reg |= GM_GPCR_SPEED_100;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700462 break;
463 }
464
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700465 if (sky2->duplex == DUPLEX_FULL) {
466 reg |= GM_GPCR_DUP_FULL;
467 ctrl |= PHY_CT_DUP_MD;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700468 } else if (sky2->speed < SPEED_1000)
469 sky2->flow_mode = FC_NONE;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700470 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700471
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700472 if (sky2->flags & SKY2_FLAG_AUTO_PAUSE) {
473 if (sky2_is_copper(hw))
474 adv |= copper_fc_adv[sky2->flow_mode];
475 else
476 adv |= fiber_fc_adv[sky2->flow_mode];
477 } else {
478 reg |= GM_GPCR_AU_FCT_DIS;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700479 reg |= gm_fc_disable[sky2->flow_mode];
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700480
481 /* Forward pause packets to GMAC? */
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700482 if (sky2->flow_mode & FC_RX)
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700483 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
484 else
485 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700486 }
487
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700488 gma_write16(hw, port, GM_GP_CTRL, reg);
489
Stephen Hemminger05745c42007-09-19 15:36:45 -0700490 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700491 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
492
493 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv);
494 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
495
496 /* Setup Phy LED's */
497 ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS);
498 ledover = 0;
499
500 switch (hw->chip_id) {
501 case CHIP_ID_YUKON_FE:
502 /* on 88E3082 these bits are at 11..9 (shifted left) */
503 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;
504
505 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR);
506
507 /* delete ACT LED control bits */
508 ctrl &= ~PHY_M_FELP_LED1_MSK;
509 /* change ACT LED control to blink mode */
510 ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL);
511 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
512 break;
513
Stephen Hemminger05745c42007-09-19 15:36:45 -0700514 case CHIP_ID_YUKON_FE_P:
515 /* Enable Link Partner Next Page */
516 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
517 ctrl |= PHY_M_PC_ENA_LIP_NP;
518
519 /* disable Energy Detect and enable scrambler */
520 ctrl &= ~(PHY_M_PC_ENA_ENE_DT | PHY_M_PC_DIS_SCRAMB);
521 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
522
523 /* set LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED */
524 ctrl = PHY_M_FELP_LED2_CTRL(LED_PAR_CTRL_ACT_BL) |
525 PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_LINK) |
526 PHY_M_FELP_LED0_CTRL(LED_PAR_CTRL_SPEED);
527
528 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
529 break;
530
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700531 case CHIP_ID_YUKON_XL:
Stephen Hemminger793b8832005-09-14 16:06:14 -0700532 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700533
534 /* select page 3 to access LED control register */
535 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
536
537 /* set LED Function Control register */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700538 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
539 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
540 PHY_M_LEDC_INIT_CTRL(7) | /* 10 Mbps */
541 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
542 PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700543
544 /* set Polarity Control register */
545 gm_phy_write(hw, port, PHY_MARV_PHY_STAT,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700546 (PHY_M_POLC_LS1_P_MIX(4) |
547 PHY_M_POLC_IS0_P_MIX(4) |
548 PHY_M_POLC_LOS_CTRL(2) |
549 PHY_M_POLC_INIT_CTRL(2) |
550 PHY_M_POLC_STA1_CTRL(2) |
551 PHY_M_POLC_STA0_CTRL(2)));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700552
553 /* restore page register */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700554 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700555 break;
Stephen Hemminger93745492007-02-06 10:45:43 -0800556
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700557 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -0800558 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800559 case CHIP_ID_YUKON_SUPR:
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700560 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
561
562 /* select page 3 to access LED control register */
563 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
564
565 /* set LED Function Control register */
566 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
567 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
568 PHY_M_LEDC_INIT_CTRL(8) | /* 10 Mbps */
569 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
570 PHY_M_LEDC_STA0_CTRL(7)));/* 1000 Mbps */
571
572 /* set Blink Rate in LED Timer Control Register */
573 gm_phy_write(hw, port, PHY_MARV_INT_MASK,
574 ledctrl | PHY_M_LED_BLINK_RT(BLINK_84MS));
575 /* restore page register */
576 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
577 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700578
579 default:
580 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
581 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800582
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700583 /* turn off the Rx LED (LED_RX) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800584 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700585 }
586
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700587 if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_UL_2) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800588 /* apply fixes in PHY AFE */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700589 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255);
590
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800591 /* increase differential signal amplitude in 10BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700592 gm_phy_write(hw, port, 0x18, 0xaa99);
593 gm_phy_write(hw, port, 0x17, 0x2011);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700594
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700595 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
596 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */
597 gm_phy_write(hw, port, 0x18, 0xa204);
598 gm_phy_write(hw, port, 0x17, 0x2002);
599 }
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800600
601 /* set page register to 0 */
Stephen Hemminger9467a8f2007-04-07 16:02:28 -0700602 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemminger05745c42007-09-19 15:36:45 -0700603 } else if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
604 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
605 /* apply workaround for integrated resistors calibration */
606 gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17);
607 gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +0000608 } else if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) {
609 /* apply fixes in PHY AFE */
610 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff);
611
612 /* apply RDAC termination workaround */
613 gm_phy_write(hw, port, 24, 0x2800);
614 gm_phy_write(hw, port, 23, 0x2001);
615
616 /* set page register back to 0 */
617 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemmingere1a74b32008-06-17 09:04:24 -0700618 } else if (hw->chip_id != CHIP_ID_YUKON_EX &&
619 hw->chip_id < CHIP_ID_YUKON_SUPR) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700620 /* no effect on Yukon-XL */
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800621 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
622
Joe Perches8e95a202009-12-03 07:58:21 +0000623 if (!(sky2->flags & SKY2_FLAG_AUTO_SPEED) ||
624 sky2->speed == SPEED_100) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800625 /* turn on 100 Mbps LED (LED_LINK100) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800626 ledover |= PHY_M_LED_MO_100(MO_LED_ON);
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800627 }
628
629 if (ledover)
630 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
631
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700632 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700633
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700634 /* Enable phy interrupt on auto-negotiation complete (or link up) */
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700635 if (sky2->flags & SKY2_FLAG_AUTO_SPEED)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700636 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
637 else
638 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
639}
640
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700641static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
642static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };
643
644static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700645{
646 u32 reg1;
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700647
stephen hemmingera40ccc62010-01-24 18:46:06 +0000648 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800649 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700650 reg1 &= ~phy_power[port];
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700651
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000652 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1)
Stephen Hemmingerff35164e2007-10-11 19:47:44 -0700653 reg1 |= coma_mode[port];
654
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800655 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
stephen hemmingera40ccc62010-01-24 18:46:06 +0000656 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemminger82637e82008-01-23 19:16:04 -0800657 sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -0700658
659 if (hw->chip_id == CHIP_ID_YUKON_FE)
660 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_ANE);
661 else if (hw->flags & SKY2_HW_ADV_POWER_CTL)
662 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700663}
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700664
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700665static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port)
666{
667 u32 reg1;
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700668 u16 ctrl;
669
670 /* release GPHY Control reset */
671 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
672
673 /* release GMAC reset */
674 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
675
676 if (hw->flags & SKY2_HW_NEWER_PHY) {
677 /* select page 2 to access MAC control register */
678 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
679
680 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
681 /* allow GMII Power Down */
682 ctrl &= ~PHY_M_MAC_GMIF_PUP;
683 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
684
685 /* set page register back to 0 */
686 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
687 }
688
689 /* setup General Purpose Control Register */
690 gma_write16(hw, port, GM_GP_CTRL,
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700691 GM_GPCR_FL_PASS | GM_GPCR_SPEED_100 |
692 GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_FCT_DIS |
693 GM_GPCR_AU_SPD_DIS);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700694
695 if (hw->chip_id != CHIP_ID_YUKON_EC) {
696 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200697 /* select page 2 to access MAC control register */
698 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700699
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200700 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700701 /* enable Power Down */
702 ctrl |= PHY_M_PC_POW_D_ENA;
703 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200704
705 /* set page register back to 0 */
706 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700707 }
708
709 /* set IEEE compatible Power Down Mode (dev. #4.99) */
710 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_PDOWN);
711 }
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700712
stephen hemmingera40ccc62010-01-24 18:46:06 +0000713 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700714 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700715 reg1 |= phy_power[port]; /* set PHY to PowerDown/COMA Mode */
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700716 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
stephen hemmingera40ccc62010-01-24 18:46:06 +0000717 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700718}
719
Brandon Philips38000a92010-06-16 16:21:58 +0000720/* Enable Rx/Tx */
721static void sky2_enable_rx_tx(struct sky2_port *sky2)
722{
723 struct sky2_hw *hw = sky2->hw;
724 unsigned port = sky2->port;
725 u16 reg;
726
727 reg = gma_read16(hw, port, GM_GP_CTRL);
728 reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
729 gma_write16(hw, port, GM_GP_CTRL, reg);
730}
731
Stephen Hemminger1b537562005-12-20 15:08:07 -0800732/* Force a renegotiation */
733static void sky2_phy_reinit(struct sky2_port *sky2)
734{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800735 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800736 sky2_phy_init(sky2->hw, sky2->port);
Brandon Philips38000a92010-06-16 16:21:58 +0000737 sky2_enable_rx_tx(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800738 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800739}
740
Stephen Hemmingere3173832007-02-06 10:45:39 -0800741/* Put device in state to listen for Wake On Lan */
742static void sky2_wol_init(struct sky2_port *sky2)
743{
744 struct sky2_hw *hw = sky2->hw;
745 unsigned port = sky2->port;
746 enum flow_control save_mode;
747 u16 ctrl;
Stephen Hemmingere3173832007-02-06 10:45:39 -0800748
749 /* Bring hardware out of reset */
750 sky2_write16(hw, B0_CTST, CS_RST_CLR);
751 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR);
752
753 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
754 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
755
756 /* Force to 10/100
757 * sky2_reset will re-enable on resume
758 */
759 save_mode = sky2->flow_mode;
760 ctrl = sky2->advertising;
761
762 sky2->advertising &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full);
763 sky2->flow_mode = FC_NONE;
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700764
765 spin_lock_bh(&sky2->phy_lock);
766 sky2_phy_power_up(hw, port);
767 sky2_phy_init(hw, port);
768 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800769
770 sky2->flow_mode = save_mode;
771 sky2->advertising = ctrl;
772
773 /* Set GMAC to no flow control and auto update for speed/duplex */
774 gma_write16(hw, port, GM_GP_CTRL,
775 GM_GPCR_FC_TX_DIS|GM_GPCR_TX_ENA|GM_GPCR_RX_ENA|
776 GM_GPCR_DUP_FULL|GM_GPCR_FC_RX_DIS|GM_GPCR_AU_FCT_DIS);
777
778 /* Set WOL address */
779 memcpy_toio(hw->regs + WOL_REGS(port, WOL_MAC_ADDR),
780 sky2->netdev->dev_addr, ETH_ALEN);
781
782 /* Turn on appropriate WOL control bits */
783 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT);
784 ctrl = 0;
785 if (sky2->wol & WAKE_PHY)
786 ctrl |= WOL_CTL_ENA_PME_ON_LINK_CHG|WOL_CTL_ENA_LINK_CHG_UNIT;
787 else
788 ctrl |= WOL_CTL_DIS_PME_ON_LINK_CHG|WOL_CTL_DIS_LINK_CHG_UNIT;
789
790 if (sky2->wol & WAKE_MAGIC)
791 ctrl |= WOL_CTL_ENA_PME_ON_MAGIC_PKT|WOL_CTL_ENA_MAGIC_PKT_UNIT;
792 else
Joe Perchesa419aef2009-08-18 11:18:35 -0700793 ctrl |= WOL_CTL_DIS_PME_ON_MAGIC_PKT|WOL_CTL_DIS_MAGIC_PKT_UNIT;
Stephen Hemmingere3173832007-02-06 10:45:39 -0800794
795 ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT;
796 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
797
stephen hemminger5f8ae5c2010-02-12 06:57:59 +0000798 /* Disable PiG firmware */
799 sky2_write16(hw, B0_CTST, Y2_HW_WOL_OFF);
800
Stephen Hemmingere3173832007-02-06 10:45:39 -0800801 /* block receiver */
802 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800803}
804
Stephen Hemminger69161612007-06-04 17:23:26 -0700805static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port)
806{
Stephen Hemminger05745c42007-09-19 15:36:45 -0700807 struct net_device *dev = hw->dev[port];
808
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800809 if ( (hw->chip_id == CHIP_ID_YUKON_EX &&
810 hw->chip_rev != CHIP_REV_YU_EX_A0) ||
Stephen Hemminger877c8572009-10-29 06:37:08 +0000811 hw->chip_id >= CHIP_ID_YUKON_FE_P) {
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800812 /* Yukon-Extreme B0 and further Extreme devices */
stephen hemminger44dde562010-02-12 06:58:01 +0000813 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA);
814 } else if (dev->mtu > ETH_DATA_LEN) {
815 /* set Tx GMAC FIFO Almost Empty Threshold */
816 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR),
817 (ECU_JUMBO_WM << 16) | ECU_AE_THR);
Stephen Hemminger69161612007-06-04 17:23:26 -0700818
stephen hemminger44dde562010-02-12 06:58:01 +0000819 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS);
820 } else
821 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA);
Stephen Hemminger69161612007-06-04 17:23:26 -0700822}
823
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700824static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
825{
826 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
827 u16 reg;
Al Viro25cccec2007-07-20 16:07:33 +0100828 u32 rx_reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700829 int i;
830 const u8 *addr = hw->dev[port]->dev_addr;
831
Stephen Hemmingerf3503392007-08-21 11:10:22 -0700832 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
833 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700834
835 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
836
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000837 if (hw->chip_id == CHIP_ID_YUKON_XL &&
838 hw->chip_rev == CHIP_REV_YU_XL_A0 &&
839 port == 1) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700840 /* WA DEV_472 -- looks like crossed wires on port 2 */
841 /* clear GMAC 1 Control reset */
842 sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR);
843 do {
844 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET);
845 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR);
846 } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL ||
847 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 ||
848 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
849 }
850
Stephen Hemminger793b8832005-09-14 16:06:14 -0700851 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700852
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700853 /* Enable Transmit FIFO Underrun */
854 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
855
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800856 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700857 sky2_phy_power_up(hw, port);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700858 sky2_phy_init(hw, port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800859 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700860
861 /* MIB clear */
862 reg = gma_read16(hw, port, GM_PHY_ADDR);
863 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR);
864
Stephen Hemminger43f2f102006-04-05 17:47:15 -0700865 for (i = GM_MIB_CNT_BASE; i <= GM_MIB_CNT_END; i += 4)
866 gma_read16(hw, port, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700867 gma_write16(hw, port, GM_PHY_ADDR, reg);
868
869 /* transmit control */
870 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF));
871
872 /* receive control reg: unicast + multicast + no FCS */
873 gma_write16(hw, port, GM_RX_CTRL,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700874 GM_RXCR_UCF_ENA | GM_RXCR_CRC_DIS | GM_RXCR_MCF_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700875
876 /* transmit flow control */
877 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff);
878
879 /* transmit parameter */
880 gma_write16(hw, port, GM_TX_PARAM,
881 TX_JAM_LEN_VAL(TX_JAM_LEN_DEF) |
882 TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) |
883 TX_IPG_JAM_DATA(TX_IPG_JAM_DEF) |
884 TX_BACK_OFF_LIM(TX_BOF_LIM_DEF));
885
886 /* serial mode register */
887 reg = DATA_BLIND_VAL(DATA_BLIND_DEF) |
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700888 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700889
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700890 if (hw->dev[port]->mtu > ETH_DATA_LEN)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700891 reg |= GM_SMOD_JUMBO_ENA;
892
stephen hemmingerc1cd0a82010-03-29 07:36:18 +0000893 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
894 hw->chip_rev == CHIP_REV_YU_EC_U_B1)
895 reg |= GM_NEW_FLOW_CTRL;
896
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700897 gma_write16(hw, port, GM_SERIAL_MODE, reg);
898
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700899 /* virtual address for data */
900 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr);
901
Stephen Hemminger793b8832005-09-14 16:06:14 -0700902 /* physical address: used for pause frames */
903 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr);
904
905 /* ignore counter overflows */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700906 gma_write16(hw, port, GM_TX_IRQ_MSK, 0);
907 gma_write16(hw, port, GM_RX_IRQ_MSK, 0);
908 gma_write16(hw, port, GM_TR_IRQ_MSK, 0);
909
910 /* Configure Rx MAC FIFO */
911 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
Al Viro25cccec2007-07-20 16:07:33 +0100912 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON;
Stephen Hemminger05745c42007-09-19 15:36:45 -0700913 if (hw->chip_id == CHIP_ID_YUKON_EX ||
914 hw->chip_id == CHIP_ID_YUKON_FE_P)
Al Viro25cccec2007-07-20 16:07:33 +0100915 rx_reg |= GMF_RX_OVER_ON;
Stephen Hemminger69161612007-06-04 17:23:26 -0700916
Al Viro25cccec2007-07-20 16:07:33 +0100917 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700918
Stephen Hemminger798fdd02007-12-07 15:22:15 -0800919 if (hw->chip_id == CHIP_ID_YUKON_XL) {
920 /* Hardware errata - clear flush mask */
921 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), 0);
922 } else {
923 /* Flush Rx MAC FIFO on any flow control or error */
924 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
925 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700926
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800927 /* Set threshold to 0xa (64 bytes) + 1 to workaround pause bug */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700928 reg = RX_GMF_FL_THR_DEF + 1;
929 /* Another magic mystery workaround from sk98lin */
930 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
931 hw->chip_rev == CHIP_REV_YU_FE2_A0)
932 reg = 0x178;
933 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700934
935 /* Configure Tx MAC FIFO */
936 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
937 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800938
Stephen Hemmingere0c28112007-09-20 13:03:49 -0700939 /* On chips without ram buffer, pause is controled by MAC level */
Stephen Hemminger39dbd952008-02-04 19:45:13 -0800940 if (!(hw->flags & SKY2_HW_RAM_BUFFER)) {
Stephen Hemmingerd6b54d22009-10-29 06:37:07 +0000941 /* Pause threshold is scaled by 8 in bytes */
Joe Perches8e95a202009-12-03 07:58:21 +0000942 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
943 hw->chip_rev == CHIP_REV_YU_FE2_A0)
Stephen Hemmingerd6b54d22009-10-29 06:37:07 +0000944 reg = 1568 / 8;
945 else
946 reg = 1024 / 8;
947 sky2_write16(hw, SK_REG(port, RX_GMF_UP_THR), reg);
948 sky2_write16(hw, SK_REG(port, RX_GMF_LP_THR), 768 / 8);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -0700949
Stephen Hemminger69161612007-06-04 17:23:26 -0700950 sky2_set_tx_stfwd(hw, port);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800951 }
952
Stephen Hemmingere970d1f2007-11-27 11:02:07 -0800953 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
954 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
955 /* disable dynamic watermark */
956 reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA));
957 reg &= ~TX_DYN_WM_ENA;
958 sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg);
959 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700960}
961
Stephen Hemminger67712902006-12-04 15:53:45 -0800962/* Assign Ram Buffer allocation to queue */
963static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700964{
Stephen Hemminger67712902006-12-04 15:53:45 -0800965 u32 end;
966
967 /* convert from K bytes to qwords used for hw register */
968 start *= 1024/8;
969 space *= 1024/8;
970 end = start + space - 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700971
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700972 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
973 sky2_write32(hw, RB_ADDR(q, RB_START), start);
974 sky2_write32(hw, RB_ADDR(q, RB_END), end);
975 sky2_write32(hw, RB_ADDR(q, RB_WP), start);
976 sky2_write32(hw, RB_ADDR(q, RB_RP), start);
977
978 if (q == Q_R1 || q == Q_R2) {
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800979 u32 tp = space - space/4;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700980
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800981 /* On receive queue's set the thresholds
982 * give receiver priority when > 3/4 full
983 * send pause when down to 2K
984 */
985 sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp);
986 sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700987
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800988 tp = space - 2048/8;
989 sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp);
990 sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700991 } else {
992 /* Enable store & forward on Tx queue's because
993 * Tx FIFO is only 1K on Yukon
994 */
995 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
996 }
997
998 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700999 sky2_read8(hw, RB_ADDR(q, RB_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001000}
1001
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001002/* Setup Bus Memory Interface */
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001003static void sky2_qset(struct sky2_hw *hw, u16 q)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001004{
1005 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
1006 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
1007 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001008 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001009}
1010
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001011/* Setup prefetch unit registers. This is the interface between
1012 * hardware and driver list elements
1013 */
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08001014static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr,
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001015 dma_addr_t addr, u32 last)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001016{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001017 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
1018 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001019 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), upper_32_bits(addr));
1020 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), lower_32_bits(addr));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001021 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last);
1022 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001023
1024 sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001025}
1026
Mike McCormack9b289c32009-08-14 05:15:12 +00001027static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2, u16 *slot)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001028{
Mike McCormack9b289c32009-08-14 05:15:12 +00001029 struct sky2_tx_le *le = sky2->tx_le + *slot;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001030
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001031 *slot = RING_NEXT(*slot, sky2->tx_ring_size);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001032 le->ctrl = 0;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001033 return le;
1034}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001035
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001036static void tx_init(struct sky2_port *sky2)
1037{
1038 struct sky2_tx_le *le;
1039
1040 sky2->tx_prod = sky2->tx_cons = 0;
1041 sky2->tx_tcpsum = 0;
1042 sky2->tx_last_mss = 0;
1043
Mike McCormack9b289c32009-08-14 05:15:12 +00001044 le = get_tx_le(sky2, &sky2->tx_prod);
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001045 le->addr = 0;
1046 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001047 sky2->tx_last_upper = 0;
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001048}
1049
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001050/* Update chip's next pointer */
1051static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001052{
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001053 /* Make sure write' to descriptors are complete before we tell hardware */
Stephen Hemminger762c2de2006-01-17 13:43:14 -08001054 wmb();
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001055 sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx);
1056
1057 /* Synchronize I/O on since next processor may write to tail */
1058 mmiowb();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001059}
1060
Stephen Hemminger793b8832005-09-14 16:06:14 -07001061
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001062static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2)
1063{
1064 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put;
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001065 sky2->rx_put = RING_NEXT(sky2->rx_put, RX_LE_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001066 le->ctrl = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001067 return le;
1068}
1069
Mike McCormack060b9462010-07-29 03:34:52 +00001070static unsigned sky2_get_rx_threshold(struct sky2_port *sky2)
Mike McCormack39ef1102010-02-12 06:58:02 +00001071{
1072 unsigned size;
1073
1074 /* Space needed for frame data + headers rounded up */
1075 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
1076
1077 /* Stopping point for hardware truncation */
1078 return (size - 8) / sizeof(u32);
1079}
1080
Mike McCormack060b9462010-07-29 03:34:52 +00001081static unsigned sky2_get_rx_data_size(struct sky2_port *sky2)
Mike McCormack39ef1102010-02-12 06:58:02 +00001082{
1083 struct rx_ring_info *re;
1084 unsigned size;
1085
1086 /* Space needed for frame data + headers rounded up */
1087 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
1088
1089 sky2->rx_nfrags = size >> PAGE_SHIFT;
1090 BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr));
1091
1092 /* Compute residue after pages */
1093 size -= sky2->rx_nfrags << PAGE_SHIFT;
1094
1095 /* Optimize to handle small packets and headers */
1096 if (size < copybreak)
1097 size = copybreak;
1098 if (size < ETH_HLEN)
1099 size = ETH_HLEN;
1100
1101 return size;
1102}
1103
Stephen Hemminger14d02632006-09-26 11:57:43 -07001104/* Build description to hardware for one receive segment */
Mike McCormack060b9462010-07-29 03:34:52 +00001105static void sky2_rx_add(struct sky2_port *sky2, u8 op,
Stephen Hemminger14d02632006-09-26 11:57:43 -07001106 dma_addr_t map, unsigned len)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001107{
1108 struct sky2_rx_le *le;
1109
Stephen Hemminger86c68872008-01-10 16:14:12 -08001110 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001111 le = sky2_next_rx(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001112 le->addr = cpu_to_le32(upper_32_bits(map));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001113 le->opcode = OP_ADDR64 | HW_OWNER;
1114 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001115
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001116 le = sky2_next_rx(sky2);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001117 le->addr = cpu_to_le32(lower_32_bits(map));
Stephen Hemminger734d1862005-12-09 11:35:00 -08001118 le->length = cpu_to_le16(len);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001119 le->opcode = op | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001120}
1121
Stephen Hemminger14d02632006-09-26 11:57:43 -07001122/* Build description to hardware for one possibly fragmented skb */
1123static void sky2_rx_submit(struct sky2_port *sky2,
1124 const struct rx_ring_info *re)
1125{
1126 int i;
1127
1128 sky2_rx_add(sky2, OP_PACKET, re->data_addr, sky2->rx_data_size);
1129
1130 for (i = 0; i < skb_shinfo(re->skb)->nr_frags; i++)
1131 sky2_rx_add(sky2, OP_BUFFER, re->frag_addr[i], PAGE_SIZE);
1132}
1133
1134
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001135static int sky2_rx_map_skb(struct pci_dev *pdev, struct rx_ring_info *re,
Stephen Hemminger14d02632006-09-26 11:57:43 -07001136 unsigned size)
1137{
1138 struct sk_buff *skb = re->skb;
1139 int i;
1140
1141 re->data_addr = pci_map_single(pdev, skb->data, size, PCI_DMA_FROMDEVICE);
stephen hemminger3fbd9182010-02-01 13:45:41 +00001142 if (pci_dma_mapping_error(pdev, re->data_addr))
1143 goto mapping_error;
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001144
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001145 dma_unmap_len_set(re, data_size, size);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001146
stephen hemminger3fbd9182010-02-01 13:45:41 +00001147 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1148 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1149
1150 re->frag_addr[i] = pci_map_page(pdev, frag->page,
1151 frag->page_offset,
1152 frag->size,
Stephen Hemminger14d02632006-09-26 11:57:43 -07001153 PCI_DMA_FROMDEVICE);
stephen hemminger3fbd9182010-02-01 13:45:41 +00001154
1155 if (pci_dma_mapping_error(pdev, re->frag_addr[i]))
1156 goto map_page_error;
1157 }
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001158 return 0;
stephen hemminger3fbd9182010-02-01 13:45:41 +00001159
1160map_page_error:
1161 while (--i >= 0) {
1162 pci_unmap_page(pdev, re->frag_addr[i],
1163 skb_shinfo(skb)->frags[i].size,
1164 PCI_DMA_FROMDEVICE);
1165 }
1166
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001167 pci_unmap_single(pdev, re->data_addr, dma_unmap_len(re, data_size),
stephen hemminger3fbd9182010-02-01 13:45:41 +00001168 PCI_DMA_FROMDEVICE);
1169
1170mapping_error:
1171 if (net_ratelimit())
1172 dev_warn(&pdev->dev, "%s: rx mapping error\n",
1173 skb->dev->name);
1174 return -EIO;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001175}
1176
1177static void sky2_rx_unmap_skb(struct pci_dev *pdev, struct rx_ring_info *re)
1178{
1179 struct sk_buff *skb = re->skb;
1180 int i;
1181
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001182 pci_unmap_single(pdev, re->data_addr, dma_unmap_len(re, data_size),
Stephen Hemminger14d02632006-09-26 11:57:43 -07001183 PCI_DMA_FROMDEVICE);
1184
1185 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
1186 pci_unmap_page(pdev, re->frag_addr[i],
1187 skb_shinfo(skb)->frags[i].size,
1188 PCI_DMA_FROMDEVICE);
1189}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001190
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001191/* Tell chip where to start receive checksum.
1192 * Actually has two checksums, but set both same to avoid possible byte
1193 * order problems.
1194 */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001195static void rx_set_checksum(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001196{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001197 struct sky2_rx_le *le = sky2_next_rx(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001198
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001199 le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN);
1200 le->ctrl = 0;
1201 le->opcode = OP_TCPSTART | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001202
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001203 sky2_write32(sky2->hw,
1204 Q_ADDR(rxqaddr[sky2->port], Q_CSR),
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07001205 (sky2->flags & SKY2_FLAG_RX_CHECKSUM)
1206 ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001207}
1208
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001209/* Enable/disable receive hash calculation (RSS) */
1210static void rx_set_rss(struct net_device *dev)
1211{
1212 struct sky2_port *sky2 = netdev_priv(dev);
1213 struct sky2_hw *hw = sky2->hw;
1214 int i, nkeys = 4;
1215
1216 /* Supports IPv6 and other modes */
1217 if (hw->flags & SKY2_HW_NEW_LE) {
1218 nkeys = 10;
1219 sky2_write32(hw, SK_REG(sky2->port, RSS_CFG), HASH_ALL);
1220 }
1221
1222 /* Program RSS initial values */
1223 if (dev->features & NETIF_F_RXHASH) {
1224 u32 key[nkeys];
1225
1226 get_random_bytes(key, nkeys * sizeof(u32));
1227 for (i = 0; i < nkeys; i++)
1228 sky2_write32(hw, SK_REG(sky2->port, RSS_KEY + i * 4),
1229 key[i]);
1230
1231 /* Need to turn on (undocumented) flag to make hashing work */
1232 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T),
1233 RX_STFW_ENA);
1234
1235 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1236 BMU_ENA_RX_RSS_HASH);
1237 } else
1238 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1239 BMU_DIS_RX_RSS_HASH);
1240}
1241
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001242/*
1243 * The RX Stop command will not work for Yukon-2 if the BMU does not
1244 * reach the end of packet and since we can't make sure that we have
1245 * incoming data, we must reset the BMU while it is not doing a DMA
1246 * transfer. Since it is possible that the RX path is still active,
1247 * the RX RAM buffer will be stopped first, so any possible incoming
1248 * data will not trigger a DMA. After the RAM buffer is stopped, the
1249 * BMU is polled until any DMA in progress is ended and only then it
1250 * will be reset.
1251 */
1252static void sky2_rx_stop(struct sky2_port *sky2)
1253{
1254 struct sky2_hw *hw = sky2->hw;
1255 unsigned rxq = rxqaddr[sky2->port];
1256 int i;
1257
1258 /* disable the RAM Buffer receive queue */
1259 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);
1260
1261 for (i = 0; i < 0xffff; i++)
1262 if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL))
1263 == sky2_read8(hw, RB_ADDR(rxq, Q_RL)))
1264 goto stopped;
1265
Joe Perchesada1db52010-02-17 15:01:59 +00001266 netdev_warn(sky2->netdev, "receiver stop failed\n");
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001267stopped:
1268 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);
1269
1270 /* reset the Rx prefetch unit */
1271 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
Stephen Hemminger3d1454dd2009-07-16 13:20:57 +00001272 mmiowb();
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001273}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001274
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001275/* Clean out receive buffer area, assumes receiver hardware stopped */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001276static void sky2_rx_clean(struct sky2_port *sky2)
1277{
1278 unsigned i;
1279
1280 memset(sky2->rx_le, 0, RX_LE_BYTES);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001281 for (i = 0; i < sky2->rx_pending; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001282 struct rx_ring_info *re = sky2->rx_ring + i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001283
1284 if (re->skb) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07001285 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001286 kfree_skb(re->skb);
1287 re->skb = NULL;
1288 }
1289 }
1290}
1291
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001292/* Basic MII support */
1293static int sky2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1294{
1295 struct mii_ioctl_data *data = if_mii(ifr);
1296 struct sky2_port *sky2 = netdev_priv(dev);
1297 struct sky2_hw *hw = sky2->hw;
1298 int err = -EOPNOTSUPP;
1299
1300 if (!netif_running(dev))
1301 return -ENODEV; /* Phy still in reset */
1302
Stephen Hemmingerd89e1342006-03-20 15:48:20 -08001303 switch (cmd) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001304 case SIOCGMIIPHY:
1305 data->phy_id = PHY_ADDR_MARV;
1306
1307 /* fallthru */
1308 case SIOCGMIIREG: {
1309 u16 val = 0;
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001310
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001311 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001312 err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001313 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001314
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001315 data->val_out = val;
1316 break;
1317 }
1318
1319 case SIOCSMIIREG:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001320 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001321 err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f,
1322 data->val_in);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001323 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001324 break;
1325 }
1326 return err;
1327}
1328
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001329#ifdef SKY2_VLAN_TAG_USED
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001330static void sky2_set_vlan_mode(struct sky2_hw *hw, u16 port, bool onoff)
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001331{
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001332 if (onoff) {
Stephen Hemminger3d4e66f2007-06-01 09:43:58 -07001333 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1334 RX_VLAN_STRIP_ON);
1335 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1336 TX_VLAN_TAG_ON);
1337 } else {
1338 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1339 RX_VLAN_STRIP_OFF);
1340 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1341 TX_VLAN_TAG_OFF);
1342 }
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001343}
1344
1345static void sky2_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
1346{
1347 struct sky2_port *sky2 = netdev_priv(dev);
1348 struct sky2_hw *hw = sky2->hw;
1349 u16 port = sky2->port;
1350
1351 netif_tx_lock_bh(dev);
1352 napi_disable(&hw->napi);
1353
1354 sky2->vlgrp = grp;
1355 sky2_set_vlan_mode(hw, port, grp != NULL);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001356
David S. Millerd1d08d12008-01-07 20:53:33 -08001357 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001358 napi_enable(&hw->napi);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001359 netif_tx_unlock_bh(dev);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001360}
1361#endif
1362
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001363/* Amount of required worst case padding in rx buffer */
1364static inline unsigned sky2_rx_pad(const struct sky2_hw *hw)
1365{
1366 return (hw->flags & SKY2_HW_RAM_BUFFER) ? 8 : 2;
1367}
1368
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001369/*
Stephen Hemminger14d02632006-09-26 11:57:43 -07001370 * Allocate an skb for receiving. If the MTU is large enough
1371 * make the skb non-linear with a fragment list of pages.
Stephen Hemminger82788c72006-01-17 13:43:10 -08001372 */
Stephen Hemminger14d02632006-09-26 11:57:43 -07001373static struct sk_buff *sky2_rx_alloc(struct sky2_port *sky2)
Stephen Hemminger82788c72006-01-17 13:43:10 -08001374{
1375 struct sk_buff *skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001376 int i;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001377
Stephen Hemminger724b6942009-08-18 15:17:10 +00001378 skb = netdev_alloc_skb(sky2->netdev,
1379 sky2->rx_data_size + sky2_rx_pad(sky2->hw));
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001380 if (!skb)
1381 goto nomem;
1382
Stephen Hemminger39dbd952008-02-04 19:45:13 -08001383 if (sky2->hw->flags & SKY2_HW_RAM_BUFFER) {
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001384 unsigned char *start;
1385 /*
1386 * Workaround for a bug in FIFO that cause hang
1387 * if the FIFO if the receive buffer is not 64 byte aligned.
1388 * The buffer returned from netdev_alloc_skb is
1389 * aligned except if slab debugging is enabled.
1390 */
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001391 start = PTR_ALIGN(skb->data, 8);
1392 skb_reserve(skb, start - skb->data);
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001393 } else
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001394 skb_reserve(skb, NET_IP_ALIGN);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001395
1396 for (i = 0; i < sky2->rx_nfrags; i++) {
1397 struct page *page = alloc_page(GFP_ATOMIC);
1398
1399 if (!page)
1400 goto free_partial;
1401 skb_fill_page_desc(skb, i, page, 0, PAGE_SIZE);
Stephen Hemminger82788c72006-01-17 13:43:10 -08001402 }
1403
1404 return skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001405free_partial:
1406 kfree_skb(skb);
1407nomem:
1408 return NULL;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001409}
1410
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001411static inline void sky2_rx_update(struct sky2_port *sky2, unsigned rxq)
1412{
1413 sky2_put_idx(sky2->hw, rxq, sky2->rx_put);
1414}
1415
Mike McCormack200ac492010-02-12 06:58:03 +00001416static int sky2_alloc_rx_skbs(struct sky2_port *sky2)
1417{
1418 struct sky2_hw *hw = sky2->hw;
1419 unsigned i;
1420
1421 sky2->rx_data_size = sky2_get_rx_data_size(sky2);
1422
1423 /* Fill Rx ring */
1424 for (i = 0; i < sky2->rx_pending; i++) {
1425 struct rx_ring_info *re = sky2->rx_ring + i;
1426
1427 re->skb = sky2_rx_alloc(sky2);
1428 if (!re->skb)
1429 return -ENOMEM;
1430
1431 if (sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size)) {
1432 dev_kfree_skb(re->skb);
1433 re->skb = NULL;
1434 return -ENOMEM;
1435 }
1436 }
1437 return 0;
1438}
1439
Stephen Hemminger82788c72006-01-17 13:43:10 -08001440/*
Mike McCormack200ac492010-02-12 06:58:03 +00001441 * Setup receiver buffer pool.
Stephen Hemminger14d02632006-09-26 11:57:43 -07001442 * Normal case this ends up creating one list element for skb
1443 * in the receive ring. Worst case if using large MTU and each
1444 * allocation falls on a different 64 bit region, that results
1445 * in 6 list elements per ring entry.
1446 * One element is used for checksum enable/disable, and one
1447 * extra to avoid wrap.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001448 */
Mike McCormack200ac492010-02-12 06:58:03 +00001449static void sky2_rx_start(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001450{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001451 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001452 struct rx_ring_info *re;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001453 unsigned rxq = rxqaddr[sky2->port];
Mike McCormack39ef1102010-02-12 06:58:02 +00001454 unsigned i, thresh;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001455
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001456 sky2->rx_put = sky2->rx_next = 0;
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001457 sky2_qset(hw, rxq);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001458
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001459 /* On PCI express lowering the watermark gives better performance */
1460 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
1461 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
1462
1463 /* These chips have no ram buffer?
1464 * MAC Rx RAM Read is controlled by hardware */
Stephen Hemminger8df9a872006-12-01 14:29:35 -08001465 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
stephen hemmingerc1cd0a82010-03-29 07:36:18 +00001466 hw->chip_rev > CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerf449c7c2007-06-04 17:23:23 -07001467 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001468
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001469 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
1470
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001471 if (!(hw->flags & SKY2_HW_NEW_LE))
1472 rx_set_checksum(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001473
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001474 if (!(hw->flags & SKY2_HW_RSS_BROKEN))
1475 rx_set_rss(sky2->netdev);
1476
Mike McCormack200ac492010-02-12 06:58:03 +00001477 /* submit Rx ring */
Stephen Hemminger14d02632006-09-26 11:57:43 -07001478 for (i = 0; i < sky2->rx_pending; i++) {
1479 re = sky2->rx_ring + i;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001480 sky2_rx_submit(sky2, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001481 }
1482
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001483 /*
1484 * The receiver hangs if it receives frames larger than the
1485 * packet buffer. As a workaround, truncate oversize frames, but
1486 * the register is limited to 9 bits, so if you do frames > 2052
1487 * you better get the MTU right!
1488 */
Mike McCormack39ef1102010-02-12 06:58:02 +00001489 thresh = sky2_get_rx_threshold(sky2);
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001490 if (thresh > 0x1ff)
1491 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF);
1492 else {
1493 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh);
1494 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON);
1495 }
1496
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001497 /* Tell chip about available buffers */
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001498 sky2_rx_update(sky2, rxq);
Stephen Hemminger877c8572009-10-29 06:37:08 +00001499
1500 if (hw->chip_id == CHIP_ID_YUKON_EX ||
1501 hw->chip_id == CHIP_ID_YUKON_SUPR) {
1502 /*
1503 * Disable flushing of non ASF packets;
1504 * must be done after initializing the BMUs;
1505 * drivers without ASF support should do this too, otherwise
1506 * it may happen that they cannot run on ASF devices;
1507 * remember that the MAC FIFO isn't reset during initialization.
1508 */
1509 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_MACSEC_FLUSH_OFF);
1510 }
1511
1512 if (hw->chip_id >= CHIP_ID_YUKON_SUPR) {
1513 /* Enable RX Home Address & Routing Header checksum fix */
1514 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_FL_CTRL),
1515 RX_IPV6_SA_MOB_ENA | RX_IPV6_DA_MOB_ENA);
1516
1517 /* Enable TX Home Address & Routing Header checksum fix */
1518 sky2_write32(hw, Q_ADDR(txqaddr[sky2->port], Q_TEST),
1519 TBMU_TEST_HOME_ADD_FIX_EN | TBMU_TEST_ROUTING_ADD_FIX_EN);
1520 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001521}
1522
Mike McCormack90bbebb2009-09-01 03:21:35 +00001523static int sky2_alloc_buffers(struct sky2_port *sky2)
1524{
1525 struct sky2_hw *hw = sky2->hw;
1526
1527 /* must be power of 2 */
1528 sky2->tx_le = pci_alloc_consistent(hw->pdev,
1529 sky2->tx_ring_size *
1530 sizeof(struct sky2_tx_le),
1531 &sky2->tx_le_map);
1532 if (!sky2->tx_le)
1533 goto nomem;
1534
1535 sky2->tx_ring = kcalloc(sky2->tx_ring_size, sizeof(struct tx_ring_info),
1536 GFP_KERNEL);
1537 if (!sky2->tx_ring)
1538 goto nomem;
1539
1540 sky2->rx_le = pci_alloc_consistent(hw->pdev, RX_LE_BYTES,
1541 &sky2->rx_le_map);
1542 if (!sky2->rx_le)
1543 goto nomem;
1544 memset(sky2->rx_le, 0, RX_LE_BYTES);
1545
1546 sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct rx_ring_info),
1547 GFP_KERNEL);
1548 if (!sky2->rx_ring)
1549 goto nomem;
1550
Mike McCormack200ac492010-02-12 06:58:03 +00001551 return sky2_alloc_rx_skbs(sky2);
Mike McCormack90bbebb2009-09-01 03:21:35 +00001552nomem:
1553 return -ENOMEM;
1554}
1555
1556static void sky2_free_buffers(struct sky2_port *sky2)
1557{
1558 struct sky2_hw *hw = sky2->hw;
1559
Mike McCormack200ac492010-02-12 06:58:03 +00001560 sky2_rx_clean(sky2);
1561
Mike McCormack90bbebb2009-09-01 03:21:35 +00001562 if (sky2->rx_le) {
1563 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1564 sky2->rx_le, sky2->rx_le_map);
1565 sky2->rx_le = NULL;
1566 }
1567 if (sky2->tx_le) {
1568 pci_free_consistent(hw->pdev,
1569 sky2->tx_ring_size * sizeof(struct sky2_tx_le),
1570 sky2->tx_le, sky2->tx_le_map);
1571 sky2->tx_le = NULL;
1572 }
1573 kfree(sky2->tx_ring);
1574 kfree(sky2->rx_ring);
1575
1576 sky2->tx_ring = NULL;
1577 sky2->rx_ring = NULL;
1578}
1579
Mike McCormackea0f71e2010-02-12 06:58:04 +00001580static void sky2_hw_up(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001581{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001582 struct sky2_hw *hw = sky2->hw;
1583 unsigned port = sky2->port;
Mike McCormackea0f71e2010-02-12 06:58:04 +00001584 u32 ramsize;
1585 int cap;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001586 struct net_device *otherdev = hw->dev[sky2->port^1];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001587
Mike McCormackea0f71e2010-02-12 06:58:04 +00001588 tx_init(sky2);
1589
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001590 /*
1591 * On dual port PCI-X card, there is an problem where status
1592 * can be received out of order due to split transactions
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001593 */
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001594 if (otherdev && netif_running(otherdev) &&
1595 (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) {
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001596 u16 cmd;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001597
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001598 cmd = sky2_pci_read16(hw, cap + PCI_X_CMD);
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001599 cmd &= ~PCI_X_CMD_MAX_SPLIT;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001600 sky2_pci_write16(hw, cap + PCI_X_CMD, cmd);
Mike McCormackea0f71e2010-02-12 06:58:04 +00001601 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001602
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001603 sky2_mac_init(hw, port);
1604
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001605 /* Register is number of 4K blocks on internal RAM buffer. */
1606 ramsize = sky2_read8(hw, B2_E_0) * 4;
1607 if (ramsize > 0) {
Stephen Hemminger67712902006-12-04 15:53:45 -08001608 u32 rxspace;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001609
Joe Perchesada1db52010-02-17 15:01:59 +00001610 netdev_dbg(sky2->netdev, "ram buffer %dK\n", ramsize);
Stephen Hemminger67712902006-12-04 15:53:45 -08001611 if (ramsize < 16)
1612 rxspace = ramsize / 2;
1613 else
1614 rxspace = 8 + (2*(ramsize - 16))/3;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001615
Stephen Hemminger67712902006-12-04 15:53:45 -08001616 sky2_ramset(hw, rxqaddr[port], 0, rxspace);
1617 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
1618
1619 /* Make sure SyncQ is disabled */
1620 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
1621 RB_RST_SET);
1622 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001623
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001624 sky2_qset(hw, txqaddr[port]);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001625
Stephen Hemminger69161612007-06-04 17:23:26 -07001626 /* This is copied from sk98lin 10.0.5.3; no one tells me about erratta's */
1627 if (hw->chip_id == CHIP_ID_YUKON_EX && hw->chip_rev == CHIP_REV_YU_EX_B0)
1628 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF);
1629
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001630 /* Set almost empty threshold */
Joe Perches8e95a202009-12-03 07:58:21 +00001631 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
1632 hw->chip_rev == CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07001633 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001634
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001635 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001636 sky2->tx_ring_size - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001637
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001638#ifdef SKY2_VLAN_TAG_USED
1639 sky2_set_vlan_mode(hw, port, sky2->vlgrp != NULL);
1640#endif
1641
Mike McCormack200ac492010-02-12 06:58:03 +00001642 sky2_rx_start(sky2);
Mike McCormackea0f71e2010-02-12 06:58:04 +00001643}
1644
1645/* Bring up network interface. */
1646static int sky2_up(struct net_device *dev)
1647{
1648 struct sky2_port *sky2 = netdev_priv(dev);
1649 struct sky2_hw *hw = sky2->hw;
1650 unsigned port = sky2->port;
1651 u32 imask;
1652 int err;
1653
1654 netif_carrier_off(dev);
1655
1656 err = sky2_alloc_buffers(sky2);
1657 if (err)
1658 goto err_out;
1659
1660 sky2_hw_up(sky2);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001661
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001662 /* Enable interrupts from phy/mac for port */
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001663 imask = sky2_read32(hw, B0_IMSK);
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -07001664 imask |= portirq_msk[port];
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001665 sky2_write32(hw, B0_IMSK, imask);
Stephen Hemminger1fd82f32009-06-17 07:30:34 +00001666 sky2_read32(hw, B0_IMSK);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001667
Joe Perches6c35aba2010-02-15 08:34:21 +00001668 netif_info(sky2, ifup, dev, "enabling interface\n");
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07001669
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001670 return 0;
1671
1672err_out:
Mike McCormack90bbebb2009-09-01 03:21:35 +00001673 sky2_free_buffers(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001674 return err;
1675}
1676
Stephen Hemminger793b8832005-09-14 16:06:14 -07001677/* Modular subtraction in ring */
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001678static inline int tx_inuse(const struct sky2_port *sky2)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001679{
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001680 return (sky2->tx_prod - sky2->tx_cons) & (sky2->tx_ring_size - 1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001681}
1682
1683/* Number of list elements available for next tx */
1684static inline int tx_avail(const struct sky2_port *sky2)
1685{
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001686 return sky2->tx_pending - tx_inuse(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001687}
1688
1689/* Estimate of number of transmit list elements required */
Stephen Hemminger28bd1812006-01-17 13:43:19 -08001690static unsigned tx_le_req(const struct sk_buff *skb)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001691{
1692 unsigned count;
1693
Stephen Hemminger07e31632009-09-14 06:12:55 +00001694 count = (skb_shinfo(skb)->nr_frags + 1)
1695 * (sizeof(dma_addr_t) / sizeof(u32));
Stephen Hemminger793b8832005-09-14 16:06:14 -07001696
Herbert Xu89114af2006-07-08 13:34:32 -07001697 if (skb_is_gso(skb))
Stephen Hemminger793b8832005-09-14 16:06:14 -07001698 ++count;
Stephen Hemminger07e31632009-09-14 06:12:55 +00001699 else if (sizeof(dma_addr_t) == sizeof(u32))
1700 ++count; /* possible vlan */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001701
Patrick McHardy84fa7932006-08-29 16:44:56 -07001702 if (skb->ip_summed == CHECKSUM_PARTIAL)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001703 ++count;
1704
1705 return count;
1706}
1707
stephen hemmingerf6815072010-02-01 13:41:47 +00001708static void sky2_tx_unmap(struct pci_dev *pdev, struct tx_ring_info *re)
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001709{
1710 if (re->flags & TX_MAP_SINGLE)
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001711 pci_unmap_single(pdev, dma_unmap_addr(re, mapaddr),
1712 dma_unmap_len(re, maplen),
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001713 PCI_DMA_TODEVICE);
1714 else if (re->flags & TX_MAP_PAGE)
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001715 pci_unmap_page(pdev, dma_unmap_addr(re, mapaddr),
1716 dma_unmap_len(re, maplen),
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001717 PCI_DMA_TODEVICE);
stephen hemmingerf6815072010-02-01 13:41:47 +00001718 re->flags = 0;
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001719}
1720
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001721/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001722 * Put one packet in ring for transmit.
1723 * A single packet can generate multiple list elements, and
1724 * the number of ring elements will probably be less than the number
1725 * of list elements used.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001726 */
Stephen Hemminger613573252009-08-31 19:50:58 +00001727static netdev_tx_t sky2_xmit_frame(struct sk_buff *skb,
1728 struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001729{
1730 struct sky2_port *sky2 = netdev_priv(dev);
1731 struct sky2_hw *hw = sky2->hw;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001732 struct sky2_tx_le *le = NULL;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001733 struct tx_ring_info *re;
Mike McCormack9b289c32009-08-14 05:15:12 +00001734 unsigned i, len;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001735 dma_addr_t mapping;
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001736 u32 upper;
1737 u16 slot;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001738 u16 mss;
1739 u8 ctrl;
1740
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001741 if (unlikely(tx_avail(sky2) < tx_le_req(skb)))
1742 return NETDEV_TX_BUSY;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001743
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001744 len = skb_headlen(skb);
1745 mapping = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001746
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001747 if (pci_dma_mapping_error(hw->pdev, mapping))
1748 goto mapping_error;
1749
Mike McCormack9b289c32009-08-14 05:15:12 +00001750 slot = sky2->tx_prod;
Joe Perches6c35aba2010-02-15 08:34:21 +00001751 netif_printk(sky2, tx_queued, KERN_DEBUG, dev,
1752 "tx queued, slot %u, len %d\n", slot, skb->len);
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001753
Stephen Hemminger86c68872008-01-10 16:14:12 -08001754 /* Send high bits if needed */
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001755 upper = upper_32_bits(mapping);
1756 if (upper != sky2->tx_last_upper) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001757 le = get_tx_le(sky2, &slot);
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001758 le->addr = cpu_to_le32(upper);
1759 sky2->tx_last_upper = upper;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001760 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001761 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001762
1763 /* Check for TCP Segmentation Offload */
Herbert Xu79671682006-06-22 02:40:14 -07001764 mss = skb_shinfo(skb)->gso_size;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001765 if (mss != 0) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001766
1767 if (!(hw->flags & SKY2_HW_NEW_LE))
Stephen Hemminger69161612007-06-04 17:23:26 -07001768 mss += ETH_HLEN + ip_hdrlen(skb) + tcp_hdrlen(skb);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001769
Stephen Hemminger69161612007-06-04 17:23:26 -07001770 if (mss != sky2->tx_last_mss) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001771 le = get_tx_le(sky2, &slot);
Stephen Hemminger69161612007-06-04 17:23:26 -07001772 le->addr = cpu_to_le32(mss);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001773
1774 if (hw->flags & SKY2_HW_NEW_LE)
Stephen Hemminger69161612007-06-04 17:23:26 -07001775 le->opcode = OP_MSS | HW_OWNER;
1776 else
1777 le->opcode = OP_LRGLEN | HW_OWNER;
shemminger@osdl.orge07560c2006-08-28 10:00:49 -07001778 sky2->tx_last_mss = mss;
1779 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001780 }
1781
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001782 ctrl = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001783#ifdef SKY2_VLAN_TAG_USED
1784 /* Add VLAN tag, can piggyback on LRGLEN or ADDR64 */
1785 if (sky2->vlgrp && vlan_tx_tag_present(skb)) {
1786 if (!le) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001787 le = get_tx_le(sky2, &slot);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001788 le->addr = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001789 le->opcode = OP_VLAN|HW_OWNER;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001790 } else
1791 le->opcode |= OP_VLAN;
1792 le->length = cpu_to_be16(vlan_tx_tag_get(skb));
1793 ctrl |= INS_VLAN;
1794 }
1795#endif
1796
1797 /* Handle TCP checksum offload */
Patrick McHardy84fa7932006-08-29 16:44:56 -07001798 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Stephen Hemminger69161612007-06-04 17:23:26 -07001799 /* On Yukon EX (some versions) encoding change. */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001800 if (hw->flags & SKY2_HW_AUTO_TX_SUM)
Stephen Hemminger69161612007-06-04 17:23:26 -07001801 ctrl |= CALSUM; /* auto checksum */
1802 else {
1803 const unsigned offset = skb_transport_offset(skb);
1804 u32 tcpsum;
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001805
Stephen Hemminger69161612007-06-04 17:23:26 -07001806 tcpsum = offset << 16; /* sum start */
1807 tcpsum |= offset + skb->csum_offset; /* sum write */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001808
Stephen Hemminger69161612007-06-04 17:23:26 -07001809 ctrl |= CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
1810 if (ip_hdr(skb)->protocol == IPPROTO_UDP)
1811 ctrl |= UDPTCP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001812
Stephen Hemminger69161612007-06-04 17:23:26 -07001813 if (tcpsum != sky2->tx_tcpsum) {
1814 sky2->tx_tcpsum = tcpsum;
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001815
Mike McCormack9b289c32009-08-14 05:15:12 +00001816 le = get_tx_le(sky2, &slot);
Stephen Hemminger69161612007-06-04 17:23:26 -07001817 le->addr = cpu_to_le32(tcpsum);
1818 le->length = 0; /* initial checksum value */
1819 le->ctrl = 1; /* one packet */
1820 le->opcode = OP_TCPLISW | HW_OWNER;
1821 }
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001822 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001823 }
1824
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001825 re = sky2->tx_ring + slot;
1826 re->flags = TX_MAP_SINGLE;
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001827 dma_unmap_addr_set(re, mapaddr, mapping);
1828 dma_unmap_len_set(re, maplen, len);
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001829
Mike McCormack9b289c32009-08-14 05:15:12 +00001830 le = get_tx_le(sky2, &slot);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001831 le->addr = cpu_to_le32(lower_32_bits(mapping));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001832 le->length = cpu_to_le16(len);
1833 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001834 le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001835
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001836
1837 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001838 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001839
1840 mapping = pci_map_page(hw->pdev, frag->page, frag->page_offset,
1841 frag->size, PCI_DMA_TODEVICE);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001842
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001843 if (pci_dma_mapping_error(hw->pdev, mapping))
1844 goto mapping_unwind;
1845
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001846 upper = upper_32_bits(mapping);
1847 if (upper != sky2->tx_last_upper) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001848 le = get_tx_le(sky2, &slot);
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001849 le->addr = cpu_to_le32(upper);
1850 sky2->tx_last_upper = upper;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001851 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001852 }
1853
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001854 re = sky2->tx_ring + slot;
1855 re->flags = TX_MAP_PAGE;
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001856 dma_unmap_addr_set(re, mapaddr, mapping);
1857 dma_unmap_len_set(re, maplen, frag->size);
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001858
Mike McCormack9b289c32009-08-14 05:15:12 +00001859 le = get_tx_le(sky2, &slot);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001860 le->addr = cpu_to_le32(lower_32_bits(mapping));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001861 le->length = cpu_to_le16(frag->size);
1862 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001863 le->opcode = OP_BUFFER | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001864 }
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001865
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001866 re->skb = skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001867 le->ctrl |= EOP;
1868
Mike McCormack9b289c32009-08-14 05:15:12 +00001869 sky2->tx_prod = slot;
1870
shemminger@osdl.org97bda702006-08-28 10:00:47 -07001871 if (tx_avail(sky2) <= MAX_SKB_TX_LE)
1872 netif_stop_queue(dev);
Stephen Hemmingerb19666d2006-03-07 11:06:36 -08001873
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001874 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001875
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001876 return NETDEV_TX_OK;
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001877
1878mapping_unwind:
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001879 for (i = sky2->tx_prod; i != slot; i = RING_NEXT(i, sky2->tx_ring_size)) {
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001880 re = sky2->tx_ring + i;
1881
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001882 sky2_tx_unmap(hw->pdev, re);
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001883 }
1884
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001885mapping_error:
1886 if (net_ratelimit())
1887 dev_warn(&hw->pdev->dev, "%s: tx mapping error\n", dev->name);
1888 dev_kfree_skb(skb);
1889 return NETDEV_TX_OK;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001890}
1891
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001892/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001893 * Free ring elements from starting at tx_cons until "done"
1894 *
Stephen Hemminger481cea42009-08-14 15:33:19 -07001895 * NB:
1896 * 1. The hardware will tell us about partial completion of multi-part
Stephen Hemminger291ea612006-09-26 11:57:41 -07001897 * buffers so make sure not to free skb to early.
Stephen Hemminger481cea42009-08-14 15:33:19 -07001898 * 2. This may run in parallel start_xmit because the it only
1899 * looks at the tail of the queue of FIFO (tx_cons), not
1900 * the head (tx_prod)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001901 */
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001902static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001903{
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001904 struct net_device *dev = sky2->netdev;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001905 unsigned idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001906
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001907 BUG_ON(done >= sky2->tx_ring_size);
shemminger@osdl.org22247952005-11-30 11:45:19 -08001908
Stephen Hemminger291ea612006-09-26 11:57:41 -07001909 for (idx = sky2->tx_cons; idx != done;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001910 idx = RING_NEXT(idx, sky2->tx_ring_size)) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001911 struct tx_ring_info *re = sky2->tx_ring + idx;
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001912 struct sk_buff *skb = re->skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001913
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001914 sky2_tx_unmap(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001915
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001916 if (skb) {
Joe Perches6c35aba2010-02-15 08:34:21 +00001917 netif_printk(sky2, tx_done, KERN_DEBUG, dev,
1918 "tx done %u\n", idx);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001919
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07001920 dev->stats.tx_packets++;
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001921 dev->stats.tx_bytes += skb->len;
shemminger@linux-foundation.org2bf56fe2007-01-26 11:38:39 -08001922
stephen hemmingerf6815072010-02-01 13:41:47 +00001923 re->skb = NULL;
Stephen Hemminger724b6942009-08-18 15:17:10 +00001924 dev_kfree_skb_any(skb);
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001925
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001926 sky2->tx_next = RING_NEXT(idx, sky2->tx_ring_size);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001927 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001928 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001929
Stephen Hemminger291ea612006-09-26 11:57:41 -07001930 sky2->tx_cons = idx;
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001931 smp_mb();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001932}
1933
Mike McCormack264bb4f2009-08-14 05:15:14 +00001934static void sky2_tx_reset(struct sky2_hw *hw, unsigned port)
Mike McCormacka5109962009-08-14 05:15:13 +00001935{
Mike McCormacka5109962009-08-14 05:15:13 +00001936 /* Disable Force Sync bit and Enable Alloc bit */
1937 sky2_write8(hw, SK_REG(port, TXA_CTRL),
1938 TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
1939
1940 /* Stop Interval Timer and Limit Counter of Tx Arbiter */
1941 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);
1942 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);
1943
1944 /* Reset the PCI FIFO of the async Tx queue */
1945 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
1946 BMU_RST_SET | BMU_FIFO_RST);
1947
1948 /* Reset the Tx prefetch units */
1949 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL),
1950 PREF_UNIT_RST_SET);
1951
1952 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
1953 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
1954}
1955
Mike McCormackf2b31cb2010-02-12 06:58:05 +00001956static void sky2_hw_down(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001957{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001958 struct sky2_hw *hw = sky2->hw;
1959 unsigned port = sky2->port;
Mike McCormackf2b31cb2010-02-12 06:58:05 +00001960 u16 ctrl;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001961
Stephen Hemmingerd104aca2009-06-17 07:30:32 +00001962 /* Force flow control off */
1963 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001964
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001965 /* Stop transmitter */
1966 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
1967 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));
1968
1969 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
Stephen Hemminger793b8832005-09-14 16:06:14 -07001970 RB_RST_SET | RB_DIS_OP_MD);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001971
1972 ctrl = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001973 ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001974 gma_write16(hw, port, GM_GP_CTRL, ctrl);
1975
1976 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
1977
1978 /* Workaround shared GMAC reset */
Joe Perches8e95a202009-12-03 07:58:21 +00001979 if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 &&
1980 port == 0 && hw->dev[1] && netif_running(hw->dev[1])))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001981 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
1982
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001983 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001984
Stephen Hemminger6c835042009-06-17 07:30:35 +00001985 /* Force any delayed status interrrupt and NAPI */
1986 sky2_write32(hw, STAT_LEV_TIMER_CNT, 0);
1987 sky2_write32(hw, STAT_TX_TIMER_CNT, 0);
1988 sky2_write32(hw, STAT_ISR_TIMER_CNT, 0);
1989 sky2_read8(hw, STAT_ISR_TIMER_CTRL);
1990
Mike McCormacka947a392009-07-21 20:57:56 -07001991 sky2_rx_stop(sky2);
1992
Stephen Hemminger0da6d7b2009-08-14 05:15:15 +00001993 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -07001994 sky2_phy_power_down(hw, port);
Stephen Hemminger0da6d7b2009-08-14 05:15:15 +00001995 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001996
Mike McCormack264bb4f2009-08-14 05:15:14 +00001997 sky2_tx_reset(hw, port);
1998
Stephen Hemminger481cea42009-08-14 15:33:19 -07001999 /* Free any pending frames stuck in HW queue */
2000 sky2_tx_complete(sky2, sky2->tx_prod);
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002001}
2002
2003/* Network shutdown */
2004static int sky2_down(struct net_device *dev)
2005{
2006 struct sky2_port *sky2 = netdev_priv(dev);
Mike McCormack8a0c9222010-02-12 06:58:06 +00002007 struct sky2_hw *hw = sky2->hw;
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002008
2009 /* Never really got started! */
2010 if (!sky2->tx_le)
2011 return 0;
2012
Joe Perches6c35aba2010-02-15 08:34:21 +00002013 netif_info(sky2, ifdown, dev, "disabling interface\n");
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002014
Mike McCormack8a0c9222010-02-12 06:58:06 +00002015 /* Disable port IRQ */
2016 sky2_write32(hw, B0_IMSK,
2017 sky2_read32(hw, B0_IMSK) & ~portirq_msk[sky2->port]);
2018 sky2_read32(hw, B0_IMSK);
2019
2020 synchronize_irq(hw->pdev->irq);
2021 napi_synchronize(&hw->napi);
2022
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002023 sky2_hw_down(sky2);
Stephen Hemminger481cea42009-08-14 15:33:19 -07002024
Mike McCormack90bbebb2009-09-01 03:21:35 +00002025 sky2_free_buffers(sky2);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002026
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002027 return 0;
2028}
2029
2030static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux)
2031{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002032 if (hw->flags & SKY2_HW_FIBRE_PHY)
Stephen Hemminger793b8832005-09-14 16:06:14 -07002033 return SPEED_1000;
2034
Stephen Hemminger05745c42007-09-19 15:36:45 -07002035 if (!(hw->flags & SKY2_HW_GIGABIT)) {
2036 if (aux & PHY_M_PS_SPEED_100)
2037 return SPEED_100;
2038 else
2039 return SPEED_10;
2040 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002041
2042 switch (aux & PHY_M_PS_SPEED_MSK) {
2043 case PHY_M_PS_SPEED_1000:
2044 return SPEED_1000;
2045 case PHY_M_PS_SPEED_100:
2046 return SPEED_100;
2047 default:
2048 return SPEED_10;
2049 }
2050}
2051
2052static void sky2_link_up(struct sky2_port *sky2)
2053{
2054 struct sky2_hw *hw = sky2->hw;
2055 unsigned port = sky2->port;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002056 static const char *fc_name[] = {
2057 [FC_NONE] = "none",
2058 [FC_TX] = "tx",
2059 [FC_RX] = "rx",
2060 [FC_BOTH] = "both",
2061 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002062
Brandon Philips38000a92010-06-16 16:21:58 +00002063 sky2_enable_rx_tx(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002064
2065 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
2066
2067 netif_carrier_on(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002068
Stephen Hemminger75e80682007-09-19 15:36:46 -07002069 mod_timer(&hw->watchdog_timer, jiffies + 1);
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002070
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002071 /* Turn on link LED */
Stephen Hemminger793b8832005-09-14 16:06:14 -07002072 sky2_write8(hw, SK_REG(port, LNK_LED_REG),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002073 LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF);
2074
Joe Perches6c35aba2010-02-15 08:34:21 +00002075 netif_info(sky2, link, sky2->netdev,
2076 "Link is up at %d Mbps, %s duplex, flow control %s\n",
2077 sky2->speed,
2078 sky2->duplex == DUPLEX_FULL ? "full" : "half",
2079 fc_name[sky2->flow_status]);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002080}
2081
2082static void sky2_link_down(struct sky2_port *sky2)
2083{
2084 struct sky2_hw *hw = sky2->hw;
2085 unsigned port = sky2->port;
2086 u16 reg;
2087
2088 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
2089
2090 reg = gma_read16(hw, port, GM_GP_CTRL);
2091 reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
2092 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002093
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002094 netif_carrier_off(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002095
Brandon Philips809aaaa2009-10-29 17:01:49 -07002096 /* Turn off link LED */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002097 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);
2098
Joe Perches6c35aba2010-02-15 08:34:21 +00002099 netif_info(sky2, link, sky2->netdev, "Link is down\n");
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002100
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002101 sky2_phy_init(hw, port);
2102}
2103
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002104static enum flow_control sky2_flow(int rx, int tx)
2105{
2106 if (rx)
2107 return tx ? FC_BOTH : FC_RX;
2108 else
2109 return tx ? FC_TX : FC_NONE;
2110}
2111
Stephen Hemminger793b8832005-09-14 16:06:14 -07002112static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
2113{
2114 struct sky2_hw *hw = sky2->hw;
2115 unsigned port = sky2->port;
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002116 u16 advert, lpa;
Stephen Hemminger793b8832005-09-14 16:06:14 -07002117
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002118 advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002119 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002120 if (lpa & PHY_M_AN_RF) {
Joe Perchesada1db52010-02-17 15:01:59 +00002121 netdev_err(sky2->netdev, "remote fault\n");
Stephen Hemminger793b8832005-09-14 16:06:14 -07002122 return -1;
2123 }
2124
Stephen Hemminger793b8832005-09-14 16:06:14 -07002125 if (!(aux & PHY_M_PS_SPDUP_RES)) {
Joe Perchesada1db52010-02-17 15:01:59 +00002126 netdev_err(sky2->netdev, "speed/duplex mismatch\n");
Stephen Hemminger793b8832005-09-14 16:06:14 -07002127 return -1;
2128 }
2129
Stephen Hemminger793b8832005-09-14 16:06:14 -07002130 sky2->speed = sky2_phy_speed(hw, aux);
Stephen Hemminger7c74ac12006-10-17 10:24:08 -07002131 sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
Stephen Hemminger793b8832005-09-14 16:06:14 -07002132
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002133 /* Since the pause result bits seem to in different positions on
2134 * different chips. look at registers.
2135 */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002136 if (hw->flags & SKY2_HW_FIBRE_PHY) {
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002137 /* Shift for bits in fiber PHY */
2138 advert &= ~(ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM);
2139 lpa &= ~(LPA_PAUSE_CAP|LPA_PAUSE_ASYM);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002140
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002141 if (advert & ADVERTISE_1000XPAUSE)
2142 advert |= ADVERTISE_PAUSE_CAP;
2143 if (advert & ADVERTISE_1000XPSE_ASYM)
2144 advert |= ADVERTISE_PAUSE_ASYM;
2145 if (lpa & LPA_1000XPAUSE)
2146 lpa |= LPA_PAUSE_CAP;
2147 if (lpa & LPA_1000XPAUSE_ASYM)
2148 lpa |= LPA_PAUSE_ASYM;
2149 }
2150
2151 sky2->flow_status = FC_NONE;
2152 if (advert & ADVERTISE_PAUSE_CAP) {
2153 if (lpa & LPA_PAUSE_CAP)
2154 sky2->flow_status = FC_BOTH;
2155 else if (advert & ADVERTISE_PAUSE_ASYM)
2156 sky2->flow_status = FC_RX;
2157 } else if (advert & ADVERTISE_PAUSE_ASYM) {
2158 if ((lpa & LPA_PAUSE_CAP) && (lpa & LPA_PAUSE_ASYM))
2159 sky2->flow_status = FC_TX;
2160 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07002161
Joe Perches8e95a202009-12-03 07:58:21 +00002162 if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000 &&
2163 !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX))
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002164 sky2->flow_status = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002165
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002166 if (sky2->flow_status & FC_TX)
Stephen Hemminger793b8832005-09-14 16:06:14 -07002167 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
2168 else
2169 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
2170
2171 return 0;
2172}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002173
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002174/* Interrupt from PHY */
2175static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002176{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002177 struct net_device *dev = hw->dev[port];
2178 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002179 u16 istatus, phystat;
2180
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07002181 if (!netif_running(dev))
2182 return;
2183
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002184 spin_lock(&sky2->phy_lock);
2185 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT);
2186 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT);
2187
Joe Perches6c35aba2010-02-15 08:34:21 +00002188 netif_info(sky2, intr, sky2->netdev, "phy interrupt status 0x%x 0x%x\n",
2189 istatus, phystat);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002190
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07002191 if (istatus & PHY_M_IS_AN_COMPL) {
stephen hemminger9badba22010-03-29 07:36:20 +00002192 if (sky2_autoneg_done(sky2, phystat) == 0 &&
2193 !netif_carrier_ok(dev))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002194 sky2_link_up(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002195 goto out;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002196 }
2197
Stephen Hemminger793b8832005-09-14 16:06:14 -07002198 if (istatus & PHY_M_IS_LSP_CHANGE)
2199 sky2->speed = sky2_phy_speed(hw, phystat);
2200
2201 if (istatus & PHY_M_IS_DUP_CHANGE)
2202 sky2->duplex =
2203 (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
2204
2205 if (istatus & PHY_M_IS_LST_CHANGE) {
2206 if (phystat & PHY_M_PS_LINK_UP)
2207 sky2_link_up(sky2);
2208 else
2209 sky2_link_down(sky2);
2210 }
2211out:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002212 spin_unlock(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002213}
2214
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002215/* Special quick link interrupt (Yukon-2 Optima only) */
2216static void sky2_qlink_intr(struct sky2_hw *hw)
2217{
2218 struct sky2_port *sky2 = netdev_priv(hw->dev[0]);
2219 u32 imask;
2220 u16 phy;
2221
2222 /* disable irq */
2223 imask = sky2_read32(hw, B0_IMSK);
2224 imask &= ~Y2_IS_PHY_QLNK;
2225 sky2_write32(hw, B0_IMSK, imask);
2226
2227 /* reset PHY Link Detect */
2228 phy = sky2_pci_read16(hw, PSM_CONFIG_REG4);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002229 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002230 sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002231 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002232
2233 sky2_link_up(sky2);
2234}
2235
Stephen Hemminger62335ab2007-02-06 10:45:42 -08002236/* Transmit timeout is only called if we are running, carrier is up
Stephen Hemminger302d1252006-01-17 13:43:20 -08002237 * and tx queue is full (stopped).
2238 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002239static void sky2_tx_timeout(struct net_device *dev)
2240{
2241 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002242 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002243
Joe Perches6c35aba2010-02-15 08:34:21 +00002244 netif_err(sky2, timer, dev, "tx timeout\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002245
Joe Perchesada1db52010-02-17 15:01:59 +00002246 netdev_printk(KERN_DEBUG, dev, "transmit ring %u .. %u report=%u done=%u\n",
2247 sky2->tx_cons, sky2->tx_prod,
2248 sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
2249 sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE)));
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002250
Stephen Hemminger81906792007-02-15 16:40:33 -08002251 /* can't restart safely under softirq */
2252 schedule_work(&hw->restart_work);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002253}
2254
2255static int sky2_change_mtu(struct net_device *dev, int new_mtu)
2256{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002257 struct sky2_port *sky2 = netdev_priv(dev);
2258 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002259 unsigned port = sky2->port;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002260 int err;
2261 u16 ctl, mode;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002262 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002263
stephen hemminger44dde562010-02-12 06:58:01 +00002264 /* MTU size outside the spec */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002265 if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
2266 return -EINVAL;
2267
stephen hemminger44dde562010-02-12 06:58:01 +00002268 /* MTU > 1500 on yukon FE and FE+ not allowed */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002269 if (new_mtu > ETH_DATA_LEN &&
2270 (hw->chip_id == CHIP_ID_YUKON_FE ||
2271 hw->chip_id == CHIP_ID_YUKON_FE_P))
Stephen Hemmingerd2adf4f2007-04-11 14:48:02 -07002272 return -EINVAL;
2273
stephen hemminger44dde562010-02-12 06:58:01 +00002274 /* TSO, etc on Yukon Ultra and MTU > 1500 not supported */
2275 if (new_mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U)
2276 dev->features &= ~(NETIF_F_TSO|NETIF_F_SG|NETIF_F_ALL_CSUM);
2277
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002278 if (!netif_running(dev)) {
2279 dev->mtu = new_mtu;
2280 return 0;
2281 }
2282
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002283 imask = sky2_read32(hw, B0_IMSK);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002284 sky2_write32(hw, B0_IMSK, 0);
2285
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002286 dev->trans_start = jiffies; /* prevent tx timeout */
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002287 napi_disable(&hw->napi);
Mike McCormackdf010932010-05-13 06:12:49 +00002288 netif_tx_disable(dev);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002289
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002290 synchronize_irq(hw->pdev->irq);
2291
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002292 if (!(hw->flags & SKY2_HW_RAM_BUFFER))
Stephen Hemminger69161612007-06-04 17:23:26 -07002293 sky2_set_tx_stfwd(hw, port);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002294
2295 ctl = gma_read16(hw, port, GM_GP_CTRL);
2296 gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002297 sky2_rx_stop(sky2);
2298 sky2_rx_clean(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002299
2300 dev->mtu = new_mtu;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002301
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002302 mode = DATA_BLIND_VAL(DATA_BLIND_DEF) |
2303 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002304
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002305 if (dev->mtu > ETH_DATA_LEN)
2306 mode |= GM_SMOD_JUMBO_ENA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002307
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002308 gma_write16(hw, port, GM_SERIAL_MODE, mode);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002309
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002310 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002311
Mike McCormack200ac492010-02-12 06:58:03 +00002312 err = sky2_alloc_rx_skbs(sky2);
2313 if (!err)
2314 sky2_rx_start(sky2);
2315 else
2316 sky2_rx_clean(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002317 sky2_write32(hw, B0_IMSK, imask);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002318
David S. Millerd1d08d12008-01-07 20:53:33 -08002319 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002320 napi_enable(&hw->napi);
2321
Stephen Hemminger1b537562005-12-20 15:08:07 -08002322 if (err)
2323 dev_close(dev);
2324 else {
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002325 gma_write16(hw, port, GM_GP_CTRL, ctl);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002326
Stephen Hemminger1b537562005-12-20 15:08:07 -08002327 netif_wake_queue(dev);
2328 }
2329
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002330 return err;
2331}
2332
Stephen Hemminger14d02632006-09-26 11:57:43 -07002333/* For small just reuse existing skb for next receive */
2334static struct sk_buff *receive_copy(struct sky2_port *sky2,
2335 const struct rx_ring_info *re,
2336 unsigned length)
2337{
2338 struct sk_buff *skb;
2339
Eric Dumazet89d71a62009-10-13 05:34:20 +00002340 skb = netdev_alloc_skb_ip_align(sky2->netdev, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002341 if (likely(skb)) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07002342 pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr,
2343 length, PCI_DMA_FROMDEVICE);
Arnaldo Carvalho de Melod626f622007-03-27 18:55:52 -03002344 skb_copy_from_linear_data(re->skb, skb->data, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002345 skb->ip_summed = re->skb->ip_summed;
2346 skb->csum = re->skb->csum;
2347 pci_dma_sync_single_for_device(sky2->hw->pdev, re->data_addr,
2348 length, PCI_DMA_FROMDEVICE);
2349 re->skb->ip_summed = CHECKSUM_NONE;
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002350 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002351 }
2352 return skb;
2353}
2354
2355/* Adjust length of skb with fragments to match received data */
2356static void skb_put_frags(struct sk_buff *skb, unsigned int hdr_space,
2357 unsigned int length)
2358{
2359 int i, num_frags;
2360 unsigned int size;
2361
2362 /* put header into skb */
2363 size = min(length, hdr_space);
2364 skb->tail += size;
2365 skb->len += size;
2366 length -= size;
2367
2368 num_frags = skb_shinfo(skb)->nr_frags;
2369 for (i = 0; i < num_frags; i++) {
2370 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2371
2372 if (length == 0) {
2373 /* don't need this page */
2374 __free_page(frag->page);
2375 --skb_shinfo(skb)->nr_frags;
2376 } else {
2377 size = min(length, (unsigned) PAGE_SIZE);
2378
2379 frag->size = size;
2380 skb->data_len += size;
2381 skb->truesize += size;
2382 skb->len += size;
2383 length -= size;
2384 }
2385 }
2386}
2387
2388/* Normal packet - take skb from ring element and put in a new one */
2389static struct sk_buff *receive_new(struct sky2_port *sky2,
2390 struct rx_ring_info *re,
2391 unsigned int length)
2392{
stephen hemminger3fbd9182010-02-01 13:45:41 +00002393 struct sk_buff *skb;
2394 struct rx_ring_info nre;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002395 unsigned hdr_space = sky2->rx_data_size;
2396
stephen hemminger3fbd9182010-02-01 13:45:41 +00002397 nre.skb = sky2_rx_alloc(sky2);
2398 if (unlikely(!nre.skb))
2399 goto nobuf;
2400
2401 if (sky2_rx_map_skb(sky2->hw->pdev, &nre, hdr_space))
2402 goto nomap;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002403
2404 skb = re->skb;
2405 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002406 prefetch(skb->data);
stephen hemminger3fbd9182010-02-01 13:45:41 +00002407 *re = nre;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002408
2409 if (skb_shinfo(skb)->nr_frags)
2410 skb_put_frags(skb, hdr_space, length);
2411 else
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002412 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002413 return skb;
stephen hemminger3fbd9182010-02-01 13:45:41 +00002414
2415nomap:
2416 dev_kfree_skb(nre.skb);
2417nobuf:
2418 return NULL;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002419}
2420
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002421/*
2422 * Receive one packet.
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002423 * For larger packets, get new buffer.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002424 */
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002425static struct sk_buff *sky2_receive(struct net_device *dev,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002426 u16 length, u32 status)
2427{
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002428 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger291ea612006-09-26 11:57:41 -07002429 struct rx_ring_info *re = sky2->rx_ring + sky2->rx_next;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002430 struct sk_buff *skb = NULL;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002431 u16 count = (status & GMR_FS_LEN) >> 16;
2432
2433#ifdef SKY2_VLAN_TAG_USED
2434 /* Account for vlan tag */
2435 if (sky2->vlgrp && (status & GMR_FS_VLAN))
2436 count -= VLAN_HLEN;
2437#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002438
Joe Perches6c35aba2010-02-15 08:34:21 +00002439 netif_printk(sky2, rx_status, KERN_DEBUG, dev,
2440 "rx slot %u status 0x%x len %d\n",
2441 sky2->rx_next, status, length);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002442
Stephen Hemminger793b8832005-09-14 16:06:14 -07002443 sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending;
Stephen Hemmingerd70cd512005-12-09 11:35:09 -08002444 prefetch(sky2->rx_ring + sky2->rx_next);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002445
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002446 /* This chip has hardware problems that generates bogus status.
2447 * So do only marginal checking and expect higher level protocols
2448 * to handle crap frames.
2449 */
2450 if (sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
2451 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0 &&
2452 length != count)
2453 goto okay;
2454
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002455 if (status & GMR_FS_ANY_ERR)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002456 goto error;
2457
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002458 if (!(status & GMR_FS_RX_OK))
2459 goto resubmit;
2460
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002461 /* if length reported by DMA does not match PHY, packet was truncated */
2462 if (length != count)
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002463 goto len_error;
Stephen Hemminger71749532007-07-09 15:33:40 -07002464
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002465okay:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002466 if (length < copybreak)
2467 skb = receive_copy(sky2, re, length);
2468 else
2469 skb = receive_new(sky2, re, length);
Stephen Hemminger90c30332010-02-03 08:31:12 +00002470
2471 dev->stats.rx_dropped += (skb == NULL);
2472
Stephen Hemminger793b8832005-09-14 16:06:14 -07002473resubmit:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002474 sky2_rx_submit(sky2, re);
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002475
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002476 return skb;
2477
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002478len_error:
Stephen Hemminger71749532007-07-09 15:33:40 -07002479 /* Truncation of overlength packets
2480 causes PHY length to not match MAC length */
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002481 ++dev->stats.rx_length_errors;
Joe Perches6c35aba2010-02-15 08:34:21 +00002482 if (net_ratelimit())
2483 netif_info(sky2, rx_err, dev,
2484 "rx length error: status %#x length %d\n",
2485 status, length);
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002486 goto resubmit;
Stephen Hemminger71749532007-07-09 15:33:40 -07002487
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002488error:
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002489 ++dev->stats.rx_errors;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002490 if (status & GMR_FS_RX_FF_OV) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002491 dev->stats.rx_over_errors++;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002492 goto resubmit;
2493 }
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002494
Joe Perches6c35aba2010-02-15 08:34:21 +00002495 if (net_ratelimit())
2496 netif_info(sky2, rx_err, dev,
2497 "rx error, status 0x%x length %d\n", status, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002498
2499 if (status & (GMR_FS_LONG_ERR | GMR_FS_UN_SIZE))
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002500 dev->stats.rx_length_errors++;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002501 if (status & GMR_FS_FRAGMENT)
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002502 dev->stats.rx_frame_errors++;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002503 if (status & GMR_FS_CRC_ERR)
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002504 dev->stats.rx_crc_errors++;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002505
Stephen Hemminger793b8832005-09-14 16:06:14 -07002506 goto resubmit;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002507}
2508
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002509/* Transmit complete */
2510static inline void sky2_tx_done(struct net_device *dev, u16 last)
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002511{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002512 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger302d1252006-01-17 13:43:20 -08002513
Mike McCormack8a0c9222010-02-12 06:58:06 +00002514 if (netif_running(dev)) {
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002515 sky2_tx_complete(sky2, last);
Mike McCormack8a0c9222010-02-12 06:58:06 +00002516
2517 /* Wake unless it's detached, and called e.g. from sky2_down() */
2518 if (tx_avail(sky2) > MAX_SKB_TX_LE + 4)
2519 netif_wake_queue(dev);
2520 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002521}
2522
Stephen Hemminger37e5a242009-06-17 07:30:39 +00002523static inline void sky2_skb_rx(const struct sky2_port *sky2,
2524 u32 status, struct sk_buff *skb)
2525{
2526#ifdef SKY2_VLAN_TAG_USED
2527 u16 vlan_tag = be16_to_cpu(sky2->rx_tag);
2528 if (sky2->vlgrp && (status & GMR_FS_VLAN)) {
2529 if (skb->ip_summed == CHECKSUM_NONE)
2530 vlan_hwaccel_receive_skb(skb, sky2->vlgrp, vlan_tag);
2531 else
2532 vlan_gro_receive(&sky2->hw->napi, sky2->vlgrp,
2533 vlan_tag, skb);
2534 return;
2535 }
2536#endif
2537 if (skb->ip_summed == CHECKSUM_NONE)
2538 netif_receive_skb(skb);
2539 else
2540 napi_gro_receive(&sky2->hw->napi, skb);
2541}
2542
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002543static inline void sky2_rx_done(struct sky2_hw *hw, unsigned port,
2544 unsigned packets, unsigned bytes)
2545{
2546 if (packets) {
2547 struct net_device *dev = hw->dev[port];
2548
2549 dev->stats.rx_packets += packets;
2550 dev->stats.rx_bytes += bytes;
2551 dev->last_rx = jiffies;
2552 sky2_rx_update(netdev_priv(dev), rxqaddr[port]);
2553 }
2554}
2555
stephen hemminger375c5682010-02-07 06:28:36 +00002556static void sky2_rx_checksum(struct sky2_port *sky2, u32 status)
2557{
2558 /* If this happens then driver assuming wrong format for chip type */
2559 BUG_ON(sky2->hw->flags & SKY2_HW_NEW_LE);
2560
2561 /* Both checksum counters are programmed to start at
2562 * the same offset, so unless there is a problem they
2563 * should match. This failure is an early indication that
2564 * hardware receive checksumming won't work.
2565 */
2566 if (likely((u16)(status >> 16) == (u16)status)) {
2567 struct sk_buff *skb = sky2->rx_ring[sky2->rx_next].skb;
2568 skb->ip_summed = CHECKSUM_COMPLETE;
2569 skb->csum = le16_to_cpu(status);
2570 } else {
2571 dev_notice(&sky2->hw->pdev->dev,
2572 "%s: receive checksum problem (status = %#x)\n",
2573 sky2->netdev->name, status);
2574
2575 /* Disable checksum offload */
2576 sky2->flags &= ~SKY2_FLAG_RX_CHECKSUM;
2577 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
2578 BMU_DIS_RX_CHKSUM);
2579 }
2580}
2581
Stephen Hemmingerbf731302010-04-24 20:04:12 -07002582static void sky2_rx_hash(struct sky2_port *sky2, u32 status)
2583{
2584 struct sk_buff *skb;
2585
2586 skb = sky2->rx_ring[sky2->rx_next].skb;
2587 skb->rxhash = le32_to_cpu(status);
2588}
2589
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002590/* Process status response ring */
Stephen Hemminger26691832007-10-11 18:31:13 -07002591static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002592{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002593 int work_done = 0;
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002594 unsigned int total_bytes[2] = { 0 };
2595 unsigned int total_packets[2] = { 0 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002596
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08002597 rmb();
Stephen Hemminger26691832007-10-11 18:31:13 -07002598 do {
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002599 struct sky2_port *sky2;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002600 struct sky2_status_le *le = hw->st_le + hw->st_idx;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002601 unsigned port;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002602 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002603 struct sk_buff *skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002604 u32 status;
2605 u16 length;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002606 u8 opcode = le->opcode;
2607
2608 if (!(opcode & HW_OWNER))
2609 break;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002610
stephen hemmingerefe91932010-04-22 13:42:56 +00002611 hw->st_idx = RING_NEXT(hw->st_idx, hw->st_size);
shemminger@osdl.orgbea86102005-10-26 12:16:10 -07002612
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002613 port = le->css & CSS_LINK_BIT;
Stephen Hemminger69161612007-06-04 17:23:26 -07002614 dev = hw->dev[port];
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002615 sky2 = netdev_priv(dev);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07002616 length = le16_to_cpu(le->length);
2617 status = le32_to_cpu(le->status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002618
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002619 le->opcode = 0;
2620 switch (opcode & ~HW_OWNER) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002621 case OP_RXSTAT:
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002622 total_packets[port]++;
2623 total_bytes[port] += length;
Stephen Hemminger90c30332010-02-03 08:31:12 +00002624
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002625 skb = sky2_receive(dev, length, status);
Stephen Hemminger90c30332010-02-03 08:31:12 +00002626 if (!skb)
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002627 break;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002628
Stephen Hemminger69161612007-06-04 17:23:26 -07002629 /* This chip reports checksum status differently */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002630 if (hw->flags & SKY2_HW_NEW_LE) {
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07002631 if ((sky2->flags & SKY2_FLAG_RX_CHECKSUM) &&
Stephen Hemminger69161612007-06-04 17:23:26 -07002632 (le->css & (CSS_ISIPV4 | CSS_ISIPV6)) &&
2633 (le->css & CSS_TCPUDPCSOK))
2634 skb->ip_summed = CHECKSUM_UNNECESSARY;
2635 else
2636 skb->ip_summed = CHECKSUM_NONE;
2637 }
2638
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002639 skb->protocol = eth_type_trans(skb, dev);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002640
Stephen Hemminger37e5a242009-06-17 07:30:39 +00002641 sky2_skb_rx(sky2, status, skb);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002642
Stephen Hemminger22e11702006-07-12 15:23:48 -07002643 /* Stop after net poll weight */
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002644 if (++work_done >= to_do)
2645 goto exit_loop;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002646 break;
2647
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002648#ifdef SKY2_VLAN_TAG_USED
2649 case OP_RXVLAN:
2650 sky2->rx_tag = length;
2651 break;
2652
2653 case OP_RXCHKSVLAN:
2654 sky2->rx_tag = length;
2655 /* fall through */
2656#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002657 case OP_RXCHKS:
stephen hemminger375c5682010-02-07 06:28:36 +00002658 if (likely(sky2->flags & SKY2_FLAG_RX_CHECKSUM))
2659 sky2_rx_checksum(sky2, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002660 break;
2661
Stephen Hemmingerbf731302010-04-24 20:04:12 -07002662 case OP_RSS_HASH:
2663 sky2_rx_hash(sky2, status);
2664 break;
2665
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002666 case OP_TXINDEXLE:
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002667 /* TX index reports status for both ports */
Stephen Hemmingerf55925d2006-05-08 15:11:28 -07002668 sky2_tx_done(hw->dev[0], status & 0xfff);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002669 if (hw->dev[1])
2670 sky2_tx_done(hw->dev[1],
2671 ((status >> 24) & 0xff)
2672 | (u16)(length & 0xf) << 8);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002673 break;
2674
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002675 default:
2676 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002677 pr_warning("unknown status opcode 0x%x\n", opcode);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002678 }
Stephen Hemminger26691832007-10-11 18:31:13 -07002679 } while (hw->st_idx != idx);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002680
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002681 /* Fully processed status ring so clear irq */
2682 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
2683
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002684exit_loop:
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002685 sky2_rx_done(hw, 0, total_packets[0], total_bytes[0]);
2686 sky2_rx_done(hw, 1, total_packets[1], total_bytes[1]);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002687
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002688 return work_done;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002689}
2690
2691static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status)
2692{
2693 struct net_device *dev = hw->dev[port];
2694
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002695 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002696 netdev_info(dev, "hw error interrupt status 0x%x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002697
2698 if (status & Y2_IS_PAR_RD1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002699 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002700 netdev_err(dev, "ram data read parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002701 /* Clear IRQ */
2702 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR);
2703 }
2704
2705 if (status & Y2_IS_PAR_WR1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002706 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002707 netdev_err(dev, "ram data write parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002708
2709 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR);
2710 }
2711
2712 if (status & Y2_IS_PAR_MAC1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002713 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002714 netdev_err(dev, "MAC parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002715 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
2716 }
2717
2718 if (status & Y2_IS_PAR_RX1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002719 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002720 netdev_err(dev, "RX parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002721 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
2722 }
2723
2724 if (status & Y2_IS_TCP_TXA1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002725 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002726 netdev_err(dev, "TCP segmentation error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002727 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
2728 }
2729}
2730
2731static void sky2_hw_intr(struct sky2_hw *hw)
2732{
Stephen Hemminger555382c2007-08-29 12:58:14 -07002733 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002734 u32 status = sky2_read32(hw, B0_HWE_ISRC);
Stephen Hemminger555382c2007-08-29 12:58:14 -07002735 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
2736
2737 status &= hwmsk;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002738
Stephen Hemminger793b8832005-09-14 16:06:14 -07002739 if (status & Y2_IS_TIST_OV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002740 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002741
2742 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002743 u16 pci_err;
2744
stephen hemmingera40ccc62010-01-24 18:46:06 +00002745 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002746 pci_err = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002747 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002748 dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002749 pci_err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002750
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002751 sky2_pci_write16(hw, PCI_STATUS,
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002752 pci_err | PCI_STATUS_ERROR_BITS);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002753 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002754 }
2755
2756 if (status & Y2_IS_PCI_EXP) {
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002757 /* PCI-Express uncorrectable Error occurred */
Stephen Hemminger555382c2007-08-29 12:58:14 -07002758 u32 err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002759
stephen hemmingera40ccc62010-01-24 18:46:06 +00002760 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002761 err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
2762 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
2763 0xfffffffful);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002764 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002765 dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);
Stephen Hemmingercf06ffb2007-11-05 15:52:13 -08002766
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002767 sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002768 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002769 }
2770
2771 if (status & Y2_HWE_L1_MASK)
2772 sky2_hw_error(hw, 0, status);
2773 status >>= 8;
2774 if (status & Y2_HWE_L1_MASK)
2775 sky2_hw_error(hw, 1, status);
2776}
2777
2778static void sky2_mac_intr(struct sky2_hw *hw, unsigned port)
2779{
2780 struct net_device *dev = hw->dev[port];
2781 struct sky2_port *sky2 = netdev_priv(dev);
2782 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC));
2783
Joe Perches6c35aba2010-02-15 08:34:21 +00002784 netif_info(sky2, intr, dev, "mac interrupt status 0x%x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002785
Stephen Hemmingera3caead2007-05-14 12:38:13 -07002786 if (status & GM_IS_RX_CO_OV)
2787 gma_read16(hw, port, GM_RX_IRQ_SRC);
2788
2789 if (status & GM_IS_TX_CO_OV)
2790 gma_read16(hw, port, GM_TX_IRQ_SRC);
2791
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002792 if (status & GM_IS_RX_FF_OR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002793 ++dev->stats.rx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002794 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
2795 }
2796
2797 if (status & GM_IS_TX_FF_UR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002798 ++dev->stats.tx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002799 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
2800 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002801}
2802
Stephen Hemminger40b01722007-04-11 14:47:59 -07002803/* This should never happen it is a bug. */
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002804static void sky2_le_error(struct sky2_hw *hw, unsigned port, u16 q)
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002805{
2806 struct net_device *dev = hw->dev[port];
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002807 u16 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002808
Joe Perchesada1db52010-02-17 15:01:59 +00002809 dev_err(&hw->pdev->dev, "%s: descriptor error q=%#x get=%u put=%u\n",
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002810 dev->name, (unsigned) q, (unsigned) idx,
2811 (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX)));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002812
Stephen Hemminger40b01722007-04-11 14:47:59 -07002813 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002814}
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002815
Stephen Hemminger75e80682007-09-19 15:36:46 -07002816static int sky2_rx_hung(struct net_device *dev)
2817{
2818 struct sky2_port *sky2 = netdev_priv(dev);
2819 struct sky2_hw *hw = sky2->hw;
2820 unsigned port = sky2->port;
2821 unsigned rxq = rxqaddr[port];
2822 u32 mac_rp = sky2_read32(hw, SK_REG(port, RX_GMF_RP));
2823 u8 mac_lev = sky2_read8(hw, SK_REG(port, RX_GMF_RLEV));
2824 u8 fifo_rp = sky2_read8(hw, Q_ADDR(rxq, Q_RP));
2825 u8 fifo_lev = sky2_read8(hw, Q_ADDR(rxq, Q_RL));
2826
2827 /* If idle and MAC or PCI is stuck */
2828 if (sky2->check.last == dev->last_rx &&
2829 ((mac_rp == sky2->check.mac_rp &&
2830 mac_lev != 0 && mac_lev >= sky2->check.mac_lev) ||
2831 /* Check if the PCI RX hang */
2832 (fifo_rp == sky2->check.fifo_rp &&
2833 fifo_lev != 0 && fifo_lev >= sky2->check.fifo_lev))) {
Joe Perchesada1db52010-02-17 15:01:59 +00002834 netdev_printk(KERN_DEBUG, dev,
2835 "hung mac %d:%d fifo %d (%d:%d)\n",
2836 mac_lev, mac_rp, fifo_lev,
2837 fifo_rp, sky2_read8(hw, Q_ADDR(rxq, Q_WP)));
Stephen Hemminger75e80682007-09-19 15:36:46 -07002838 return 1;
2839 } else {
2840 sky2->check.last = dev->last_rx;
2841 sky2->check.mac_rp = mac_rp;
2842 sky2->check.mac_lev = mac_lev;
2843 sky2->check.fifo_rp = fifo_rp;
2844 sky2->check.fifo_lev = fifo_lev;
2845 return 0;
2846 }
2847}
2848
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002849static void sky2_watchdog(unsigned long arg)
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002850{
Stephen Hemminger01bd7562006-05-08 15:11:30 -07002851 struct sky2_hw *hw = (struct sky2_hw *) arg;
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002852
Stephen Hemminger75e80682007-09-19 15:36:46 -07002853 /* Check for lost IRQ once a second */
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002854 if (sky2_read32(hw, B0_ISRC)) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002855 napi_schedule(&hw->napi);
Stephen Hemminger75e80682007-09-19 15:36:46 -07002856 } else {
2857 int i, active = 0;
2858
2859 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002860 struct net_device *dev = hw->dev[i];
Stephen Hemminger75e80682007-09-19 15:36:46 -07002861 if (!netif_running(dev))
2862 continue;
2863 ++active;
2864
2865 /* For chips with Rx FIFO, check if stuck */
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002866 if ((hw->flags & SKY2_HW_RAM_BUFFER) &&
Stephen Hemminger75e80682007-09-19 15:36:46 -07002867 sky2_rx_hung(dev)) {
Joe Perchesada1db52010-02-17 15:01:59 +00002868 netdev_info(dev, "receiver hang detected\n");
Stephen Hemminger75e80682007-09-19 15:36:46 -07002869 schedule_work(&hw->restart_work);
2870 return;
2871 }
2872 }
2873
2874 if (active == 0)
2875 return;
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002876 }
2877
Stephen Hemminger75e80682007-09-19 15:36:46 -07002878 mod_timer(&hw->watchdog_timer, round_jiffies(jiffies + HZ));
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002879}
2880
Stephen Hemminger40b01722007-04-11 14:47:59 -07002881/* Hardware/software error handling */
2882static void sky2_err_intr(struct sky2_hw *hw, u32 status)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002883{
Stephen Hemminger40b01722007-04-11 14:47:59 -07002884 if (net_ratelimit())
2885 dev_warn(&hw->pdev->dev, "error interrupt status=%#x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002886
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002887 if (status & Y2_IS_HW_ERR)
2888 sky2_hw_intr(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002889
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002890 if (status & Y2_IS_IRQ_MAC1)
2891 sky2_mac_intr(hw, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002892
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002893 if (status & Y2_IS_IRQ_MAC2)
2894 sky2_mac_intr(hw, 1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002895
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002896 if (status & Y2_IS_CHK_RX1)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002897 sky2_le_error(hw, 0, Q_R1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002898
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002899 if (status & Y2_IS_CHK_RX2)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002900 sky2_le_error(hw, 1, Q_R2);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002901
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002902 if (status & Y2_IS_CHK_TXA1)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002903 sky2_le_error(hw, 0, Q_XA1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002904
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002905 if (status & Y2_IS_CHK_TXA2)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002906 sky2_le_error(hw, 1, Q_XA2);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002907}
2908
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002909static int sky2_poll(struct napi_struct *napi, int work_limit)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002910{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002911 struct sky2_hw *hw = container_of(napi, struct sky2_hw, napi);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002912 u32 status = sky2_read32(hw, B0_Y2_SP_EISR);
David S. Miller6f535762007-10-11 18:08:29 -07002913 int work_done = 0;
Stephen Hemminger26691832007-10-11 18:31:13 -07002914 u16 idx;
Stephen Hemminger40b01722007-04-11 14:47:59 -07002915
2916 if (unlikely(status & Y2_IS_ERROR))
2917 sky2_err_intr(hw, status);
2918
2919 if (status & Y2_IS_IRQ_PHY1)
2920 sky2_phy_intr(hw, 0);
2921
2922 if (status & Y2_IS_IRQ_PHY2)
2923 sky2_phy_intr(hw, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002924
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002925 if (status & Y2_IS_PHY_QLNK)
2926 sky2_qlink_intr(hw);
2927
Stephen Hemminger26691832007-10-11 18:31:13 -07002928 while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) {
2929 work_done += sky2_status_intr(hw, work_limit - work_done, idx);
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002930
David S. Miller6f535762007-10-11 18:08:29 -07002931 if (work_done >= work_limit)
Stephen Hemminger26691832007-10-11 18:31:13 -07002932 goto done;
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002933 }
David S. Miller6f535762007-10-11 18:08:29 -07002934
Stephen Hemminger26691832007-10-11 18:31:13 -07002935 napi_complete(napi);
2936 sky2_read32(hw, B0_Y2_SP_LISR);
2937done:
2938
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002939 return work_done;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002940}
2941
David Howells7d12e782006-10-05 14:55:46 +01002942static irqreturn_t sky2_intr(int irq, void *dev_id)
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002943{
2944 struct sky2_hw *hw = dev_id;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002945 u32 status;
2946
2947 /* Reading this mask interrupts as side effect */
2948 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
2949 if (status == 0 || status == ~0)
2950 return IRQ_NONE;
2951
2952 prefetch(&hw->st_le[hw->st_idx]);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002953
2954 napi_schedule(&hw->napi);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002955
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002956 return IRQ_HANDLED;
2957}
2958
2959#ifdef CONFIG_NET_POLL_CONTROLLER
2960static void sky2_netpoll(struct net_device *dev)
2961{
2962 struct sky2_port *sky2 = netdev_priv(dev);
2963
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002964 napi_schedule(&sky2->hw->napi);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002965}
2966#endif
2967
2968/* Chip internal frequency for clock calculations */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002969static u32 sky2_mhz(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002970{
Stephen Hemminger793b8832005-09-14 16:06:14 -07002971 switch (hw->chip_id) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002972 case CHIP_ID_YUKON_EC:
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08002973 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -08002974 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -08002975 case CHIP_ID_YUKON_SUPR:
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07002976 case CHIP_ID_YUKON_UL_2:
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002977 case CHIP_ID_YUKON_OPT:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002978 return 125;
2979
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002980 case CHIP_ID_YUKON_FE:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002981 return 100;
2982
2983 case CHIP_ID_YUKON_FE_P:
2984 return 50;
2985
2986 case CHIP_ID_YUKON_XL:
2987 return 156;
2988
2989 default:
2990 BUG();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002991 }
2992}
2993
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002994static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us)
2995{
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002996 return sky2_mhz(hw) * us;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002997}
2998
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002999static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
3000{
3001 return clk / sky2_mhz(hw);
3002}
3003
3004
Stephen Hemmingere3173832007-02-06 10:45:39 -08003005static int __devinit sky2_init(struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003006{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003007 u8 t8;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003008
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003009 /* Enable all clocks and check for bad PCI access */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003010 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemminger451af332007-06-04 17:23:24 -07003011
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003012 sky2_write8(hw, B0_CTST, CS_RST_CLR);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08003013
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003014 hw->chip_id = sky2_read8(hw, B2_CHIP_ID);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003015 hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4;
3016
Mike McCormack060b9462010-07-29 03:34:52 +00003017 switch (hw->chip_id) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003018 case CHIP_ID_YUKON_XL:
Stephen Hemminger39dbd952008-02-04 19:45:13 -08003019 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_NEWER_PHY;
Stephen Hemmingerbf731302010-04-24 20:04:12 -07003020 if (hw->chip_rev < CHIP_REV_YU_XL_A2)
3021 hw->flags |= SKY2_HW_RSS_BROKEN;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003022 break;
3023
3024 case CHIP_ID_YUKON_EC_U:
3025 hw->flags = SKY2_HW_GIGABIT
3026 | SKY2_HW_NEWER_PHY
3027 | SKY2_HW_ADV_POWER_CTL;
3028 break;
3029
3030 case CHIP_ID_YUKON_EX:
3031 hw->flags = SKY2_HW_GIGABIT
3032 | SKY2_HW_NEWER_PHY
3033 | SKY2_HW_NEW_LE
3034 | SKY2_HW_ADV_POWER_CTL;
3035
3036 /* New transmit checksum */
3037 if (hw->chip_rev != CHIP_REV_YU_EX_B0)
3038 hw->flags |= SKY2_HW_AUTO_TX_SUM;
3039 break;
3040
3041 case CHIP_ID_YUKON_EC:
3042 /* This rev is really old, and requires untested workarounds */
3043 if (hw->chip_rev == CHIP_REV_YU_EC_A1) {
3044 dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n");
3045 return -EOPNOTSUPP;
3046 }
Stephen Hemmingerbf731302010-04-24 20:04:12 -07003047 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_RSS_BROKEN;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003048 break;
3049
3050 case CHIP_ID_YUKON_FE:
Stephen Hemmingerbf731302010-04-24 20:04:12 -07003051 hw->flags = SKY2_HW_RSS_BROKEN;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003052 break;
3053
Stephen Hemminger05745c42007-09-19 15:36:45 -07003054 case CHIP_ID_YUKON_FE_P:
3055 hw->flags = SKY2_HW_NEWER_PHY
3056 | SKY2_HW_NEW_LE
3057 | SKY2_HW_AUTO_TX_SUM
3058 | SKY2_HW_ADV_POWER_CTL;
3059 break;
Stephen Hemmingered4d4162008-01-10 16:14:14 -08003060
3061 case CHIP_ID_YUKON_SUPR:
3062 hw->flags = SKY2_HW_GIGABIT
3063 | SKY2_HW_NEWER_PHY
3064 | SKY2_HW_NEW_LE
3065 | SKY2_HW_AUTO_TX_SUM
3066 | SKY2_HW_ADV_POWER_CTL;
3067 break;
3068
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003069 case CHIP_ID_YUKON_UL_2:
Takashi Iwaib3386822009-12-03 05:12:01 +00003070 hw->flags = SKY2_HW_GIGABIT
3071 | SKY2_HW_ADV_POWER_CTL;
3072 break;
3073
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003074 case CHIP_ID_YUKON_OPT:
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003075 hw->flags = SKY2_HW_GIGABIT
Takashi Iwaib3386822009-12-03 05:12:01 +00003076 | SKY2_HW_NEW_LE
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003077 | SKY2_HW_ADV_POWER_CTL;
3078 break;
3079
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003080 default:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003081 dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n",
3082 hw->chip_id);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003083 return -EOPNOTSUPP;
3084 }
3085
Stephen Hemmingere3173832007-02-06 10:45:39 -08003086 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003087 if (hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P')
3088 hw->flags |= SKY2_HW_FIBRE_PHY;
3089
Stephen Hemmingere3173832007-02-06 10:45:39 -08003090 hw->ports = 1;
3091 t8 = sky2_read8(hw, B2_Y2_HW_RES);
3092 if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
3093 if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC))
3094 ++hw->ports;
3095 }
3096
Mike McCormack74a61eb2009-09-21 04:08:52 +00003097 if (sky2_read8(hw, B2_E_0))
3098 hw->flags |= SKY2_HW_RAM_BUFFER;
3099
Stephen Hemmingere3173832007-02-06 10:45:39 -08003100 return 0;
3101}
3102
3103static void sky2_reset(struct sky2_hw *hw)
3104{
Stephen Hemminger555382c2007-08-29 12:58:14 -07003105 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003106 u16 status;
Stephen Hemminger555382c2007-08-29 12:58:14 -07003107 int i, cap;
3108 u32 hwe_mask = Y2_HWE_ALL_MASK;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003109
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003110 /* disable ASF */
stephen hemmingeracd12dd2010-02-07 06:24:50 +00003111 if (hw->chip_id == CHIP_ID_YUKON_EX
3112 || hw->chip_id == CHIP_ID_YUKON_SUPR) {
3113 sky2_write32(hw, CPU_WDOG, 0);
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07003114 status = sky2_read16(hw, HCU_CCSR);
3115 status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE |
3116 HCU_CCSR_UC_STATE_MSK);
stephen hemmingeracd12dd2010-02-07 06:24:50 +00003117 /*
3118 * CPU clock divider shouldn't be used because
3119 * - ASF firmware may malfunction
3120 * - Yukon-Supreme: Parallel FLASH doesn't support divided clocks
3121 */
3122 status &= ~HCU_CCSR_CPU_CLK_DIVIDE_MSK;
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07003123 sky2_write16(hw, HCU_CCSR, status);
stephen hemmingeracd12dd2010-02-07 06:24:50 +00003124 sky2_write32(hw, CPU_WDOG, 0);
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07003125 } else
3126 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
3127 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003128
3129 /* do a SW reset */
3130 sky2_write8(hw, B0_CTST, CS_RST_SET);
3131 sky2_write8(hw, B0_CTST, CS_RST_CLR);
3132
Stephen Hemmingerac93a392007-11-05 15:52:08 -08003133 /* allow writes to PCI config */
3134 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
3135
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003136 /* clear PCI errors, if any */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003137 status = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003138 status |= PCI_STATUS_ERROR_BITS;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003139 sky2_pci_write16(hw, PCI_STATUS, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003140
3141 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
3142
Stephen Hemminger555382c2007-08-29 12:58:14 -07003143 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
3144 if (cap) {
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08003145 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
3146 0xfffffffful);
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07003147
Stephen Hemminger555382c2007-08-29 12:58:14 -07003148 /* If error bit is stuck on ignore it */
3149 if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP)
3150 dev_info(&pdev->dev, "ignoring stuck error report bit\n");
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08003151 else
Stephen Hemminger555382c2007-08-29 12:58:14 -07003152 hwe_mask |= Y2_IS_PCI_EXP;
3153 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003154
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08003155 sky2_power_on(hw);
stephen hemmingera40ccc62010-01-24 18:46:06 +00003156 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003157
3158 for (i = 0; i < hw->ports; i++) {
3159 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
3160 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
Stephen Hemminger69161612007-06-04 17:23:26 -07003161
Stephen Hemmingered4d4162008-01-10 16:14:14 -08003162 if (hw->chip_id == CHIP_ID_YUKON_EX ||
3163 hw->chip_id == CHIP_ID_YUKON_SUPR)
Stephen Hemminger69161612007-06-04 17:23:26 -07003164 sky2_write16(hw, SK_REG(i, GMAC_CTRL),
3165 GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON
3166 | GMC_BYP_RETR_ON);
Stephen Hemminger877c8572009-10-29 06:37:08 +00003167
3168 }
3169
3170 if (hw->chip_id == CHIP_ID_YUKON_SUPR && hw->chip_rev > CHIP_REV_YU_SU_B0) {
3171 /* enable MACSec clock gating */
3172 sky2_pci_write32(hw, PCI_DEV_REG3, P_CLK_MACSEC_DIS);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003173 }
3174
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003175 if (hw->chip_id == CHIP_ID_YUKON_OPT) {
3176 u16 reg;
3177 u32 msk;
3178
3179 if (hw->chip_rev == 0) {
3180 /* disable PCI-E PHY power down (set PHY reg 0x80, bit 7 */
3181 sky2_write32(hw, Y2_PEX_PHY_DATA, (0x80UL << 16) | (1 << 7));
3182
3183 /* set PHY Link Detect Timer to 1.1 second (11x 100ms) */
3184 reg = 10;
3185 } else {
3186 /* set PHY Link Detect Timer to 0.4 second (4x 100ms) */
3187 reg = 3;
3188 }
3189
3190 reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE;
3191
3192 /* reset PHY Link Detect */
stephen hemmingera40ccc62010-01-24 18:46:06 +00003193 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003194 sky2_pci_write16(hw, PSM_CONFIG_REG4,
3195 reg | PSM_CONFIG_REG4_RST_PHY_LINK_DETECT);
3196 sky2_pci_write16(hw, PSM_CONFIG_REG4, reg);
3197
3198
3199 /* enable PHY Quick Link */
3200 msk = sky2_read32(hw, B0_IMSK);
3201 msk |= Y2_IS_PHY_QLNK;
3202 sky2_write32(hw, B0_IMSK, msk);
3203
3204 /* check if PSMv2 was running before */
3205 reg = sky2_pci_read16(hw, PSM_CONFIG_REG3);
3206 if (reg & PCI_EXP_LNKCTL_ASPMC) {
stephen hemminger8b055432010-02-12 06:57:58 +00003207 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003208 /* restore the PCIe Link Control register */
3209 sky2_pci_write16(hw, cap + PCI_EXP_LNKCTL, reg);
3210 }
stephen hemmingera40ccc62010-01-24 18:46:06 +00003211 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003212
3213 /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */
3214 sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16));
3215 }
3216
Stephen Hemminger793b8832005-09-14 16:06:14 -07003217 /* Clear I2C IRQ noise */
3218 sky2_write32(hw, B2_I2C_IRQ, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003219
3220 /* turn off hardware timer (unused) */
3221 sky2_write8(hw, B2_TI_CTRL, TIM_STOP);
3222 sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003223
Stephen Hemminger69634ee2005-12-09 11:35:06 -08003224 /* Turn off descriptor polling */
3225 sky2_write32(hw, B28_DPT_CTRL, DPT_STOP);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003226
3227 /* Turn off receive timestamp */
3228 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003229 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003230
3231 /* enable the Tx Arbiters */
3232 for (i = 0; i < hw->ports; i++)
3233 sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB);
3234
3235 /* Initialize ram interface */
3236 for (i = 0; i < hw->ports; i++) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003237 sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003238
3239 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53);
3240 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53);
3241 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53);
3242 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53);
3243 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53);
3244 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53);
3245 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53);
3246 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53);
3247 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53);
3248 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53);
3249 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53);
3250 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
3251 }
3252
Stephen Hemminger555382c2007-08-29 12:58:14 -07003253 sky2_write32(hw, B0_HWE_IMSK, hwe_mask);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003254
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003255 for (i = 0; i < hw->ports; i++)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07003256 sky2_gmac_reset(hw, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003257
stephen hemmingerefe91932010-04-22 13:42:56 +00003258 memset(hw->st_le, 0, hw->st_size * sizeof(struct sky2_status_le));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003259 hw->st_idx = 0;
3260
3261 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET);
3262 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR);
3263
3264 sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003265 sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003266
3267 /* Set the list last index */
stephen hemmingerefe91932010-04-22 13:42:56 +00003268 sky2_write16(hw, STAT_LAST_IDX, hw->st_size - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003269
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003270 sky2_write16(hw, STAT_TX_IDX_TH, 10);
3271 sky2_write8(hw, STAT_FIFO_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003272
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003273 /* set Status-FIFO ISR watermark */
3274 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0)
3275 sky2_write8(hw, STAT_FIFO_ISR_WM, 4);
3276 else
3277 sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003278
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003279 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000));
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003280 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20));
3281 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003282
Stephen Hemminger793b8832005-09-14 16:06:14 -07003283 /* enable status unit */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003284 sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON);
3285
3286 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3287 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3288 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
Stephen Hemmingere3173832007-02-06 10:45:39 -08003289}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003290
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003291/* Take device down (offline).
3292 * Equivalent to doing dev_stop() but this does not
3293 * inform upper layers of the transistion.
3294 */
3295static void sky2_detach(struct net_device *dev)
3296{
3297 if (netif_running(dev)) {
Mike McCormackc36531b2009-12-31 00:55:31 +00003298 netif_tx_lock(dev);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003299 netif_device_detach(dev); /* stop txq */
Mike McCormackc36531b2009-12-31 00:55:31 +00003300 netif_tx_unlock(dev);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003301 sky2_down(dev);
3302 }
3303}
3304
3305/* Bring device back after doing sky2_detach */
3306static int sky2_reattach(struct net_device *dev)
3307{
3308 int err = 0;
3309
3310 if (netif_running(dev)) {
3311 err = sky2_up(dev);
3312 if (err) {
Joe Perchesada1db52010-02-17 15:01:59 +00003313 netdev_info(dev, "could not restart %d\n", err);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003314 dev_close(dev);
3315 } else {
3316 netif_device_attach(dev);
3317 sky2_set_multicast(dev);
3318 }
3319 }
3320
3321 return err;
3322}
3323
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003324static void sky2_all_down(struct sky2_hw *hw)
Stephen Hemminger81906792007-02-15 16:40:33 -08003325{
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003326 int i;
Stephen Hemminger81906792007-02-15 16:40:33 -08003327
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003328 sky2_read32(hw, B0_IMSK);
Stephen Hemminger8cfcbe92007-12-03 17:02:17 -08003329 sky2_write32(hw, B0_IMSK, 0);
Mike McCormack93135a32010-05-13 06:12:50 +00003330 synchronize_irq(hw->pdev->irq);
3331 napi_disable(&hw->napi);
Stephen Hemminger81906792007-02-15 16:40:33 -08003332
Mike McCormack8a0c9222010-02-12 06:58:06 +00003333 for (i = 0; i < hw->ports; i++) {
3334 struct net_device *dev = hw->dev[i];
3335 struct sky2_port *sky2 = netdev_priv(dev);
3336
3337 if (!netif_running(dev))
3338 continue;
3339
3340 netif_carrier_off(dev);
3341 netif_tx_disable(dev);
3342 sky2_hw_down(sky2);
3343 }
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003344}
Mike McCormack8a0c9222010-02-12 06:58:06 +00003345
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003346static void sky2_all_up(struct sky2_hw *hw)
3347{
3348 u32 imask = Y2_IS_BASE;
3349 int i;
Mike McCormack8a0c9222010-02-12 06:58:06 +00003350
3351 for (i = 0; i < hw->ports; i++) {
3352 struct net_device *dev = hw->dev[i];
3353 struct sky2_port *sky2 = netdev_priv(dev);
3354
3355 if (!netif_running(dev))
3356 continue;
3357
3358 sky2_hw_up(sky2);
Mike McCormack37652522010-05-13 06:12:48 +00003359 sky2_set_multicast(dev);
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003360 imask |= portirq_msk[i];
Mike McCormack8a0c9222010-02-12 06:58:06 +00003361 netif_wake_queue(dev);
3362 }
3363
3364 sky2_write32(hw, B0_IMSK, imask);
3365 sky2_read32(hw, B0_IMSK);
3366
3367 sky2_read32(hw, B0_Y2_SP_LISR);
3368 napi_enable(&hw->napi);
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003369}
3370
3371static void sky2_restart(struct work_struct *work)
3372{
3373 struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work);
3374
3375 rtnl_lock();
3376
3377 sky2_all_down(hw);
3378 sky2_reset(hw);
3379 sky2_all_up(hw);
Stephen Hemminger81906792007-02-15 16:40:33 -08003380
Stephen Hemminger81906792007-02-15 16:40:33 -08003381 rtnl_unlock();
3382}
3383
Stephen Hemmingere3173832007-02-06 10:45:39 -08003384static inline u8 sky2_wol_supported(const struct sky2_hw *hw)
3385{
3386 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0;
3387}
3388
3389static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3390{
3391 const struct sky2_port *sky2 = netdev_priv(dev);
3392
3393 wol->supported = sky2_wol_supported(sky2->hw);
3394 wol->wolopts = sky2->wol;
3395}
3396
3397static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3398{
3399 struct sky2_port *sky2 = netdev_priv(dev);
3400 struct sky2_hw *hw = sky2->hw;
3401
Joe Perches8e95a202009-12-03 07:58:21 +00003402 if ((wol->wolopts & ~sky2_wol_supported(sky2->hw)) ||
3403 !device_can_wakeup(&hw->pdev->dev))
Stephen Hemmingere3173832007-02-06 10:45:39 -08003404 return -EOPNOTSUPP;
3405
3406 sky2->wol = wol->wolopts;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003407 return 0;
3408}
3409
Stephen Hemminger28bd1812006-01-17 13:43:19 -08003410static u32 sky2_supported_modes(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003411{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003412 if (sky2_is_copper(hw)) {
3413 u32 modes = SUPPORTED_10baseT_Half
3414 | SUPPORTED_10baseT_Full
3415 | SUPPORTED_100baseT_Half
3416 | SUPPORTED_100baseT_Full
3417 | SUPPORTED_Autoneg | SUPPORTED_TP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003418
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003419 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003420 modes |= SUPPORTED_1000baseT_Half
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003421 | SUPPORTED_1000baseT_Full;
3422 return modes;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003423 } else
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003424 return SUPPORTED_1000baseT_Half
3425 | SUPPORTED_1000baseT_Full
3426 | SUPPORTED_Autoneg
3427 | SUPPORTED_FIBRE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003428}
3429
Stephen Hemminger793b8832005-09-14 16:06:14 -07003430static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003431{
3432 struct sky2_port *sky2 = netdev_priv(dev);
3433 struct sky2_hw *hw = sky2->hw;
3434
3435 ecmd->transceiver = XCVR_INTERNAL;
3436 ecmd->supported = sky2_supported_modes(hw);
3437 ecmd->phy_address = PHY_ADDR_MARV;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003438 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003439 ecmd->port = PORT_TP;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003440 ecmd->speed = sky2->speed;
3441 } else {
3442 ecmd->speed = SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003443 ecmd->port = PORT_FIBRE;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003444 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003445
3446 ecmd->advertising = sky2->advertising;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003447 ecmd->autoneg = (sky2->flags & SKY2_FLAG_AUTO_SPEED)
3448 ? AUTONEG_ENABLE : AUTONEG_DISABLE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003449 ecmd->duplex = sky2->duplex;
3450 return 0;
3451}
3452
3453static int sky2_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
3454{
3455 struct sky2_port *sky2 = netdev_priv(dev);
3456 const struct sky2_hw *hw = sky2->hw;
3457 u32 supported = sky2_supported_modes(hw);
3458
3459 if (ecmd->autoneg == AUTONEG_ENABLE) {
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003460 sky2->flags |= SKY2_FLAG_AUTO_SPEED;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003461 ecmd->advertising = supported;
3462 sky2->duplex = -1;
3463 sky2->speed = -1;
3464 } else {
3465 u32 setting;
3466
Stephen Hemminger793b8832005-09-14 16:06:14 -07003467 switch (ecmd->speed) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003468 case SPEED_1000:
3469 if (ecmd->duplex == DUPLEX_FULL)
3470 setting = SUPPORTED_1000baseT_Full;
3471 else if (ecmd->duplex == DUPLEX_HALF)
3472 setting = SUPPORTED_1000baseT_Half;
3473 else
3474 return -EINVAL;
3475 break;
3476 case SPEED_100:
3477 if (ecmd->duplex == DUPLEX_FULL)
3478 setting = SUPPORTED_100baseT_Full;
3479 else if (ecmd->duplex == DUPLEX_HALF)
3480 setting = SUPPORTED_100baseT_Half;
3481 else
3482 return -EINVAL;
3483 break;
3484
3485 case SPEED_10:
3486 if (ecmd->duplex == DUPLEX_FULL)
3487 setting = SUPPORTED_10baseT_Full;
3488 else if (ecmd->duplex == DUPLEX_HALF)
3489 setting = SUPPORTED_10baseT_Half;
3490 else
3491 return -EINVAL;
3492 break;
3493 default:
3494 return -EINVAL;
3495 }
3496
3497 if ((setting & supported) == 0)
3498 return -EINVAL;
3499
3500 sky2->speed = ecmd->speed;
3501 sky2->duplex = ecmd->duplex;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003502 sky2->flags &= ~SKY2_FLAG_AUTO_SPEED;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003503 }
3504
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003505 sky2->advertising = ecmd->advertising;
3506
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003507 if (netif_running(dev)) {
Stephen Hemminger1b537562005-12-20 15:08:07 -08003508 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003509 sky2_set_multicast(dev);
3510 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003511
3512 return 0;
3513}
3514
3515static void sky2_get_drvinfo(struct net_device *dev,
3516 struct ethtool_drvinfo *info)
3517{
3518 struct sky2_port *sky2 = netdev_priv(dev);
3519
3520 strcpy(info->driver, DRV_NAME);
3521 strcpy(info->version, DRV_VERSION);
3522 strcpy(info->fw_version, "N/A");
3523 strcpy(info->bus_info, pci_name(sky2->hw->pdev));
3524}
3525
3526static const struct sky2_stat {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003527 char name[ETH_GSTRING_LEN];
3528 u16 offset;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003529} sky2_stats[] = {
3530 { "tx_bytes", GM_TXO_OK_HI },
3531 { "rx_bytes", GM_RXO_OK_HI },
3532 { "tx_broadcast", GM_TXF_BC_OK },
3533 { "rx_broadcast", GM_RXF_BC_OK },
3534 { "tx_multicast", GM_TXF_MC_OK },
3535 { "rx_multicast", GM_RXF_MC_OK },
3536 { "tx_unicast", GM_TXF_UC_OK },
3537 { "rx_unicast", GM_RXF_UC_OK },
3538 { "tx_mac_pause", GM_TXF_MPAUSE },
3539 { "rx_mac_pause", GM_RXF_MPAUSE },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003540 { "collisions", GM_TXF_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003541 { "late_collision",GM_TXF_LAT_COL },
3542 { "aborted", GM_TXF_ABO_COL },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003543 { "single_collisions", GM_TXF_SNG_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003544 { "multi_collisions", GM_TXF_MUL_COL },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003545
Stephen Hemmingerd2604542006-03-23 08:51:36 -08003546 { "rx_short", GM_RXF_SHT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003547 { "rx_runt", GM_RXE_FRAG },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003548 { "rx_64_byte_packets", GM_RXF_64B },
3549 { "rx_65_to_127_byte_packets", GM_RXF_127B },
3550 { "rx_128_to_255_byte_packets", GM_RXF_255B },
3551 { "rx_256_to_511_byte_packets", GM_RXF_511B },
3552 { "rx_512_to_1023_byte_packets", GM_RXF_1023B },
3553 { "rx_1024_to_1518_byte_packets", GM_RXF_1518B },
3554 { "rx_1518_to_max_byte_packets", GM_RXF_MAX_SZ },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003555 { "rx_too_long", GM_RXF_LNG_ERR },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003556 { "rx_fifo_overflow", GM_RXE_FIFO_OV },
3557 { "rx_jabber", GM_RXF_JAB_PKT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003558 { "rx_fcs_error", GM_RXF_FCS_ERR },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003559
3560 { "tx_64_byte_packets", GM_TXF_64B },
3561 { "tx_65_to_127_byte_packets", GM_TXF_127B },
3562 { "tx_128_to_255_byte_packets", GM_TXF_255B },
3563 { "tx_256_to_511_byte_packets", GM_TXF_511B },
3564 { "tx_512_to_1023_byte_packets", GM_TXF_1023B },
3565 { "tx_1024_to_1518_byte_packets", GM_TXF_1518B },
3566 { "tx_1519_to_max_byte_packets", GM_TXF_MAX_SZ },
3567 { "tx_fifo_underrun", GM_TXE_FIFO_UR },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003568};
3569
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003570static u32 sky2_get_rx_csum(struct net_device *dev)
3571{
3572 struct sky2_port *sky2 = netdev_priv(dev);
3573
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003574 return !!(sky2->flags & SKY2_FLAG_RX_CHECKSUM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003575}
3576
3577static int sky2_set_rx_csum(struct net_device *dev, u32 data)
3578{
3579 struct sky2_port *sky2 = netdev_priv(dev);
3580
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003581 if (data)
3582 sky2->flags |= SKY2_FLAG_RX_CHECKSUM;
3583 else
3584 sky2->flags &= ~SKY2_FLAG_RX_CHECKSUM;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003585
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003586 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
3587 data ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
3588
3589 return 0;
3590}
3591
3592static u32 sky2_get_msglevel(struct net_device *netdev)
3593{
3594 struct sky2_port *sky2 = netdev_priv(netdev);
3595 return sky2->msg_enable;
3596}
3597
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003598static int sky2_nway_reset(struct net_device *dev)
3599{
3600 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003601
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003602 if (!netif_running(dev) || !(sky2->flags & SKY2_FLAG_AUTO_SPEED))
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003603 return -EINVAL;
3604
Stephen Hemminger1b537562005-12-20 15:08:07 -08003605 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003606 sky2_set_multicast(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003607
3608 return 0;
3609}
3610
Stephen Hemminger793b8832005-09-14 16:06:14 -07003611static void sky2_phy_stats(struct sky2_port *sky2, u64 * data, unsigned count)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003612{
3613 struct sky2_hw *hw = sky2->hw;
3614 unsigned port = sky2->port;
3615 int i;
3616
3617 data[0] = (u64) gma_read32(hw, port, GM_TXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003618 | (u64) gma_read32(hw, port, GM_TXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003619 data[1] = (u64) gma_read32(hw, port, GM_RXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003620 | (u64) gma_read32(hw, port, GM_RXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003621
Stephen Hemminger793b8832005-09-14 16:06:14 -07003622 for (i = 2; i < count; i++)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003623 data[i] = (u64) gma_read32(hw, port, sky2_stats[i].offset);
3624}
3625
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003626static void sky2_set_msglevel(struct net_device *netdev, u32 value)
3627{
3628 struct sky2_port *sky2 = netdev_priv(netdev);
3629 sky2->msg_enable = value;
3630}
3631
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003632static int sky2_get_sset_count(struct net_device *dev, int sset)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003633{
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003634 switch (sset) {
3635 case ETH_SS_STATS:
3636 return ARRAY_SIZE(sky2_stats);
3637 default:
3638 return -EOPNOTSUPP;
3639 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003640}
3641
3642static void sky2_get_ethtool_stats(struct net_device *dev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003643 struct ethtool_stats *stats, u64 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003644{
3645 struct sky2_port *sky2 = netdev_priv(dev);
3646
Stephen Hemminger793b8832005-09-14 16:06:14 -07003647 sky2_phy_stats(sky2, data, ARRAY_SIZE(sky2_stats));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003648}
3649
Stephen Hemminger793b8832005-09-14 16:06:14 -07003650static void sky2_get_strings(struct net_device *dev, u32 stringset, u8 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003651{
3652 int i;
3653
3654 switch (stringset) {
3655 case ETH_SS_STATS:
3656 for (i = 0; i < ARRAY_SIZE(sky2_stats); i++)
3657 memcpy(data + i * ETH_GSTRING_LEN,
3658 sky2_stats[i].name, ETH_GSTRING_LEN);
3659 break;
3660 }
3661}
3662
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003663static int sky2_set_mac_address(struct net_device *dev, void *p)
3664{
3665 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003666 struct sky2_hw *hw = sky2->hw;
3667 unsigned port = sky2->port;
3668 const struct sockaddr *addr = p;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003669
3670 if (!is_valid_ether_addr(addr->sa_data))
3671 return -EADDRNOTAVAIL;
3672
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003673 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003674 memcpy_toio(hw->regs + B2_MAC_1 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003675 dev->dev_addr, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003676 memcpy_toio(hw->regs + B2_MAC_2 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003677 dev->dev_addr, ETH_ALEN);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003678
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003679 /* virtual address for data */
3680 gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr);
3681
3682 /* physical address: used for pause frames */
3683 gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003684
3685 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003686}
3687
Mike McCormack060b9462010-07-29 03:34:52 +00003688static inline void sky2_add_filter(u8 filter[8], const u8 *addr)
Stephen Hemmingera052b522006-10-17 10:24:23 -07003689{
3690 u32 bit;
3691
3692 bit = ether_crc(ETH_ALEN, addr) & 63;
3693 filter[bit >> 3] |= 1 << (bit & 7);
3694}
3695
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003696static void sky2_set_multicast(struct net_device *dev)
3697{
3698 struct sky2_port *sky2 = netdev_priv(dev);
3699 struct sky2_hw *hw = sky2->hw;
3700 unsigned port = sky2->port;
Jiri Pirko22bedad32010-04-01 21:22:57 +00003701 struct netdev_hw_addr *ha;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003702 u16 reg;
3703 u8 filter[8];
Stephen Hemmingera052b522006-10-17 10:24:23 -07003704 int rx_pause;
3705 static const u8 pause_mc_addr[ETH_ALEN] = { 0x1, 0x80, 0xc2, 0x0, 0x0, 0x1 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003706
Stephen Hemmingera052b522006-10-17 10:24:23 -07003707 rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003708 memset(filter, 0, sizeof(filter));
3709
3710 reg = gma_read16(hw, port, GM_RX_CTRL);
3711 reg |= GM_RXCR_UCF_ENA;
3712
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07003713 if (dev->flags & IFF_PROMISC) /* promiscuous */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003714 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
Stephen Hemmingera052b522006-10-17 10:24:23 -07003715 else if (dev->flags & IFF_ALLMULTI)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003716 memset(filter, 0xff, sizeof(filter));
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00003717 else if (netdev_mc_empty(dev) && !rx_pause)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003718 reg &= ~GM_RXCR_MCF_ENA;
3719 else {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003720 reg |= GM_RXCR_MCF_ENA;
3721
Stephen Hemmingera052b522006-10-17 10:24:23 -07003722 if (rx_pause)
3723 sky2_add_filter(filter, pause_mc_addr);
3724
Jiri Pirko22bedad32010-04-01 21:22:57 +00003725 netdev_for_each_mc_addr(ha, dev)
3726 sky2_add_filter(filter, ha->addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003727 }
3728
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003729 gma_write16(hw, port, GM_MC_ADDR_H1,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003730 (u16) filter[0] | ((u16) filter[1] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003731 gma_write16(hw, port, GM_MC_ADDR_H2,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003732 (u16) filter[2] | ((u16) filter[3] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003733 gma_write16(hw, port, GM_MC_ADDR_H3,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003734 (u16) filter[4] | ((u16) filter[5] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003735 gma_write16(hw, port, GM_MC_ADDR_H4,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003736 (u16) filter[6] | ((u16) filter[7] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003737
3738 gma_write16(hw, port, GM_RX_CTRL, reg);
3739}
3740
3741/* Can have one global because blinking is controlled by
3742 * ethtool and that is always under RTNL mutex
3743 */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003744static void sky2_led(struct sky2_port *sky2, enum led_mode mode)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003745{
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003746 struct sky2_hw *hw = sky2->hw;
3747 unsigned port = sky2->port;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003748
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003749 spin_lock_bh(&sky2->phy_lock);
3750 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
3751 hw->chip_id == CHIP_ID_YUKON_EX ||
3752 hw->chip_id == CHIP_ID_YUKON_SUPR) {
3753 u16 pg;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003754 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3755 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003756
3757 switch (mode) {
3758 case MO_LED_OFF:
3759 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3760 PHY_M_LEDC_LOS_CTRL(8) |
3761 PHY_M_LEDC_INIT_CTRL(8) |
3762 PHY_M_LEDC_STA1_CTRL(8) |
3763 PHY_M_LEDC_STA0_CTRL(8));
3764 break;
3765 case MO_LED_ON:
3766 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3767 PHY_M_LEDC_LOS_CTRL(9) |
3768 PHY_M_LEDC_INIT_CTRL(9) |
3769 PHY_M_LEDC_STA1_CTRL(9) |
3770 PHY_M_LEDC_STA0_CTRL(9));
3771 break;
3772 case MO_LED_BLINK:
3773 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3774 PHY_M_LEDC_LOS_CTRL(0xa) |
3775 PHY_M_LEDC_INIT_CTRL(0xa) |
3776 PHY_M_LEDC_STA1_CTRL(0xa) |
3777 PHY_M_LEDC_STA0_CTRL(0xa));
3778 break;
3779 case MO_LED_NORM:
3780 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3781 PHY_M_LEDC_LOS_CTRL(1) |
3782 PHY_M_LEDC_INIT_CTRL(8) |
3783 PHY_M_LEDC_STA1_CTRL(7) |
3784 PHY_M_LEDC_STA0_CTRL(7));
3785 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003786
3787 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003788 } else
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -04003789 gm_phy_write(hw, port, PHY_MARV_LED_OVER,
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003790 PHY_M_LED_MO_DUP(mode) |
3791 PHY_M_LED_MO_10(mode) |
3792 PHY_M_LED_MO_100(mode) |
3793 PHY_M_LED_MO_1000(mode) |
3794 PHY_M_LED_MO_RX(mode) |
3795 PHY_M_LED_MO_TX(mode));
3796
3797 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003798}
3799
3800/* blink LED's for finding board */
3801static int sky2_phys_id(struct net_device *dev, u32 data)
3802{
3803 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003804 unsigned int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003805
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003806 if (data == 0)
3807 data = UINT_MAX;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003808
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003809 for (i = 0; i < data; i++) {
3810 sky2_led(sky2, MO_LED_ON);
3811 if (msleep_interruptible(500))
3812 break;
3813 sky2_led(sky2, MO_LED_OFF);
3814 if (msleep_interruptible(500))
3815 break;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003816 }
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003817 sky2_led(sky2, MO_LED_NORM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003818
3819 return 0;
3820}
3821
3822static void sky2_get_pauseparam(struct net_device *dev,
3823 struct ethtool_pauseparam *ecmd)
3824{
3825 struct sky2_port *sky2 = netdev_priv(dev);
3826
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003827 switch (sky2->flow_mode) {
3828 case FC_NONE:
3829 ecmd->tx_pause = ecmd->rx_pause = 0;
3830 break;
3831 case FC_TX:
3832 ecmd->tx_pause = 1, ecmd->rx_pause = 0;
3833 break;
3834 case FC_RX:
3835 ecmd->tx_pause = 0, ecmd->rx_pause = 1;
3836 break;
3837 case FC_BOTH:
3838 ecmd->tx_pause = ecmd->rx_pause = 1;
3839 }
3840
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003841 ecmd->autoneg = (sky2->flags & SKY2_FLAG_AUTO_PAUSE)
3842 ? AUTONEG_ENABLE : AUTONEG_DISABLE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003843}
3844
3845static int sky2_set_pauseparam(struct net_device *dev,
3846 struct ethtool_pauseparam *ecmd)
3847{
3848 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003849
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003850 if (ecmd->autoneg == AUTONEG_ENABLE)
3851 sky2->flags |= SKY2_FLAG_AUTO_PAUSE;
3852 else
3853 sky2->flags &= ~SKY2_FLAG_AUTO_PAUSE;
3854
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003855 sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003856
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003857 if (netif_running(dev))
3858 sky2_phy_reinit(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003859
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07003860 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003861}
3862
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003863static int sky2_get_coalesce(struct net_device *dev,
3864 struct ethtool_coalesce *ecmd)
3865{
3866 struct sky2_port *sky2 = netdev_priv(dev);
3867 struct sky2_hw *hw = sky2->hw;
3868
3869 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP)
3870 ecmd->tx_coalesce_usecs = 0;
3871 else {
3872 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI);
3873 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks);
3874 }
3875 ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH);
3876
3877 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP)
3878 ecmd->rx_coalesce_usecs = 0;
3879 else {
3880 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI);
3881 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks);
3882 }
3883 ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM);
3884
3885 if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP)
3886 ecmd->rx_coalesce_usecs_irq = 0;
3887 else {
3888 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI);
3889 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks);
3890 }
3891
3892 ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM);
3893
3894 return 0;
3895}
3896
3897/* Note: this affect both ports */
3898static int sky2_set_coalesce(struct net_device *dev,
3899 struct ethtool_coalesce *ecmd)
3900{
3901 struct sky2_port *sky2 = netdev_priv(dev);
3902 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003903 const u32 tmax = sky2_clk2us(hw, 0x0ffffff);
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003904
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003905 if (ecmd->tx_coalesce_usecs > tmax ||
3906 ecmd->rx_coalesce_usecs > tmax ||
3907 ecmd->rx_coalesce_usecs_irq > tmax)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003908 return -EINVAL;
3909
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00003910 if (ecmd->tx_max_coalesced_frames >= sky2->tx_ring_size-1)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003911 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003912 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003913 return -EINVAL;
Mike McCormack060b9462010-07-29 03:34:52 +00003914 if (ecmd->rx_max_coalesced_frames_irq > RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003915 return -EINVAL;
3916
3917 if (ecmd->tx_coalesce_usecs == 0)
3918 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
3919 else {
3920 sky2_write32(hw, STAT_TX_TIMER_INI,
3921 sky2_us2clk(hw, ecmd->tx_coalesce_usecs));
3922 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3923 }
3924 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames);
3925
3926 if (ecmd->rx_coalesce_usecs == 0)
3927 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
3928 else {
3929 sky2_write32(hw, STAT_LEV_TIMER_INI,
3930 sky2_us2clk(hw, ecmd->rx_coalesce_usecs));
3931 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3932 }
3933 sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames);
3934
3935 if (ecmd->rx_coalesce_usecs_irq == 0)
3936 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP);
3937 else {
Stephen Hemmingerd28d4872006-01-30 11:37:56 -08003938 sky2_write32(hw, STAT_ISR_TIMER_INI,
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003939 sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq));
3940 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
3941 }
3942 sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq);
3943 return 0;
3944}
3945
Stephen Hemminger793b8832005-09-14 16:06:14 -07003946static void sky2_get_ringparam(struct net_device *dev,
3947 struct ethtool_ringparam *ering)
3948{
3949 struct sky2_port *sky2 = netdev_priv(dev);
3950
3951 ering->rx_max_pending = RX_MAX_PENDING;
3952 ering->rx_mini_max_pending = 0;
3953 ering->rx_jumbo_max_pending = 0;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00003954 ering->tx_max_pending = TX_MAX_PENDING;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003955
3956 ering->rx_pending = sky2->rx_pending;
3957 ering->rx_mini_pending = 0;
3958 ering->rx_jumbo_pending = 0;
3959 ering->tx_pending = sky2->tx_pending;
3960}
3961
3962static int sky2_set_ringparam(struct net_device *dev,
3963 struct ethtool_ringparam *ering)
3964{
3965 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003966
3967 if (ering->rx_pending > RX_MAX_PENDING ||
3968 ering->rx_pending < 8 ||
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00003969 ering->tx_pending < TX_MIN_PENDING ||
3970 ering->tx_pending > TX_MAX_PENDING)
Stephen Hemminger793b8832005-09-14 16:06:14 -07003971 return -EINVAL;
3972
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003973 sky2_detach(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003974
3975 sky2->rx_pending = ering->rx_pending;
3976 sky2->tx_pending = ering->tx_pending;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00003977 sky2->tx_ring_size = roundup_pow_of_two(sky2->tx_pending+1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003978
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003979 return sky2_reattach(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003980}
3981
Stephen Hemminger793b8832005-09-14 16:06:14 -07003982static int sky2_get_regs_len(struct net_device *dev)
3983{
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003984 return 0x4000;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003985}
3986
Mike McCormackc32bbff2009-12-31 00:49:43 +00003987static int sky2_reg_access_ok(struct sky2_hw *hw, unsigned int b)
3988{
3989 /* This complicated switch statement is to make sure and
3990 * only access regions that are unreserved.
3991 * Some blocks are only valid on dual port cards.
3992 */
3993 switch (b) {
3994 /* second port */
3995 case 5: /* Tx Arbiter 2 */
3996 case 9: /* RX2 */
3997 case 14 ... 15: /* TX2 */
3998 case 17: case 19: /* Ram Buffer 2 */
3999 case 22 ... 23: /* Tx Ram Buffer 2 */
4000 case 25: /* Rx MAC Fifo 1 */
4001 case 27: /* Tx MAC Fifo 2 */
4002 case 31: /* GPHY 2 */
4003 case 40 ... 47: /* Pattern Ram 2 */
4004 case 52: case 54: /* TCP Segmentation 2 */
4005 case 112 ... 116: /* GMAC 2 */
4006 return hw->ports > 1;
4007
4008 case 0: /* Control */
4009 case 2: /* Mac address */
4010 case 4: /* Tx Arbiter 1 */
4011 case 7: /* PCI express reg */
4012 case 8: /* RX1 */
4013 case 12 ... 13: /* TX1 */
4014 case 16: case 18:/* Rx Ram Buffer 1 */
4015 case 20 ... 21: /* Tx Ram Buffer 1 */
4016 case 24: /* Rx MAC Fifo 1 */
4017 case 26: /* Tx MAC Fifo 1 */
4018 case 28 ... 29: /* Descriptor and status unit */
4019 case 30: /* GPHY 1*/
4020 case 32 ... 39: /* Pattern Ram 1 */
4021 case 48: case 50: /* TCP Segmentation 1 */
4022 case 56 ... 60: /* PCI space */
4023 case 80 ... 84: /* GMAC 1 */
4024 return 1;
4025
4026 default:
4027 return 0;
4028 }
4029}
4030
Stephen Hemminger793b8832005-09-14 16:06:14 -07004031/*
4032 * Returns copy of control register region
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07004033 * Note: ethtool_get_regs always provides full size (16k) buffer
Stephen Hemminger793b8832005-09-14 16:06:14 -07004034 */
4035static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs,
4036 void *p)
4037{
4038 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004039 const void __iomem *io = sky2->hw->regs;
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004040 unsigned int b;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004041
4042 regs->version = 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004043
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004044 for (b = 0; b < 128; b++) {
Mike McCormackc32bbff2009-12-31 00:49:43 +00004045 /* skip poisonous diagnostic ram region in block 3 */
4046 if (b == 3)
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004047 memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10);
Mike McCormackc32bbff2009-12-31 00:49:43 +00004048 else if (sky2_reg_access_ok(sky2->hw, b))
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004049 memcpy_fromio(p, io, 128);
Mike McCormackc32bbff2009-12-31 00:49:43 +00004050 else
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004051 memset(p, 0, 128);
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07004052
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004053 p += 128;
4054 io += 128;
4055 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07004056}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004057
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07004058/* In order to do Jumbo packets on these chips, need to turn off the
4059 * transmit store/forward. Therefore checksum offload won't work.
4060 */
4061static int no_tx_offload(struct net_device *dev)
4062{
4063 const struct sky2_port *sky2 = netdev_priv(dev);
4064 const struct sky2_hw *hw = sky2->hw;
4065
Stephen Hemminger69161612007-06-04 17:23:26 -07004066 return dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07004067}
4068
4069static int sky2_set_tx_csum(struct net_device *dev, u32 data)
4070{
4071 if (data && no_tx_offload(dev))
4072 return -EINVAL;
4073
4074 return ethtool_op_set_tx_csum(dev, data);
4075}
4076
4077
4078static int sky2_set_tso(struct net_device *dev, u32 data)
4079{
4080 if (data && no_tx_offload(dev))
4081 return -EINVAL;
4082
4083 return ethtool_op_set_tso(dev, data);
4084}
4085
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004086static int sky2_get_eeprom_len(struct net_device *dev)
4087{
4088 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004089 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004090 u16 reg2;
4091
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004092 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004093 return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
4094}
4095
Stephen Hemminger14132352008-08-27 20:46:26 -07004096static int sky2_vpd_wait(const struct sky2_hw *hw, int cap, u16 busy)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004097{
Stephen Hemminger14132352008-08-27 20:46:26 -07004098 unsigned long start = jiffies;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004099
Stephen Hemminger14132352008-08-27 20:46:26 -07004100 while ( (sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F) == busy) {
4101 /* Can take up to 10.6 ms for write */
4102 if (time_after(jiffies, start + HZ/4)) {
Joe Perchesada1db52010-02-17 15:01:59 +00004103 dev_err(&hw->pdev->dev, "VPD cycle timed out\n");
Stephen Hemminger14132352008-08-27 20:46:26 -07004104 return -ETIMEDOUT;
4105 }
4106 mdelay(1);
4107 }
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004108
Stephen Hemminger14132352008-08-27 20:46:26 -07004109 return 0;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004110}
4111
Stephen Hemminger14132352008-08-27 20:46:26 -07004112static int sky2_vpd_read(struct sky2_hw *hw, int cap, void *data,
4113 u16 offset, size_t length)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004114{
Stephen Hemminger14132352008-08-27 20:46:26 -07004115 int rc = 0;
4116
4117 while (length > 0) {
4118 u32 val;
4119
4120 sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset);
4121 rc = sky2_vpd_wait(hw, cap, 0);
4122 if (rc)
4123 break;
4124
4125 val = sky2_pci_read32(hw, cap + PCI_VPD_DATA);
4126
4127 memcpy(data, &val, min(sizeof(val), length));
4128 offset += sizeof(u32);
4129 data += sizeof(u32);
4130 length -= sizeof(u32);
4131 }
4132
4133 return rc;
4134}
4135
4136static int sky2_vpd_write(struct sky2_hw *hw, int cap, const void *data,
4137 u16 offset, unsigned int length)
4138{
4139 unsigned int i;
4140 int rc = 0;
4141
4142 for (i = 0; i < length; i += sizeof(u32)) {
4143 u32 val = *(u32 *)(data + i);
4144
4145 sky2_pci_write32(hw, cap + PCI_VPD_DATA, val);
4146 sky2_pci_write32(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
4147
4148 rc = sky2_vpd_wait(hw, cap, PCI_VPD_ADDR_F);
4149 if (rc)
4150 break;
4151 }
4152 return rc;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004153}
4154
4155static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
4156 u8 *data)
4157{
4158 struct sky2_port *sky2 = netdev_priv(dev);
4159 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004160
4161 if (!cap)
4162 return -EINVAL;
4163
4164 eeprom->magic = SKY2_EEPROM_MAGIC;
4165
Stephen Hemminger14132352008-08-27 20:46:26 -07004166 return sky2_vpd_read(sky2->hw, cap, data, eeprom->offset, eeprom->len);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004167}
4168
4169static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
4170 u8 *data)
4171{
4172 struct sky2_port *sky2 = netdev_priv(dev);
4173 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004174
4175 if (!cap)
4176 return -EINVAL;
4177
4178 if (eeprom->magic != SKY2_EEPROM_MAGIC)
4179 return -EINVAL;
4180
Stephen Hemminger14132352008-08-27 20:46:26 -07004181 /* Partial writes not supported */
4182 if ((eeprom->offset & 3) || (eeprom->len & 3))
4183 return -EINVAL;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004184
Stephen Hemminger14132352008-08-27 20:46:26 -07004185 return sky2_vpd_write(sky2->hw, cap, data, eeprom->offset, eeprom->len);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004186}
4187
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004188static int sky2_set_flags(struct net_device *dev, u32 data)
4189{
4190 struct sky2_port *sky2 = netdev_priv(dev);
Ben Hutchings1437ce32010-06-30 02:44:32 +00004191 u32 supported =
4192 (sky2->hw->flags & SKY2_HW_RSS_BROKEN) ? 0 : ETH_FLAG_RXHASH;
4193 int rc;
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004194
Ben Hutchings1437ce32010-06-30 02:44:32 +00004195 rc = ethtool_op_set_flags(dev, data, supported);
4196 if (rc)
4197 return rc;
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004198
4199 rx_set_rss(dev);
4200
4201 return 0;
4202}
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004203
Jeff Garzik7282d492006-09-13 14:30:00 -04004204static const struct ethtool_ops sky2_ethtool_ops = {
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004205 .get_settings = sky2_get_settings,
4206 .set_settings = sky2_set_settings,
4207 .get_drvinfo = sky2_get_drvinfo,
4208 .get_wol = sky2_get_wol,
4209 .set_wol = sky2_set_wol,
4210 .get_msglevel = sky2_get_msglevel,
4211 .set_msglevel = sky2_set_msglevel,
4212 .nway_reset = sky2_nway_reset,
4213 .get_regs_len = sky2_get_regs_len,
4214 .get_regs = sky2_get_regs,
4215 .get_link = ethtool_op_get_link,
4216 .get_eeprom_len = sky2_get_eeprom_len,
4217 .get_eeprom = sky2_get_eeprom,
4218 .set_eeprom = sky2_set_eeprom,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004219 .set_sg = ethtool_op_set_sg,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004220 .set_tx_csum = sky2_set_tx_csum,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004221 .set_tso = sky2_set_tso,
4222 .get_rx_csum = sky2_get_rx_csum,
4223 .set_rx_csum = sky2_set_rx_csum,
4224 .get_strings = sky2_get_strings,
4225 .get_coalesce = sky2_get_coalesce,
4226 .set_coalesce = sky2_set_coalesce,
4227 .get_ringparam = sky2_get_ringparam,
4228 .set_ringparam = sky2_set_ringparam,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004229 .get_pauseparam = sky2_get_pauseparam,
4230 .set_pauseparam = sky2_set_pauseparam,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004231 .phys_id = sky2_phys_id,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07004232 .get_sset_count = sky2_get_sset_count,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004233 .get_ethtool_stats = sky2_get_ethtool_stats,
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004234 .set_flags = sky2_set_flags,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004235};
4236
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004237#ifdef CONFIG_SKY2_DEBUG
4238
4239static struct dentry *sky2_debug;
4240
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004241
4242/*
4243 * Read and parse the first part of Vital Product Data
4244 */
4245#define VPD_SIZE 128
4246#define VPD_MAGIC 0x82
4247
4248static const struct vpd_tag {
4249 char tag[2];
4250 char *label;
4251} vpd_tags[] = {
4252 { "PN", "Part Number" },
4253 { "EC", "Engineering Level" },
4254 { "MN", "Manufacturer" },
4255 { "SN", "Serial Number" },
4256 { "YA", "Asset Tag" },
4257 { "VL", "First Error Log Message" },
4258 { "VF", "Second Error Log Message" },
4259 { "VB", "Boot Agent ROM Configuration" },
4260 { "VE", "EFI UNDI Configuration" },
4261};
4262
4263static void sky2_show_vpd(struct seq_file *seq, struct sky2_hw *hw)
4264{
4265 size_t vpd_size;
4266 loff_t offs;
4267 u8 len;
4268 unsigned char *buf;
4269 u16 reg2;
4270
4271 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
4272 vpd_size = 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
4273
4274 seq_printf(seq, "%s Product Data\n", pci_name(hw->pdev));
4275 buf = kmalloc(vpd_size, GFP_KERNEL);
4276 if (!buf) {
4277 seq_puts(seq, "no memory!\n");
4278 return;
4279 }
4280
4281 if (pci_read_vpd(hw->pdev, 0, vpd_size, buf) < 0) {
4282 seq_puts(seq, "VPD read failed\n");
4283 goto out;
4284 }
4285
4286 if (buf[0] != VPD_MAGIC) {
4287 seq_printf(seq, "VPD tag mismatch: %#x\n", buf[0]);
4288 goto out;
4289 }
4290 len = buf[1];
4291 if (len == 0 || len > vpd_size - 4) {
4292 seq_printf(seq, "Invalid id length: %d\n", len);
4293 goto out;
4294 }
4295
4296 seq_printf(seq, "%.*s\n", len, buf + 3);
4297 offs = len + 3;
4298
4299 while (offs < vpd_size - 4) {
4300 int i;
4301
4302 if (!memcmp("RW", buf + offs, 2)) /* end marker */
4303 break;
4304 len = buf[offs + 2];
4305 if (offs + len + 3 >= vpd_size)
4306 break;
4307
4308 for (i = 0; i < ARRAY_SIZE(vpd_tags); i++) {
4309 if (!memcmp(vpd_tags[i].tag, buf + offs, 2)) {
4310 seq_printf(seq, " %s: %.*s\n",
4311 vpd_tags[i].label, len, buf + offs + 3);
4312 break;
4313 }
4314 }
4315 offs += len + 3;
4316 }
4317out:
4318 kfree(buf);
4319}
4320
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004321static int sky2_debug_show(struct seq_file *seq, void *v)
4322{
4323 struct net_device *dev = seq->private;
4324 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004325 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004326 unsigned port = sky2->port;
4327 unsigned idx, last;
4328 int sop;
4329
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004330 sky2_show_vpd(seq, hw);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004331
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004332 seq_printf(seq, "\nIRQ src=%x mask=%x control=%x\n",
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004333 sky2_read32(hw, B0_ISRC),
4334 sky2_read32(hw, B0_IMSK),
4335 sky2_read32(hw, B0_Y2_SP_ICR));
4336
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004337 if (!netif_running(dev)) {
4338 seq_printf(seq, "network not running\n");
4339 return 0;
4340 }
4341
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004342 napi_disable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004343 last = sky2_read16(hw, STAT_PUT_IDX);
4344
stephen hemmingerefe91932010-04-22 13:42:56 +00004345 seq_printf(seq, "Status ring %u\n", hw->st_size);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004346 if (hw->st_idx == last)
4347 seq_puts(seq, "Status ring (empty)\n");
4348 else {
4349 seq_puts(seq, "Status ring\n");
stephen hemmingerefe91932010-04-22 13:42:56 +00004350 for (idx = hw->st_idx; idx != last && idx < hw->st_size;
4351 idx = RING_NEXT(idx, hw->st_size)) {
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004352 const struct sky2_status_le *le = hw->st_le + idx;
4353 seq_printf(seq, "[%d] %#x %d %#x\n",
4354 idx, le->opcode, le->length, le->status);
4355 }
4356 seq_puts(seq, "\n");
4357 }
4358
4359 seq_printf(seq, "Tx ring pending=%u...%u report=%d done=%d\n",
4360 sky2->tx_cons, sky2->tx_prod,
4361 sky2_read16(hw, port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
4362 sky2_read16(hw, Q_ADDR(txqaddr[port], Q_DONE)));
4363
4364 /* Dump contents of tx ring */
4365 sop = 1;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004366 for (idx = sky2->tx_next; idx != sky2->tx_prod && idx < sky2->tx_ring_size;
4367 idx = RING_NEXT(idx, sky2->tx_ring_size)) {
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004368 const struct sky2_tx_le *le = sky2->tx_le + idx;
4369 u32 a = le32_to_cpu(le->addr);
4370
4371 if (sop)
4372 seq_printf(seq, "%u:", idx);
4373 sop = 0;
4374
Mike McCormack060b9462010-07-29 03:34:52 +00004375 switch (le->opcode & ~HW_OWNER) {
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004376 case OP_ADDR64:
4377 seq_printf(seq, " %#x:", a);
4378 break;
4379 case OP_LRGLEN:
4380 seq_printf(seq, " mtu=%d", a);
4381 break;
4382 case OP_VLAN:
4383 seq_printf(seq, " vlan=%d", be16_to_cpu(le->length));
4384 break;
4385 case OP_TCPLISW:
4386 seq_printf(seq, " csum=%#x", a);
4387 break;
4388 case OP_LARGESEND:
4389 seq_printf(seq, " tso=%#x(%d)", a, le16_to_cpu(le->length));
4390 break;
4391 case OP_PACKET:
4392 seq_printf(seq, " %#x(%d)", a, le16_to_cpu(le->length));
4393 break;
4394 case OP_BUFFER:
4395 seq_printf(seq, " frag=%#x(%d)", a, le16_to_cpu(le->length));
4396 break;
4397 default:
4398 seq_printf(seq, " op=%#x,%#x(%d)", le->opcode,
4399 a, le16_to_cpu(le->length));
4400 }
4401
4402 if (le->ctrl & EOP) {
4403 seq_putc(seq, '\n');
4404 sop = 1;
4405 }
4406 }
4407
4408 seq_printf(seq, "\nRx ring hw get=%d put=%d last=%d\n",
4409 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_GET_IDX)),
Mike McCormackc409c342009-07-21 14:51:20 +00004410 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_PUT_IDX)),
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004411 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_LAST_IDX)));
4412
David S. Millerd1d08d12008-01-07 20:53:33 -08004413 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004414 napi_enable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004415 return 0;
4416}
4417
4418static int sky2_debug_open(struct inode *inode, struct file *file)
4419{
4420 return single_open(file, sky2_debug_show, inode->i_private);
4421}
4422
4423static const struct file_operations sky2_debug_fops = {
4424 .owner = THIS_MODULE,
4425 .open = sky2_debug_open,
4426 .read = seq_read,
4427 .llseek = seq_lseek,
4428 .release = single_release,
4429};
4430
4431/*
4432 * Use network device events to create/remove/rename
4433 * debugfs file entries
4434 */
4435static int sky2_device_event(struct notifier_block *unused,
4436 unsigned long event, void *ptr)
4437{
4438 struct net_device *dev = ptr;
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004439 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004440
Stephen Hemminger1436b302008-11-19 21:59:54 -08004441 if (dev->netdev_ops->ndo_open != sky2_up || !sky2_debug)
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004442 return NOTIFY_DONE;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004443
Mike McCormack060b9462010-07-29 03:34:52 +00004444 switch (event) {
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004445 case NETDEV_CHANGENAME:
4446 if (sky2->debugfs) {
4447 sky2->debugfs = debugfs_rename(sky2_debug, sky2->debugfs,
4448 sky2_debug, dev->name);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004449 }
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004450 break;
4451
4452 case NETDEV_GOING_DOWN:
4453 if (sky2->debugfs) {
Joe Perchesada1db52010-02-17 15:01:59 +00004454 netdev_printk(KERN_DEBUG, dev, "remove debugfs\n");
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004455 debugfs_remove(sky2->debugfs);
4456 sky2->debugfs = NULL;
4457 }
4458 break;
4459
4460 case NETDEV_UP:
4461 sky2->debugfs = debugfs_create_file(dev->name, S_IRUGO,
4462 sky2_debug, dev,
4463 &sky2_debug_fops);
4464 if (IS_ERR(sky2->debugfs))
4465 sky2->debugfs = NULL;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004466 }
4467
4468 return NOTIFY_DONE;
4469}
4470
4471static struct notifier_block sky2_notifier = {
4472 .notifier_call = sky2_device_event,
4473};
4474
4475
4476static __init void sky2_debug_init(void)
4477{
4478 struct dentry *ent;
4479
4480 ent = debugfs_create_dir("sky2", NULL);
4481 if (!ent || IS_ERR(ent))
4482 return;
4483
4484 sky2_debug = ent;
4485 register_netdevice_notifier(&sky2_notifier);
4486}
4487
4488static __exit void sky2_debug_cleanup(void)
4489{
4490 if (sky2_debug) {
4491 unregister_netdevice_notifier(&sky2_notifier);
4492 debugfs_remove(sky2_debug);
4493 sky2_debug = NULL;
4494 }
4495}
4496
4497#else
4498#define sky2_debug_init()
4499#define sky2_debug_cleanup()
4500#endif
4501
Stephen Hemminger1436b302008-11-19 21:59:54 -08004502/* Two copies of network device operations to handle special case of
4503 not allowing netpoll on second port */
4504static const struct net_device_ops sky2_netdev_ops[2] = {
4505 {
4506 .ndo_open = sky2_up,
4507 .ndo_stop = sky2_down,
Stephen Hemminger00829822008-11-20 20:14:53 -08004508 .ndo_start_xmit = sky2_xmit_frame,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004509 .ndo_do_ioctl = sky2_ioctl,
4510 .ndo_validate_addr = eth_validate_addr,
4511 .ndo_set_mac_address = sky2_set_mac_address,
4512 .ndo_set_multicast_list = sky2_set_multicast,
4513 .ndo_change_mtu = sky2_change_mtu,
4514 .ndo_tx_timeout = sky2_tx_timeout,
4515#ifdef SKY2_VLAN_TAG_USED
4516 .ndo_vlan_rx_register = sky2_vlan_rx_register,
4517#endif
4518#ifdef CONFIG_NET_POLL_CONTROLLER
4519 .ndo_poll_controller = sky2_netpoll,
4520#endif
4521 },
4522 {
4523 .ndo_open = sky2_up,
4524 .ndo_stop = sky2_down,
Stephen Hemminger00829822008-11-20 20:14:53 -08004525 .ndo_start_xmit = sky2_xmit_frame,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004526 .ndo_do_ioctl = sky2_ioctl,
4527 .ndo_validate_addr = eth_validate_addr,
4528 .ndo_set_mac_address = sky2_set_mac_address,
4529 .ndo_set_multicast_list = sky2_set_multicast,
4530 .ndo_change_mtu = sky2_change_mtu,
4531 .ndo_tx_timeout = sky2_tx_timeout,
4532#ifdef SKY2_VLAN_TAG_USED
4533 .ndo_vlan_rx_register = sky2_vlan_rx_register,
4534#endif
4535 },
4536};
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004537
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004538/* Initialize network device */
4539static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
Stephen Hemmingere3173832007-02-06 10:45:39 -08004540 unsigned port,
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004541 int highmem, int wol)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004542{
4543 struct sky2_port *sky2;
4544 struct net_device *dev = alloc_etherdev(sizeof(*sky2));
4545
4546 if (!dev) {
Joe Perches898eb712007-10-18 03:06:30 -07004547 dev_err(&hw->pdev->dev, "etherdev alloc failed\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004548 return NULL;
4549 }
4550
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004551 SET_NETDEV_DEV(dev, &hw->pdev->dev);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08004552 dev->irq = hw->pdev->irq;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004553 SET_ETHTOOL_OPS(dev, &sky2_ethtool_ops);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004554 dev->watchdog_timeo = TX_WATCHDOG;
Stephen Hemminger1436b302008-11-19 21:59:54 -08004555 dev->netdev_ops = &sky2_netdev_ops[port];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004556
4557 sky2 = netdev_priv(dev);
4558 sky2->netdev = dev;
4559 sky2->hw = hw;
4560 sky2->msg_enable = netif_msg_init(debug, default_msg);
4561
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004562 /* Auto speed and flow control */
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07004563 sky2->flags = SKY2_FLAG_AUTO_SPEED | SKY2_FLAG_AUTO_PAUSE;
4564 if (hw->chip_id != CHIP_ID_YUKON_XL)
4565 sky2->flags |= SKY2_FLAG_RX_CHECKSUM;
4566
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07004567 sky2->flow_mode = FC_BOTH;
4568
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004569 sky2->duplex = -1;
4570 sky2->speed = -1;
4571 sky2->advertising = sky2_supported_modes(hw);
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004572 sky2->wol = wol;
Stephen Hemminger75d070c2005-12-09 11:35:11 -08004573
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08004574 spin_lock_init(&sky2->phy_lock);
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004575
Stephen Hemminger793b8832005-09-14 16:06:14 -07004576 sky2->tx_pending = TX_DEF_PENDING;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004577 sky2->tx_ring_size = roundup_pow_of_two(TX_DEF_PENDING+1);
Stephen Hemminger290d4de2006-03-20 15:48:15 -08004578 sky2->rx_pending = RX_DEF_PENDING;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004579
4580 hw->dev[port] = dev;
4581
4582 sky2->port = port;
4583
Stephen Hemminger4a50a872007-02-06 10:45:41 -08004584 dev->features |= NETIF_F_TSO | NETIF_F_IP_CSUM | NETIF_F_SG;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004585 if (highmem)
4586 dev->features |= NETIF_F_HIGHDMA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004587
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004588 /* Enable receive hashing unless hardware is known broken */
4589 if (!(hw->flags & SKY2_HW_RSS_BROKEN))
4590 dev->features |= NETIF_F_RXHASH;
4591
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004592#ifdef SKY2_VLAN_TAG_USED
Stephen Hemmingerd6c9bc12007-09-27 12:32:44 -07004593 /* The workaround for FE+ status conflicts with VLAN tag detection. */
4594 if (!(sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
4595 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0)) {
4596 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
Stephen Hemmingerd6c9bc12007-09-27 12:32:44 -07004597 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004598#endif
4599
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004600 /* read the mac address */
Stephen Hemminger793b8832005-09-14 16:06:14 -07004601 memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
Stephen Hemminger2995bfb2005-09-28 10:01:03 -07004602 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004603
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004604 return dev;
4605}
4606
Stephen Hemminger28bd1812006-01-17 13:43:19 -08004607static void __devinit sky2_show_addr(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004608{
4609 const struct sky2_port *sky2 = netdev_priv(dev);
4610
Joe Perches6c35aba2010-02-15 08:34:21 +00004611 netif_info(sky2, probe, dev, "addr %pM\n", dev->dev_addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004612}
4613
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004614/* Handle software interrupt used during MSI test */
David Howells7d12e782006-10-05 14:55:46 +01004615static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id)
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004616{
4617 struct sky2_hw *hw = dev_id;
4618 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
4619
4620 if (status == 0)
4621 return IRQ_NONE;
4622
4623 if (status & Y2_IS_IRQ_SW) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004624 hw->flags |= SKY2_HW_USE_MSI;
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004625 wake_up(&hw->msi_wait);
4626 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4627 }
4628 sky2_write32(hw, B0_Y2_SP_ICR, 2);
4629
4630 return IRQ_HANDLED;
4631}
4632
4633/* Test interrupt path by forcing a a software IRQ */
4634static int __devinit sky2_test_msi(struct sky2_hw *hw)
4635{
4636 struct pci_dev *pdev = hw->pdev;
4637 int err;
4638
Mike McCormack060b9462010-07-29 03:34:52 +00004639 init_waitqueue_head(&hw->msi_wait);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004640
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004641 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
4642
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004643 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004644 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004645 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004646 return err;
4647 }
4648
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004649 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004650 sky2_read8(hw, B0_CTST);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004651
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004652 wait_event_timeout(hw->msi_wait, (hw->flags & SKY2_HW_USE_MSI), HZ/10);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004653
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004654 if (!(hw->flags & SKY2_HW_USE_MSI)) {
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004655 /* MSI test failed, go back to INTx mode */
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004656 dev_info(&pdev->dev, "No interrupt generated using MSI, "
4657 "switching to INTx mode.\n");
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004658
4659 err = -EOPNOTSUPP;
4660 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4661 }
4662
4663 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger2bffc232006-10-17 10:17:18 -07004664 sky2_read32(hw, B0_IMSK);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004665
4666 free_irq(pdev->irq, hw);
4667
4668 return err;
4669}
4670
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004671/* This driver supports yukon2 chipset only */
4672static const char *sky2_name(u8 chipid, char *buf, int sz)
4673{
4674 const char *name[] = {
4675 "XL", /* 0xb3 */
4676 "EC Ultra", /* 0xb4 */
4677 "Extreme", /* 0xb5 */
4678 "EC", /* 0xb6 */
4679 "FE", /* 0xb7 */
4680 "FE+", /* 0xb8 */
4681 "Supreme", /* 0xb9 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07004682 "UL 2", /* 0xba */
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00004683 "Unknown", /* 0xbb */
4684 "Optima", /* 0xbc */
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004685 };
4686
stephen hemmingerdae3a512009-12-14 08:33:47 +00004687 if (chipid >= CHIP_ID_YUKON_XL && chipid <= CHIP_ID_YUKON_OPT)
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004688 strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz);
4689 else
4690 snprintf(buf, sz, "(chip %#x)", chipid);
4691 return buf;
4692}
4693
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004694static int __devinit sky2_probe(struct pci_dev *pdev,
4695 const struct pci_device_id *ent)
4696{
shemminger@linux-foundation.org7f60c64b2007-01-26 11:38:36 -08004697 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004698 struct sky2_hw *hw;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004699 int err, using_dac = 0, wol_default;
Stephen Hemminger38345072009-02-03 11:27:30 +00004700 u32 reg;
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004701 char buf1[16];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004702
Stephen Hemminger793b8832005-09-14 16:06:14 -07004703 err = pci_enable_device(pdev);
4704 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004705 dev_err(&pdev->dev, "cannot enable PCI device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004706 goto err_out;
4707 }
4708
Stephen Hemminger6cc90a52009-06-11 07:03:47 +00004709 /* Get configuration information
4710 * Note: only regular PCI config access once to test for HW issues
4711 * other PCI access through shared memory for speed and to
4712 * avoid MMCONFIG problems.
4713 */
4714 err = pci_read_config_dword(pdev, PCI_DEV_REG2, &reg);
4715 if (err) {
4716 dev_err(&pdev->dev, "PCI read config failed\n");
4717 goto err_out;
4718 }
4719
4720 if (~reg == 0) {
4721 dev_err(&pdev->dev, "PCI configuration read error\n");
4722 goto err_out;
4723 }
4724
Stephen Hemminger793b8832005-09-14 16:06:14 -07004725 err = pci_request_regions(pdev, DRV_NAME);
4726 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004727 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004728 goto err_out_disable;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004729 }
4730
4731 pci_set_master(pdev);
4732
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004733 if (sizeof(dma_addr_t) > sizeof(u32) &&
Yang Hongyang6a355282009-04-06 19:01:13 -07004734 !(err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))) {
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004735 using_dac = 1;
Yang Hongyang6a355282009-04-06 19:01:13 -07004736 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004737 if (err < 0) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004738 dev_err(&pdev->dev, "unable to obtain 64 bit DMA "
4739 "for consistent allocations\n");
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004740 goto err_out_free_regions;
4741 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004742 } else {
Yang Hongyang284901a2009-04-06 19:01:15 -07004743 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004744 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004745 dev_err(&pdev->dev, "no usable DMA configuration\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004746 goto err_out_free_regions;
4747 }
4748 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004749
Stephen Hemminger38345072009-02-03 11:27:30 +00004750
4751#ifdef __BIG_ENDIAN
4752 /* The sk98lin vendor driver uses hardware byte swapping but
4753 * this driver uses software swapping.
4754 */
4755 reg &= ~PCI_REV_DESC;
Mike McCormack060b9462010-07-29 03:34:52 +00004756 err = pci_write_config_dword(pdev, PCI_DEV_REG2, reg);
Stephen Hemminger38345072009-02-03 11:27:30 +00004757 if (err) {
4758 dev_err(&pdev->dev, "PCI write config failed\n");
4759 goto err_out_free_regions;
4760 }
4761#endif
4762
Rafael J. Wysocki9d731d72008-10-12 20:59:48 -07004763 wol_default = device_may_wakeup(&pdev->dev) ? WAKE_MAGIC : 0;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004764
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004765 err = -ENOMEM;
Stephen Hemminger66466792009-10-01 07:11:46 +00004766
4767 hw = kzalloc(sizeof(*hw) + strlen(DRV_NAME "@pci:")
4768 + strlen(pci_name(pdev)) + 1, GFP_KERNEL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004769 if (!hw) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004770 dev_err(&pdev->dev, "cannot allocate hardware struct\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004771 goto err_out_free_regions;
4772 }
4773
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004774 hw->pdev = pdev;
Stephen Hemminger66466792009-10-01 07:11:46 +00004775 sprintf(hw->irq_name, DRV_NAME "@pci:%s", pci_name(pdev));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004776
4777 hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000);
4778 if (!hw->regs) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004779 dev_err(&pdev->dev, "cannot map device registers\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004780 goto err_out_free_hw;
4781 }
4782
Stephen Hemmingere3173832007-02-06 10:45:39 -08004783 err = sky2_init(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004784 if (err)
Stephen Hemminger793b8832005-09-14 16:06:14 -07004785 goto err_out_iounmap;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004786
stephen hemmingerefe91932010-04-22 13:42:56 +00004787 /* ring for status responses */
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004788 hw->st_size = hw->ports * roundup_pow_of_two(3*RX_MAX_PENDING + TX_MAX_PENDING);
stephen hemmingerefe91932010-04-22 13:42:56 +00004789 hw->st_le = pci_alloc_consistent(pdev, hw->st_size * sizeof(struct sky2_status_le),
4790 &hw->st_dma);
4791 if (!hw->st_le)
4792 goto err_out_reset;
4793
Stephen Hemmingerc844d482008-08-27 20:48:23 -07004794 dev_info(&pdev->dev, "Yukon-2 %s chip revision %d\n",
4795 sky2_name(hw->chip_id, buf1, sizeof(buf1)), hw->chip_rev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004796
Stephen Hemmingere3173832007-02-06 10:45:39 -08004797 sky2_reset(hw);
4798
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004799 dev = sky2_init_netdev(hw, 0, using_dac, wol_default);
shemminger@linux-foundation.org7f60c64b2007-01-26 11:38:36 -08004800 if (!dev) {
4801 err = -ENOMEM;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004802 goto err_out_free_pci;
shemminger@linux-foundation.org7f60c64b2007-01-26 11:38:36 -08004803 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004804
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004805 if (!disable_msi && pci_enable_msi(pdev) == 0) {
4806 err = sky2_test_msi(hw);
4807 if (err == -EOPNOTSUPP)
4808 pci_disable_msi(pdev);
4809 else if (err)
4810 goto err_out_free_netdev;
4811 }
4812
Stephen Hemminger793b8832005-09-14 16:06:14 -07004813 err = register_netdev(dev);
4814 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004815 dev_err(&pdev->dev, "cannot register net device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004816 goto err_out_free_netdev;
4817 }
4818
Brandon Philips33cb7d32009-10-29 13:58:07 +00004819 netif_carrier_off(dev);
4820
Stephen Hemminger6de16232007-10-17 13:26:42 -07004821 netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT);
4822
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004823 err = request_irq(pdev->irq, sky2_intr,
4824 (hw->flags & SKY2_HW_USE_MSI) ? 0 : IRQF_SHARED,
Stephen Hemminger66466792009-10-01 07:11:46 +00004825 hw->irq_name, hw);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004826 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004827 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004828 goto err_out_unregister;
4829 }
4830 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004831 napi_enable(&hw->napi);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004832
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004833 sky2_show_addr(dev);
4834
shemminger@linux-foundation.org7f60c64b2007-01-26 11:38:36 -08004835 if (hw->ports > 1) {
4836 struct net_device *dev1;
4837
Stephen Hemmingerca519272009-09-14 06:22:29 +00004838 err = -ENOMEM;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004839 dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default);
Stephen Hemmingerca519272009-09-14 06:22:29 +00004840 if (dev1 && (err = register_netdev(dev1)) == 0)
4841 sky2_show_addr(dev1);
4842 else {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004843 dev_warn(&pdev->dev,
4844 "register of second port failed (%d)\n", err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004845 hw->dev[1] = NULL;
Stephen Hemmingerca519272009-09-14 06:22:29 +00004846 hw->ports = 1;
4847 if (dev1)
4848 free_netdev(dev1);
4849 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004850 }
4851
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004852 setup_timer(&hw->watchdog_timer, sky2_watchdog, (unsigned long) hw);
Stephen Hemminger81906792007-02-15 16:40:33 -08004853 INIT_WORK(&hw->restart_work, sky2_restart);
4854
Stephen Hemminger793b8832005-09-14 16:06:14 -07004855 pci_set_drvdata(pdev, hw);
Rafael J. Wysocki1ae861e2009-12-31 12:15:54 +01004856 pdev->d3_delay = 150;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004857
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004858 return 0;
4859
Stephen Hemminger793b8832005-09-14 16:06:14 -07004860err_out_unregister:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004861 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004862 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004863 unregister_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004864err_out_free_netdev:
4865 free_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004866err_out_free_pci:
stephen hemmingerefe91932010-04-22 13:42:56 +00004867 pci_free_consistent(pdev, hw->st_size * sizeof(struct sky2_status_le),
4868 hw->st_le, hw->st_dma);
4869err_out_reset:
Stephen Hemminger793b8832005-09-14 16:06:14 -07004870 sky2_write8(hw, B0_CTST, CS_RST_SET);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004871err_out_iounmap:
4872 iounmap(hw->regs);
4873err_out_free_hw:
4874 kfree(hw);
4875err_out_free_regions:
4876 pci_release_regions(pdev);
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004877err_out_disable:
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004878 pci_disable_device(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004879err_out:
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004880 pci_set_drvdata(pdev, NULL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004881 return err;
4882}
4883
4884static void __devexit sky2_remove(struct pci_dev *pdev)
4885{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004886 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004887 int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004888
Stephen Hemminger793b8832005-09-14 16:06:14 -07004889 if (!hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004890 return;
4891
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004892 del_timer_sync(&hw->watchdog_timer);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004893 cancel_work_sync(&hw->restart_work);
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004894
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07004895 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07004896 unregister_netdev(hw->dev[i]);
Stephen Hemminger81906792007-02-15 16:40:33 -08004897
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004898 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004899
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004900 sky2_power_aux(hw);
4901
Stephen Hemminger793b8832005-09-14 16:06:14 -07004902 sky2_write8(hw, B0_CTST, CS_RST_SET);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004903 sky2_read8(hw, B0_CTST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004904
4905 free_irq(pdev->irq, hw);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004906 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004907 pci_disable_msi(pdev);
stephen hemmingerefe91932010-04-22 13:42:56 +00004908 pci_free_consistent(pdev, hw->st_size * sizeof(struct sky2_status_le),
4909 hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004910 pci_release_regions(pdev);
4911 pci_disable_device(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004912
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07004913 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07004914 free_netdev(hw->dev[i]);
4915
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004916 iounmap(hw->regs);
4917 kfree(hw);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004918
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004919 pci_set_drvdata(pdev, NULL);
4920}
4921
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004922static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
4923{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004924 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004925 int i, wol = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004926
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004927 if (!hw)
4928 return 0;
4929
Stephen Hemminger063a0b32008-04-02 09:03:23 -07004930 del_timer_sync(&hw->watchdog_timer);
4931 cancel_work_sync(&hw->restart_work);
4932
Stephen Hemminger19720732009-08-14 05:15:16 +00004933 rtnl_lock();
Mike McCormack3403aca2010-05-13 06:12:52 +00004934
4935 sky2_all_down(hw);
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004936 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004937 struct net_device *dev = hw->dev[i];
Stephen Hemmingere3173832007-02-06 10:45:39 -08004938 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004939
Stephen Hemmingere3173832007-02-06 10:45:39 -08004940 if (sky2->wol)
4941 sky2_wol_init(sky2);
4942
4943 wol |= sky2->wol;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004944 }
4945
stephen hemminger5f8ae5c2010-02-12 06:57:59 +00004946 device_set_wakeup_enable(&pdev->dev, wol != 0);
4947
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004948 sky2_power_aux(hw);
Stephen Hemminger19720732009-08-14 05:15:16 +00004949 rtnl_unlock();
Stephen Hemmingere3173832007-02-06 10:45:39 -08004950
Linus Torvaldsd374c1c2006-06-12 12:53:27 -07004951 pci_save_state(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004952 pci_enable_wake(pdev, pci_choose_state(pdev, state), wol);
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -07004953 pci_set_power_state(pdev, pci_choose_state(pdev, state));
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004954
Stephen Hemminger2ccc99b2006-06-13 17:17:27 +09004955 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004956}
4957
stephen hemminger5f8ae5c2010-02-12 06:57:59 +00004958#ifdef CONFIG_PM
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004959static int sky2_resume(struct pci_dev *pdev)
4960{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004961 struct sky2_hw *hw = pci_get_drvdata(pdev);
Mike McCormack3403aca2010-05-13 06:12:52 +00004962 int err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004963
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004964 if (!hw)
4965 return 0;
4966
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -07004967 err = pci_set_power_state(pdev, PCI_D0);
4968 if (err)
4969 goto out;
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004970
4971 err = pci_restore_state(pdev);
4972 if (err)
4973 goto out;
4974
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004975 pci_enable_wake(pdev, PCI_D0, 0);
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004976
4977 /* Re-enable all clocks */
stephen hemmingera0db28b2010-02-07 06:23:53 +00004978 err = pci_write_config_dword(pdev, PCI_DEV_REG3, 0);
4979 if (err) {
4980 dev_err(&pdev->dev, "PCI write config failed\n");
4981 goto out;
4982 }
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004983
Mike McCormack3403aca2010-05-13 06:12:52 +00004984 rtnl_lock();
Stephen Hemmingere3173832007-02-06 10:45:39 -08004985 sky2_reset(hw);
Mike McCormack3403aca2010-05-13 06:12:52 +00004986 sky2_all_up(hw);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07004987 rtnl_unlock();
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004988
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004989 return 0;
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004990out:
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07004991
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004992 dev_err(&pdev->dev, "resume failed (%d)\n", err);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004993 pci_disable_device(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004994 return err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004995}
4996#endif
4997
Stephen Hemmingere3173832007-02-06 10:45:39 -08004998static void sky2_shutdown(struct pci_dev *pdev)
4999{
stephen hemminger5f8ae5c2010-02-12 06:57:59 +00005000 sky2_suspend(pdev, PMSG_SUSPEND);
Stephen Hemmingere3173832007-02-06 10:45:39 -08005001}
5002
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005003static struct pci_driver sky2_driver = {
Stephen Hemminger793b8832005-09-14 16:06:14 -07005004 .name = DRV_NAME,
5005 .id_table = sky2_id_table,
5006 .probe = sky2_probe,
5007 .remove = __devexit_p(sky2_remove),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005008#ifdef CONFIG_PM
Stephen Hemminger793b8832005-09-14 16:06:14 -07005009 .suspend = sky2_suspend,
5010 .resume = sky2_resume,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005011#endif
Stephen Hemmingere3173832007-02-06 10:45:39 -08005012 .shutdown = sky2_shutdown,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005013};
5014
5015static int __init sky2_init_module(void)
5016{
Joe Perchesada1db52010-02-17 15:01:59 +00005017 pr_info("driver version " DRV_VERSION "\n");
Stephen Hemmingerc844d482008-08-27 20:48:23 -07005018
Stephen Hemminger3cf26752007-07-09 15:33:35 -07005019 sky2_debug_init();
shemminger@osdl.org50241c42005-11-30 11:45:22 -08005020 return pci_register_driver(&sky2_driver);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005021}
5022
5023static void __exit sky2_cleanup_module(void)
5024{
5025 pci_unregister_driver(&sky2_driver);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07005026 sky2_debug_cleanup();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005027}
5028
5029module_init(sky2_init_module);
5030module_exit(sky2_cleanup_module);
5031
5032MODULE_DESCRIPTION("Marvell Yukon 2 Gigabit Ethernet driver");
Stephen Hemminger65ebe6342007-01-23 11:38:57 -08005033MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005034MODULE_LICENSE("GPL");
shemminger@osdl.org5f4f9dc2005-11-30 11:45:23 -08005035MODULE_VERSION(DRV_VERSION);