blob: 8b3659352e495b02843187b75679406469a06611 [file] [log] [blame]
Rabin Vincentd88b25b2010-05-10 23:43:47 +02001/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License, version 2
5 * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> for ST-Ericsson
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
7 */
8
Rabin Vincentd88b25b2010-05-10 23:43:47 +02009#include <linux/init.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
Linus Walleijcee1b402016-04-05 15:09:09 +020012#include <linux/gpio/driver.h>
Lee Jones3113e672012-09-07 12:14:59 +010013#include <linux/of.h>
Rabin Vincentd88b25b2010-05-10 23:43:47 +020014#include <linux/interrupt.h>
Sundar Iyerc6eda6c2010-12-13 09:33:12 +053015#include <linux/mfd/tc3589x.h>
Linus Walleijcee1b402016-04-05 15:09:09 +020016#include <linux/bitops.h>
Rabin Vincentd88b25b2010-05-10 23:43:47 +020017
18/*
19 * These registers are modified under the irq bus lock and cached to avoid
20 * unnecessary writes in bus_sync_unlock.
21 */
22enum { REG_IBE, REG_IEV, REG_IS, REG_IE };
23
24#define CACHE_NR_REGS 4
25#define CACHE_NR_BANKS 3
26
Sundar Iyer20406eb2010-12-13 09:33:14 +053027struct tc3589x_gpio {
Rabin Vincentd88b25b2010-05-10 23:43:47 +020028 struct gpio_chip chip;
Sundar Iyer20406eb2010-12-13 09:33:14 +053029 struct tc3589x *tc3589x;
Rabin Vincentd88b25b2010-05-10 23:43:47 +020030 struct device *dev;
31 struct mutex irq_lock;
Rabin Vincentd88b25b2010-05-10 23:43:47 +020032 /* Caches of interrupt control registers for bus_lock */
33 u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS];
34 u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS];
35};
36
Sundar Iyer20406eb2010-12-13 09:33:14 +053037static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned offset)
Rabin Vincentd88b25b2010-05-10 23:43:47 +020038{
Linus Walleijb0d38472015-12-03 15:37:29 +010039 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
Sundar Iyer20406eb2010-12-13 09:33:14 +053040 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
41 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
Linus Walleijcee1b402016-04-05 15:09:09 +020042 u8 mask = BIT(offset % 8);
Rabin Vincentd88b25b2010-05-10 23:43:47 +020043 int ret;
44
Sundar Iyer20406eb2010-12-13 09:33:14 +053045 ret = tc3589x_reg_read(tc3589x, reg);
Rabin Vincentd88b25b2010-05-10 23:43:47 +020046 if (ret < 0)
47 return ret;
48
Linus Walleij27ca2262015-12-21 11:42:30 +010049 return !!(ret & mask);
Rabin Vincentd88b25b2010-05-10 23:43:47 +020050}
51
Sundar Iyer20406eb2010-12-13 09:33:14 +053052static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
Rabin Vincentd88b25b2010-05-10 23:43:47 +020053{
Linus Walleijb0d38472015-12-03 15:37:29 +010054 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
Sundar Iyer20406eb2010-12-13 09:33:14 +053055 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
56 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
Rabin Vincentd88b25b2010-05-10 23:43:47 +020057 unsigned pos = offset % 8;
Linus Walleijcee1b402016-04-05 15:09:09 +020058 u8 data[] = {val ? BIT(pos) : 0, BIT(pos)};
Rabin Vincentd88b25b2010-05-10 23:43:47 +020059
Sundar Iyer20406eb2010-12-13 09:33:14 +053060 tc3589x_block_write(tc3589x, reg, ARRAY_SIZE(data), data);
Rabin Vincentd88b25b2010-05-10 23:43:47 +020061}
62
Sundar Iyer20406eb2010-12-13 09:33:14 +053063static int tc3589x_gpio_direction_output(struct gpio_chip *chip,
Rabin Vincentd88b25b2010-05-10 23:43:47 +020064 unsigned offset, int val)
65{
Linus Walleijb0d38472015-12-03 15:37:29 +010066 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
Sundar Iyer20406eb2010-12-13 09:33:14 +053067 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
68 u8 reg = TC3589x_GPIODIR0 + offset / 8;
Rabin Vincentd88b25b2010-05-10 23:43:47 +020069 unsigned pos = offset % 8;
70
Sundar Iyer20406eb2010-12-13 09:33:14 +053071 tc3589x_gpio_set(chip, offset, val);
Rabin Vincentd88b25b2010-05-10 23:43:47 +020072
Linus Walleijcee1b402016-04-05 15:09:09 +020073 return tc3589x_set_bits(tc3589x, reg, BIT(pos), BIT(pos));
Rabin Vincentd88b25b2010-05-10 23:43:47 +020074}
75
Sundar Iyer20406eb2010-12-13 09:33:14 +053076static int tc3589x_gpio_direction_input(struct gpio_chip *chip,
Rabin Vincentd88b25b2010-05-10 23:43:47 +020077 unsigned offset)
78{
Linus Walleijb0d38472015-12-03 15:37:29 +010079 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
Sundar Iyer20406eb2010-12-13 09:33:14 +053080 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
81 u8 reg = TC3589x_GPIODIR0 + offset / 8;
Rabin Vincentd88b25b2010-05-10 23:43:47 +020082 unsigned pos = offset % 8;
83
Linus Walleijcee1b402016-04-05 15:09:09 +020084 return tc3589x_set_bits(tc3589x, reg, BIT(pos), 0);
Rabin Vincentd88b25b2010-05-10 23:43:47 +020085}
86
Linus Walleij8b866b02016-04-05 15:11:11 +020087static int tc3589x_gpio_single_ended(struct gpio_chip *chip,
88 unsigned offset,
89 enum single_ended_mode mode)
90{
91 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
92 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
93 /*
94 * These registers are alterated at each second address
95 * ODM bit 0 = drive to GND or Hi-Z (open drain)
96 * ODM bit 1 = drive to VDD or Hi-Z (open source)
97 */
98 u8 odmreg = TC3589x_GPIOODM0 + (offset / 8) * 2;
99 u8 odereg = TC3589x_GPIOODE0 + (offset / 8) * 2;
100 unsigned pos = offset % 8;
101 int ret;
102
103 switch(mode) {
104 case LINE_MODE_OPEN_DRAIN:
105 /* Set open drain mode */
106 ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), 0);
107 if (ret)
108 return ret;
109 /* Enable open drain/source mode */
110 return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos));
111 case LINE_MODE_OPEN_SOURCE:
112 /* Set open source mode */
113 ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), BIT(pos));
114 if (ret)
115 return ret;
116 /* Enable open drain/source mode */
117 return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos));
118 case LINE_MODE_PUSH_PULL:
119 /* Disable open drain/source mode */
120 return tc3589x_set_bits(tc3589x, odereg, BIT(pos), 0);
121 default:
122 break;
123 }
124 return -ENOTSUPP;
125}
126
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200127static struct gpio_chip template_chip = {
Sundar Iyer20406eb2010-12-13 09:33:14 +0530128 .label = "tc3589x",
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200129 .owner = THIS_MODULE,
Sundar Iyer20406eb2010-12-13 09:33:14 +0530130 .direction_input = tc3589x_gpio_direction_input,
131 .get = tc3589x_gpio_get,
132 .direction_output = tc3589x_gpio_direction_output,
133 .set = tc3589x_gpio_set,
Linus Walleij8b866b02016-04-05 15:11:11 +0200134 .set_single_ended = tc3589x_gpio_single_ended,
Linus Walleij9fb1f392013-12-04 14:42:46 +0100135 .can_sleep = true,
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200136};
137
Lennert Buytenhek33fcc1b2011-01-12 17:00:19 -0800138static int tc3589x_gpio_irq_set_type(struct irq_data *d, unsigned int type)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200139{
Linus Walleijcf42f1c2014-04-09 13:38:33 +0200140 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
Linus Walleijb0d38472015-12-03 15:37:29 +0100141 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
Lee Jonesefe4c942012-09-07 12:14:58 +0100142 int offset = d->hwirq;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200143 int regoffset = offset / 8;
Linus Walleijcee1b402016-04-05 15:09:09 +0200144 int mask = BIT(offset % 8);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200145
146 if (type == IRQ_TYPE_EDGE_BOTH) {
Sundar Iyer20406eb2010-12-13 09:33:14 +0530147 tc3589x_gpio->regs[REG_IBE][regoffset] |= mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200148 return 0;
149 }
150
Sundar Iyer20406eb2010-12-13 09:33:14 +0530151 tc3589x_gpio->regs[REG_IBE][regoffset] &= ~mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200152
153 if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH)
Sundar Iyer20406eb2010-12-13 09:33:14 +0530154 tc3589x_gpio->regs[REG_IS][regoffset] |= mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200155 else
Sundar Iyer20406eb2010-12-13 09:33:14 +0530156 tc3589x_gpio->regs[REG_IS][regoffset] &= ~mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200157
158 if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH)
Sundar Iyer20406eb2010-12-13 09:33:14 +0530159 tc3589x_gpio->regs[REG_IEV][regoffset] |= mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200160 else
Sundar Iyer20406eb2010-12-13 09:33:14 +0530161 tc3589x_gpio->regs[REG_IEV][regoffset] &= ~mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200162
163 return 0;
164}
165
Lennert Buytenhek33fcc1b2011-01-12 17:00:19 -0800166static void tc3589x_gpio_irq_lock(struct irq_data *d)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200167{
Linus Walleijcf42f1c2014-04-09 13:38:33 +0200168 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
Linus Walleijb0d38472015-12-03 15:37:29 +0100169 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200170
Sundar Iyer20406eb2010-12-13 09:33:14 +0530171 mutex_lock(&tc3589x_gpio->irq_lock);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200172}
173
Lennert Buytenhek33fcc1b2011-01-12 17:00:19 -0800174static void tc3589x_gpio_irq_sync_unlock(struct irq_data *d)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200175{
Linus Walleijcf42f1c2014-04-09 13:38:33 +0200176 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
Linus Walleijb0d38472015-12-03 15:37:29 +0100177 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
Sundar Iyer20406eb2010-12-13 09:33:14 +0530178 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200179 static const u8 regmap[] = {
Sundar Iyer20406eb2010-12-13 09:33:14 +0530180 [REG_IBE] = TC3589x_GPIOIBE0,
181 [REG_IEV] = TC3589x_GPIOIEV0,
182 [REG_IS] = TC3589x_GPIOIS0,
183 [REG_IE] = TC3589x_GPIOIE0,
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200184 };
185 int i, j;
186
187 for (i = 0; i < CACHE_NR_REGS; i++) {
188 for (j = 0; j < CACHE_NR_BANKS; j++) {
Sundar Iyer20406eb2010-12-13 09:33:14 +0530189 u8 old = tc3589x_gpio->oldregs[i][j];
190 u8 new = tc3589x_gpio->regs[i][j];
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200191
192 if (new == old)
193 continue;
194
Sundar Iyer20406eb2010-12-13 09:33:14 +0530195 tc3589x_gpio->oldregs[i][j] = new;
196 tc3589x_reg_write(tc3589x, regmap[i] + j * 8, new);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200197 }
198 }
199
Sundar Iyer20406eb2010-12-13 09:33:14 +0530200 mutex_unlock(&tc3589x_gpio->irq_lock);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200201}
202
Lennert Buytenhek33fcc1b2011-01-12 17:00:19 -0800203static void tc3589x_gpio_irq_mask(struct irq_data *d)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200204{
Linus Walleijcf42f1c2014-04-09 13:38:33 +0200205 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
Linus Walleijb0d38472015-12-03 15:37:29 +0100206 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
Lee Jonesefe4c942012-09-07 12:14:58 +0100207 int offset = d->hwirq;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200208 int regoffset = offset / 8;
Linus Walleijcee1b402016-04-05 15:09:09 +0200209 int mask = BIT(offset % 8);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200210
Sundar Iyer20406eb2010-12-13 09:33:14 +0530211 tc3589x_gpio->regs[REG_IE][regoffset] &= ~mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200212}
213
Lennert Buytenhek33fcc1b2011-01-12 17:00:19 -0800214static void tc3589x_gpio_irq_unmask(struct irq_data *d)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200215{
Linus Walleijcf42f1c2014-04-09 13:38:33 +0200216 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
Linus Walleijb0d38472015-12-03 15:37:29 +0100217 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
Lee Jonesefe4c942012-09-07 12:14:58 +0100218 int offset = d->hwirq;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200219 int regoffset = offset / 8;
Linus Walleijcee1b402016-04-05 15:09:09 +0200220 int mask = BIT(offset % 8);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200221
Sundar Iyer20406eb2010-12-13 09:33:14 +0530222 tc3589x_gpio->regs[REG_IE][regoffset] |= mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200223}
224
Sundar Iyer20406eb2010-12-13 09:33:14 +0530225static struct irq_chip tc3589x_gpio_irq_chip = {
226 .name = "tc3589x-gpio",
Lennert Buytenhek33fcc1b2011-01-12 17:00:19 -0800227 .irq_bus_lock = tc3589x_gpio_irq_lock,
228 .irq_bus_sync_unlock = tc3589x_gpio_irq_sync_unlock,
229 .irq_mask = tc3589x_gpio_irq_mask,
230 .irq_unmask = tc3589x_gpio_irq_unmask,
231 .irq_set_type = tc3589x_gpio_irq_set_type,
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200232};
233
Sundar Iyer20406eb2010-12-13 09:33:14 +0530234static irqreturn_t tc3589x_gpio_irq(int irq, void *dev)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200235{
Sundar Iyer20406eb2010-12-13 09:33:14 +0530236 struct tc3589x_gpio *tc3589x_gpio = dev;
237 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200238 u8 status[CACHE_NR_BANKS];
239 int ret;
240 int i;
241
Sundar Iyer20406eb2010-12-13 09:33:14 +0530242 ret = tc3589x_block_read(tc3589x, TC3589x_GPIOMIS0,
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200243 ARRAY_SIZE(status), status);
244 if (ret < 0)
245 return IRQ_NONE;
246
247 for (i = 0; i < ARRAY_SIZE(status); i++) {
248 unsigned int stat = status[i];
249 if (!stat)
250 continue;
251
252 while (stat) {
253 int bit = __ffs(stat);
254 int line = i * 8 + bit;
Linus Walleijcf42f1c2014-04-09 13:38:33 +0200255 int irq = irq_find_mapping(tc3589x_gpio->chip.irqdomain,
256 line);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200257
Linus Walleije3003762013-10-11 19:06:12 +0200258 handle_nested_irq(irq);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200259 stat &= ~(1 << bit);
260 }
261
Sundar Iyer20406eb2010-12-13 09:33:14 +0530262 tc3589x_reg_write(tc3589x, TC3589x_GPIOIC0 + i, status[i]);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200263 }
264
265 return IRQ_HANDLED;
266}
267
Bill Pemberton38363092012-11-19 13:22:34 -0500268static int tc3589x_gpio_probe(struct platform_device *pdev)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200269{
Sundar Iyer20406eb2010-12-13 09:33:14 +0530270 struct tc3589x *tc3589x = dev_get_drvdata(pdev->dev.parent);
Lee Jones3113e672012-09-07 12:14:59 +0100271 struct device_node *np = pdev->dev.of_node;
Sundar Iyer20406eb2010-12-13 09:33:14 +0530272 struct tc3589x_gpio *tc3589x_gpio;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200273 int ret;
274 int irq;
275
Linus Walleij53e41f52014-12-15 10:39:47 +0100276 if (!np) {
277 dev_err(&pdev->dev, "No Device Tree node found\n");
Lee Jones3113e672012-09-07 12:14:59 +0100278 return -EINVAL;
279 }
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200280
281 irq = platform_get_irq(pdev, 0);
282 if (irq < 0)
283 return irq;
284
Linus Walleij033f2752014-04-09 12:38:56 +0200285 tc3589x_gpio = devm_kzalloc(&pdev->dev, sizeof(struct tc3589x_gpio),
286 GFP_KERNEL);
Sundar Iyer20406eb2010-12-13 09:33:14 +0530287 if (!tc3589x_gpio)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200288 return -ENOMEM;
289
Sundar Iyer20406eb2010-12-13 09:33:14 +0530290 mutex_init(&tc3589x_gpio->irq_lock);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200291
Sundar Iyer20406eb2010-12-13 09:33:14 +0530292 tc3589x_gpio->dev = &pdev->dev;
293 tc3589x_gpio->tc3589x = tc3589x;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200294
Sundar Iyer20406eb2010-12-13 09:33:14 +0530295 tc3589x_gpio->chip = template_chip;
296 tc3589x_gpio->chip.ngpio = tc3589x->num_gpio;
Linus Walleij58383c72015-11-04 09:56:26 +0100297 tc3589x_gpio->chip.parent = &pdev->dev;
Linus Walleij90f2d0f2014-10-28 11:06:56 +0100298 tc3589x_gpio->chip.base = -1;
Laurent Navete90c6362013-03-20 13:16:02 +0100299 tc3589x_gpio->chip.of_node = np;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200300
301 /* Bring the GPIO module out of reset */
Sundar Iyer20406eb2010-12-13 09:33:14 +0530302 ret = tc3589x_set_bits(tc3589x, TC3589x_RSTCTRL,
303 TC3589x_RSTCTRL_GPIRST, 0);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200304 if (ret < 0)
Linus Walleij033f2752014-04-09 12:38:56 +0200305 return ret;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200306
Linus Walleij033f2752014-04-09 12:38:56 +0200307 ret = devm_request_threaded_irq(&pdev->dev,
308 irq, NULL, tc3589x_gpio_irq,
309 IRQF_ONESHOT, "tc3589x-gpio",
310 tc3589x_gpio);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200311 if (ret) {
312 dev_err(&pdev->dev, "unable to get irq: %d\n", ret);
Linus Walleij033f2752014-04-09 12:38:56 +0200313 return ret;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200314 }
315
Laxman Dewanganf3378b62016-02-22 17:43:28 +0530316 ret = devm_gpiochip_add_data(&pdev->dev, &tc3589x_gpio->chip,
317 tc3589x_gpio);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200318 if (ret) {
319 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
Linus Walleij033f2752014-04-09 12:38:56 +0200320 return ret;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200321 }
322
Linus Walleijcf42f1c2014-04-09 13:38:33 +0200323 ret = gpiochip_irqchip_add(&tc3589x_gpio->chip,
324 &tc3589x_gpio_irq_chip,
325 0,
326 handle_simple_irq,
327 IRQ_TYPE_NONE);
328 if (ret) {
329 dev_err(&pdev->dev,
330 "could not connect irqchip to gpiochip\n");
331 return ret;
332 }
333
Linus Walleij3f97d5fc2014-09-26 14:19:52 +0200334 gpiochip_set_chained_irqchip(&tc3589x_gpio->chip,
335 &tc3589x_gpio_irq_chip,
336 irq,
337 NULL);
338
Sundar Iyer20406eb2010-12-13 09:33:14 +0530339 platform_set_drvdata(pdev, tc3589x_gpio);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200340
341 return 0;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200342}
343
Sundar Iyer20406eb2010-12-13 09:33:14 +0530344static struct platform_driver tc3589x_gpio_driver = {
345 .driver.name = "tc3589x-gpio",
Sundar Iyer20406eb2010-12-13 09:33:14 +0530346 .probe = tc3589x_gpio_probe,
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200347};
348
Sundar Iyer20406eb2010-12-13 09:33:14 +0530349static int __init tc3589x_gpio_init(void)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200350{
Sundar Iyer20406eb2010-12-13 09:33:14 +0530351 return platform_driver_register(&tc3589x_gpio_driver);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200352}
Sundar Iyer20406eb2010-12-13 09:33:14 +0530353subsys_initcall(tc3589x_gpio_init);