Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/serial/pmac_zilog.c |
| 3 | * |
| 4 | * Driver for PowerMac Z85c30 based ESCC cell found in the |
| 5 | * "macio" ASICs of various PowerMac models |
| 6 | * |
| 7 | * Copyright (C) 2003 Ben. Herrenschmidt (benh@kernel.crashing.org) |
| 8 | * |
| 9 | * Derived from drivers/macintosh/macserial.c by Paul Mackerras |
| 10 | * and drivers/serial/sunzilog.c by David S. Miller |
| 11 | * |
| 12 | * Hrm... actually, I ripped most of sunzilog (Thanks David !) and |
| 13 | * adapted special tweaks needed for us. I don't think it's worth |
| 14 | * merging back those though. The DMA code still has to get in |
| 15 | * and once done, I expect that driver to remain fairly stable in |
| 16 | * the long term, unless we change the driver model again... |
| 17 | * |
| 18 | * This program is free software; you can redistribute it and/or modify |
| 19 | * it under the terms of the GNU General Public License as published by |
| 20 | * the Free Software Foundation; either version 2 of the License, or |
| 21 | * (at your option) any later version. |
| 22 | * |
| 23 | * This program is distributed in the hope that it will be useful, |
| 24 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 25 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 26 | * GNU General Public License for more details. |
| 27 | * |
| 28 | * You should have received a copy of the GNU General Public License |
| 29 | * along with this program; if not, write to the Free Software |
| 30 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 31 | * |
| 32 | * 2004-08-06 Harald Welte <laforge@gnumonks.org> |
| 33 | * - Enable BREAK interrupt |
| 34 | * - Add support for sysreq |
| 35 | * |
| 36 | * TODO: - Add DMA support |
| 37 | * - Defer port shutdown to a few seconds after close |
| 38 | * - maybe put something right into uap->clk_divisor |
| 39 | */ |
| 40 | |
| 41 | #undef DEBUG |
| 42 | #undef DEBUG_HARD |
| 43 | #undef USE_CTRL_O_SYSRQ |
| 44 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | #include <linux/module.h> |
| 46 | #include <linux/tty.h> |
| 47 | |
| 48 | #include <linux/tty_flip.h> |
| 49 | #include <linux/major.h> |
| 50 | #include <linux/string.h> |
| 51 | #include <linux/fcntl.h> |
| 52 | #include <linux/mm.h> |
| 53 | #include <linux/kernel.h> |
| 54 | #include <linux/delay.h> |
| 55 | #include <linux/init.h> |
| 56 | #include <linux/console.h> |
| 57 | #include <linux/slab.h> |
| 58 | #include <linux/adb.h> |
| 59 | #include <linux/pmu.h> |
| 60 | #include <linux/bitops.h> |
| 61 | #include <linux/sysrq.h> |
Arjan van de Ven | f392ecf | 2006-01-12 18:44:32 +0000 | [diff] [blame] | 62 | #include <linux/mutex.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | #include <asm/sections.h> |
| 64 | #include <asm/io.h> |
| 65 | #include <asm/irq.h> |
| 66 | #include <asm/prom.h> |
| 67 | #include <asm/machdep.h> |
| 68 | #include <asm/pmac_feature.h> |
| 69 | #include <asm/dbdma.h> |
| 70 | #include <asm/macio.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | |
| 72 | #if defined (CONFIG_SERIAL_PMACZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
| 73 | #define SUPPORT_SYSRQ |
| 74 | #endif |
| 75 | |
| 76 | #include <linux/serial.h> |
| 77 | #include <linux/serial_core.h> |
| 78 | |
| 79 | #include "pmac_zilog.h" |
| 80 | |
| 81 | /* Not yet implemented */ |
| 82 | #undef HAS_DBDMA |
| 83 | |
| 84 | static char version[] __initdata = "pmac_zilog: 0.6 (Benjamin Herrenschmidt <benh@kernel.crashing.org>)"; |
| 85 | MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>"); |
| 86 | MODULE_DESCRIPTION("Driver for the PowerMac serial ports."); |
| 87 | MODULE_LICENSE("GPL"); |
| 88 | |
| 89 | #define PWRDBG(fmt, arg...) printk(KERN_DEBUG fmt , ## arg) |
| 90 | |
| 91 | |
| 92 | /* |
| 93 | * For the sake of early serial console, we can do a pre-probe |
| 94 | * (optional) of the ports at rather early boot time. |
| 95 | */ |
| 96 | static struct uart_pmac_port pmz_ports[MAX_ZS_PORTS]; |
| 97 | static int pmz_ports_count; |
Arjan van de Ven | f392ecf | 2006-01-12 18:44:32 +0000 | [diff] [blame] | 98 | static DEFINE_MUTEX(pmz_irq_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 99 | |
| 100 | static struct uart_driver pmz_uart_reg = { |
| 101 | .owner = THIS_MODULE, |
| 102 | .driver_name = "ttyS", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 103 | .dev_name = "ttyS", |
| 104 | .major = TTY_MAJOR, |
| 105 | }; |
| 106 | |
| 107 | |
| 108 | /* |
| 109 | * Load all registers to reprogram the port |
| 110 | * This function must only be called when the TX is not busy. The UART |
| 111 | * port lock must be held and local interrupts disabled. |
| 112 | */ |
| 113 | static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs) |
| 114 | { |
| 115 | int i; |
| 116 | |
| 117 | if (ZS_IS_ASLEEP(uap)) |
| 118 | return; |
| 119 | |
| 120 | /* Let pending transmits finish. */ |
| 121 | for (i = 0; i < 1000; i++) { |
| 122 | unsigned char stat = read_zsreg(uap, R1); |
| 123 | if (stat & ALL_SNT) |
| 124 | break; |
| 125 | udelay(100); |
| 126 | } |
| 127 | |
| 128 | ZS_CLEARERR(uap); |
| 129 | zssync(uap); |
| 130 | ZS_CLEARFIFO(uap); |
| 131 | zssync(uap); |
| 132 | ZS_CLEARERR(uap); |
| 133 | |
| 134 | /* Disable all interrupts. */ |
| 135 | write_zsreg(uap, R1, |
| 136 | regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB)); |
| 137 | |
| 138 | /* Set parity, sync config, stop bits, and clock divisor. */ |
| 139 | write_zsreg(uap, R4, regs[R4]); |
| 140 | |
| 141 | /* Set misc. TX/RX control bits. */ |
| 142 | write_zsreg(uap, R10, regs[R10]); |
| 143 | |
| 144 | /* Set TX/RX controls sans the enable bits. */ |
| 145 | write_zsreg(uap, R3, regs[R3] & ~RxENABLE); |
| 146 | write_zsreg(uap, R5, regs[R5] & ~TxENABLE); |
| 147 | |
| 148 | /* now set R7 "prime" on ESCC */ |
| 149 | write_zsreg(uap, R15, regs[R15] | EN85C30); |
| 150 | write_zsreg(uap, R7, regs[R7P]); |
| 151 | |
| 152 | /* make sure we use R7 "non-prime" on ESCC */ |
| 153 | write_zsreg(uap, R15, regs[R15] & ~EN85C30); |
| 154 | |
| 155 | /* Synchronous mode config. */ |
| 156 | write_zsreg(uap, R6, regs[R6]); |
| 157 | write_zsreg(uap, R7, regs[R7]); |
| 158 | |
| 159 | /* Disable baud generator. */ |
| 160 | write_zsreg(uap, R14, regs[R14] & ~BRENAB); |
| 161 | |
| 162 | /* Clock mode control. */ |
| 163 | write_zsreg(uap, R11, regs[R11]); |
| 164 | |
| 165 | /* Lower and upper byte of baud rate generator divisor. */ |
| 166 | write_zsreg(uap, R12, regs[R12]); |
| 167 | write_zsreg(uap, R13, regs[R13]); |
| 168 | |
| 169 | /* Now rewrite R14, with BRENAB (if set). */ |
| 170 | write_zsreg(uap, R14, regs[R14]); |
| 171 | |
| 172 | /* Reset external status interrupts. */ |
| 173 | write_zsreg(uap, R0, RES_EXT_INT); |
| 174 | write_zsreg(uap, R0, RES_EXT_INT); |
| 175 | |
| 176 | /* Rewrite R3/R5, this time without enables masked. */ |
| 177 | write_zsreg(uap, R3, regs[R3]); |
| 178 | write_zsreg(uap, R5, regs[R5]); |
| 179 | |
| 180 | /* Rewrite R1, this time without IRQ enabled masked. */ |
| 181 | write_zsreg(uap, R1, regs[R1]); |
| 182 | |
| 183 | /* Enable interrupts */ |
| 184 | write_zsreg(uap, R9, regs[R9]); |
| 185 | } |
| 186 | |
| 187 | /* |
| 188 | * We do like sunzilog to avoid disrupting pending Tx |
| 189 | * Reprogram the Zilog channel HW registers with the copies found in the |
| 190 | * software state struct. If the transmitter is busy, we defer this update |
| 191 | * until the next TX complete interrupt. Else, we do it right now. |
| 192 | * |
| 193 | * The UART port lock must be held and local interrupts disabled. |
| 194 | */ |
| 195 | static void pmz_maybe_update_regs(struct uart_pmac_port *uap) |
| 196 | { |
| 197 | if (!ZS_REGS_HELD(uap)) { |
| 198 | if (ZS_TX_ACTIVE(uap)) { |
| 199 | uap->flags |= PMACZILOG_FLAG_REGS_HELD; |
| 200 | } else { |
| 201 | pmz_debug("pmz: maybe_update_regs: updating\n"); |
| 202 | pmz_load_zsregs(uap, uap->curregs); |
| 203 | } |
| 204 | } |
| 205 | } |
| 206 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 207 | static struct tty_struct *pmz_receive_chars(struct uart_pmac_port *uap) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 208 | { |
| 209 | struct tty_struct *tty = NULL; |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 210 | unsigned char ch, r1, drop, error, flag; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 211 | int loops = 0; |
| 212 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 213 | /* The interrupt can be enabled when the port isn't open, typically |
| 214 | * that happens when using one port is open and the other closed (stale |
| 215 | * interrupt) or when one port is used as a console. |
| 216 | */ |
| 217 | if (!ZS_IS_OPEN(uap)) { |
| 218 | pmz_debug("pmz: draining input\n"); |
| 219 | /* Port is closed, drain input data */ |
| 220 | for (;;) { |
| 221 | if ((++loops) > 1000) |
| 222 | goto flood; |
| 223 | (void)read_zsreg(uap, R1); |
| 224 | write_zsreg(uap, R0, ERR_RES); |
| 225 | (void)read_zsdata(uap); |
| 226 | ch = read_zsreg(uap, R0); |
| 227 | if (!(ch & Rx_CH_AV)) |
| 228 | break; |
| 229 | } |
| 230 | return NULL; |
| 231 | } |
| 232 | |
| 233 | /* Sanity check, make sure the old bug is no longer happening */ |
| 234 | if (uap->port.info == NULL || uap->port.info->tty == NULL) { |
| 235 | WARN_ON(1); |
| 236 | (void)read_zsdata(uap); |
| 237 | return NULL; |
| 238 | } |
| 239 | tty = uap->port.info->tty; |
| 240 | |
| 241 | while (1) { |
| 242 | error = 0; |
| 243 | drop = 0; |
| 244 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 245 | r1 = read_zsreg(uap, R1); |
| 246 | ch = read_zsdata(uap); |
| 247 | |
| 248 | if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) { |
| 249 | write_zsreg(uap, R0, ERR_RES); |
| 250 | zssync(uap); |
| 251 | } |
| 252 | |
| 253 | ch &= uap->parity_mask; |
| 254 | if (ch == 0 && uap->flags & PMACZILOG_FLAG_BREAK) { |
| 255 | uap->flags &= ~PMACZILOG_FLAG_BREAK; |
| 256 | } |
| 257 | |
| 258 | #if defined(CONFIG_MAGIC_SYSRQ) && defined(CONFIG_SERIAL_CORE_CONSOLE) |
| 259 | #ifdef USE_CTRL_O_SYSRQ |
| 260 | /* Handle the SysRq ^O Hack */ |
| 261 | if (ch == '\x0f') { |
| 262 | uap->port.sysrq = jiffies + HZ*5; |
| 263 | goto next_char; |
| 264 | } |
| 265 | #endif /* USE_CTRL_O_SYSRQ */ |
| 266 | if (uap->port.sysrq) { |
| 267 | int swallow; |
| 268 | spin_unlock(&uap->port.lock); |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 269 | swallow = uart_handle_sysrq_char(&uap->port, ch); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | spin_lock(&uap->port.lock); |
| 271 | if (swallow) |
| 272 | goto next_char; |
| 273 | } |
| 274 | #endif /* CONFIG_MAGIC_SYSRQ && CONFIG_SERIAL_CORE_CONSOLE */ |
| 275 | |
| 276 | /* A real serial line, record the character and status. */ |
| 277 | if (drop) |
| 278 | goto next_char; |
| 279 | |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 280 | flag = TTY_NORMAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 281 | uap->port.icount.rx++; |
| 282 | |
| 283 | if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR | BRK_ABRT)) { |
| 284 | error = 1; |
| 285 | if (r1 & BRK_ABRT) { |
| 286 | pmz_debug("pmz: got break !\n"); |
| 287 | r1 &= ~(PAR_ERR | CRC_ERR); |
| 288 | uap->port.icount.brk++; |
| 289 | if (uart_handle_break(&uap->port)) |
| 290 | goto next_char; |
| 291 | } |
| 292 | else if (r1 & PAR_ERR) |
| 293 | uap->port.icount.parity++; |
| 294 | else if (r1 & CRC_ERR) |
| 295 | uap->port.icount.frame++; |
| 296 | if (r1 & Rx_OVR) |
| 297 | uap->port.icount.overrun++; |
| 298 | r1 &= uap->port.read_status_mask; |
| 299 | if (r1 & BRK_ABRT) |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 300 | flag = TTY_BREAK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 301 | else if (r1 & PAR_ERR) |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 302 | flag = TTY_PARITY; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 303 | else if (r1 & CRC_ERR) |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 304 | flag = TTY_FRAME; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 305 | } |
| 306 | |
| 307 | if (uap->port.ignore_status_mask == 0xff || |
| 308 | (r1 & uap->port.ignore_status_mask) == 0) { |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 309 | tty_insert_flip_char(tty, ch, flag); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | } |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 311 | if (r1 & Rx_OVR) |
| 312 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 313 | next_char: |
| 314 | /* We can get stuck in an infinite loop getting char 0 when the |
| 315 | * line is in a wrong HW state, we break that here. |
| 316 | * When that happens, I disable the receive side of the driver. |
| 317 | * Note that what I've been experiencing is a real irq loop where |
| 318 | * I'm getting flooded regardless of the actual port speed. |
| 319 | * Something stange is going on with the HW |
| 320 | */ |
| 321 | if ((++loops) > 1000) |
| 322 | goto flood; |
| 323 | ch = read_zsreg(uap, R0); |
| 324 | if (!(ch & Rx_CH_AV)) |
| 325 | break; |
| 326 | } |
| 327 | |
| 328 | return tty; |
| 329 | flood: |
| 330 | uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); |
| 331 | write_zsreg(uap, R1, uap->curregs[R1]); |
| 332 | zssync(uap); |
| 333 | dev_err(&uap->dev->ofdev.dev, "pmz: rx irq flood !\n"); |
| 334 | return tty; |
| 335 | } |
| 336 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 337 | static void pmz_status_handle(struct uart_pmac_port *uap) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | { |
| 339 | unsigned char status; |
| 340 | |
| 341 | status = read_zsreg(uap, R0); |
| 342 | write_zsreg(uap, R0, RES_EXT_INT); |
| 343 | zssync(uap); |
| 344 | |
| 345 | if (ZS_IS_OPEN(uap) && ZS_WANTS_MODEM_STATUS(uap)) { |
| 346 | if (status & SYNC_HUNT) |
| 347 | uap->port.icount.dsr++; |
| 348 | |
| 349 | /* The Zilog just gives us an interrupt when DCD/CTS/etc. change. |
| 350 | * But it does not tell us which bit has changed, we have to keep |
| 351 | * track of this ourselves. |
| 352 | * The CTS input is inverted for some reason. -- paulus |
| 353 | */ |
| 354 | if ((status ^ uap->prev_status) & DCD) |
| 355 | uart_handle_dcd_change(&uap->port, |
| 356 | (status & DCD)); |
| 357 | if ((status ^ uap->prev_status) & CTS) |
| 358 | uart_handle_cts_change(&uap->port, |
| 359 | !(status & CTS)); |
| 360 | |
| 361 | wake_up_interruptible(&uap->port.info->delta_msr_wait); |
| 362 | } |
| 363 | |
| 364 | if (status & BRK_ABRT) |
| 365 | uap->flags |= PMACZILOG_FLAG_BREAK; |
| 366 | |
| 367 | uap->prev_status = status; |
| 368 | } |
| 369 | |
| 370 | static void pmz_transmit_chars(struct uart_pmac_port *uap) |
| 371 | { |
| 372 | struct circ_buf *xmit; |
| 373 | |
| 374 | if (ZS_IS_ASLEEP(uap)) |
| 375 | return; |
| 376 | if (ZS_IS_CONS(uap)) { |
| 377 | unsigned char status = read_zsreg(uap, R0); |
| 378 | |
| 379 | /* TX still busy? Just wait for the next TX done interrupt. |
| 380 | * |
| 381 | * It can occur because of how we do serial console writes. It would |
| 382 | * be nice to transmit console writes just like we normally would for |
| 383 | * a TTY line. (ie. buffered and TX interrupt driven). That is not |
| 384 | * easy because console writes cannot sleep. One solution might be |
| 385 | * to poll on enough port->xmit space becomming free. -DaveM |
| 386 | */ |
| 387 | if (!(status & Tx_BUF_EMP)) |
| 388 | return; |
| 389 | } |
| 390 | |
| 391 | uap->flags &= ~PMACZILOG_FLAG_TX_ACTIVE; |
| 392 | |
| 393 | if (ZS_REGS_HELD(uap)) { |
| 394 | pmz_load_zsregs(uap, uap->curregs); |
| 395 | uap->flags &= ~PMACZILOG_FLAG_REGS_HELD; |
| 396 | } |
| 397 | |
| 398 | if (ZS_TX_STOPPED(uap)) { |
| 399 | uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED; |
| 400 | goto ack_tx_int; |
| 401 | } |
| 402 | |
| 403 | if (uap->port.x_char) { |
| 404 | uap->flags |= PMACZILOG_FLAG_TX_ACTIVE; |
| 405 | write_zsdata(uap, uap->port.x_char); |
| 406 | zssync(uap); |
| 407 | uap->port.icount.tx++; |
| 408 | uap->port.x_char = 0; |
| 409 | return; |
| 410 | } |
| 411 | |
| 412 | if (uap->port.info == NULL) |
| 413 | goto ack_tx_int; |
| 414 | xmit = &uap->port.info->xmit; |
| 415 | if (uart_circ_empty(xmit)) { |
| 416 | uart_write_wakeup(&uap->port); |
| 417 | goto ack_tx_int; |
| 418 | } |
| 419 | if (uart_tx_stopped(&uap->port)) |
| 420 | goto ack_tx_int; |
| 421 | |
| 422 | uap->flags |= PMACZILOG_FLAG_TX_ACTIVE; |
| 423 | write_zsdata(uap, xmit->buf[xmit->tail]); |
| 424 | zssync(uap); |
| 425 | |
| 426 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
| 427 | uap->port.icount.tx++; |
| 428 | |
| 429 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 430 | uart_write_wakeup(&uap->port); |
| 431 | |
| 432 | return; |
| 433 | |
| 434 | ack_tx_int: |
| 435 | write_zsreg(uap, R0, RES_Tx_P); |
| 436 | zssync(uap); |
| 437 | } |
| 438 | |
| 439 | /* Hrm... we register that twice, fixme later.... */ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 440 | static irqreturn_t pmz_interrupt(int irq, void *dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 441 | { |
| 442 | struct uart_pmac_port *uap = dev_id; |
| 443 | struct uart_pmac_port *uap_a; |
| 444 | struct uart_pmac_port *uap_b; |
| 445 | int rc = IRQ_NONE; |
| 446 | struct tty_struct *tty; |
| 447 | u8 r3; |
| 448 | |
| 449 | uap_a = pmz_get_port_A(uap); |
| 450 | uap_b = uap_a->mate; |
| 451 | |
| 452 | spin_lock(&uap_a->port.lock); |
| 453 | r3 = read_zsreg(uap_a, R3); |
| 454 | |
| 455 | #ifdef DEBUG_HARD |
| 456 | pmz_debug("irq, r3: %x\n", r3); |
| 457 | #endif |
| 458 | /* Channel A */ |
| 459 | tty = NULL; |
| 460 | if (r3 & (CHAEXT | CHATxIP | CHARxIP)) { |
| 461 | write_zsreg(uap_a, R0, RES_H_IUS); |
| 462 | zssync(uap_a); |
| 463 | if (r3 & CHAEXT) |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 464 | pmz_status_handle(uap_a); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | if (r3 & CHARxIP) |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 466 | tty = pmz_receive_chars(uap_a); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 467 | if (r3 & CHATxIP) |
| 468 | pmz_transmit_chars(uap_a); |
| 469 | rc = IRQ_HANDLED; |
| 470 | } |
| 471 | spin_unlock(&uap_a->port.lock); |
| 472 | if (tty != NULL) |
| 473 | tty_flip_buffer_push(tty); |
| 474 | |
| 475 | if (uap_b->node == NULL) |
| 476 | goto out; |
| 477 | |
| 478 | spin_lock(&uap_b->port.lock); |
| 479 | tty = NULL; |
| 480 | if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) { |
| 481 | write_zsreg(uap_b, R0, RES_H_IUS); |
| 482 | zssync(uap_b); |
| 483 | if (r3 & CHBEXT) |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 484 | pmz_status_handle(uap_b); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 485 | if (r3 & CHBRxIP) |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 486 | tty = pmz_receive_chars(uap_b); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 487 | if (r3 & CHBTxIP) |
| 488 | pmz_transmit_chars(uap_b); |
| 489 | rc = IRQ_HANDLED; |
| 490 | } |
| 491 | spin_unlock(&uap_b->port.lock); |
| 492 | if (tty != NULL) |
| 493 | tty_flip_buffer_push(tty); |
| 494 | |
| 495 | out: |
| 496 | #ifdef DEBUG_HARD |
| 497 | pmz_debug("irq done.\n"); |
| 498 | #endif |
| 499 | return rc; |
| 500 | } |
| 501 | |
| 502 | /* |
| 503 | * Peek the status register, lock not held by caller |
| 504 | */ |
| 505 | static inline u8 pmz_peek_status(struct uart_pmac_port *uap) |
| 506 | { |
| 507 | unsigned long flags; |
| 508 | u8 status; |
| 509 | |
| 510 | spin_lock_irqsave(&uap->port.lock, flags); |
| 511 | status = read_zsreg(uap, R0); |
| 512 | spin_unlock_irqrestore(&uap->port.lock, flags); |
| 513 | |
| 514 | return status; |
| 515 | } |
| 516 | |
| 517 | /* |
| 518 | * Check if transmitter is empty |
| 519 | * The port lock is not held. |
| 520 | */ |
| 521 | static unsigned int pmz_tx_empty(struct uart_port *port) |
| 522 | { |
| 523 | struct uart_pmac_port *uap = to_pmz(port); |
| 524 | unsigned char status; |
| 525 | |
| 526 | if (ZS_IS_ASLEEP(uap) || uap->node == NULL) |
| 527 | return TIOCSER_TEMT; |
| 528 | |
| 529 | status = pmz_peek_status(to_pmz(port)); |
| 530 | if (status & Tx_BUF_EMP) |
| 531 | return TIOCSER_TEMT; |
| 532 | return 0; |
| 533 | } |
| 534 | |
| 535 | /* |
| 536 | * Set Modem Control (RTS & DTR) bits |
| 537 | * The port lock is held and interrupts are disabled. |
| 538 | * Note: Shall we really filter out RTS on external ports or |
| 539 | * should that be dealt at higher level only ? |
| 540 | */ |
| 541 | static void pmz_set_mctrl(struct uart_port *port, unsigned int mctrl) |
| 542 | { |
| 543 | struct uart_pmac_port *uap = to_pmz(port); |
| 544 | unsigned char set_bits, clear_bits; |
| 545 | |
| 546 | /* Do nothing for irda for now... */ |
| 547 | if (ZS_IS_IRDA(uap)) |
| 548 | return; |
| 549 | /* We get called during boot with a port not up yet */ |
| 550 | if (ZS_IS_ASLEEP(uap) || |
| 551 | !(ZS_IS_OPEN(uap) || ZS_IS_CONS(uap))) |
| 552 | return; |
| 553 | |
| 554 | set_bits = clear_bits = 0; |
| 555 | |
| 556 | if (ZS_IS_INTMODEM(uap)) { |
| 557 | if (mctrl & TIOCM_RTS) |
| 558 | set_bits |= RTS; |
| 559 | else |
| 560 | clear_bits |= RTS; |
| 561 | } |
| 562 | if (mctrl & TIOCM_DTR) |
| 563 | set_bits |= DTR; |
| 564 | else |
| 565 | clear_bits |= DTR; |
| 566 | |
| 567 | /* NOTE: Not subject to 'transmitter active' rule. */ |
| 568 | uap->curregs[R5] |= set_bits; |
| 569 | uap->curregs[R5] &= ~clear_bits; |
| 570 | if (ZS_IS_ASLEEP(uap)) |
| 571 | return; |
| 572 | write_zsreg(uap, R5, uap->curregs[R5]); |
| 573 | pmz_debug("pmz_set_mctrl: set bits: %x, clear bits: %x -> %x\n", |
| 574 | set_bits, clear_bits, uap->curregs[R5]); |
| 575 | zssync(uap); |
| 576 | } |
| 577 | |
| 578 | /* |
| 579 | * Get Modem Control bits (only the input ones, the core will |
| 580 | * or that with a cached value of the control ones) |
Russell King | c5f4644 | 2005-06-29 09:42:38 +0100 | [diff] [blame] | 581 | * The port lock is held and interrupts are disabled. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 582 | */ |
| 583 | static unsigned int pmz_get_mctrl(struct uart_port *port) |
| 584 | { |
| 585 | struct uart_pmac_port *uap = to_pmz(port); |
| 586 | unsigned char status; |
| 587 | unsigned int ret; |
| 588 | |
| 589 | if (ZS_IS_ASLEEP(uap) || uap->node == NULL) |
| 590 | return 0; |
| 591 | |
Russell King | c5f4644 | 2005-06-29 09:42:38 +0100 | [diff] [blame] | 592 | status = read_zsreg(uap, R0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 593 | |
| 594 | ret = 0; |
| 595 | if (status & DCD) |
| 596 | ret |= TIOCM_CAR; |
| 597 | if (status & SYNC_HUNT) |
| 598 | ret |= TIOCM_DSR; |
| 599 | if (!(status & CTS)) |
| 600 | ret |= TIOCM_CTS; |
| 601 | |
| 602 | return ret; |
| 603 | } |
| 604 | |
| 605 | /* |
| 606 | * Stop TX side. Dealt like sunzilog at next Tx interrupt, |
Russell King | b129a8c | 2005-08-31 10:12:14 +0100 | [diff] [blame] | 607 | * though for DMA, we will have to do a bit more. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 608 | * The port lock is held and interrupts are disabled. |
| 609 | */ |
Russell King | b129a8c | 2005-08-31 10:12:14 +0100 | [diff] [blame] | 610 | static void pmz_stop_tx(struct uart_port *port) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 611 | { |
| 612 | to_pmz(port)->flags |= PMACZILOG_FLAG_TX_STOPPED; |
| 613 | } |
| 614 | |
| 615 | /* |
| 616 | * Kick the Tx side. |
| 617 | * The port lock is held and interrupts are disabled. |
| 618 | */ |
Russell King | b129a8c | 2005-08-31 10:12:14 +0100 | [diff] [blame] | 619 | static void pmz_start_tx(struct uart_port *port) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 620 | { |
| 621 | struct uart_pmac_port *uap = to_pmz(port); |
| 622 | unsigned char status; |
| 623 | |
| 624 | pmz_debug("pmz: start_tx()\n"); |
| 625 | |
| 626 | uap->flags |= PMACZILOG_FLAG_TX_ACTIVE; |
| 627 | uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED; |
| 628 | |
| 629 | if (ZS_IS_ASLEEP(uap) || uap->node == NULL) |
| 630 | return; |
| 631 | |
| 632 | status = read_zsreg(uap, R0); |
| 633 | |
| 634 | /* TX busy? Just wait for the TX done interrupt. */ |
| 635 | if (!(status & Tx_BUF_EMP)) |
| 636 | return; |
| 637 | |
| 638 | /* Send the first character to jump-start the TX done |
| 639 | * IRQ sending engine. |
| 640 | */ |
| 641 | if (port->x_char) { |
| 642 | write_zsdata(uap, port->x_char); |
| 643 | zssync(uap); |
| 644 | port->icount.tx++; |
| 645 | port->x_char = 0; |
| 646 | } else { |
| 647 | struct circ_buf *xmit = &port->info->xmit; |
| 648 | |
| 649 | write_zsdata(uap, xmit->buf[xmit->tail]); |
| 650 | zssync(uap); |
| 651 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
| 652 | port->icount.tx++; |
| 653 | |
| 654 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 655 | uart_write_wakeup(&uap->port); |
| 656 | } |
| 657 | pmz_debug("pmz: start_tx() done.\n"); |
| 658 | } |
| 659 | |
| 660 | /* |
| 661 | * Stop Rx side, basically disable emitting of |
| 662 | * Rx interrupts on the port. We don't disable the rx |
| 663 | * side of the chip proper though |
| 664 | * The port lock is held. |
| 665 | */ |
| 666 | static void pmz_stop_rx(struct uart_port *port) |
| 667 | { |
| 668 | struct uart_pmac_port *uap = to_pmz(port); |
| 669 | |
| 670 | if (ZS_IS_ASLEEP(uap) || uap->node == NULL) |
| 671 | return; |
| 672 | |
| 673 | pmz_debug("pmz: stop_rx()()\n"); |
| 674 | |
| 675 | /* Disable all RX interrupts. */ |
| 676 | uap->curregs[R1] &= ~RxINT_MASK; |
| 677 | pmz_maybe_update_regs(uap); |
| 678 | |
| 679 | pmz_debug("pmz: stop_rx() done.\n"); |
| 680 | } |
| 681 | |
| 682 | /* |
| 683 | * Enable modem status change interrupts |
| 684 | * The port lock is held. |
| 685 | */ |
| 686 | static void pmz_enable_ms(struct uart_port *port) |
| 687 | { |
| 688 | struct uart_pmac_port *uap = to_pmz(port); |
| 689 | unsigned char new_reg; |
| 690 | |
| 691 | if (ZS_IS_IRDA(uap) || uap->node == NULL) |
| 692 | return; |
| 693 | new_reg = uap->curregs[R15] | (DCDIE | SYNCIE | CTSIE); |
| 694 | if (new_reg != uap->curregs[R15]) { |
| 695 | uap->curregs[R15] = new_reg; |
| 696 | |
| 697 | if (ZS_IS_ASLEEP(uap)) |
| 698 | return; |
| 699 | /* NOTE: Not subject to 'transmitter active' rule. */ |
| 700 | write_zsreg(uap, R15, uap->curregs[R15]); |
| 701 | } |
| 702 | } |
| 703 | |
| 704 | /* |
| 705 | * Control break state emission |
| 706 | * The port lock is not held. |
| 707 | */ |
| 708 | static void pmz_break_ctl(struct uart_port *port, int break_state) |
| 709 | { |
| 710 | struct uart_pmac_port *uap = to_pmz(port); |
| 711 | unsigned char set_bits, clear_bits, new_reg; |
| 712 | unsigned long flags; |
| 713 | |
| 714 | if (uap->node == NULL) |
| 715 | return; |
| 716 | set_bits = clear_bits = 0; |
| 717 | |
| 718 | if (break_state) |
| 719 | set_bits |= SND_BRK; |
| 720 | else |
| 721 | clear_bits |= SND_BRK; |
| 722 | |
| 723 | spin_lock_irqsave(&port->lock, flags); |
| 724 | |
| 725 | new_reg = (uap->curregs[R5] | set_bits) & ~clear_bits; |
| 726 | if (new_reg != uap->curregs[R5]) { |
| 727 | uap->curregs[R5] = new_reg; |
| 728 | |
| 729 | /* NOTE: Not subject to 'transmitter active' rule. */ |
| 730 | if (ZS_IS_ASLEEP(uap)) |
| 731 | return; |
| 732 | write_zsreg(uap, R5, uap->curregs[R5]); |
| 733 | } |
| 734 | |
| 735 | spin_unlock_irqrestore(&port->lock, flags); |
| 736 | } |
| 737 | |
| 738 | /* |
| 739 | * Turn power on or off to the SCC and associated stuff |
| 740 | * (port drivers, modem, IR port, etc.) |
| 741 | * Returns the number of milliseconds we should wait before |
| 742 | * trying to use the port. |
| 743 | */ |
| 744 | static int pmz_set_scc_power(struct uart_pmac_port *uap, int state) |
| 745 | { |
| 746 | int delay = 0; |
| 747 | int rc; |
| 748 | |
| 749 | if (state) { |
| 750 | rc = pmac_call_feature( |
| 751 | PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 1); |
| 752 | pmz_debug("port power on result: %d\n", rc); |
| 753 | if (ZS_IS_INTMODEM(uap)) { |
| 754 | rc = pmac_call_feature( |
| 755 | PMAC_FTR_MODEM_ENABLE, uap->node, 0, 1); |
| 756 | delay = 2500; /* wait for 2.5s before using */ |
| 757 | pmz_debug("modem power result: %d\n", rc); |
| 758 | } |
| 759 | } else { |
| 760 | /* TODO: Make that depend on a timer, don't power down |
| 761 | * immediately |
| 762 | */ |
| 763 | if (ZS_IS_INTMODEM(uap)) { |
| 764 | rc = pmac_call_feature( |
| 765 | PMAC_FTR_MODEM_ENABLE, uap->node, 0, 0); |
| 766 | pmz_debug("port power off result: %d\n", rc); |
| 767 | } |
| 768 | pmac_call_feature(PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 0); |
| 769 | } |
| 770 | return delay; |
| 771 | } |
| 772 | |
| 773 | /* |
| 774 | * FixZeroBug....Works around a bug in the SCC receving channel. |
| 775 | * Inspired from Darwin code, 15 Sept. 2000 -DanM |
| 776 | * |
| 777 | * The following sequence prevents a problem that is seen with O'Hare ASICs |
| 778 | * (most versions -- also with some Heathrow and Hydra ASICs) where a zero |
| 779 | * at the input to the receiver becomes 'stuck' and locks up the receiver. |
| 780 | * This problem can occur as a result of a zero bit at the receiver input |
| 781 | * coincident with any of the following events: |
| 782 | * |
| 783 | * The SCC is initialized (hardware or software). |
| 784 | * A framing error is detected. |
| 785 | * The clocking option changes from synchronous or X1 asynchronous |
| 786 | * clocking to X16, X32, or X64 asynchronous clocking. |
| 787 | * The decoding mode is changed among NRZ, NRZI, FM0, or FM1. |
| 788 | * |
| 789 | * This workaround attempts to recover from the lockup condition by placing |
| 790 | * the SCC in synchronous loopback mode with a fast clock before programming |
| 791 | * any of the asynchronous modes. |
| 792 | */ |
| 793 | static void pmz_fix_zero_bug_scc(struct uart_pmac_port *uap) |
| 794 | { |
| 795 | write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB); |
| 796 | zssync(uap); |
| 797 | udelay(10); |
| 798 | write_zsreg(uap, 9, (ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB) | NV); |
| 799 | zssync(uap); |
| 800 | |
| 801 | write_zsreg(uap, 4, X1CLK | MONSYNC); |
| 802 | write_zsreg(uap, 3, Rx8); |
| 803 | write_zsreg(uap, 5, Tx8 | RTS); |
| 804 | write_zsreg(uap, 9, NV); /* Didn't we already do this? */ |
| 805 | write_zsreg(uap, 11, RCBR | TCBR); |
| 806 | write_zsreg(uap, 12, 0); |
| 807 | write_zsreg(uap, 13, 0); |
| 808 | write_zsreg(uap, 14, (LOOPBAK | BRSRC)); |
| 809 | write_zsreg(uap, 14, (LOOPBAK | BRSRC | BRENAB)); |
| 810 | write_zsreg(uap, 3, Rx8 | RxENABLE); |
| 811 | write_zsreg(uap, 0, RES_EXT_INT); |
| 812 | write_zsreg(uap, 0, RES_EXT_INT); |
| 813 | write_zsreg(uap, 0, RES_EXT_INT); /* to kill some time */ |
| 814 | |
| 815 | /* The channel should be OK now, but it is probably receiving |
| 816 | * loopback garbage. |
| 817 | * Switch to asynchronous mode, disable the receiver, |
| 818 | * and discard everything in the receive buffer. |
| 819 | */ |
| 820 | write_zsreg(uap, 9, NV); |
| 821 | write_zsreg(uap, 4, X16CLK | SB_MASK); |
| 822 | write_zsreg(uap, 3, Rx8); |
| 823 | |
| 824 | while (read_zsreg(uap, 0) & Rx_CH_AV) { |
| 825 | (void)read_zsreg(uap, 8); |
| 826 | write_zsreg(uap, 0, RES_EXT_INT); |
| 827 | write_zsreg(uap, 0, ERR_RES); |
| 828 | } |
| 829 | } |
| 830 | |
| 831 | /* |
| 832 | * Real startup routine, powers up the hardware and sets up |
| 833 | * the SCC. Returns a delay in ms where you need to wait before |
| 834 | * actually using the port, this is typically the internal modem |
| 835 | * powerup delay. This routine expect the lock to be taken. |
| 836 | */ |
| 837 | static int __pmz_startup(struct uart_pmac_port *uap) |
| 838 | { |
| 839 | int pwr_delay = 0; |
| 840 | |
| 841 | memset(&uap->curregs, 0, sizeof(uap->curregs)); |
| 842 | |
| 843 | /* Power up the SCC & underlying hardware (modem/irda) */ |
| 844 | pwr_delay = pmz_set_scc_power(uap, 1); |
| 845 | |
| 846 | /* Nice buggy HW ... */ |
| 847 | pmz_fix_zero_bug_scc(uap); |
| 848 | |
| 849 | /* Reset the channel */ |
| 850 | uap->curregs[R9] = 0; |
| 851 | write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB); |
| 852 | zssync(uap); |
| 853 | udelay(10); |
| 854 | write_zsreg(uap, 9, 0); |
| 855 | zssync(uap); |
| 856 | |
| 857 | /* Clear the interrupt registers */ |
| 858 | write_zsreg(uap, R1, 0); |
| 859 | write_zsreg(uap, R0, ERR_RES); |
| 860 | write_zsreg(uap, R0, ERR_RES); |
| 861 | write_zsreg(uap, R0, RES_H_IUS); |
| 862 | write_zsreg(uap, R0, RES_H_IUS); |
| 863 | |
| 864 | /* Setup some valid baud rate */ |
| 865 | uap->curregs[R4] = X16CLK | SB1; |
| 866 | uap->curregs[R3] = Rx8; |
| 867 | uap->curregs[R5] = Tx8 | RTS; |
| 868 | if (!ZS_IS_IRDA(uap)) |
| 869 | uap->curregs[R5] |= DTR; |
| 870 | uap->curregs[R12] = 0; |
| 871 | uap->curregs[R13] = 0; |
| 872 | uap->curregs[R14] = BRENAB; |
| 873 | |
| 874 | /* Clear handshaking, enable BREAK interrupts */ |
| 875 | uap->curregs[R15] = BRKIE; |
| 876 | |
| 877 | /* Master interrupt enable */ |
| 878 | uap->curregs[R9] |= NV | MIE; |
| 879 | |
| 880 | pmz_load_zsregs(uap, uap->curregs); |
| 881 | |
| 882 | /* Enable receiver and transmitter. */ |
| 883 | write_zsreg(uap, R3, uap->curregs[R3] |= RxENABLE); |
| 884 | write_zsreg(uap, R5, uap->curregs[R5] |= TxENABLE); |
| 885 | |
| 886 | /* Remember status for DCD/CTS changes */ |
| 887 | uap->prev_status = read_zsreg(uap, R0); |
| 888 | |
| 889 | |
| 890 | return pwr_delay; |
| 891 | } |
| 892 | |
| 893 | static void pmz_irda_reset(struct uart_pmac_port *uap) |
| 894 | { |
| 895 | uap->curregs[R5] |= DTR; |
| 896 | write_zsreg(uap, R5, uap->curregs[R5]); |
| 897 | zssync(uap); |
| 898 | mdelay(110); |
| 899 | uap->curregs[R5] &= ~DTR; |
| 900 | write_zsreg(uap, R5, uap->curregs[R5]); |
| 901 | zssync(uap); |
| 902 | mdelay(10); |
| 903 | } |
| 904 | |
| 905 | /* |
| 906 | * This is the "normal" startup routine, using the above one |
| 907 | * wrapped with the lock and doing a schedule delay |
| 908 | */ |
| 909 | static int pmz_startup(struct uart_port *port) |
| 910 | { |
| 911 | struct uart_pmac_port *uap = to_pmz(port); |
| 912 | unsigned long flags; |
| 913 | int pwr_delay = 0; |
| 914 | |
| 915 | pmz_debug("pmz: startup()\n"); |
| 916 | |
| 917 | if (ZS_IS_ASLEEP(uap)) |
| 918 | return -EAGAIN; |
| 919 | if (uap->node == NULL) |
| 920 | return -ENODEV; |
| 921 | |
Arjan van de Ven | f392ecf | 2006-01-12 18:44:32 +0000 | [diff] [blame] | 922 | mutex_lock(&pmz_irq_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 923 | |
| 924 | uap->flags |= PMACZILOG_FLAG_IS_OPEN; |
| 925 | |
| 926 | /* A console is never powered down. Else, power up and |
| 927 | * initialize the chip |
| 928 | */ |
| 929 | if (!ZS_IS_CONS(uap)) { |
| 930 | spin_lock_irqsave(&port->lock, flags); |
| 931 | pwr_delay = __pmz_startup(uap); |
| 932 | spin_unlock_irqrestore(&port->lock, flags); |
| 933 | } |
| 934 | |
| 935 | pmz_get_port_A(uap)->flags |= PMACZILOG_FLAG_IS_IRQ_ON; |
Thomas Gleixner | 40663cc | 2006-07-01 19:29:43 -0700 | [diff] [blame] | 936 | if (request_irq(uap->port.irq, pmz_interrupt, IRQF_SHARED, "PowerMac Zilog", uap)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 937 | dev_err(&uap->dev->ofdev.dev, |
| 938 | "Unable to register zs interrupt handler.\n"); |
| 939 | pmz_set_scc_power(uap, 0); |
Arjan van de Ven | f392ecf | 2006-01-12 18:44:32 +0000 | [diff] [blame] | 940 | mutex_unlock(&pmz_irq_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 941 | return -ENXIO; |
| 942 | } |
| 943 | |
Arjan van de Ven | f392ecf | 2006-01-12 18:44:32 +0000 | [diff] [blame] | 944 | mutex_unlock(&pmz_irq_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 945 | |
| 946 | /* Right now, we deal with delay by blocking here, I'll be |
| 947 | * smarter later on |
| 948 | */ |
| 949 | if (pwr_delay != 0) { |
| 950 | pmz_debug("pmz: delaying %d ms\n", pwr_delay); |
| 951 | msleep(pwr_delay); |
| 952 | } |
| 953 | |
| 954 | /* IrDA reset is done now */ |
| 955 | if (ZS_IS_IRDA(uap)) |
| 956 | pmz_irda_reset(uap); |
| 957 | |
| 958 | /* Enable interrupts emission from the chip */ |
| 959 | spin_lock_irqsave(&port->lock, flags); |
| 960 | uap->curregs[R1] |= INT_ALL_Rx | TxINT_ENAB; |
| 961 | if (!ZS_IS_EXTCLK(uap)) |
| 962 | uap->curregs[R1] |= EXT_INT_ENAB; |
| 963 | write_zsreg(uap, R1, uap->curregs[R1]); |
| 964 | spin_unlock_irqrestore(&port->lock, flags); |
| 965 | |
| 966 | pmz_debug("pmz: startup() done.\n"); |
| 967 | |
| 968 | return 0; |
| 969 | } |
| 970 | |
| 971 | static void pmz_shutdown(struct uart_port *port) |
| 972 | { |
| 973 | struct uart_pmac_port *uap = to_pmz(port); |
| 974 | unsigned long flags; |
| 975 | |
| 976 | pmz_debug("pmz: shutdown()\n"); |
| 977 | |
| 978 | if (uap->node == NULL) |
| 979 | return; |
| 980 | |
Arjan van de Ven | f392ecf | 2006-01-12 18:44:32 +0000 | [diff] [blame] | 981 | mutex_lock(&pmz_irq_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 982 | |
| 983 | /* Release interrupt handler */ |
| 984 | free_irq(uap->port.irq, uap); |
| 985 | |
| 986 | spin_lock_irqsave(&port->lock, flags); |
| 987 | |
| 988 | uap->flags &= ~PMACZILOG_FLAG_IS_OPEN; |
| 989 | |
| 990 | if (!ZS_IS_OPEN(uap->mate)) |
| 991 | pmz_get_port_A(uap)->flags &= ~PMACZILOG_FLAG_IS_IRQ_ON; |
| 992 | |
| 993 | /* Disable interrupts */ |
| 994 | if (!ZS_IS_ASLEEP(uap)) { |
| 995 | uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); |
| 996 | write_zsreg(uap, R1, uap->curregs[R1]); |
| 997 | zssync(uap); |
| 998 | } |
| 999 | |
| 1000 | if (ZS_IS_CONS(uap) || ZS_IS_ASLEEP(uap)) { |
| 1001 | spin_unlock_irqrestore(&port->lock, flags); |
Arjan van de Ven | f392ecf | 2006-01-12 18:44:32 +0000 | [diff] [blame] | 1002 | mutex_unlock(&pmz_irq_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1003 | return; |
| 1004 | } |
| 1005 | |
| 1006 | /* Disable receiver and transmitter. */ |
| 1007 | uap->curregs[R3] &= ~RxENABLE; |
| 1008 | uap->curregs[R5] &= ~TxENABLE; |
| 1009 | |
| 1010 | /* Disable all interrupts and BRK assertion. */ |
| 1011 | uap->curregs[R5] &= ~SND_BRK; |
| 1012 | pmz_maybe_update_regs(uap); |
| 1013 | |
| 1014 | /* Shut the chip down */ |
| 1015 | pmz_set_scc_power(uap, 0); |
| 1016 | |
| 1017 | spin_unlock_irqrestore(&port->lock, flags); |
| 1018 | |
Arjan van de Ven | f392ecf | 2006-01-12 18:44:32 +0000 | [diff] [blame] | 1019 | mutex_unlock(&pmz_irq_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1020 | |
| 1021 | pmz_debug("pmz: shutdown() done.\n"); |
| 1022 | } |
| 1023 | |
| 1024 | /* Shared by TTY driver and serial console setup. The port lock is held |
| 1025 | * and local interrupts are disabled. |
| 1026 | */ |
| 1027 | static void pmz_convert_to_zs(struct uart_pmac_port *uap, unsigned int cflag, |
| 1028 | unsigned int iflag, unsigned long baud) |
| 1029 | { |
| 1030 | int brg; |
| 1031 | |
| 1032 | |
| 1033 | /* Switch to external clocking for IrDA high clock rates. That |
| 1034 | * code could be re-used for Midi interfaces with different |
| 1035 | * multipliers |
| 1036 | */ |
| 1037 | if (baud >= 115200 && ZS_IS_IRDA(uap)) { |
| 1038 | uap->curregs[R4] = X1CLK; |
| 1039 | uap->curregs[R11] = RCTRxCP | TCTRxCP; |
| 1040 | uap->curregs[R14] = 0; /* BRG off */ |
| 1041 | uap->curregs[R12] = 0; |
| 1042 | uap->curregs[R13] = 0; |
| 1043 | uap->flags |= PMACZILOG_FLAG_IS_EXTCLK; |
| 1044 | } else { |
| 1045 | switch (baud) { |
| 1046 | case ZS_CLOCK/16: /* 230400 */ |
| 1047 | uap->curregs[R4] = X16CLK; |
| 1048 | uap->curregs[R11] = 0; |
| 1049 | uap->curregs[R14] = 0; |
| 1050 | break; |
| 1051 | case ZS_CLOCK/32: /* 115200 */ |
| 1052 | uap->curregs[R4] = X32CLK; |
| 1053 | uap->curregs[R11] = 0; |
| 1054 | uap->curregs[R14] = 0; |
| 1055 | break; |
| 1056 | default: |
| 1057 | uap->curregs[R4] = X16CLK; |
| 1058 | uap->curregs[R11] = TCBR | RCBR; |
| 1059 | brg = BPS_TO_BRG(baud, ZS_CLOCK / 16); |
| 1060 | uap->curregs[R12] = (brg & 255); |
| 1061 | uap->curregs[R13] = ((brg >> 8) & 255); |
| 1062 | uap->curregs[R14] = BRENAB; |
| 1063 | } |
| 1064 | uap->flags &= ~PMACZILOG_FLAG_IS_EXTCLK; |
| 1065 | } |
| 1066 | |
| 1067 | /* Character size, stop bits, and parity. */ |
| 1068 | uap->curregs[3] &= ~RxN_MASK; |
| 1069 | uap->curregs[5] &= ~TxN_MASK; |
| 1070 | |
| 1071 | switch (cflag & CSIZE) { |
| 1072 | case CS5: |
| 1073 | uap->curregs[3] |= Rx5; |
| 1074 | uap->curregs[5] |= Tx5; |
| 1075 | uap->parity_mask = 0x1f; |
| 1076 | break; |
| 1077 | case CS6: |
| 1078 | uap->curregs[3] |= Rx6; |
| 1079 | uap->curregs[5] |= Tx6; |
| 1080 | uap->parity_mask = 0x3f; |
| 1081 | break; |
| 1082 | case CS7: |
| 1083 | uap->curregs[3] |= Rx7; |
| 1084 | uap->curregs[5] |= Tx7; |
| 1085 | uap->parity_mask = 0x7f; |
| 1086 | break; |
| 1087 | case CS8: |
| 1088 | default: |
| 1089 | uap->curregs[3] |= Rx8; |
| 1090 | uap->curregs[5] |= Tx8; |
| 1091 | uap->parity_mask = 0xff; |
| 1092 | break; |
| 1093 | }; |
| 1094 | uap->curregs[4] &= ~(SB_MASK); |
| 1095 | if (cflag & CSTOPB) |
| 1096 | uap->curregs[4] |= SB2; |
| 1097 | else |
| 1098 | uap->curregs[4] |= SB1; |
| 1099 | if (cflag & PARENB) |
| 1100 | uap->curregs[4] |= PAR_ENAB; |
| 1101 | else |
| 1102 | uap->curregs[4] &= ~PAR_ENAB; |
| 1103 | if (!(cflag & PARODD)) |
| 1104 | uap->curregs[4] |= PAR_EVEN; |
| 1105 | else |
| 1106 | uap->curregs[4] &= ~PAR_EVEN; |
| 1107 | |
| 1108 | uap->port.read_status_mask = Rx_OVR; |
| 1109 | if (iflag & INPCK) |
| 1110 | uap->port.read_status_mask |= CRC_ERR | PAR_ERR; |
| 1111 | if (iflag & (BRKINT | PARMRK)) |
| 1112 | uap->port.read_status_mask |= BRK_ABRT; |
| 1113 | |
| 1114 | uap->port.ignore_status_mask = 0; |
| 1115 | if (iflag & IGNPAR) |
| 1116 | uap->port.ignore_status_mask |= CRC_ERR | PAR_ERR; |
| 1117 | if (iflag & IGNBRK) { |
| 1118 | uap->port.ignore_status_mask |= BRK_ABRT; |
| 1119 | if (iflag & IGNPAR) |
| 1120 | uap->port.ignore_status_mask |= Rx_OVR; |
| 1121 | } |
| 1122 | |
| 1123 | if ((cflag & CREAD) == 0) |
| 1124 | uap->port.ignore_status_mask = 0xff; |
| 1125 | } |
| 1126 | |
| 1127 | |
| 1128 | /* |
| 1129 | * Set the irda codec on the imac to the specified baud rate. |
| 1130 | */ |
| 1131 | static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud) |
| 1132 | { |
| 1133 | u8 cmdbyte; |
| 1134 | int t, version; |
| 1135 | |
| 1136 | switch (*baud) { |
| 1137 | /* SIR modes */ |
| 1138 | case 2400: |
| 1139 | cmdbyte = 0x53; |
| 1140 | break; |
| 1141 | case 4800: |
| 1142 | cmdbyte = 0x52; |
| 1143 | break; |
| 1144 | case 9600: |
| 1145 | cmdbyte = 0x51; |
| 1146 | break; |
| 1147 | case 19200: |
| 1148 | cmdbyte = 0x50; |
| 1149 | break; |
| 1150 | case 38400: |
| 1151 | cmdbyte = 0x4f; |
| 1152 | break; |
| 1153 | case 57600: |
| 1154 | cmdbyte = 0x4e; |
| 1155 | break; |
| 1156 | case 115200: |
| 1157 | cmdbyte = 0x4d; |
| 1158 | break; |
| 1159 | /* The FIR modes aren't really supported at this point, how |
| 1160 | * do we select the speed ? via the FCR on KeyLargo ? |
| 1161 | */ |
| 1162 | case 1152000: |
| 1163 | cmdbyte = 0; |
| 1164 | break; |
| 1165 | case 4000000: |
| 1166 | cmdbyte = 0; |
| 1167 | break; |
| 1168 | default: /* 9600 */ |
| 1169 | cmdbyte = 0x51; |
| 1170 | *baud = 9600; |
| 1171 | break; |
| 1172 | } |
| 1173 | |
| 1174 | /* Wait for transmitter to drain */ |
| 1175 | t = 10000; |
| 1176 | while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0 |
| 1177 | || (read_zsreg(uap, R1) & ALL_SNT) == 0) { |
| 1178 | if (--t <= 0) { |
| 1179 | dev_err(&uap->dev->ofdev.dev, "transmitter didn't drain\n"); |
| 1180 | return; |
| 1181 | } |
| 1182 | udelay(10); |
| 1183 | } |
| 1184 | |
| 1185 | /* Drain the receiver too */ |
| 1186 | t = 100; |
| 1187 | (void)read_zsdata(uap); |
| 1188 | (void)read_zsdata(uap); |
| 1189 | (void)read_zsdata(uap); |
| 1190 | mdelay(10); |
| 1191 | while (read_zsreg(uap, R0) & Rx_CH_AV) { |
| 1192 | read_zsdata(uap); |
| 1193 | mdelay(10); |
| 1194 | if (--t <= 0) { |
| 1195 | dev_err(&uap->dev->ofdev.dev, "receiver didn't drain\n"); |
| 1196 | return; |
| 1197 | } |
| 1198 | } |
| 1199 | |
| 1200 | /* Switch to command mode */ |
| 1201 | uap->curregs[R5] |= DTR; |
| 1202 | write_zsreg(uap, R5, uap->curregs[R5]); |
| 1203 | zssync(uap); |
| 1204 | mdelay(1); |
| 1205 | |
| 1206 | /* Switch SCC to 19200 */ |
| 1207 | pmz_convert_to_zs(uap, CS8, 0, 19200); |
| 1208 | pmz_load_zsregs(uap, uap->curregs); |
| 1209 | mdelay(1); |
| 1210 | |
| 1211 | /* Write get_version command byte */ |
| 1212 | write_zsdata(uap, 1); |
| 1213 | t = 5000; |
| 1214 | while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) { |
| 1215 | if (--t <= 0) { |
| 1216 | dev_err(&uap->dev->ofdev.dev, |
| 1217 | "irda_setup timed out on get_version byte\n"); |
| 1218 | goto out; |
| 1219 | } |
| 1220 | udelay(10); |
| 1221 | } |
| 1222 | version = read_zsdata(uap); |
| 1223 | |
| 1224 | if (version < 4) { |
| 1225 | dev_info(&uap->dev->ofdev.dev, "IrDA: dongle version %d not supported\n", |
| 1226 | version); |
| 1227 | goto out; |
| 1228 | } |
| 1229 | |
| 1230 | /* Send speed mode */ |
| 1231 | write_zsdata(uap, cmdbyte); |
| 1232 | t = 5000; |
| 1233 | while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) { |
| 1234 | if (--t <= 0) { |
| 1235 | dev_err(&uap->dev->ofdev.dev, |
| 1236 | "irda_setup timed out on speed mode byte\n"); |
| 1237 | goto out; |
| 1238 | } |
| 1239 | udelay(10); |
| 1240 | } |
| 1241 | t = read_zsdata(uap); |
| 1242 | if (t != cmdbyte) |
| 1243 | dev_err(&uap->dev->ofdev.dev, |
| 1244 | "irda_setup speed mode byte = %x (%x)\n", t, cmdbyte); |
| 1245 | |
| 1246 | dev_info(&uap->dev->ofdev.dev, "IrDA setup for %ld bps, dongle version: %d\n", |
| 1247 | *baud, version); |
| 1248 | |
| 1249 | (void)read_zsdata(uap); |
| 1250 | (void)read_zsdata(uap); |
| 1251 | (void)read_zsdata(uap); |
| 1252 | |
| 1253 | out: |
| 1254 | /* Switch back to data mode */ |
| 1255 | uap->curregs[R5] &= ~DTR; |
| 1256 | write_zsreg(uap, R5, uap->curregs[R5]); |
| 1257 | zssync(uap); |
| 1258 | |
| 1259 | (void)read_zsdata(uap); |
| 1260 | (void)read_zsdata(uap); |
| 1261 | (void)read_zsdata(uap); |
| 1262 | } |
| 1263 | |
| 1264 | |
Alan Cox | 606d099 | 2006-12-08 02:38:45 -0800 | [diff] [blame] | 1265 | static void __pmz_set_termios(struct uart_port *port, struct ktermios *termios, |
| 1266 | struct ktermios *old) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1267 | { |
| 1268 | struct uart_pmac_port *uap = to_pmz(port); |
| 1269 | unsigned long baud; |
| 1270 | |
| 1271 | pmz_debug("pmz: set_termios()\n"); |
| 1272 | |
| 1273 | if (ZS_IS_ASLEEP(uap)) |
| 1274 | return; |
| 1275 | |
Alan Cox | 606d099 | 2006-12-08 02:38:45 -0800 | [diff] [blame] | 1276 | memcpy(&uap->termios_cache, termios, sizeof(struct ktermios)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1277 | |
| 1278 | /* XXX Check which revs of machines actually allow 1 and 4Mb speeds |
| 1279 | * on the IR dongle. Note that the IRTTY driver currently doesn't know |
| 1280 | * about the FIR mode and high speed modes. So these are unused. For |
| 1281 | * implementing proper support for these, we should probably add some |
| 1282 | * DMA as well, at least on the Rx side, which isn't a simple thing |
| 1283 | * at this point. |
| 1284 | */ |
| 1285 | if (ZS_IS_IRDA(uap)) { |
| 1286 | /* Calc baud rate */ |
| 1287 | baud = uart_get_baud_rate(port, termios, old, 1200, 4000000); |
| 1288 | pmz_debug("pmz: switch IRDA to %ld bauds\n", baud); |
| 1289 | /* Cet the irda codec to the right rate */ |
| 1290 | pmz_irda_setup(uap, &baud); |
| 1291 | /* Set final baud rate */ |
| 1292 | pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud); |
| 1293 | pmz_load_zsregs(uap, uap->curregs); |
| 1294 | zssync(uap); |
| 1295 | } else { |
| 1296 | baud = uart_get_baud_rate(port, termios, old, 1200, 230400); |
| 1297 | pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud); |
| 1298 | /* Make sure modem status interrupts are correctly configured */ |
| 1299 | if (UART_ENABLE_MS(&uap->port, termios->c_cflag)) { |
| 1300 | uap->curregs[R15] |= DCDIE | SYNCIE | CTSIE; |
| 1301 | uap->flags |= PMACZILOG_FLAG_MODEM_STATUS; |
| 1302 | } else { |
| 1303 | uap->curregs[R15] &= ~(DCDIE | SYNCIE | CTSIE); |
| 1304 | uap->flags &= ~PMACZILOG_FLAG_MODEM_STATUS; |
| 1305 | } |
| 1306 | |
| 1307 | /* Load registers to the chip */ |
| 1308 | pmz_maybe_update_regs(uap); |
| 1309 | } |
| 1310 | uart_update_timeout(port, termios->c_cflag, baud); |
| 1311 | |
| 1312 | pmz_debug("pmz: set_termios() done.\n"); |
| 1313 | } |
| 1314 | |
| 1315 | /* The port lock is not held. */ |
Alan Cox | 606d099 | 2006-12-08 02:38:45 -0800 | [diff] [blame] | 1316 | static void pmz_set_termios(struct uart_port *port, struct ktermios *termios, |
| 1317 | struct ktermios *old) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1318 | { |
| 1319 | struct uart_pmac_port *uap = to_pmz(port); |
| 1320 | unsigned long flags; |
| 1321 | |
| 1322 | spin_lock_irqsave(&port->lock, flags); |
| 1323 | |
| 1324 | /* Disable IRQs on the port */ |
| 1325 | uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); |
| 1326 | write_zsreg(uap, R1, uap->curregs[R1]); |
| 1327 | |
| 1328 | /* Setup new port configuration */ |
| 1329 | __pmz_set_termios(port, termios, old); |
| 1330 | |
| 1331 | /* Re-enable IRQs on the port */ |
| 1332 | if (ZS_IS_OPEN(uap)) { |
| 1333 | uap->curregs[R1] |= INT_ALL_Rx | TxINT_ENAB; |
| 1334 | if (!ZS_IS_EXTCLK(uap)) |
| 1335 | uap->curregs[R1] |= EXT_INT_ENAB; |
| 1336 | write_zsreg(uap, R1, uap->curregs[R1]); |
| 1337 | } |
| 1338 | spin_unlock_irqrestore(&port->lock, flags); |
| 1339 | } |
| 1340 | |
| 1341 | static const char *pmz_type(struct uart_port *port) |
| 1342 | { |
| 1343 | struct uart_pmac_port *uap = to_pmz(port); |
| 1344 | |
| 1345 | if (ZS_IS_IRDA(uap)) |
| 1346 | return "Z85c30 ESCC - Infrared port"; |
| 1347 | else if (ZS_IS_INTMODEM(uap)) |
| 1348 | return "Z85c30 ESCC - Internal modem"; |
| 1349 | return "Z85c30 ESCC - Serial port"; |
| 1350 | } |
| 1351 | |
| 1352 | /* We do not request/release mappings of the registers here, this |
| 1353 | * happens at early serial probe time. |
| 1354 | */ |
| 1355 | static void pmz_release_port(struct uart_port *port) |
| 1356 | { |
| 1357 | } |
| 1358 | |
| 1359 | static int pmz_request_port(struct uart_port *port) |
| 1360 | { |
| 1361 | return 0; |
| 1362 | } |
| 1363 | |
| 1364 | /* These do not need to do anything interesting either. */ |
| 1365 | static void pmz_config_port(struct uart_port *port, int flags) |
| 1366 | { |
| 1367 | } |
| 1368 | |
| 1369 | /* We do not support letting the user mess with the divisor, IRQ, etc. */ |
| 1370 | static int pmz_verify_port(struct uart_port *port, struct serial_struct *ser) |
| 1371 | { |
| 1372 | return -EINVAL; |
| 1373 | } |
| 1374 | |
| 1375 | static struct uart_ops pmz_pops = { |
| 1376 | .tx_empty = pmz_tx_empty, |
| 1377 | .set_mctrl = pmz_set_mctrl, |
| 1378 | .get_mctrl = pmz_get_mctrl, |
| 1379 | .stop_tx = pmz_stop_tx, |
| 1380 | .start_tx = pmz_start_tx, |
| 1381 | .stop_rx = pmz_stop_rx, |
| 1382 | .enable_ms = pmz_enable_ms, |
| 1383 | .break_ctl = pmz_break_ctl, |
| 1384 | .startup = pmz_startup, |
| 1385 | .shutdown = pmz_shutdown, |
| 1386 | .set_termios = pmz_set_termios, |
| 1387 | .type = pmz_type, |
| 1388 | .release_port = pmz_release_port, |
| 1389 | .request_port = pmz_request_port, |
| 1390 | .config_port = pmz_config_port, |
| 1391 | .verify_port = pmz_verify_port, |
| 1392 | }; |
| 1393 | |
| 1394 | /* |
| 1395 | * Setup one port structure after probing, HW is down at this point, |
| 1396 | * Unlike sunzilog, we don't need to pre-init the spinlock as we don't |
| 1397 | * register our console before uart_add_one_port() is called |
| 1398 | */ |
| 1399 | static int __init pmz_init_port(struct uart_pmac_port *uap) |
| 1400 | { |
| 1401 | struct device_node *np = uap->node; |
Jeremy Kerr | 018a3d1 | 2006-07-12 15:40:29 +1000 | [diff] [blame] | 1402 | const char *conn; |
| 1403 | const struct slot_names_prop { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1404 | int count; |
| 1405 | char name[1]; |
| 1406 | } *slots; |
| 1407 | int len; |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 1408 | struct resource r_ports, r_rxdma, r_txdma; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1409 | |
| 1410 | /* |
| 1411 | * Request & map chip registers |
| 1412 | */ |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 1413 | if (of_address_to_resource(np, 0, &r_ports)) |
| 1414 | return -ENODEV; |
| 1415 | uap->port.mapbase = r_ports.start; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1416 | uap->port.membase = ioremap(uap->port.mapbase, 0x1000); |
| 1417 | |
| 1418 | uap->control_reg = uap->port.membase; |
| 1419 | uap->data_reg = uap->control_reg + 0x10; |
| 1420 | |
| 1421 | /* |
| 1422 | * Request & map DBDMA registers |
| 1423 | */ |
| 1424 | #ifdef HAS_DBDMA |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 1425 | if (of_address_to_resource(np, 1, &r_txdma) == 0 && |
| 1426 | of_address_to_resource(np, 2, &r_rxdma) == 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1427 | uap->flags |= PMACZILOG_FLAG_HAS_DMA; |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 1428 | #else |
| 1429 | memset(&r_txdma, 0, sizeof(struct resource)); |
| 1430 | memset(&r_rxdma, 0, sizeof(struct resource)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1431 | #endif |
| 1432 | if (ZS_HAS_DMA(uap)) { |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 1433 | uap->tx_dma_regs = ioremap(r_txdma.start, 0x100); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1434 | if (uap->tx_dma_regs == NULL) { |
| 1435 | uap->flags &= ~PMACZILOG_FLAG_HAS_DMA; |
| 1436 | goto no_dma; |
| 1437 | } |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 1438 | uap->rx_dma_regs = ioremap(r_rxdma.start, 0x100); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1439 | if (uap->rx_dma_regs == NULL) { |
| 1440 | iounmap(uap->tx_dma_regs); |
| 1441 | uap->tx_dma_regs = NULL; |
| 1442 | uap->flags &= ~PMACZILOG_FLAG_HAS_DMA; |
| 1443 | goto no_dma; |
| 1444 | } |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 1445 | uap->tx_dma_irq = irq_of_parse_and_map(np, 1); |
| 1446 | uap->rx_dma_irq = irq_of_parse_and_map(np, 2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1447 | } |
| 1448 | no_dma: |
| 1449 | |
| 1450 | /* |
| 1451 | * Detect port type |
| 1452 | */ |
| 1453 | if (device_is_compatible(np, "cobalt")) |
| 1454 | uap->flags |= PMACZILOG_FLAG_IS_INTMODEM; |
| 1455 | conn = get_property(np, "AAPL,connector", &len); |
| 1456 | if (conn && (strcmp(conn, "infrared") == 0)) |
| 1457 | uap->flags |= PMACZILOG_FLAG_IS_IRDA; |
| 1458 | uap->port_type = PMAC_SCC_ASYNC; |
| 1459 | /* 1999 Powerbook G3 has slot-names property instead */ |
Jeremy Kerr | 018a3d1 | 2006-07-12 15:40:29 +1000 | [diff] [blame] | 1460 | slots = get_property(np, "slot-names", &len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1461 | if (slots && slots->count > 0) { |
| 1462 | if (strcmp(slots->name, "IrDA") == 0) |
| 1463 | uap->flags |= PMACZILOG_FLAG_IS_IRDA; |
| 1464 | else if (strcmp(slots->name, "Modem") == 0) |
| 1465 | uap->flags |= PMACZILOG_FLAG_IS_INTMODEM; |
| 1466 | } |
| 1467 | if (ZS_IS_IRDA(uap)) |
| 1468 | uap->port_type = PMAC_SCC_IRDA; |
| 1469 | if (ZS_IS_INTMODEM(uap)) { |
| 1470 | struct device_node* i2c_modem = find_devices("i2c-modem"); |
| 1471 | if (i2c_modem) { |
Jeremy Kerr | 018a3d1 | 2006-07-12 15:40:29 +1000 | [diff] [blame] | 1472 | const char* mid = |
| 1473 | get_property(i2c_modem, "modem-id", NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1474 | if (mid) switch(*mid) { |
| 1475 | case 0x04 : |
| 1476 | case 0x05 : |
| 1477 | case 0x07 : |
| 1478 | case 0x08 : |
| 1479 | case 0x0b : |
| 1480 | case 0x0c : |
| 1481 | uap->port_type = PMAC_SCC_I2S1; |
| 1482 | } |
| 1483 | printk(KERN_INFO "pmac_zilog: i2c-modem detected, id: %d\n", |
| 1484 | mid ? (*mid) : 0); |
| 1485 | } else { |
| 1486 | printk(KERN_INFO "pmac_zilog: serial modem detected\n"); |
| 1487 | } |
| 1488 | } |
| 1489 | |
| 1490 | /* |
| 1491 | * Init remaining bits of "port" structure |
| 1492 | */ |
Russell King | 9b4a161 | 2006-02-05 10:48:10 +0000 | [diff] [blame] | 1493 | uap->port.iotype = UPIO_MEM; |
Benjamin Herrenschmidt | 0ebfff1 | 2006-07-03 21:36:01 +1000 | [diff] [blame] | 1494 | uap->port.irq = irq_of_parse_and_map(np, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1495 | uap->port.uartclk = ZS_CLOCK; |
| 1496 | uap->port.fifosize = 1; |
| 1497 | uap->port.ops = &pmz_pops; |
| 1498 | uap->port.type = PORT_PMAC_ZILOG; |
| 1499 | uap->port.flags = 0; |
| 1500 | |
| 1501 | /* Setup some valid baud rate information in the register |
| 1502 | * shadows so we don't write crap there before baud rate is |
| 1503 | * first initialized. |
| 1504 | */ |
| 1505 | pmz_convert_to_zs(uap, CS8, 0, 9600); |
| 1506 | |
| 1507 | return 0; |
| 1508 | } |
| 1509 | |
| 1510 | /* |
| 1511 | * Get rid of a port on module removal |
| 1512 | */ |
| 1513 | static void pmz_dispose_port(struct uart_pmac_port *uap) |
| 1514 | { |
| 1515 | struct device_node *np; |
| 1516 | |
| 1517 | np = uap->node; |
| 1518 | iounmap(uap->rx_dma_regs); |
| 1519 | iounmap(uap->tx_dma_regs); |
| 1520 | iounmap(uap->control_reg); |
| 1521 | uap->node = NULL; |
| 1522 | of_node_put(np); |
| 1523 | memset(uap, 0, sizeof(struct uart_pmac_port)); |
| 1524 | } |
| 1525 | |
| 1526 | /* |
| 1527 | * Called upon match with an escc node in the devive-tree. |
| 1528 | */ |
Jeff Mahoney | 5e65577 | 2005-07-06 15:44:41 -0400 | [diff] [blame] | 1529 | static int pmz_attach(struct macio_dev *mdev, const struct of_device_id *match) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1530 | { |
| 1531 | int i; |
| 1532 | |
| 1533 | /* Iterate the pmz_ports array to find a matching entry |
| 1534 | */ |
| 1535 | for (i = 0; i < MAX_ZS_PORTS; i++) |
| 1536 | if (pmz_ports[i].node == mdev->ofdev.node) { |
| 1537 | struct uart_pmac_port *uap = &pmz_ports[i]; |
| 1538 | |
| 1539 | uap->dev = mdev; |
| 1540 | dev_set_drvdata(&mdev->ofdev.dev, uap); |
| 1541 | if (macio_request_resources(uap->dev, "pmac_zilog")) |
| 1542 | printk(KERN_WARNING "%s: Failed to request resource" |
| 1543 | ", port still active\n", |
| 1544 | uap->node->name); |
| 1545 | else |
| 1546 | uap->flags |= PMACZILOG_FLAG_RSRC_REQUESTED; |
| 1547 | return 0; |
| 1548 | } |
| 1549 | return -ENODEV; |
| 1550 | } |
| 1551 | |
| 1552 | /* |
| 1553 | * That one should not be called, macio isn't really a hotswap device, |
| 1554 | * we don't expect one of those serial ports to go away... |
| 1555 | */ |
| 1556 | static int pmz_detach(struct macio_dev *mdev) |
| 1557 | { |
| 1558 | struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev); |
| 1559 | |
| 1560 | if (!uap) |
| 1561 | return -ENODEV; |
| 1562 | |
| 1563 | if (uap->flags & PMACZILOG_FLAG_RSRC_REQUESTED) { |
| 1564 | macio_release_resources(uap->dev); |
| 1565 | uap->flags &= ~PMACZILOG_FLAG_RSRC_REQUESTED; |
| 1566 | } |
| 1567 | dev_set_drvdata(&mdev->ofdev.dev, NULL); |
| 1568 | uap->dev = NULL; |
| 1569 | |
| 1570 | return 0; |
| 1571 | } |
| 1572 | |
| 1573 | |
Pavel Machek | 0370aff | 2005-04-16 15:25:35 -0700 | [diff] [blame] | 1574 | static int pmz_suspend(struct macio_dev *mdev, pm_message_t pm_state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1575 | { |
| 1576 | struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev); |
| 1577 | struct uart_state *state; |
| 1578 | unsigned long flags; |
| 1579 | |
| 1580 | if (uap == NULL) { |
| 1581 | printk("HRM... pmz_suspend with NULL uap\n"); |
| 1582 | return 0; |
| 1583 | } |
| 1584 | |
Pavel Machek | ca078ba | 2005-09-03 15:56:57 -0700 | [diff] [blame] | 1585 | if (pm_state.event == mdev->ofdev.dev.power.power_state.event) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1586 | return 0; |
| 1587 | |
| 1588 | pmz_debug("suspend, switching to state %d\n", pm_state); |
| 1589 | |
| 1590 | state = pmz_uart_reg.state + uap->port.line; |
| 1591 | |
Arjan van de Ven | f392ecf | 2006-01-12 18:44:32 +0000 | [diff] [blame] | 1592 | mutex_lock(&pmz_irq_mutex); |
Ingo Molnar | e2862f6 | 2006-01-13 21:37:07 +0000 | [diff] [blame] | 1593 | mutex_lock(&state->mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1594 | |
| 1595 | spin_lock_irqsave(&uap->port.lock, flags); |
| 1596 | |
| 1597 | if (ZS_IS_OPEN(uap) || ZS_IS_CONS(uap)) { |
| 1598 | /* Disable receiver and transmitter. */ |
| 1599 | uap->curregs[R3] &= ~RxENABLE; |
| 1600 | uap->curregs[R5] &= ~TxENABLE; |
| 1601 | |
| 1602 | /* Disable all interrupts and BRK assertion. */ |
| 1603 | uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); |
| 1604 | uap->curregs[R5] &= ~SND_BRK; |
| 1605 | pmz_load_zsregs(uap, uap->curregs); |
| 1606 | uap->flags |= PMACZILOG_FLAG_IS_ASLEEP; |
| 1607 | mb(); |
| 1608 | } |
| 1609 | |
| 1610 | spin_unlock_irqrestore(&uap->port.lock, flags); |
| 1611 | |
| 1612 | if (ZS_IS_OPEN(uap) || ZS_IS_OPEN(uap->mate)) |
| 1613 | if (ZS_IS_ASLEEP(uap->mate) && ZS_IS_IRQ_ON(pmz_get_port_A(uap))) { |
| 1614 | pmz_get_port_A(uap)->flags &= ~PMACZILOG_FLAG_IS_IRQ_ON; |
| 1615 | disable_irq(uap->port.irq); |
| 1616 | } |
| 1617 | |
| 1618 | if (ZS_IS_CONS(uap)) |
| 1619 | uap->port.cons->flags &= ~CON_ENABLED; |
| 1620 | |
| 1621 | /* Shut the chip down */ |
| 1622 | pmz_set_scc_power(uap, 0); |
| 1623 | |
Ingo Molnar | e2862f6 | 2006-01-13 21:37:07 +0000 | [diff] [blame] | 1624 | mutex_unlock(&state->mutex); |
Arjan van de Ven | f392ecf | 2006-01-12 18:44:32 +0000 | [diff] [blame] | 1625 | mutex_unlock(&pmz_irq_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1626 | |
| 1627 | pmz_debug("suspend, switching complete\n"); |
| 1628 | |
| 1629 | mdev->ofdev.dev.power.power_state = pm_state; |
| 1630 | |
| 1631 | return 0; |
| 1632 | } |
| 1633 | |
| 1634 | |
| 1635 | static int pmz_resume(struct macio_dev *mdev) |
| 1636 | { |
| 1637 | struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev); |
| 1638 | struct uart_state *state; |
| 1639 | unsigned long flags; |
| 1640 | int pwr_delay = 0; |
| 1641 | |
| 1642 | if (uap == NULL) |
| 1643 | return 0; |
| 1644 | |
Pavel Machek | ca078ba | 2005-09-03 15:56:57 -0700 | [diff] [blame] | 1645 | if (mdev->ofdev.dev.power.power_state.event == PM_EVENT_ON) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1646 | return 0; |
| 1647 | |
| 1648 | pmz_debug("resume, switching to state 0\n"); |
| 1649 | |
| 1650 | state = pmz_uart_reg.state + uap->port.line; |
| 1651 | |
Arjan van de Ven | f392ecf | 2006-01-12 18:44:32 +0000 | [diff] [blame] | 1652 | mutex_lock(&pmz_irq_mutex); |
Ingo Molnar | e2862f6 | 2006-01-13 21:37:07 +0000 | [diff] [blame] | 1653 | mutex_lock(&state->mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1654 | |
| 1655 | spin_lock_irqsave(&uap->port.lock, flags); |
| 1656 | if (!ZS_IS_OPEN(uap) && !ZS_IS_CONS(uap)) { |
| 1657 | spin_unlock_irqrestore(&uap->port.lock, flags); |
| 1658 | goto bail; |
| 1659 | } |
| 1660 | pwr_delay = __pmz_startup(uap); |
| 1661 | |
| 1662 | /* Take care of config that may have changed while asleep */ |
| 1663 | __pmz_set_termios(&uap->port, &uap->termios_cache, NULL); |
| 1664 | |
| 1665 | if (ZS_IS_OPEN(uap)) { |
| 1666 | /* Enable interrupts */ |
| 1667 | uap->curregs[R1] |= INT_ALL_Rx | TxINT_ENAB; |
| 1668 | if (!ZS_IS_EXTCLK(uap)) |
| 1669 | uap->curregs[R1] |= EXT_INT_ENAB; |
| 1670 | write_zsreg(uap, R1, uap->curregs[R1]); |
| 1671 | } |
| 1672 | |
| 1673 | spin_unlock_irqrestore(&uap->port.lock, flags); |
| 1674 | |
| 1675 | if (ZS_IS_CONS(uap)) |
| 1676 | uap->port.cons->flags |= CON_ENABLED; |
| 1677 | |
| 1678 | /* Re-enable IRQ on the controller */ |
| 1679 | if (ZS_IS_OPEN(uap) && !ZS_IS_IRQ_ON(pmz_get_port_A(uap))) { |
| 1680 | pmz_get_port_A(uap)->flags |= PMACZILOG_FLAG_IS_IRQ_ON; |
| 1681 | enable_irq(uap->port.irq); |
| 1682 | } |
| 1683 | |
| 1684 | bail: |
Ingo Molnar | e2862f6 | 2006-01-13 21:37:07 +0000 | [diff] [blame] | 1685 | mutex_unlock(&state->mutex); |
Arjan van de Ven | f392ecf | 2006-01-12 18:44:32 +0000 | [diff] [blame] | 1686 | mutex_unlock(&pmz_irq_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1687 | |
| 1688 | /* Right now, we deal with delay by blocking here, I'll be |
| 1689 | * smarter later on |
| 1690 | */ |
| 1691 | if (pwr_delay != 0) { |
| 1692 | pmz_debug("pmz: delaying %d ms\n", pwr_delay); |
| 1693 | msleep(pwr_delay); |
| 1694 | } |
| 1695 | |
| 1696 | pmz_debug("resume, switching complete\n"); |
| 1697 | |
Pavel Machek | ca078ba | 2005-09-03 15:56:57 -0700 | [diff] [blame] | 1698 | mdev->ofdev.dev.power.power_state.event = PM_EVENT_ON; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1699 | |
| 1700 | return 0; |
| 1701 | } |
| 1702 | |
| 1703 | /* |
| 1704 | * Probe all ports in the system and build the ports array, we register |
| 1705 | * with the serial layer at this point, the macio-type probing is only |
| 1706 | * used later to "attach" to the sysfs tree so we get power management |
| 1707 | * events |
| 1708 | */ |
| 1709 | static int __init pmz_probe(void) |
| 1710 | { |
| 1711 | struct device_node *node_p, *node_a, *node_b, *np; |
| 1712 | int count = 0; |
| 1713 | int rc; |
| 1714 | |
| 1715 | /* |
| 1716 | * Find all escc chips in the system |
| 1717 | */ |
| 1718 | node_p = of_find_node_by_name(NULL, "escc"); |
| 1719 | while (node_p) { |
| 1720 | /* |
| 1721 | * First get channel A/B node pointers |
| 1722 | * |
| 1723 | * TODO: Add routines with proper locking to do that... |
| 1724 | */ |
| 1725 | node_a = node_b = NULL; |
| 1726 | for (np = NULL; (np = of_get_next_child(node_p, np)) != NULL;) { |
| 1727 | if (strncmp(np->name, "ch-a", 4) == 0) |
| 1728 | node_a = of_node_get(np); |
| 1729 | else if (strncmp(np->name, "ch-b", 4) == 0) |
| 1730 | node_b = of_node_get(np); |
| 1731 | } |
| 1732 | if (!node_a && !node_b) { |
| 1733 | of_node_put(node_a); |
| 1734 | of_node_put(node_b); |
| 1735 | printk(KERN_ERR "pmac_zilog: missing node %c for escc %s\n", |
| 1736 | (!node_a) ? 'a' : 'b', node_p->full_name); |
| 1737 | goto next; |
| 1738 | } |
| 1739 | |
| 1740 | /* |
| 1741 | * Fill basic fields in the port structures |
| 1742 | */ |
| 1743 | pmz_ports[count].mate = &pmz_ports[count+1]; |
| 1744 | pmz_ports[count+1].mate = &pmz_ports[count]; |
| 1745 | pmz_ports[count].flags = PMACZILOG_FLAG_IS_CHANNEL_A; |
| 1746 | pmz_ports[count].node = node_a; |
| 1747 | pmz_ports[count+1].node = node_b; |
| 1748 | pmz_ports[count].port.line = count; |
| 1749 | pmz_ports[count+1].port.line = count+1; |
| 1750 | |
| 1751 | /* |
| 1752 | * Setup the ports for real |
| 1753 | */ |
| 1754 | rc = pmz_init_port(&pmz_ports[count]); |
| 1755 | if (rc == 0 && node_b != NULL) |
| 1756 | rc = pmz_init_port(&pmz_ports[count+1]); |
| 1757 | if (rc != 0) { |
| 1758 | of_node_put(node_a); |
| 1759 | of_node_put(node_b); |
| 1760 | memset(&pmz_ports[count], 0, sizeof(struct uart_pmac_port)); |
| 1761 | memset(&pmz_ports[count+1], 0, sizeof(struct uart_pmac_port)); |
| 1762 | goto next; |
| 1763 | } |
| 1764 | count += 2; |
| 1765 | next: |
| 1766 | node_p = of_find_node_by_name(node_p, "escc"); |
| 1767 | } |
| 1768 | pmz_ports_count = count; |
| 1769 | |
| 1770 | return 0; |
| 1771 | } |
| 1772 | |
| 1773 | #ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE |
| 1774 | |
| 1775 | static void pmz_console_write(struct console *con, const char *s, unsigned int count); |
| 1776 | static int __init pmz_console_setup(struct console *co, char *options); |
| 1777 | |
| 1778 | static struct console pmz_console = { |
| 1779 | .name = "ttyS", |
| 1780 | .write = pmz_console_write, |
| 1781 | .device = uart_console_device, |
| 1782 | .setup = pmz_console_setup, |
| 1783 | .flags = CON_PRINTBUFFER, |
| 1784 | .index = -1, |
| 1785 | .data = &pmz_uart_reg, |
| 1786 | }; |
| 1787 | |
| 1788 | #define PMACZILOG_CONSOLE &pmz_console |
| 1789 | #else /* CONFIG_SERIAL_PMACZILOG_CONSOLE */ |
| 1790 | #define PMACZILOG_CONSOLE (NULL) |
| 1791 | #endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */ |
| 1792 | |
| 1793 | /* |
| 1794 | * Register the driver, console driver and ports with the serial |
| 1795 | * core |
| 1796 | */ |
| 1797 | static int __init pmz_register(void) |
| 1798 | { |
| 1799 | int i, rc; |
| 1800 | |
| 1801 | pmz_uart_reg.nr = pmz_ports_count; |
| 1802 | pmz_uart_reg.cons = PMACZILOG_CONSOLE; |
| 1803 | pmz_uart_reg.minor = 64; |
| 1804 | |
| 1805 | /* |
| 1806 | * Register this driver with the serial core |
| 1807 | */ |
| 1808 | rc = uart_register_driver(&pmz_uart_reg); |
| 1809 | if (rc) |
| 1810 | return rc; |
| 1811 | |
| 1812 | /* |
| 1813 | * Register each port with the serial core |
| 1814 | */ |
| 1815 | for (i = 0; i < pmz_ports_count; i++) { |
| 1816 | struct uart_pmac_port *uport = &pmz_ports[i]; |
| 1817 | /* NULL node may happen on wallstreet */ |
| 1818 | if (uport->node != NULL) |
| 1819 | rc = uart_add_one_port(&pmz_uart_reg, &uport->port); |
| 1820 | if (rc) |
| 1821 | goto err_out; |
| 1822 | } |
| 1823 | |
| 1824 | return 0; |
| 1825 | err_out: |
| 1826 | while (i-- > 0) { |
| 1827 | struct uart_pmac_port *uport = &pmz_ports[i]; |
| 1828 | uart_remove_one_port(&pmz_uart_reg, &uport->port); |
| 1829 | } |
| 1830 | uart_unregister_driver(&pmz_uart_reg); |
| 1831 | return rc; |
| 1832 | } |
| 1833 | |
Jeff Mahoney | 5e65577 | 2005-07-06 15:44:41 -0400 | [diff] [blame] | 1834 | static struct of_device_id pmz_match[] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1835 | { |
| 1836 | { |
| 1837 | .name = "ch-a", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1838 | }, |
| 1839 | { |
| 1840 | .name = "ch-b", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1841 | }, |
| 1842 | {}, |
| 1843 | }; |
Jeff Mahoney | 5e65577 | 2005-07-06 15:44:41 -0400 | [diff] [blame] | 1844 | MODULE_DEVICE_TABLE (of, pmz_match); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1845 | |
| 1846 | static struct macio_driver pmz_driver = |
| 1847 | { |
| 1848 | .name = "pmac_zilog", |
| 1849 | .match_table = pmz_match, |
| 1850 | .probe = pmz_attach, |
| 1851 | .remove = pmz_detach, |
| 1852 | .suspend = pmz_suspend, |
| 1853 | .resume = pmz_resume, |
| 1854 | }; |
| 1855 | |
| 1856 | static int __init init_pmz(void) |
| 1857 | { |
| 1858 | int rc, i; |
| 1859 | printk(KERN_INFO "%s\n", version); |
| 1860 | |
| 1861 | /* |
| 1862 | * First, we need to do a direct OF-based probe pass. We |
| 1863 | * do that because we want serial console up before the |
| 1864 | * macio stuffs calls us back, and since that makes it |
| 1865 | * easier to pass the proper number of channels to |
| 1866 | * uart_register_driver() |
| 1867 | */ |
| 1868 | if (pmz_ports_count == 0) |
| 1869 | pmz_probe(); |
| 1870 | |
| 1871 | /* |
| 1872 | * Bail early if no port found |
| 1873 | */ |
| 1874 | if (pmz_ports_count == 0) |
| 1875 | return -ENODEV; |
| 1876 | |
| 1877 | /* |
| 1878 | * Now we register with the serial layer |
| 1879 | */ |
| 1880 | rc = pmz_register(); |
| 1881 | if (rc) { |
| 1882 | printk(KERN_ERR |
| 1883 | "pmac_zilog: Error registering serial device, disabling pmac_zilog.\n" |
| 1884 | "pmac_zilog: Did another serial driver already claim the minors?\n"); |
| 1885 | /* effectively "pmz_unprobe()" */ |
| 1886 | for (i=0; i < pmz_ports_count; i++) |
| 1887 | pmz_dispose_port(&pmz_ports[i]); |
| 1888 | return rc; |
| 1889 | } |
| 1890 | |
| 1891 | /* |
| 1892 | * Then we register the macio driver itself |
| 1893 | */ |
| 1894 | return macio_register_driver(&pmz_driver); |
| 1895 | } |
| 1896 | |
| 1897 | static void __exit exit_pmz(void) |
| 1898 | { |
| 1899 | int i; |
| 1900 | |
| 1901 | /* Get rid of macio-driver (detach from macio) */ |
| 1902 | macio_unregister_driver(&pmz_driver); |
| 1903 | |
| 1904 | for (i = 0; i < pmz_ports_count; i++) { |
| 1905 | struct uart_pmac_port *uport = &pmz_ports[i]; |
| 1906 | if (uport->node != NULL) { |
| 1907 | uart_remove_one_port(&pmz_uart_reg, &uport->port); |
| 1908 | pmz_dispose_port(uport); |
| 1909 | } |
| 1910 | } |
| 1911 | /* Unregister UART driver */ |
| 1912 | uart_unregister_driver(&pmz_uart_reg); |
| 1913 | } |
| 1914 | |
| 1915 | #ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE |
| 1916 | |
Russell King | d358788 | 2006-03-20 20:00:09 +0000 | [diff] [blame] | 1917 | static void pmz_console_putchar(struct uart_port *port, int ch) |
| 1918 | { |
| 1919 | struct uart_pmac_port *uap = (struct uart_pmac_port *)port; |
| 1920 | |
| 1921 | /* Wait for the transmit buffer to empty. */ |
| 1922 | while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0) |
| 1923 | udelay(5); |
| 1924 | write_zsdata(uap, ch); |
| 1925 | } |
| 1926 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1927 | /* |
| 1928 | * Print a string to the serial port trying not to disturb |
| 1929 | * any possible real use of the port... |
| 1930 | */ |
| 1931 | static void pmz_console_write(struct console *con, const char *s, unsigned int count) |
| 1932 | { |
| 1933 | struct uart_pmac_port *uap = &pmz_ports[con->index]; |
| 1934 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1935 | |
| 1936 | if (ZS_IS_ASLEEP(uap)) |
| 1937 | return; |
| 1938 | spin_lock_irqsave(&uap->port.lock, flags); |
| 1939 | |
| 1940 | /* Turn of interrupts and enable the transmitter. */ |
| 1941 | write_zsreg(uap, R1, uap->curregs[1] & ~TxINT_ENAB); |
| 1942 | write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR); |
| 1943 | |
Russell King | d358788 | 2006-03-20 20:00:09 +0000 | [diff] [blame] | 1944 | uart_console_write(&uap->port, s, count, pmz_console_putchar); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1945 | |
| 1946 | /* Restore the values in the registers. */ |
| 1947 | write_zsreg(uap, R1, uap->curregs[1]); |
| 1948 | /* Don't disable the transmitter. */ |
| 1949 | |
| 1950 | spin_unlock_irqrestore(&uap->port.lock, flags); |
| 1951 | } |
| 1952 | |
| 1953 | /* |
| 1954 | * Setup the serial console |
| 1955 | */ |
| 1956 | static int __init pmz_console_setup(struct console *co, char *options) |
| 1957 | { |
| 1958 | struct uart_pmac_port *uap; |
| 1959 | struct uart_port *port; |
| 1960 | int baud = 38400; |
| 1961 | int bits = 8; |
| 1962 | int parity = 'n'; |
| 1963 | int flow = 'n'; |
| 1964 | unsigned long pwr_delay; |
| 1965 | |
| 1966 | /* |
| 1967 | * XServe's default to 57600 bps |
| 1968 | */ |
| 1969 | if (machine_is_compatible("RackMac1,1") |
| 1970 | || machine_is_compatible("RackMac1,2") |
| 1971 | || machine_is_compatible("MacRISC4")) |
| 1972 | baud = 57600; |
| 1973 | |
| 1974 | /* |
| 1975 | * Check whether an invalid uart number has been specified, and |
| 1976 | * if so, search for the first available port that does have |
| 1977 | * console support. |
| 1978 | */ |
| 1979 | if (co->index >= pmz_ports_count) |
| 1980 | co->index = 0; |
| 1981 | uap = &pmz_ports[co->index]; |
| 1982 | if (uap->node == NULL) |
| 1983 | return -ENODEV; |
| 1984 | port = &uap->port; |
| 1985 | |
| 1986 | /* |
| 1987 | * Mark port as beeing a console |
| 1988 | */ |
| 1989 | uap->flags |= PMACZILOG_FLAG_IS_CONS; |
| 1990 | |
| 1991 | /* |
| 1992 | * Temporary fix for uart layer who didn't setup the spinlock yet |
| 1993 | */ |
| 1994 | spin_lock_init(&port->lock); |
| 1995 | |
| 1996 | /* |
| 1997 | * Enable the hardware |
| 1998 | */ |
| 1999 | pwr_delay = __pmz_startup(uap); |
| 2000 | if (pwr_delay) |
| 2001 | mdelay(pwr_delay); |
| 2002 | |
| 2003 | if (options) |
| 2004 | uart_parse_options(options, &baud, &parity, &bits, &flow); |
| 2005 | |
| 2006 | return uart_set_options(port, co, baud, parity, bits, flow); |
| 2007 | } |
| 2008 | |
| 2009 | static int __init pmz_console_init(void) |
| 2010 | { |
| 2011 | /* Probe ports */ |
| 2012 | pmz_probe(); |
| 2013 | |
| 2014 | /* TODO: Autoprobe console based on OF */ |
| 2015 | /* pmz_console.index = i; */ |
| 2016 | register_console(&pmz_console); |
| 2017 | |
| 2018 | return 0; |
| 2019 | |
| 2020 | } |
| 2021 | console_initcall(pmz_console_init); |
| 2022 | #endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */ |
| 2023 | |
| 2024 | module_init(init_pmz); |
| 2025 | module_exit(exit_pmz); |