blob: 46f62e41bcde984ad2cf7d91e1461bf3f60f7e3c [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Copyright (c) 2001-2002 by David Brownell
David Brownell53bd6a62006-08-30 14:50:06 -07003 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef __LINUX_EHCI_HCD_H
20#define __LINUX_EHCI_HCD_H
21
22/* definitions used for the EHCI driver */
23
Stefan Roese6dbd6822007-05-01 09:29:37 -070024/*
25 * __hc32 and __hc16 are "Host Controller" types, they may be equivalent to
26 * __leXX (normally) or __beXX (given EHCI_BIG_ENDIAN_DESC), depending on
27 * the host controller implementation.
28 *
29 * To facilitate the strongest possible byte-order checking from "sparse"
30 * and so on, we use __leXX unless that's not practical.
31 */
32#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_DESC
33typedef __u32 __bitwise __hc32;
34typedef __u16 __bitwise __hc16;
35#else
36#define __hc32 __le32
37#define __hc16 __le16
38#endif
39
Anand Gadiyar411c9402009-07-07 15:24:23 +053040/* statistics can be kept for tuning/monitoring */
Oliver Neukum1c201632013-11-18 13:23:16 +010041#ifdef CONFIG_DYNAMIC_DEBUG
Roger Quadros9ec6e9d2013-01-22 11:59:58 -050042#define EHCI_STATS
43#endif
44
Linus Torvalds1da177e2005-04-16 15:20:36 -070045struct ehci_stats {
46 /* irq usage */
47 unsigned long normal;
48 unsigned long error;
Alan Stern99ac5b12012-07-11 11:21:38 -040049 unsigned long iaa;
Linus Torvalds1da177e2005-04-16 15:20:36 -070050 unsigned long lost_iaa;
51
52 /* termination of urbs from core */
53 unsigned long complete;
54 unsigned long unlink;
55};
56
Alan Sternffa02482013-10-11 11:29:03 -040057/*
58 * Scheduling and budgeting information for periodic transfers, for both
59 * high-speed devices and full/low-speed devices lying behind a TT.
60 */
61struct ehci_per_sched {
62 struct usb_device *udev; /* access to the TT */
63 struct usb_host_endpoint *ep;
Alan Sternb35c5002013-10-11 22:16:21 -040064 struct list_head ps_list; /* node on ehci_tt's ps_list */
Alan Sternffa02482013-10-11 11:29:03 -040065 u16 tt_usecs; /* time on the FS/LS bus */
Alan Sternd0ce5c62013-10-11 11:29:13 -040066 u16 cs_mask; /* C-mask and S-mask bytes */
Alan Sternffa02482013-10-11 11:29:03 -040067 u16 period; /* actual period in frames */
68 u16 phase; /* actual phase, frame part */
Alan Sternd0ce5c62013-10-11 11:29:13 -040069 u8 bw_phase; /* same, for bandwidth
70 reservation */
Alan Sternffa02482013-10-11 11:29:03 -040071 u8 phase_uf; /* uframe part of the phase */
72 u8 usecs, c_usecs; /* times on the HS bus */
Alan Sternd0ce5c62013-10-11 11:29:13 -040073 u8 bw_uperiod; /* period in microframes, for
74 bandwidth reservation */
75 u8 bw_period; /* same, in frames */
Alan Sternffa02482013-10-11 11:29:03 -040076};
Alan Stern91a99b52013-10-11 11:28:52 -040077#define NO_FRAME 29999 /* frame not assigned yet */
78
Linus Torvalds1da177e2005-04-16 15:20:36 -070079/* ehci_hcd->lock guards shared data against other CPUs:
Alan Stern99ac5b12012-07-11 11:21:38 -040080 * ehci_hcd: async, unlink, periodic (and shadow), ...
Linus Torvalds1da177e2005-04-16 15:20:36 -070081 * usb_host_endpoint: hcpriv
82 * ehci_qh: qh_next, qtd_list
83 * ehci_qtd: qtd_list
84 *
85 * Also, hold this lock when talking to HC registers or
86 * when updating hw_* fields in shared qh/qtd/... structures.
87 */
88
89#define EHCI_MAX_ROOT_PORTS 15 /* see HCS_N_PORTS */
90
Alan Sternc0c53db2012-07-11 11:21:48 -040091/*
92 * ehci_rh_state values of EHCI_RH_RUNNING or above mean that the
93 * controller may be doing DMA. Lower values mean there's no DMA.
94 */
Alan Sterne8799902011-08-18 16:31:30 -040095enum ehci_rh_state {
96 EHCI_RH_HALTED,
97 EHCI_RH_SUSPENDED,
Alan Sternc0c53db2012-07-11 11:21:48 -040098 EHCI_RH_RUNNING,
99 EHCI_RH_STOPPING
Alan Sterne8799902011-08-18 16:31:30 -0400100};
101
Alan Sternd58b4bc2012-07-11 11:21:54 -0400102/*
103 * Timer events, ordered by increasing delay length.
104 * Always update event_delays_ns[] and event_handlers[] (defined in
105 * ehci-timer.c) in parallel with this list.
106 */
107enum ehci_hrtimer_event {
Alan Stern31446612012-07-11 11:22:21 -0400108 EHCI_HRTIMER_POLL_ASS, /* Poll for async schedule off */
Alan Stern3ca9aeb2012-07-11 11:22:05 -0400109 EHCI_HRTIMER_POLL_PSS, /* Poll for periodic schedule off */
Alan Sternbf6387b2012-07-11 11:22:31 -0400110 EHCI_HRTIMER_POLL_DEAD, /* Wait for dead controller to stop */
Alan Sterndf202252012-07-11 11:22:26 -0400111 EHCI_HRTIMER_UNLINK_INTR, /* Wait for interrupt QH unlink */
Alan Stern55934eb2012-07-11 11:22:35 -0400112 EHCI_HRTIMER_FREE_ITDS, /* Wait for unused iTDs and siTDs */
Ming Lei9118f9e2013-07-03 22:53:10 +0800113 EHCI_HRTIMER_START_UNLINK_INTR, /* Unlink empty interrupt QHs */
Alan Stern32830f22012-07-11 11:22:53 -0400114 EHCI_HRTIMER_ASYNC_UNLINKS, /* Unlink empty async QHs */
Alan Stern9d938742012-07-11 11:22:44 -0400115 EHCI_HRTIMER_IAA_WATCHDOG, /* Handle lost IAA interrupts */
Alan Stern3ca9aeb2012-07-11 11:22:05 -0400116 EHCI_HRTIMER_DISABLE_PERIODIC, /* Wait to disable periodic sched */
Alan Stern31446612012-07-11 11:22:21 -0400117 EHCI_HRTIMER_DISABLE_ASYNC, /* Wait to disable async sched */
Alan Stern18aafe62012-07-11 11:23:04 -0400118 EHCI_HRTIMER_IO_WATCHDOG, /* Check for missing IRQs */
Alan Sternd58b4bc2012-07-11 11:21:54 -0400119 EHCI_HRTIMER_NUM_EVENTS /* Must come last */
120};
121#define EHCI_HRTIMER_NO_EVENT 99
122
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123struct ehci_hcd { /* one per controller */
Alan Sternd58b4bc2012-07-11 11:21:54 -0400124 /* timing support */
125 enum ehci_hrtimer_event next_hrtimer_event;
126 unsigned enabled_hrtimer_events;
127 ktime_t hr_timeouts[EHCI_HRTIMER_NUM_EVENTS];
128 struct hrtimer hrtimer;
129
Alan Stern3ca9aeb2012-07-11 11:22:05 -0400130 int PSS_poll_count;
Alan Stern31446612012-07-11 11:22:21 -0400131 int ASS_poll_count;
Alan Sternbf6387b2012-07-11 11:22:31 -0400132 int died_poll_count;
Alan Stern3ca9aeb2012-07-11 11:22:05 -0400133
David Brownell56c1e262005-04-09 09:00:29 -0700134 /* glue to PCI and HCD framework */
135 struct ehci_caps __iomem *caps;
136 struct ehci_regs __iomem *regs;
137 struct ehci_dbg_port __iomem *debug;
138
139 __u32 hcs_params; /* cached register copy */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140 spinlock_t lock;
Alan Sterne8799902011-08-18 16:31:30 -0400141 enum ehci_rh_state rh_state;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142
Alan Sterndf202252012-07-11 11:22:26 -0400143 /* general schedule support */
Alan Stern361aabf2012-07-11 11:22:57 -0400144 bool scanning:1;
145 bool need_rescan:1;
Alan Sterndf202252012-07-11 11:22:26 -0400146 bool intr_unlinking:1;
Alan Stern214ac7a2013-03-22 13:31:58 -0400147 bool iaa_in_progress:1;
Alan Stern3c273a02012-07-11 11:22:49 -0400148 bool async_unlinking:1;
Alan Stern43fe3a92012-07-11 11:23:16 -0400149 bool shutdown:1;
Alan Stern569b3942012-07-11 11:23:00 -0400150 struct ehci_qh *qh_scan_next;
Alan Sterndf202252012-07-11 11:22:26 -0400151
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 /* async schedule support */
153 struct ehci_qh *async;
Andiry Xu3d091a62010-11-08 17:58:35 +0800154 struct ehci_qh *dummy; /* For AMD quirk use */
Alan Stern6e018752013-03-22 13:31:45 -0400155 struct list_head async_unlink;
Alan Stern214ac7a2013-03-22 13:31:58 -0400156 struct list_head async_idle;
Alan Stern32830f22012-07-11 11:22:53 -0400157 unsigned async_unlink_cycle;
Alan Stern31446612012-07-11 11:22:21 -0400158 unsigned async_count; /* async activity count */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159
160 /* periodic schedule support */
161#define DEFAULT_I_TDPS 1024 /* some HCs can do less */
162 unsigned periodic_size;
Stefan Roese6dbd6822007-05-01 09:29:37 -0700163 __hc32 *periodic; /* hw periodic table */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700164 dma_addr_t periodic_dma;
Alan Stern569b3942012-07-11 11:23:00 -0400165 struct list_head intr_qh_list;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166 unsigned i_thresh; /* uframes HC might cache */
167
168 union ehci_shadow *pshadow; /* mirror hw periodic table */
Ming Lei9118f9e2013-07-03 22:53:10 +0800169 struct list_head intr_unlink_wait;
Alan Stern6e018752013-03-22 13:31:45 -0400170 struct list_head intr_unlink;
Ming Lei9118f9e2013-07-03 22:53:10 +0800171 unsigned intr_unlink_wait_cycle;
Alan Sterndf202252012-07-11 11:22:26 -0400172 unsigned intr_unlink_cycle;
Alan Sternf4289072012-07-11 11:23:07 -0400173 unsigned now_frame; /* frame from HC hardware */
Alan Sternc3ee9b72012-09-28 16:01:23 -0400174 unsigned last_iso_frame; /* last frame scanned for iso */
Alan Stern569b3942012-07-11 11:23:00 -0400175 unsigned intr_count; /* intr activity count */
176 unsigned isoc_count; /* isoc activity count */
Alan Stern3ca9aeb2012-07-11 11:22:05 -0400177 unsigned periodic_count; /* periodic activity count */
Kirill Smelkovcc62a7e2011-07-03 20:36:57 +0400178 unsigned uframe_periodic_max; /* max periodic time per uframe */
179
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180
Alan Sternf4289072012-07-11 11:23:07 -0400181 /* list of itds & sitds completed while now_frame was still active */
Karsten Wiese9aa09d22009-02-08 16:07:58 -0800182 struct list_head cached_itd_list;
Alan Stern55934eb2012-07-11 11:22:35 -0400183 struct ehci_itd *last_itd_to_free;
Alan Stern0e5f2312010-04-08 16:56:37 -0400184 struct list_head cached_sitd_list;
Alan Stern55934eb2012-07-11 11:22:35 -0400185 struct ehci_sitd *last_sitd_to_free;
Karsten Wiese9aa09d22009-02-08 16:07:58 -0800186
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187 /* per root hub port */
188 unsigned long reset_done [EHCI_MAX_ROOT_PORTS];
Alan Stern383975d2007-05-04 11:52:40 -0400189
Alan Stern57e06c12007-01-16 11:59:45 -0500190 /* bit vectors (one bit per port) */
191 unsigned long bus_suspended; /* which ports were
192 already suspended at the start of a bus suspend */
193 unsigned long companion_ports; /* which ports are
194 dedicated to the companion controller */
Alan Stern383975d2007-05-04 11:52:40 -0400195 unsigned long owned_ports; /* which ports are
196 owned by the companion during a bus suspend */
Alan Sternd1f114d2008-05-20 16:58:58 -0400197 unsigned long port_c_suspend; /* which ports have
198 the change-suspend feature turned on */
Alan Sterneafe5b92008-10-06 11:25:53 -0400199 unsigned long suspended_ports; /* which ports are
200 suspended */
Alan Sterna448e4d2012-04-03 15:24:30 -0400201 unsigned long resuming_ports; /* which ports have
202 started to resume */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203
204 /* per-HC memory pools (could be per-bus, but ...) */
205 struct dma_pool *qh_pool; /* qh per active urb */
206 struct dma_pool *qtd_pool; /* one or more per qh */
207 struct dma_pool *itd_pool; /* itd per iso urb */
208 struct dma_pool *sitd_pool; /* sitd per split iso urb */
209
Alan Stern68335e82009-05-22 17:02:33 -0400210 unsigned random_frame;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211 unsigned long next_statechange;
Oliver Neukumee4ecb82009-11-27 15:17:59 +0100212 ktime_t last_periodic_enable;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213 u32 command;
214
Kumar Gala8cd42e92006-01-20 13:57:52 -0800215 /* SILICON QUIRKS */
David Brownellf8aeb3b2006-01-20 13:55:14 -0800216 unsigned no_selective_suspend:1;
Kumar Gala8cd42e92006-01-20 13:57:52 -0800217 unsigned has_fsl_port_bug:1; /* FreeScale */
Nikhil Badolaf8786a92015-08-06 14:51:27 +0530218 unsigned has_fsl_hs_errata:1; /* Freescale HS quirk */
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100219 unsigned big_endian_mmio:1;
Stefan Roese6dbd6822007-05-01 09:29:37 -0700220 unsigned big_endian_desc:1;
Jan Anderssonc4301312011-05-03 20:11:57 +0200221 unsigned big_endian_capbase:1;
Vitaly Bordug796bcae2008-11-09 19:43:30 +0100222 unsigned has_amcc_usb23:1;
Alek Du403dbd32009-07-13 17:30:41 +0800223 unsigned need_io_watchdog:1;
Andiry Xuad935622011-03-01 14:57:05 +0800224 unsigned amd_pll_fix:1;
Andiry Xu3d091a62010-11-08 17:58:35 +0800225 unsigned use_dummy_qh:1; /* AMD Frame List table quirk*/
Gabor Juhos2f7ac6c2011-04-13 10:54:23 +0200226 unsigned has_synopsys_hc_bug:1; /* Synopsys HC */
Alan Stern68aa95d2011-10-12 10:39:14 -0400227 unsigned frame_index_bug:1; /* MosChip (AKA NetMos) */
Christian Engelmayere6604a72013-04-03 12:18:51 +0200228 unsigned need_oc_pp_cycle:1; /* MPC834X port power */
Peter Chenfeffe092014-01-10 13:51:26 +0800229 unsigned imx28_write_fix:1; /* For Freescale i.MX28 */
Vitaly Bordug796bcae2008-11-09 19:43:30 +0100230
231 /* required for usb32 quirk */
232 #define OHCI_CTRL_HCFS (3 << 6)
233 #define OHCI_USB_OPER (2 << 6)
234 #define OHCI_USB_SUSPEND (3 << 6)
235
236 #define OHCI_HCCTRL_OFFSET 0x4
237 #define OHCI_HCCTRL_LEN 0x4
238 __hc32 *ohci_hcctrl_reg;
Alek Du331ac6b2009-07-13 12:41:20 +0800239 unsigned has_hostpc:1;
Tuomas Tynkkynen2cdcec42013-08-12 16:06:49 +0300240 unsigned has_tdi_phy_lpm:1;
Alek Du5a9cdf32010-06-04 15:47:56 +0800241 unsigned has_ppcd:1; /* support per-port change bits */
David Brownellf8aeb3b2006-01-20 13:55:14 -0800242 u8 sbrn; /* packed release number */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243
Linus Torvalds1da177e2005-04-16 15:20:36 -0700244 /* irq statistics */
245#ifdef EHCI_STATS
246 struct ehci_stats stats;
247# define COUNT(x) do { (x)++; } while (0)
248#else
249# define COUNT(x) do {} while (0)
250#endif
Tony Jones694cc202007-09-11 14:07:31 -0700251
252 /* debug files */
Oliver Neukum1c201632013-11-18 13:23:16 +0100253#ifdef CONFIG_DYNAMIC_DEBUG
Tony Jones694cc202007-09-11 14:07:31 -0700254 struct dentry *debug_dir;
Tony Jones694cc202007-09-11 14:07:31 -0700255#endif
Alan Stern9debc172013-01-22 12:00:26 -0500256
Alan Sternd0ce5c62013-10-11 11:29:13 -0400257 /* bandwidth usage */
258#define EHCI_BANDWIDTH_SIZE 64
259#define EHCI_BANDWIDTH_FRAMES (EHCI_BANDWIDTH_SIZE >> 3)
260 u8 bandwidth[EHCI_BANDWIDTH_SIZE];
261 /* us allocated per uframe */
Alan Sternb35c5002013-10-11 22:16:21 -0400262 u8 tt_budget[EHCI_BANDWIDTH_SIZE];
263 /* us budgeted per uframe */
264 struct list_head tt_list;
Alan Sternd0ce5c62013-10-11 11:29:13 -0400265
Alan Stern9debc172013-01-22 12:00:26 -0500266 /* platform-specific data -- must come last */
267 unsigned long priv[0] __aligned(sizeof(s64));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700268};
269
David Brownell53bd6a62006-08-30 14:50:06 -0700270/* convert between an HCD pointer and the corresponding EHCI_HCD */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271static inline struct ehci_hcd *hcd_to_ehci (struct usb_hcd *hcd)
272{
273 return (struct ehci_hcd *) (hcd->hcd_priv);
274}
275static inline struct usb_hcd *ehci_to_hcd (struct ehci_hcd *ehci)
276{
277 return container_of ((void *) ehci, struct usb_hcd, hcd_priv);
278}
279
Linus Torvalds1da177e2005-04-16 15:20:36 -0700280/*-------------------------------------------------------------------------*/
281
Yinghai Lu0af36732008-07-24 17:27:57 -0700282#include <linux/usb/ehci_def.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283
284/*-------------------------------------------------------------------------*/
285
Stefan Roese6dbd6822007-05-01 09:29:37 -0700286#define QTD_NEXT(ehci, dma) cpu_to_hc32(ehci, (u32)dma)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287
288/*
289 * EHCI Specification 0.95 Section 3.5
David Brownell53bd6a62006-08-30 14:50:06 -0700290 * QTD: describe data transfer components (buffer, direction, ...)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700291 * See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram".
292 *
293 * These are associated only with "QH" (Queue Head) structures,
294 * used with control, bulk, and interrupt transfers.
295 */
296struct ehci_qtd {
297 /* first part defined by EHCI spec */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700298 __hc32 hw_next; /* see EHCI 3.5.1 */
299 __hc32 hw_alt_next; /* see EHCI 3.5.2 */
300 __hc32 hw_token; /* see EHCI 3.5.3 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700301#define QTD_TOGGLE (1 << 31) /* data toggle */
302#define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff)
303#define QTD_IOC (1 << 15) /* interrupt on complete */
304#define QTD_CERR(tok) (((tok)>>10) & 0x3)
305#define QTD_PID(tok) (((tok)>>8) & 0x3)
306#define QTD_STS_ACTIVE (1 << 7) /* HC may execute this */
307#define QTD_STS_HALT (1 << 6) /* halted on error */
308#define QTD_STS_DBE (1 << 5) /* data buffer error (in HC) */
309#define QTD_STS_BABBLE (1 << 4) /* device was babbling (qtd halted) */
310#define QTD_STS_XACT (1 << 3) /* device gave illegal response */
311#define QTD_STS_MMF (1 << 2) /* incomplete split transaction */
312#define QTD_STS_STS (1 << 1) /* split transaction state */
313#define QTD_STS_PING (1 << 0) /* issue PING? */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700314
315#define ACTIVE_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_ACTIVE)
316#define HALT_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_HALT)
317#define STATUS_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_STS)
318
319 __hc32 hw_buf [5]; /* see EHCI 3.5.4 */
320 __hc32 hw_buf_hi [5]; /* Appendix B */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321
322 /* the rest is HCD-private */
323 dma_addr_t qtd_dma; /* qtd address */
324 struct list_head qtd_list; /* sw qtd list */
325 struct urb *urb; /* qtd's urb */
326 size_t length; /* length of buffer */
327} __attribute__ ((aligned (32)));
328
329/* mask NakCnt+T in qh->hw_alt_next */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700330#define QTD_MASK(ehci) cpu_to_hc32 (ehci, ~0x1f)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331
332#define IS_SHORT_READ(token) (QTD_LENGTH (token) != 0 && QTD_PID (token) == 1)
333
334/*-------------------------------------------------------------------------*/
335
336/* type tag from {qh,itd,sitd,fstn}->hw_next */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700337#define Q_NEXT_TYPE(ehci,dma) ((dma) & cpu_to_hc32(ehci, 3 << 1))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338
Stefan Roese6dbd6822007-05-01 09:29:37 -0700339/*
340 * Now the following defines are not converted using the
Harvey Harrison551509d2009-02-11 14:11:36 -0800341 * cpu_to_le32() macro anymore, since we have to support
Stefan Roese6dbd6822007-05-01 09:29:37 -0700342 * "dynamic" switching between be and le support, so that the driver
343 * can be used on one system with SoC EHCI controller using big-endian
344 * descriptors as well as a normal little-endian PCI EHCI controller.
345 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700346/* values for that type tag */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700347#define Q_TYPE_ITD (0 << 1)
348#define Q_TYPE_QH (1 << 1)
349#define Q_TYPE_SITD (2 << 1)
350#define Q_TYPE_FSTN (3 << 1)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700351
352/* next async queue entry, or pointer to interrupt/periodic QH */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700353#define QH_NEXT(ehci,dma) (cpu_to_hc32(ehci, (((u32)dma)&~0x01f)|Q_TYPE_QH))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700354
355/* for periodic/async schedules and qtd lists, mark end of list */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700356#define EHCI_LIST_END(ehci) cpu_to_hc32(ehci, 1) /* "null pointer" to hw */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700357
358/*
359 * Entries in periodic shadow table are pointers to one of four kinds
360 * of data structure. That's dictated by the hardware; a type tag is
361 * encoded in the low bits of the hardware's periodic schedule. Use
362 * Q_NEXT_TYPE to get the tag.
363 *
364 * For entries in the async schedule, the type tag always says "qh".
365 */
366union ehci_shadow {
David Brownell53bd6a62006-08-30 14:50:06 -0700367 struct ehci_qh *qh; /* Q_TYPE_QH */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700368 struct ehci_itd *itd; /* Q_TYPE_ITD */
369 struct ehci_sitd *sitd; /* Q_TYPE_SITD */
370 struct ehci_fstn *fstn; /* Q_TYPE_FSTN */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700371 __hc32 *hw_next; /* (all types) */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700372 void *ptr;
373};
374
375/*-------------------------------------------------------------------------*/
376
377/*
378 * EHCI Specification 0.95 Section 3.6
379 * QH: describes control/bulk/interrupt endpoints
380 * See Fig 3-7 "Queue Head Structure Layout".
381 *
382 * These appear in both the async and (for interrupt) periodic schedules.
383 */
384
Alek Du3807e262009-07-14 07:23:29 +0800385/* first part defined by EHCI spec */
386struct ehci_qh_hw {
Stefan Roese6dbd6822007-05-01 09:29:37 -0700387 __hc32 hw_next; /* see EHCI 3.6.1 */
388 __hc32 hw_info1; /* see EHCI 3.6.2 */
Alan Stern4c53de72012-07-11 11:21:32 -0400389#define QH_CONTROL_EP (1 << 27) /* FS/LS control endpoint */
390#define QH_HEAD (1 << 15) /* Head of async reclamation list */
391#define QH_TOGGLE_CTL (1 << 14) /* Data toggle control */
392#define QH_HIGH_SPEED (2 << 12) /* Endpoint speed */
393#define QH_LOW_SPEED (1 << 12)
394#define QH_FULL_SPEED (0 << 12)
395#define QH_INACTIVATE (1 << 7) /* Inactivate on next transaction */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700396 __hc32 hw_info2; /* see EHCI 3.6.2 */
David Brownell7dedacf2005-08-04 18:06:41 -0700397#define QH_SMASK 0x000000ff
398#define QH_CMASK 0x0000ff00
399#define QH_HUBADDR 0x007f0000
400#define QH_HUBPORT 0x3f800000
401#define QH_MULT 0xc0000000
Stefan Roese6dbd6822007-05-01 09:29:37 -0700402 __hc32 hw_current; /* qtd list - see EHCI 3.6.4 */
David Brownell53bd6a62006-08-30 14:50:06 -0700403
Linus Torvalds1da177e2005-04-16 15:20:36 -0700404 /* qtd overlay (hardware parts of a struct ehci_qtd) */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700405 __hc32 hw_qtd_next;
406 __hc32 hw_alt_next;
407 __hc32 hw_token;
408 __hc32 hw_buf [5];
409 __hc32 hw_buf_hi [5];
Alek Du3807e262009-07-14 07:23:29 +0800410} __attribute__ ((aligned(32)));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411
Alek Du3807e262009-07-14 07:23:29 +0800412struct ehci_qh {
Alan Stern8c5bf7b2012-07-11 11:22:39 -0400413 struct ehci_qh_hw *hw; /* Must come first */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700414 /* the rest is HCD-private */
415 dma_addr_t qh_dma; /* address of qh */
416 union ehci_shadow qh_next; /* ptr to qh; or periodic */
417 struct list_head qtd_list; /* sw qtd list */
Alan Stern569b3942012-07-11 11:23:00 -0400418 struct list_head intr_node; /* list of intr QHs */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700419 struct ehci_qtd *dummy;
Alan Stern6e018752013-03-22 13:31:45 -0400420 struct list_head unlink_node;
Alan Sternffa02482013-10-11 11:29:03 -0400421 struct ehci_per_sched ps; /* scheduling info */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700422
Alan Sterndf202252012-07-11 11:22:26 -0400423 unsigned unlink_cycle;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700424
425 u8 qh_state;
426#define QH_STATE_LINKED 1 /* HC sees this */
427#define QH_STATE_UNLINK 2 /* HC may still see this */
428#define QH_STATE_IDLE 3 /* HC doesn't see this */
Alan Stern99ac5b12012-07-11 11:21:38 -0400429#define QH_STATE_UNLINK_WAIT 4 /* LINKED and on unlink q */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430#define QH_STATE_COMPLETING 5 /* don't touch token.HALT */
431
Alan Sterna2c27062009-02-10 10:16:58 -0500432 u8 xacterrs; /* XactErr retry counter */
433#define QH_XACTERR_MAX 32 /* XactErr retry limit */
434
Linus Torvalds1da177e2005-04-16 15:20:36 -0700435 u8 gap_uf; /* uframes split/csplit gap */
Alan Stern914b7012009-06-29 10:47:30 -0400436
Alan Sterne04f5f72011-07-19 14:01:23 -0400437 unsigned is_out:1; /* bulk or intr OUT */
Alan Stern914b7012009-06-29 10:47:30 -0400438 unsigned clearing_tt:1; /* Clear-TT-Buf in progress */
Alan Stern7bc782d2013-03-22 13:31:11 -0400439 unsigned dequeue_during_giveback:1;
440 unsigned exception:1; /* got a fault, or an unlink
441 was requested */
Alek Du3807e262009-07-14 07:23:29 +0800442};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700443
444/*-------------------------------------------------------------------------*/
445
446/* description of one iso transaction (up to 3 KB data if highspeed) */
447struct ehci_iso_packet {
448 /* These will be copied to iTD when scheduling */
449 u64 bufp; /* itd->hw_bufp{,_hi}[pg] |= */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700450 __hc32 transaction; /* itd->hw_transaction[i] |= */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700451 u8 cross; /* buf crosses pages */
452 /* for full speed OUT splits */
453 u32 buf1;
454};
455
456/* temporary schedule data for packets from iso urbs (both speeds)
457 * each packet is one logical usb transaction to the device (not TT),
458 * beginning at stream->next_uframe
459 */
460struct ehci_iso_sched {
461 struct list_head td_list;
462 unsigned span;
Alan Stern46c73d12013-09-03 13:59:03 -0400463 unsigned first_packet;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700464 struct ehci_iso_packet packet [0];
465};
466
467/*
468 * ehci_iso_stream - groups all (s)itds for this endpoint.
469 * acts like a qh would, if EHCI had them for ISO.
470 */
471struct ehci_iso_stream {
Clemens Ladisch1082f572010-03-01 17:18:56 +0100472 /* first field matches ehci_hq, but is NULL */
473 struct ehci_qh_hw *hw;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700474
Linus Torvalds1da177e2005-04-16 15:20:36 -0700475 u8 bEndpointAddress;
476 u8 highspeed;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700477 struct list_head td_list; /* queued itds/sitds */
478 struct list_head free_list; /* list of unused itds/sitds */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479
480 /* output of (re)scheduling */
Alan Sternffa02482013-10-11 11:29:03 -0400481 struct ehci_per_sched ps; /* scheduling info */
Alan Stern91a99b52013-10-11 11:28:52 -0400482 unsigned next_uframe;
Stefan Roese6dbd6822007-05-01 09:29:37 -0700483 __hc32 splits;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700484
485 /* the rest is derived from the endpoint descriptor,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700486 * including the extra info for hw_bufp[0..2]
487 */
Alan Sternffa02482013-10-11 11:29:03 -0400488 u16 uperiod; /* period in uframes */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489 u16 maxp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700490 unsigned bandwidth;
491
492 /* This is used to initialize iTD's hw_bufp fields */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700493 __hc32 buf0;
494 __hc32 buf1;
495 __hc32 buf2;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700496
497 /* this is used to initialize sITD's tt info */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700498 __hc32 address;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700499};
500
501/*-------------------------------------------------------------------------*/
502
503/*
504 * EHCI Specification 0.95 Section 3.3
505 * Fig 3-4 "Isochronous Transaction Descriptor (iTD)"
506 *
507 * Schedule records for high speed iso xfers
508 */
509struct ehci_itd {
510 /* first part defined by EHCI spec */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700511 __hc32 hw_next; /* see EHCI 3.3.1 */
512 __hc32 hw_transaction [8]; /* see EHCI 3.3.2 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700513#define EHCI_ISOC_ACTIVE (1<<31) /* activate transfer this slot */
514#define EHCI_ISOC_BUF_ERR (1<<30) /* Data buffer error */
515#define EHCI_ISOC_BABBLE (1<<29) /* babble detected */
516#define EHCI_ISOC_XACTERR (1<<28) /* XactErr - transaction error */
517#define EHCI_ITD_LENGTH(tok) (((tok)>>16) & 0x0fff)
518#define EHCI_ITD_IOC (1 << 15) /* interrupt on complete */
519
Stefan Roese6dbd6822007-05-01 09:29:37 -0700520#define ITD_ACTIVE(ehci) cpu_to_hc32(ehci, EHCI_ISOC_ACTIVE)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700521
Stefan Roese6dbd6822007-05-01 09:29:37 -0700522 __hc32 hw_bufp [7]; /* see EHCI 3.3.3 */
523 __hc32 hw_bufp_hi [7]; /* Appendix B */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700524
525 /* the rest is HCD-private */
526 dma_addr_t itd_dma; /* for this itd */
527 union ehci_shadow itd_next; /* ptr to periodic q entry */
528
529 struct urb *urb;
530 struct ehci_iso_stream *stream; /* endpoint's queue */
531 struct list_head itd_list; /* list of stream's itds */
532
533 /* any/all hw_transactions here may be used by that urb */
534 unsigned frame; /* where scheduled */
535 unsigned pg;
536 unsigned index[8]; /* in urb->iso_frame_desc */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700537} __attribute__ ((aligned (32)));
538
539/*-------------------------------------------------------------------------*/
540
541/*
David Brownell53bd6a62006-08-30 14:50:06 -0700542 * EHCI Specification 0.95 Section 3.4
Linus Torvalds1da177e2005-04-16 15:20:36 -0700543 * siTD, aka split-transaction isochronous Transfer Descriptor
544 * ... describe full speed iso xfers through TT in hubs
545 * see Figure 3-5 "Split-transaction Isochronous Transaction Descriptor (siTD)
546 */
547struct ehci_sitd {
548 /* first part defined by EHCI spec */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700549 __hc32 hw_next;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700550/* uses bit field macros above - see EHCI 0.95 Table 3-8 */
Stefan Roese6dbd6822007-05-01 09:29:37 -0700551 __hc32 hw_fullspeed_ep; /* EHCI table 3-9 */
552 __hc32 hw_uframe; /* EHCI table 3-10 */
553 __hc32 hw_results; /* EHCI table 3-11 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700554#define SITD_IOC (1 << 31) /* interrupt on completion */
555#define SITD_PAGE (1 << 30) /* buffer 0/1 */
556#define SITD_LENGTH(x) (0x3ff & ((x)>>16))
557#define SITD_STS_ACTIVE (1 << 7) /* HC may execute this */
558#define SITD_STS_ERR (1 << 6) /* error from TT */
559#define SITD_STS_DBE (1 << 5) /* data buffer error (in HC) */
560#define SITD_STS_BABBLE (1 << 4) /* device was babbling */
561#define SITD_STS_XACT (1 << 3) /* illegal IN response */
562#define SITD_STS_MMF (1 << 2) /* incomplete split transaction */
563#define SITD_STS_STS (1 << 1) /* split transaction state */
564
Stefan Roese6dbd6822007-05-01 09:29:37 -0700565#define SITD_ACTIVE(ehci) cpu_to_hc32(ehci, SITD_STS_ACTIVE)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700566
Stefan Roese6dbd6822007-05-01 09:29:37 -0700567 __hc32 hw_buf [2]; /* EHCI table 3-12 */
568 __hc32 hw_backpointer; /* EHCI table 3-13 */
569 __hc32 hw_buf_hi [2]; /* Appendix B */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700570
571 /* the rest is HCD-private */
572 dma_addr_t sitd_dma;
573 union ehci_shadow sitd_next; /* ptr to periodic q entry */
574
575 struct urb *urb;
576 struct ehci_iso_stream *stream; /* endpoint's queue */
577 struct list_head sitd_list; /* list of stream's sitds */
578 unsigned frame;
579 unsigned index;
580} __attribute__ ((aligned (32)));
581
582/*-------------------------------------------------------------------------*/
583
584/*
585 * EHCI Specification 0.96 Section 3.7
586 * Periodic Frame Span Traversal Node (FSTN)
587 *
588 * Manages split interrupt transactions (using TT) that span frame boundaries
589 * into uframes 0/1; see 4.12.2.2. In those uframes, a "save place" FSTN
590 * makes the HC jump (back) to a QH to scan for fs/ls QH completions until
591 * it hits a "restore" FSTN; then it returns to finish other uframe 0/1 work.
592 */
593struct ehci_fstn {
Stefan Roese6dbd6822007-05-01 09:29:37 -0700594 __hc32 hw_next; /* any periodic q entry */
595 __hc32 hw_prev; /* qh or EHCI_LIST_END */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700596
597 /* the rest is HCD-private */
598 dma_addr_t fstn_dma;
599 union ehci_shadow fstn_next; /* ptr to periodic q entry */
600} __attribute__ ((aligned (32)));
601
602/*-------------------------------------------------------------------------*/
603
Alan Sternb35c5002013-10-11 22:16:21 -0400604/*
605 * USB-2.0 Specification Sections 11.14 and 11.18
606 * Scheduling and budgeting split transactions using TTs
607 *
608 * A hub can have a single TT for all its ports, or multiple TTs (one for each
609 * port). The bandwidth and budgeting information for the full/low-speed bus
610 * below each TT is self-contained and independent of the other TTs or the
611 * high-speed bus.
612 *
613 * "Bandwidth" refers to the number of microseconds on the FS/LS bus allocated
614 * to an interrupt or isochronous endpoint for each frame. "Budget" refers to
615 * the best-case estimate of the number of full-speed bytes allocated to an
616 * endpoint for each microframe within an allocated frame.
617 *
618 * Removal of an endpoint invalidates a TT's budget. Instead of trying to
619 * keep an up-to-date record, we recompute the budget when it is needed.
620 */
621
622struct ehci_tt {
623 u16 bandwidth[EHCI_BANDWIDTH_FRAMES];
624
625 struct list_head tt_list; /* List of all ehci_tt's */
626 struct list_head ps_list; /* Items using this TT */
627 struct usb_tt *usb_tt;
628 int tt_port; /* TT port number */
629};
630
631/*-------------------------------------------------------------------------*/
632
Alan Stern16032c42010-05-12 18:21:35 -0400633/* Prepare the PORTSC wakeup flags during controller suspend/resume */
634
Alan Stern41472002010-06-25 14:02:14 -0400635#define ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup) \
636 ehci_adjust_port_wakeup_flags(ehci, true, do_wakeup);
Alan Stern16032c42010-05-12 18:21:35 -0400637
Alan Stern41472002010-06-25 14:02:14 -0400638#define ehci_prepare_ports_for_controller_resume(ehci) \
639 ehci_adjust_port_wakeup_flags(ehci, false, false);
Alan Stern16032c42010-05-12 18:21:35 -0400640
641/*-------------------------------------------------------------------------*/
642
Linus Torvalds1da177e2005-04-16 15:20:36 -0700643#ifdef CONFIG_USB_EHCI_ROOT_HUB_TT
644
645/*
646 * Some EHCI controllers have a Transaction Translator built into the
647 * root hub. This is a non-standard feature. Each controller will need
648 * to add code to the following inline functions, and call them as
649 * needed (mostly in root hub code).
650 */
651
Alan Sterna8e51772008-05-20 16:58:11 -0400652#define ehci_is_TDI(e) (ehci_to_hcd(e)->has_tt)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700653
654/* Returns the speed of a device attached to a port on the root hub. */
655static inline unsigned int
656ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
657{
658 if (ehci_is_TDI(ehci)) {
Alek Du331ac6b2009-07-13 12:41:20 +0800659 switch ((portsc >> (ehci->has_hostpc ? 25 : 26)) & 3) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700660 case 0:
661 return 0;
662 case 1:
Alan Stern288ead42010-03-04 11:32:30 -0500663 return USB_PORT_STAT_LOW_SPEED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700664 case 2:
665 default:
Alan Stern288ead42010-03-04 11:32:30 -0500666 return USB_PORT_STAT_HIGH_SPEED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700667 }
668 }
Alan Stern288ead42010-03-04 11:32:30 -0500669 return USB_PORT_STAT_HIGH_SPEED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700670}
671
672#else
673
674#define ehci_is_TDI(e) (0)
675
Alan Stern288ead42010-03-04 11:32:30 -0500676#define ehci_port_speed(ehci, portsc) USB_PORT_STAT_HIGH_SPEED
Linus Torvalds1da177e2005-04-16 15:20:36 -0700677#endif
678
679/*-------------------------------------------------------------------------*/
680
Kumar Gala8cd42e92006-01-20 13:57:52 -0800681#ifdef CONFIG_PPC_83xx
682/* Some Freescale processors have an erratum in which the TT
683 * port number in the queue head was 0..N-1 instead of 1..N.
684 */
685#define ehci_has_fsl_portno_bug(e) ((e)->has_fsl_port_bug)
686#else
687#define ehci_has_fsl_portno_bug(e) (0)
688#endif
689
Nikhil Badolaf8786a92015-08-06 14:51:27 +0530690#define PORTSC_FSL_PFSC 24 /* Port Force Full-Speed Connect */
691
692#if defined(CONFIG_PPC_85xx)
693/* Some Freescale processors have an erratum (USB A-005275) in which
694 * incoming packets get corrupted in HS mode
695 */
696#define ehci_has_fsl_hs_errata(e) ((e)->has_fsl_hs_errata)
697#else
698#define ehci_has_fsl_hs_errata(e) (0)
699#endif
700
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100701/*
702 * While most USB host controllers implement their registers in
703 * little-endian format, a minority (celleb companion chip) implement
704 * them in big endian format.
705 *
706 * This attempts to support either format at compile time without a
707 * runtime penalty, or both formats with the additional overhead
708 * of checking a flag bit.
Jan Anderssonc4301312011-05-03 20:11:57 +0200709 *
710 * ehci_big_endian_capbase is a special quirk for controllers that
711 * implement the HC capability registers as separate registers and not
712 * as fields of a 32-bit register.
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100713 */
714
715#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
716#define ehci_big_endian_mmio(e) ((e)->big_endian_mmio)
Jan Anderssonc4301312011-05-03 20:11:57 +0200717#define ehci_big_endian_capbase(e) ((e)->big_endian_capbase)
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100718#else
719#define ehci_big_endian_mmio(e) 0
Jan Anderssonc4301312011-05-03 20:11:57 +0200720#define ehci_big_endian_capbase(e) 0
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100721#endif
722
Stefan Roese6dbd6822007-05-01 09:29:37 -0700723/*
724 * Big-endian read/write functions are arch-specific.
725 * Other arches can be added if/when they're needed.
Stefan Roese6dbd6822007-05-01 09:29:37 -0700726 */
Vladimir Barinov91bc4d32007-12-30 15:21:11 -0800727#if defined(CONFIG_ARM) && defined(CONFIG_ARCH_IXP4XX)
728#define readl_be(addr) __raw_readl((__force unsigned *)addr)
729#define writel_be(val, addr) __raw_writel(val, (__force unsigned *)addr)
730#endif
731
Stefan Roese6dbd6822007-05-01 09:29:37 -0700732static inline unsigned int ehci_readl(const struct ehci_hcd *ehci,
733 __u32 __iomem * regs)
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100734{
Benjamin Herrenschmidtd728e322006-12-28 15:27:27 +1100735#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100736 return ehci_big_endian_mmio(ehci) ?
Al Viro68f50e52007-02-09 16:40:00 +0000737 readl_be(regs) :
738 readl(regs);
Benjamin Herrenschmidtd728e322006-12-28 15:27:27 +1100739#else
Al Viro68f50e52007-02-09 16:40:00 +0000740 return readl(regs);
Benjamin Herrenschmidtd728e322006-12-28 15:27:27 +1100741#endif
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100742}
743
Peter Chenfeffe092014-01-10 13:51:26 +0800744#ifdef CONFIG_SOC_IMX28
745static inline void imx28_ehci_writel(const unsigned int val,
746 volatile __u32 __iomem *addr)
747{
748 __asm__ ("swp %0, %0, [%1]" : : "r"(val), "r"(addr));
749}
750#else
751static inline void imx28_ehci_writel(const unsigned int val,
752 volatile __u32 __iomem *addr)
753{
754}
755#endif
Stefan Roese6dbd6822007-05-01 09:29:37 -0700756static inline void ehci_writel(const struct ehci_hcd *ehci,
757 const unsigned int val, __u32 __iomem *regs)
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100758{
Benjamin Herrenschmidtd728e322006-12-28 15:27:27 +1100759#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100760 ehci_big_endian_mmio(ehci) ?
Al Viro68f50e52007-02-09 16:40:00 +0000761 writel_be(val, regs) :
762 writel(val, regs);
Benjamin Herrenschmidtd728e322006-12-28 15:27:27 +1100763#else
Peter Chenfeffe092014-01-10 13:51:26 +0800764 if (ehci->imx28_write_fix)
765 imx28_ehci_writel(val, regs);
766 else
767 writel(val, regs);
Benjamin Herrenschmidtd728e322006-12-28 15:27:27 +1100768#endif
Benjamin Herrenschmidt083522d2006-12-15 06:54:08 +1100769}
Kumar Gala8cd42e92006-01-20 13:57:52 -0800770
Vitaly Bordug796bcae2008-11-09 19:43:30 +0100771/*
772 * On certain ppc-44x SoC there is a HW issue, that could only worked around with
773 * explicit suspend/operate of OHCI. This function hereby makes sense only on that arch.
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300774 * Other common bits are dependent on has_amcc_usb23 quirk flag.
Vitaly Bordug796bcae2008-11-09 19:43:30 +0100775 */
776#ifdef CONFIG_44x
777static inline void set_ohci_hcfs(struct ehci_hcd *ehci, int operational)
778{
779 u32 hc_control;
780
781 hc_control = (readl_be(ehci->ohci_hcctrl_reg) & ~OHCI_CTRL_HCFS);
782 if (operational)
783 hc_control |= OHCI_USB_OPER;
784 else
785 hc_control |= OHCI_USB_SUSPEND;
786
787 writel_be(hc_control, ehci->ohci_hcctrl_reg);
788 (void) readl_be(ehci->ohci_hcctrl_reg);
789}
790#else
791static inline void set_ohci_hcfs(struct ehci_hcd *ehci, int operational)
792{ }
793#endif
794
Kumar Gala8cd42e92006-01-20 13:57:52 -0800795/*-------------------------------------------------------------------------*/
796
Stefan Roese6dbd6822007-05-01 09:29:37 -0700797/*
798 * The AMCC 440EPx not only implements its EHCI registers in big-endian
799 * format, but also its DMA data structures (descriptors).
800 *
801 * EHCI controllers accessed through PCI work normally (little-endian
802 * everywhere), so we won't bother supporting a BE-only mode for now.
803 */
804#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_DESC
805#define ehci_big_endian_desc(e) ((e)->big_endian_desc)
806
807/* cpu to ehci */
808static inline __hc32 cpu_to_hc32 (const struct ehci_hcd *ehci, const u32 x)
809{
810 return ehci_big_endian_desc(ehci)
811 ? (__force __hc32)cpu_to_be32(x)
812 : (__force __hc32)cpu_to_le32(x);
813}
814
815/* ehci to cpu */
816static inline u32 hc32_to_cpu (const struct ehci_hcd *ehci, const __hc32 x)
817{
818 return ehci_big_endian_desc(ehci)
819 ? be32_to_cpu((__force __be32)x)
820 : le32_to_cpu((__force __le32)x);
821}
822
823static inline u32 hc32_to_cpup (const struct ehci_hcd *ehci, const __hc32 *x)
824{
825 return ehci_big_endian_desc(ehci)
826 ? be32_to_cpup((__force __be32 *)x)
827 : le32_to_cpup((__force __le32 *)x);
828}
829
830#else
831
832/* cpu to ehci */
833static inline __hc32 cpu_to_hc32 (const struct ehci_hcd *ehci, const u32 x)
834{
835 return cpu_to_le32(x);
836}
837
838/* ehci to cpu */
839static inline u32 hc32_to_cpu (const struct ehci_hcd *ehci, const __hc32 x)
840{
841 return le32_to_cpu(x);
842}
843
844static inline u32 hc32_to_cpup (const struct ehci_hcd *ehci, const __hc32 *x)
845{
846 return le32_to_cpup(x);
847}
848
849#endif
850
851/*-------------------------------------------------------------------------*/
852
Alan Sternd6064ac2012-10-10 15:07:30 -0400853#define ehci_dbg(ehci, fmt, args...) \
854 dev_dbg(ehci_to_hcd(ehci)->self.controller , fmt , ## args)
855#define ehci_err(ehci, fmt, args...) \
856 dev_err(ehci_to_hcd(ehci)->self.controller , fmt , ## args)
857#define ehci_info(ehci, fmt, args...) \
858 dev_info(ehci_to_hcd(ehci)->self.controller , fmt , ## args)
859#define ehci_warn(ehci, fmt, args...) \
860 dev_warn(ehci_to_hcd(ehci)->self.controller , fmt , ## args)
861
Alan Sternd6064ac2012-10-10 15:07:30 -0400862
Oliver Neukum1c201632013-11-18 13:23:16 +0100863#ifndef CONFIG_DYNAMIC_DEBUG
Linus Torvalds1da177e2005-04-16 15:20:36 -0700864#define STUB_DEBUG_FILES
Oliver Neukum1c201632013-11-18 13:23:16 +0100865#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700866
867/*-------------------------------------------------------------------------*/
868
Alan Stern3e023202012-11-01 11:12:58 -0400869/* Declarations of things exported for use by ehci platform drivers */
870
871struct ehci_driver_overrides {
Alan Stern3e023202012-11-01 11:12:58 -0400872 size_t extra_priv_size;
873 int (*reset)(struct usb_hcd *hcd);
Michael Grzeschik11a7e592014-10-13 09:53:03 +0800874 int (*port_power)(struct usb_hcd *hcd,
875 int portnum, bool enable);
Alan Stern3e023202012-11-01 11:12:58 -0400876};
877
878extern void ehci_init_driver(struct hc_driver *drv,
879 const struct ehci_driver_overrides *over);
880extern int ehci_setup(struct usb_hcd *hcd);
Manjunath Goudar2f3a6b82013-06-13 11:24:09 -0600881extern int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
882 u32 mask, u32 done, int usec);
Ramneek Mehresh74db22c2015-05-29 11:28:30 +0530883extern int ehci_reset(struct ehci_hcd *ehci);
Alan Stern3e023202012-11-01 11:12:58 -0400884
885#ifdef CONFIG_PM
886extern int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup);
Wu Liang feng314b41b2014-12-24 18:22:19 +0800887extern int ehci_resume(struct usb_hcd *hcd, bool force_reset);
Ramneek Mehresh74db22c2015-05-29 11:28:30 +0530888extern void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci,
889 bool suspending, bool do_wakeup);
Alan Stern3e023202012-11-01 11:12:58 -0400890#endif /* CONFIG_PM */
891
Laurent Pinchart37769932014-04-16 18:00:10 +0200892extern int ehci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
893 u16 wIndex, char *buf, u16 wLength);
894
Linus Torvalds1da177e2005-04-16 15:20:36 -0700895#endif /* __LINUX_EHCI_HCD_H */