Ben Dooks | 110d322 | 2006-03-20 17:10:02 +0000 | [diff] [blame] | 1 | /* linux/arch/arm/mach-s3c2410/mach-osiris.c |
| 2 | * |
| 3 | * Copyright (c) 2005 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/types.h> |
| 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/list.h> |
| 16 | #include <linux/timer.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/device.h> |
| 19 | |
| 20 | #include <asm/mach/arch.h> |
| 21 | #include <asm/mach/map.h> |
| 22 | #include <asm/mach/irq.h> |
| 23 | |
| 24 | #include <asm/arch/osiris-map.h> |
| 25 | #include <asm/arch/osiris-cpld.h> |
| 26 | |
| 27 | #include <asm/hardware.h> |
| 28 | #include <asm/io.h> |
| 29 | #include <asm/irq.h> |
| 30 | #include <asm/mach-types.h> |
| 31 | |
| 32 | #include <asm/arch/regs-serial.h> |
| 33 | #include <asm/arch/regs-gpio.h> |
| 34 | #include <asm/arch/regs-mem.h> |
| 35 | #include <asm/arch/regs-lcd.h> |
| 36 | #include <asm/arch/nand.h> |
| 37 | |
| 38 | #include <linux/mtd/mtd.h> |
| 39 | #include <linux/mtd/nand.h> |
| 40 | #include <linux/mtd/nand_ecc.h> |
| 41 | #include <linux/mtd/partitions.h> |
| 42 | |
| 43 | #include "clock.h" |
| 44 | #include "devs.h" |
| 45 | #include "cpu.h" |
| 46 | |
| 47 | /* onboard perihpheral map */ |
| 48 | |
| 49 | static struct map_desc osiris_iodesc[] __initdata = { |
| 50 | /* ISA IO areas (may be over-written later) */ |
| 51 | |
| 52 | { |
| 53 | .virtual = (u32)S3C24XX_VA_ISA_BYTE, |
| 54 | .pfn = __phys_to_pfn(S3C2410_CS5), |
| 55 | .length = SZ_16M, |
| 56 | .type = MT_DEVICE, |
| 57 | }, { |
| 58 | .virtual = (u32)S3C24XX_VA_ISA_WORD, |
| 59 | .pfn = __phys_to_pfn(S3C2410_CS5), |
| 60 | .length = SZ_16M, |
| 61 | .type = MT_DEVICE, |
| 62 | }, |
| 63 | |
| 64 | /* CPLD control registers */ |
| 65 | |
| 66 | { |
| 67 | .virtual = (u32)OSIRIS_VA_CTRL1, |
| 68 | .pfn = __phys_to_pfn(OSIRIS_PA_CTRL1), |
| 69 | .length = SZ_16K, |
| 70 | .type = MT_DEVICE |
| 71 | }, { |
| 72 | .virtual = (u32)OSIRIS_VA_CTRL2, |
| 73 | .pfn = __phys_to_pfn(OSIRIS_PA_CTRL2), |
| 74 | .length = SZ_16K, |
| 75 | .type = MT_DEVICE |
| 76 | }, |
| 77 | }; |
| 78 | |
| 79 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK |
| 80 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
| 81 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
| 82 | |
| 83 | static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = { |
| 84 | [0] = { |
| 85 | .name = "uclk", |
| 86 | .divisor = 1, |
| 87 | .min_baud = 0, |
| 88 | .max_baud = 0, |
| 89 | }, |
| 90 | [1] = { |
| 91 | .name = "pclk", |
| 92 | .divisor = 1, |
| 93 | .min_baud = 0, |
| 94 | .max_baud = 0. |
| 95 | } |
| 96 | }; |
| 97 | |
| 98 | |
| 99 | static struct s3c2410_uartcfg osiris_uartcfgs[] = { |
| 100 | [0] = { |
| 101 | .hwport = 0, |
| 102 | .flags = 0, |
| 103 | .ucon = UCON, |
| 104 | .ulcon = ULCON, |
| 105 | .ufcon = UFCON, |
| 106 | .clocks = osiris_serial_clocks, |
| 107 | .clocks_size = ARRAY_SIZE(osiris_serial_clocks) |
| 108 | }, |
| 109 | [1] = { |
| 110 | .hwport = 2, |
| 111 | .flags = 0, |
| 112 | .ucon = UCON, |
| 113 | .ulcon = ULCON, |
| 114 | .ufcon = UFCON, |
| 115 | .clocks = osiris_serial_clocks, |
| 116 | .clocks_size = ARRAY_SIZE(osiris_serial_clocks) |
| 117 | }, |
| 118 | }; |
| 119 | |
| 120 | /* NAND Flash on Osiris board */ |
| 121 | |
| 122 | static int external_map[] = { 2 }; |
| 123 | static int chip0_map[] = { 0 }; |
| 124 | static int chip1_map[] = { 1 }; |
| 125 | |
Ben Dooks | da956fd | 2006-03-20 21:02:39 +0000 | [diff] [blame^] | 126 | static struct mtd_partition osiris_default_nand_part[] = { |
Ben Dooks | 110d322 | 2006-03-20 17:10:02 +0000 | [diff] [blame] | 127 | [0] = { |
| 128 | .name = "Boot Agent", |
| 129 | .size = SZ_16K, |
| 130 | .offset = 0 |
| 131 | }, |
| 132 | [1] = { |
| 133 | .name = "/boot", |
| 134 | .size = SZ_4M - SZ_16K, |
| 135 | .offset = SZ_16K, |
| 136 | }, |
| 137 | [2] = { |
| 138 | .name = "user1", |
| 139 | .offset = SZ_4M, |
| 140 | .size = SZ_32M - SZ_4M, |
| 141 | }, |
| 142 | [3] = { |
| 143 | .name = "user2", |
| 144 | .offset = SZ_32M, |
| 145 | .size = MTDPART_SIZ_FULL, |
| 146 | } |
| 147 | }; |
| 148 | |
| 149 | /* the Osiris has 3 selectable slots for nand-flash, the two |
| 150 | * on-board chip areas, as well as the external slot. |
| 151 | * |
| 152 | * Note, there is no current hot-plug support for the External |
| 153 | * socket. |
| 154 | */ |
| 155 | |
| 156 | static struct s3c2410_nand_set osiris_nand_sets[] = { |
| 157 | [1] = { |
| 158 | .name = "External", |
| 159 | .nr_chips = 1, |
| 160 | .nr_map = external_map, |
| 161 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), |
| 162 | .partitions = osiris_default_nand_part |
| 163 | }, |
| 164 | [0] = { |
| 165 | .name = "chip0", |
| 166 | .nr_chips = 1, |
| 167 | .nr_map = chip0_map, |
| 168 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), |
| 169 | .partitions = osiris_default_nand_part |
| 170 | }, |
| 171 | [2] = { |
| 172 | .name = "chip1", |
| 173 | .nr_chips = 1, |
| 174 | .nr_map = chip1_map, |
| 175 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), |
| 176 | .partitions = osiris_default_nand_part |
| 177 | }, |
| 178 | }; |
| 179 | |
| 180 | static void osiris_nand_select(struct s3c2410_nand_set *set, int slot) |
| 181 | { |
| 182 | unsigned int tmp; |
| 183 | |
| 184 | slot = set->nr_map[slot] & 3; |
| 185 | |
| 186 | pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n", |
| 187 | slot, set, set->nr_map); |
| 188 | |
| 189 | tmp = __raw_readb(OSIRIS_VA_CTRL1); |
| 190 | tmp &= ~OSIRIS_CTRL1_NANDSEL; |
| 191 | tmp |= slot; |
| 192 | |
| 193 | pr_debug("osiris_nand: ctrl1 now %02x\n", tmp); |
| 194 | |
| 195 | __raw_writeb(tmp, OSIRIS_VA_CTRL1); |
| 196 | } |
| 197 | |
| 198 | static struct s3c2410_platform_nand osiris_nand_info = { |
| 199 | .tacls = 25, |
| 200 | .twrph0 = 60, |
| 201 | .twrph1 = 60, |
| 202 | .nr_sets = ARRAY_SIZE(osiris_nand_sets), |
| 203 | .sets = osiris_nand_sets, |
| 204 | .select_chip = osiris_nand_select, |
| 205 | }; |
| 206 | |
| 207 | /* PCMCIA control and configuration */ |
| 208 | |
| 209 | static struct resource osiris_pcmcia_resource[] = { |
| 210 | [0] = { |
| 211 | .start = 0x0f000000, |
| 212 | .end = 0x0f100000, |
| 213 | .flags = IORESOURCE_MEM, |
| 214 | }, |
| 215 | [1] = { |
| 216 | .start = 0x0c000000, |
| 217 | .end = 0x0c100000, |
| 218 | .flags = IORESOURCE_MEM, |
| 219 | } |
| 220 | }; |
| 221 | |
| 222 | static struct platform_device osiris_pcmcia = { |
| 223 | .name = "osiris-pcmcia", |
| 224 | .id = -1, |
| 225 | .num_resources = ARRAY_SIZE(osiris_pcmcia_resource), |
| 226 | .resource = osiris_pcmcia_resource, |
| 227 | }; |
| 228 | |
| 229 | /* Standard Osiris devices */ |
| 230 | |
| 231 | static struct platform_device *osiris_devices[] __initdata = { |
| 232 | &s3c_device_i2c, |
| 233 | &s3c_device_nand, |
| 234 | &osiris_pcmcia, |
| 235 | }; |
| 236 | |
| 237 | static struct clk *osiris_clocks[] = { |
| 238 | &s3c24xx_dclk0, |
| 239 | &s3c24xx_dclk1, |
| 240 | &s3c24xx_clkout0, |
| 241 | &s3c24xx_clkout1, |
| 242 | &s3c24xx_uclk, |
| 243 | }; |
| 244 | |
| 245 | static struct s3c24xx_board osiris_board __initdata = { |
| 246 | .devices = osiris_devices, |
| 247 | .devices_count = ARRAY_SIZE(osiris_devices), |
| 248 | .clocks = osiris_clocks, |
| 249 | .clocks_count = ARRAY_SIZE(osiris_clocks) |
| 250 | }; |
| 251 | |
Ben Dooks | da956fd | 2006-03-20 21:02:39 +0000 | [diff] [blame^] | 252 | static void __init osiris_map_io(void) |
Ben Dooks | 110d322 | 2006-03-20 17:10:02 +0000 | [diff] [blame] | 253 | { |
Ben Dooks | da956fd | 2006-03-20 21:02:39 +0000 | [diff] [blame^] | 254 | unsigned long flags; |
| 255 | |
Ben Dooks | 110d322 | 2006-03-20 17:10:02 +0000 | [diff] [blame] | 256 | /* initialise the clocks */ |
| 257 | |
| 258 | s3c24xx_dclk0.parent = NULL; |
| 259 | s3c24xx_dclk0.rate = 12*1000*1000; |
| 260 | |
| 261 | s3c24xx_dclk1.parent = NULL; |
| 262 | s3c24xx_dclk1.rate = 24*1000*1000; |
| 263 | |
| 264 | s3c24xx_clkout0.parent = &s3c24xx_dclk0; |
| 265 | s3c24xx_clkout1.parent = &s3c24xx_dclk1; |
| 266 | |
| 267 | s3c24xx_uclk.parent = &s3c24xx_clkout1; |
| 268 | |
| 269 | s3c_device_nand.dev.platform_data = &osiris_nand_info; |
| 270 | |
| 271 | s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc)); |
| 272 | s3c24xx_init_clocks(0); |
| 273 | s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs)); |
| 274 | s3c24xx_set_board(&osiris_board); |
| 275 | |
| 276 | /* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */ |
Ben Dooks | da956fd | 2006-03-20 21:02:39 +0000 | [diff] [blame^] | 277 | |
| 278 | local_irq_save(flags); |
Ben Dooks | 110d322 | 2006-03-20 17:10:02 +0000 | [diff] [blame] | 279 | __raw_writel(__raw_readl(S3C2410_BWSCON) | S3C2410_BWSCON_ST1 | S3C2410_BWSCON_ST2 | S3C2410_BWSCON_ST3 | S3C2410_BWSCON_ST4 | S3C2410_BWSCON_ST5, S3C2410_BWSCON); |
Ben Dooks | da956fd | 2006-03-20 21:02:39 +0000 | [diff] [blame^] | 280 | local_irq_restore(flags); |
Ben Dooks | 110d322 | 2006-03-20 17:10:02 +0000 | [diff] [blame] | 281 | |
| 282 | /* write-protect line to the NAND */ |
| 283 | s3c2410_gpio_setpin(S3C2410_GPA0, 1); |
| 284 | } |
| 285 | |
| 286 | MACHINE_START(OSIRIS, "Simtec-OSIRIS") |
| 287 | /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ |
Ben Dooks | 110d322 | 2006-03-20 17:10:02 +0000 | [diff] [blame] | 288 | .phys_io = S3C2410_PA_UART, |
| 289 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, |
| 290 | .boot_params = S3C2410_SDRAM_PA + 0x100, |
| 291 | .map_io = osiris_map_io, |
| 292 | .init_irq = s3c24xx_init_irq, |
| 293 | .timer = &s3c24xx_timer, |
| 294 | MACHINE_END |