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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Copyright (C) 2004 IBM Corporation
3 *
4 * Authors:
5 * Leendert van Doorn <leendert@watson.ibm.com>
6 * Dave Safford <safford@watson.ibm.com>
7 * Reiner Sailer <sailer@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>
9 *
10 * Maintained by: <tpmdd_devel@lists.sourceforge.net>
11 *
12 * Device driver for TCG/TCPA TPM (trusted platform module).
13 * Specifications at www.trustedcomputinggroup.org
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation, version 2 of the
18 * License.
19 *
20 */
21
22#include "tpm.h"
23
24/* National definitions */
Kylene Halle1a23c62005-06-23 22:02:06 -070025enum tpm_nsc_addr{
Kylene Halle1a23c62005-06-23 22:02:06 -070026 TPM_NSC_IRQ = 0x07,
27 TPM_NSC_BASE0_HI = 0x60,
28 TPM_NSC_BASE0_LO = 0x61,
29 TPM_NSC_BASE1_HI = 0x62,
30 TPM_NSC_BASE1_LO = 0x63
Kylene Hall3122a882005-06-23 22:01:48 -070031};
Linus Torvalds1da177e2005-04-16 15:20:36 -070032
Kylene Hall3122a882005-06-23 22:01:48 -070033enum tpm_nsc_index {
34 NSC_LDN_INDEX = 0x07,
35 NSC_SID_INDEX = 0x20,
36 NSC_LDC_INDEX = 0x30,
37 NSC_DIO_INDEX = 0x60,
38 NSC_CIO_INDEX = 0x62,
39 NSC_IRQ_INDEX = 0x70,
40 NSC_ITS_INDEX = 0x71
41};
Linus Torvalds1da177e2005-04-16 15:20:36 -070042
Kylene Hall3122a882005-06-23 22:01:48 -070043enum tpm_nsc_status_loc {
44 NSC_STATUS = 0x01,
45 NSC_COMMAND = 0x01,
46 NSC_DATA = 0x00
47};
Linus Torvalds1da177e2005-04-16 15:20:36 -070048
49/* status bits */
Kylene Halle1a23c62005-06-23 22:02:06 -070050enum tpm_nsc_status {
Kylene Hall3122a882005-06-23 22:01:48 -070051 NSC_STATUS_OBF = 0x01, /* output buffer full */
52 NSC_STATUS_IBF = 0x02, /* input buffer full */
53 NSC_STATUS_F0 = 0x04, /* F0 */
54 NSC_STATUS_A2 = 0x08, /* A2 */
55 NSC_STATUS_RDY = 0x10, /* ready to receive command */
56 NSC_STATUS_IBR = 0x20 /* ready to receive data */
57};
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -070058
Linus Torvalds1da177e2005-04-16 15:20:36 -070059/* command bits */
Kylene Hall3122a882005-06-23 22:01:48 -070060enum tpm_nsc_cmd_mode {
61 NSC_COMMAND_NORMAL = 0x01, /* normal mode */
62 NSC_COMMAND_EOC = 0x03,
63 NSC_COMMAND_CANCEL = 0x22
64};
Linus Torvalds1da177e2005-04-16 15:20:36 -070065/*
66 * Wait for a certain status to appear
67 */
68static int wait_for_stat(struct tpm_chip *chip, u8 mask, u8 val, u8 * data)
69{
Nishanth Aravamudan700d8bd2005-06-23 22:01:47 -070070 unsigned long stop;
Linus Torvalds1da177e2005-04-16 15:20:36 -070071
72 /* status immediately available check */
73 *data = inb(chip->vendor->base + NSC_STATUS);
74 if ((*data & mask) == val)
75 return 0;
76
77 /* wait for status */
Nishanth Aravamudan700d8bd2005-06-23 22:01:47 -070078 stop = jiffies + 10 * HZ;
Linus Torvalds1da177e2005-04-16 15:20:36 -070079 do {
Nishanth Aravamudan700d8bd2005-06-23 22:01:47 -070080 msleep(TPM_TIMEOUT);
Linus Torvalds1da177e2005-04-16 15:20:36 -070081 *data = inb(chip->vendor->base + 1);
Nishanth Aravamudan700d8bd2005-06-23 22:01:47 -070082 if ((*data & mask) == val)
Linus Torvalds1da177e2005-04-16 15:20:36 -070083 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -070084 }
Nishanth Aravamudan700d8bd2005-06-23 22:01:47 -070085 while (time_before(jiffies, stop));
Linus Torvalds1da177e2005-04-16 15:20:36 -070086
87 return -EBUSY;
88}
89
90static int nsc_wait_for_ready(struct tpm_chip *chip)
91{
92 int status;
Nishanth Aravamudan700d8bd2005-06-23 22:01:47 -070093 unsigned long stop;
Linus Torvalds1da177e2005-04-16 15:20:36 -070094
95 /* status immediately available check */
96 status = inb(chip->vendor->base + NSC_STATUS);
97 if (status & NSC_STATUS_OBF)
98 status = inb(chip->vendor->base + NSC_DATA);
99 if (status & NSC_STATUS_RDY)
100 return 0;
101
102 /* wait for status */
Nishanth Aravamudan700d8bd2005-06-23 22:01:47 -0700103 stop = jiffies + 100;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104 do {
Nishanth Aravamudan700d8bd2005-06-23 22:01:47 -0700105 msleep(TPM_TIMEOUT);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106 status = inb(chip->vendor->base + NSC_STATUS);
107 if (status & NSC_STATUS_OBF)
108 status = inb(chip->vendor->base + NSC_DATA);
Nishanth Aravamudan700d8bd2005-06-23 22:01:47 -0700109 if (status & NSC_STATUS_RDY)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111 }
Nishanth Aravamudan700d8bd2005-06-23 22:01:47 -0700112 while (time_before(jiffies, stop));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113
114 dev_info(&chip->pci_dev->dev, "wait for ready failed\n");
115 return -EBUSY;
116}
117
118
119static int tpm_nsc_recv(struct tpm_chip *chip, u8 * buf, size_t count)
120{
121 u8 *buffer = buf;
122 u8 data, *p;
123 u32 size;
124 __be32 *native_size;
125
126 if (count < 6)
127 return -EIO;
128
129 if (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0) {
130 dev_err(&chip->pci_dev->dev, "F0 timeout\n");
131 return -EIO;
132 }
133 if ((data =
134 inb(chip->vendor->base + NSC_DATA)) != NSC_COMMAND_NORMAL) {
135 dev_err(&chip->pci_dev->dev, "not in normal mode (0x%x)\n",
136 data);
137 return -EIO;
138 }
139
140 /* read the whole packet */
141 for (p = buffer; p < &buffer[count]; p++) {
142 if (wait_for_stat
143 (chip, NSC_STATUS_OBF, NSC_STATUS_OBF, &data) < 0) {
144 dev_err(&chip->pci_dev->dev,
145 "OBF timeout (while reading data)\n");
146 return -EIO;
147 }
148 if (data & NSC_STATUS_F0)
149 break;
150 *p = inb(chip->vendor->base + NSC_DATA);
151 }
152
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700153 if ((data & NSC_STATUS_F0) == 0 &&
154 (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155 dev_err(&chip->pci_dev->dev, "F0 not set\n");
156 return -EIO;
157 }
158 if ((data = inb(chip->vendor->base + NSC_DATA)) != NSC_COMMAND_EOC) {
159 dev_err(&chip->pci_dev->dev,
160 "expected end of command(0x%x)\n", data);
161 return -EIO;
162 }
163
164 native_size = (__force __be32 *) (buf + 2);
165 size = be32_to_cpu(*native_size);
166
167 if (count < size)
168 return -EIO;
169
170 return size;
171}
172
173static int tpm_nsc_send(struct tpm_chip *chip, u8 * buf, size_t count)
174{
175 u8 data;
176 int i;
177
178 /*
179 * If we hit the chip with back to back commands it locks up
180 * and never set IBF. Hitting it with this "hammer" seems to
181 * fix it. Not sure why this is needed, we followed the flow
182 * chart in the manual to the letter.
183 */
184 outb(NSC_COMMAND_CANCEL, chip->vendor->base + NSC_COMMAND);
185
186 if (nsc_wait_for_ready(chip) != 0)
187 return -EIO;
188
189 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
190 dev_err(&chip->pci_dev->dev, "IBF timeout\n");
191 return -EIO;
192 }
193
194 outb(NSC_COMMAND_NORMAL, chip->vendor->base + NSC_COMMAND);
195 if (wait_for_stat(chip, NSC_STATUS_IBR, NSC_STATUS_IBR, &data) < 0) {
196 dev_err(&chip->pci_dev->dev, "IBR timeout\n");
197 return -EIO;
198 }
199
200 for (i = 0; i < count; i++) {
201 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
202 dev_err(&chip->pci_dev->dev,
203 "IBF timeout (while writing data)\n");
204 return -EIO;
205 }
206 outb(buf[i], chip->vendor->base + NSC_DATA);
207 }
208
209 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
210 dev_err(&chip->pci_dev->dev, "IBF timeout\n");
211 return -EIO;
212 }
213 outb(NSC_COMMAND_EOC, chip->vendor->base + NSC_COMMAND);
214
215 return count;
216}
217
218static void tpm_nsc_cancel(struct tpm_chip *chip)
219{
220 outb(NSC_COMMAND_CANCEL, chip->vendor->base + NSC_COMMAND);
221}
222
223static struct file_operations nsc_ops = {
224 .owner = THIS_MODULE,
225 .llseek = no_llseek,
226 .open = tpm_open,
227 .read = tpm_read,
228 .write = tpm_write,
229 .release = tpm_release,
230};
231
Kylene Hall6659ca22005-06-23 22:02:00 -0700232static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL);
233static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL);
234static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps, NULL);
235static DEVICE_ATTR(cancel, S_IWUSR|S_IWGRP, NULL, tpm_store_cancel);
236
237static struct attribute * nsc_attrs[] = {
238 &dev_attr_pubek.attr,
239 &dev_attr_pcrs.attr,
240 &dev_attr_caps.attr,
241 &dev_attr_cancel.attr,
242 0,
243};
244
245static struct attribute_group nsc_attr_grp = { .attrs = nsc_attrs };
246
Linus Torvalds1da177e2005-04-16 15:20:36 -0700247static struct tpm_vendor_specific tpm_nsc = {
248 .recv = tpm_nsc_recv,
249 .send = tpm_nsc_send,
250 .cancel = tpm_nsc_cancel,
251 .req_complete_mask = NSC_STATUS_OBF,
252 .req_complete_val = NSC_STATUS_OBF,
Kylene Halld9e5b6b2005-06-23 22:02:02 -0700253 .req_canceled = NSC_STATUS_RDY,
Kylene Hall6659ca22005-06-23 22:02:00 -0700254 .attr_group = &nsc_attr_grp,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700255 .miscdev = { .fops = &nsc_ops, },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700256};
257
258static int __devinit tpm_nsc_init(struct pci_dev *pci_dev,
259 const struct pci_device_id *pci_id)
260{
261 int rc = 0;
Kylene Halle1a23c62005-06-23 22:02:06 -0700262 int lo, hi;
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700263 int nscAddrBase = TPM_ADDR;
Kylene Halle1a23c62005-06-23 22:02:06 -0700264
Linus Torvalds1da177e2005-04-16 15:20:36 -0700265
266 if (pci_enable_device(pci_dev))
267 return -EIO;
268
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700269 /* select PM channel 1 */
270 tpm_write_index(nscAddrBase,NSC_LDN_INDEX, 0x12);
271
Linus Torvalds1da177e2005-04-16 15:20:36 -0700272 /* verify that it is a National part (SID) */
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700273 if (tpm_read_index(TPM_ADDR, NSC_SID_INDEX) != 0xEF) {
274 nscAddrBase = (tpm_read_index(TPM_SUPERIO_ADDR, 0x2C)<<8)|
275 (tpm_read_index(TPM_SUPERIO_ADDR, 0x2B)&0xFE);
276 if (tpm_read_index(nscAddrBase, NSC_SID_INDEX) != 0xF6) {
277 rc = -ENODEV;
278 goto out_err;
279 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700280 }
281
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700282 hi = tpm_read_index(nscAddrBase, TPM_NSC_BASE0_HI);
283 lo = tpm_read_index(nscAddrBase, TPM_NSC_BASE0_LO);
284 tpm_nsc.base = (hi<<8) | lo;
285
Linus Torvalds1da177e2005-04-16 15:20:36 -0700286 dev_dbg(&pci_dev->dev, "NSC TPM detected\n");
287 dev_dbg(&pci_dev->dev,
288 "NSC LDN 0x%x, SID 0x%x, SRID 0x%x\n",
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700289 tpm_read_index(nscAddrBase,0x07), tpm_read_index(nscAddrBase,0x20),
290 tpm_read_index(nscAddrBase,0x27));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700291 dev_dbg(&pci_dev->dev,
292 "NSC SIOCF1 0x%x SIOCF5 0x%x SIOCF6 0x%x SIOCF8 0x%x\n",
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700293 tpm_read_index(nscAddrBase,0x21), tpm_read_index(nscAddrBase,0x25),
294 tpm_read_index(nscAddrBase,0x26), tpm_read_index(nscAddrBase,0x28));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295 dev_dbg(&pci_dev->dev, "NSC IO Base0 0x%x\n",
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700296 (tpm_read_index(nscAddrBase,0x60) << 8) | tpm_read_index(nscAddrBase,0x61));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700297 dev_dbg(&pci_dev->dev, "NSC IO Base1 0x%x\n",
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700298 (tpm_read_index(nscAddrBase,0x62) << 8) | tpm_read_index(nscAddrBase,0x63));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299 dev_dbg(&pci_dev->dev, "NSC Interrupt number and wakeup 0x%x\n",
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700300 tpm_read_index(nscAddrBase,0x70));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700301 dev_dbg(&pci_dev->dev, "NSC IRQ type select 0x%x\n",
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700302 tpm_read_index(nscAddrBase,0x71));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700303 dev_dbg(&pci_dev->dev,
304 "NSC DMA channel select0 0x%x, select1 0x%x\n",
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700305 tpm_read_index(nscAddrBase,0x74), tpm_read_index(nscAddrBase,0x75));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700306 dev_dbg(&pci_dev->dev,
307 "NSC Config "
308 "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700309 tpm_read_index(nscAddrBase,0xF0), tpm_read_index(nscAddrBase,0xF1),
310 tpm_read_index(nscAddrBase,0xF2), tpm_read_index(nscAddrBase,0xF3),
311 tpm_read_index(nscAddrBase,0xF4), tpm_read_index(nscAddrBase,0xF5),
312 tpm_read_index(nscAddrBase,0xF6), tpm_read_index(nscAddrBase,0xF7),
313 tpm_read_index(nscAddrBase,0xF8), tpm_read_index(nscAddrBase,0xF9));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700314
315 dev_info(&pci_dev->dev,
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700316 "NSC TPM revision %d\n",
317 tpm_read_index(nscAddrBase, 0x27) & 0x1F);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700318
319 /* enable the DPM module */
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700320 tpm_write_index(nscAddrBase, NSC_LDC_INDEX, 0x01);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321
322 if ((rc = tpm_register_hardware(pci_dev, &tpm_nsc)) < 0)
323 goto out_err;
324
325 return 0;
326
327out_err:
328 pci_disable_device(pci_dev);
329 return rc;
330}
331
332static struct pci_device_id tpm_pci_tbl[] __devinitdata = {
333 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0)},
334 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12)},
335 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0)},
336 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12)},
337 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0)},
Kylene Jo Halldaacdfa2005-06-25 14:55:39 -0700338 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0)},
339 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1)},
340 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0)},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700341 {PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_LPC)},
342 {0,}
343};
344
345MODULE_DEVICE_TABLE(pci, tpm_pci_tbl);
346
347static struct pci_driver nsc_pci_driver = {
348 .name = "tpm_nsc",
349 .id_table = tpm_pci_tbl,
350 .probe = tpm_nsc_init,
351 .remove = __devexit_p(tpm_remove),
352 .suspend = tpm_pm_suspend,
353 .resume = tpm_pm_resume,
354};
355
356static int __init init_nsc(void)
357{
358 return pci_register_driver(&nsc_pci_driver);
359}
360
361static void __exit cleanup_nsc(void)
362{
363 pci_unregister_driver(&nsc_pci_driver);
364}
365
366module_init(init_nsc);
367module_exit(cleanup_nsc);
368
369MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
370MODULE_DESCRIPTION("TPM Driver");
371MODULE_VERSION("2.0");
372MODULE_LICENSE("GPL");