blob: 003207670597095a7a5e7b3b06b177992fbd6e40 [file] [log] [blame]
Dave Airliead7f8a12014-06-05 14:01:32 +10001/*
2 * Copyright © 2014 Red Hat.
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22#ifndef _DRM_DP_MST_HELPER_H_
23#define _DRM_DP_MST_HELPER_H_
24
25#include <linux/types.h>
26#include <drm/drm_dp_helper.h>
27
28struct drm_dp_mst_branch;
29
30/**
Masanari Iida32197aa2014-10-20 23:53:13 +090031 * struct drm_dp_vcpi - Virtual Channel Payload Identifier
Dave Airliead7f8a12014-06-05 14:01:32 +100032 * @vcpi: Virtual channel ID.
33 * @pbn: Payload Bandwidth Number for this channel
34 * @aligned_pbn: PBN aligned with slot size
35 * @num_slots: number of slots for this PBN
36 */
37struct drm_dp_vcpi {
38 int vcpi;
39 int pbn;
40 int aligned_pbn;
41 int num_slots;
42};
43
44/**
45 * struct drm_dp_mst_port - MST port
46 * @kref: reference count for this port.
Dave Airliead7f8a12014-06-05 14:01:32 +100047 * @port_num: port number
48 * @input: if this port is an input port.
49 * @mcs: message capability status - DP 1.2 spec.
50 * @ddps: DisplayPort Device Plug Status - DP 1.2
51 * @pdt: Peer Device Type
52 * @ldps: Legacy Device Plug Status
53 * @dpcd_rev: DPCD revision of device on this port
54 * @num_sdp_streams: Number of simultaneous streams
55 * @num_sdp_stream_sinks: Number of stream sinks
56 * @available_pbn: Available bandwidth for this port.
57 * @next: link to next port on this branch device
58 * @mstb: branch device attach below this port
59 * @aux: i2c aux transport to talk to device connected to this port.
60 * @parent: branch device parent of this port
61 * @vcpi: Virtual Channel Payload info for this port.
62 * @connector: DRM connector this port is connected to.
63 * @mgr: topology manager this port lives under.
64 *
65 * This structure represents an MST port endpoint on a device somewhere
66 * in the MST topology.
67 */
68struct drm_dp_mst_port {
69 struct kref kref;
70
Dave Airliead7f8a12014-06-05 14:01:32 +100071 u8 port_num;
72 bool input;
73 bool mcs;
74 bool ddps;
75 u8 pdt;
76 bool ldps;
77 u8 dpcd_rev;
78 u8 num_sdp_streams;
79 u8 num_sdp_stream_sinks;
80 uint16_t available_pbn;
81 struct list_head next;
82 struct drm_dp_mst_branch *mstb; /* pointer to an mstb if this port has one */
83 struct drm_dp_aux aux; /* i2c bus for this port? */
84 struct drm_dp_mst_branch *parent;
85
86 struct drm_dp_vcpi vcpi;
87 struct drm_connector *connector;
88 struct drm_dp_mst_topology_mgr *mgr;
Dave Airliec6a0aed2014-10-20 16:28:02 +100089
Daniel Vetter132d49d2016-07-15 21:48:04 +020090 /**
91 * @cached_edid: for DP logical ports - make tiling work by ensuring
92 * that the EDID for all connectors is read immediately.
93 */
94 struct edid *cached_edid;
95 /**
96 * @has_audio: Tracks whether the sink connector to this port is
97 * audio-capable.
98 */
Libin Yangef8f9be2015-12-02 14:09:43 +080099 bool has_audio;
Dave Airliead7f8a12014-06-05 14:01:32 +1000100};
101
102/**
103 * struct drm_dp_mst_branch - MST branch device.
104 * @kref: reference count for this port.
105 * @rad: Relative Address to talk to this branch device.
106 * @lct: Link count total to talk to this branch device.
107 * @num_ports: number of ports on the branch.
108 * @msg_slots: one bit per transmitted msg slot.
109 * @ports: linked list of ports on this branch.
110 * @port_parent: pointer to the port parent, NULL if toplevel.
111 * @mgr: topology manager for this branch device.
112 * @tx_slots: transmission slots for this device.
113 * @last_seqno: last sequence number used to talk to this.
114 * @link_address_sent: if a link address message has been sent to this device yet.
Hersen Wu5e93b822016-01-22 17:07:28 -0500115 * @guid: guid for DP 1.2 branch device. port under this branch can be
116 * identified by port #.
Dave Airliead7f8a12014-06-05 14:01:32 +1000117 *
118 * This structure represents an MST branch device, there is one
Hersen Wu5e93b822016-01-22 17:07:28 -0500119 * primary branch device at the root, along with any other branches connected
120 * to downstream port of parent branches.
Dave Airliead7f8a12014-06-05 14:01:32 +1000121 */
122struct drm_dp_mst_branch {
123 struct kref kref;
124 u8 rad[8];
125 u8 lct;
126 int num_ports;
127
128 int msg_slots;
129 struct list_head ports;
130
131 /* list of tx ops queue for this port */
132 struct drm_dp_mst_port *port_parent;
133 struct drm_dp_mst_topology_mgr *mgr;
134
135 /* slots are protected by mstb->mgr->qlock */
136 struct drm_dp_sideband_msg_tx *tx_slots[2];
137 int last_seqno;
138 bool link_address_sent;
Hersen Wu5e93b822016-01-22 17:07:28 -0500139
140 /* global unique identifier to identify branch devices */
141 u8 guid[16];
Dave Airliead7f8a12014-06-05 14:01:32 +1000142};
143
144
145/* sideband msg header - not bit struct */
146struct drm_dp_sideband_msg_hdr {
147 u8 lct;
148 u8 lcr;
149 u8 rad[8];
150 bool broadcast;
151 bool path_msg;
152 u8 msg_len;
153 bool somt;
154 bool eomt;
155 bool seqno;
156};
157
158struct drm_dp_nak_reply {
159 u8 guid[16];
160 u8 reason;
161 u8 nak_data;
162};
163
164struct drm_dp_link_address_ack_reply {
165 u8 guid[16];
166 u8 nports;
167 struct drm_dp_link_addr_reply_port {
168 bool input_port;
169 u8 peer_device_type;
170 u8 port_number;
171 bool mcs;
172 bool ddps;
173 bool legacy_device_plug_status;
174 u8 dpcd_revision;
175 u8 peer_guid[16];
176 u8 num_sdp_streams;
177 u8 num_sdp_stream_sinks;
178 } ports[16];
179};
180
181struct drm_dp_remote_dpcd_read_ack_reply {
182 u8 port_number;
183 u8 num_bytes;
184 u8 bytes[255];
185};
186
187struct drm_dp_remote_dpcd_write_ack_reply {
188 u8 port_number;
189};
190
191struct drm_dp_remote_dpcd_write_nak_reply {
192 u8 port_number;
193 u8 reason;
194 u8 bytes_written_before_failure;
195};
196
197struct drm_dp_remote_i2c_read_ack_reply {
198 u8 port_number;
199 u8 num_bytes;
200 u8 bytes[255];
201};
202
203struct drm_dp_remote_i2c_read_nak_reply {
204 u8 port_number;
205 u8 nak_reason;
206 u8 i2c_nak_transaction;
207};
208
209struct drm_dp_remote_i2c_write_ack_reply {
210 u8 port_number;
211};
212
213
214struct drm_dp_sideband_msg_rx {
215 u8 chunk[48];
216 u8 msg[256];
217 u8 curchunk_len;
218 u8 curchunk_idx; /* chunk we are parsing now */
219 u8 curchunk_hdrlen;
220 u8 curlen; /* total length of the msg */
221 bool have_somt;
222 bool have_eomt;
223 struct drm_dp_sideband_msg_hdr initial_hdr;
224};
225
Libin Yangef8f9be2015-12-02 14:09:43 +0800226#define DRM_DP_MAX_SDP_STREAMS 16
Dave Airliead7f8a12014-06-05 14:01:32 +1000227struct drm_dp_allocate_payload {
228 u8 port_number;
229 u8 number_sdp_streams;
230 u8 vcpi;
231 u16 pbn;
Libin Yangef8f9be2015-12-02 14:09:43 +0800232 u8 sdp_stream_sink[DRM_DP_MAX_SDP_STREAMS];
Dave Airliead7f8a12014-06-05 14:01:32 +1000233};
234
235struct drm_dp_allocate_payload_ack_reply {
236 u8 port_number;
237 u8 vcpi;
238 u16 allocated_pbn;
239};
240
241struct drm_dp_connection_status_notify {
242 u8 guid[16];
243 u8 port_number;
244 bool legacy_device_plug_status;
245 bool displayport_device_plug_status;
246 bool message_capability_status;
247 bool input_port;
248 u8 peer_device_type;
249};
250
251struct drm_dp_remote_dpcd_read {
252 u8 port_number;
253 u32 dpcd_address;
254 u8 num_bytes;
255};
256
257struct drm_dp_remote_dpcd_write {
258 u8 port_number;
259 u32 dpcd_address;
260 u8 num_bytes;
261 u8 *bytes;
262};
263
Dave Airlieae491542015-10-14 18:51:17 +1000264#define DP_REMOTE_I2C_READ_MAX_TRANSACTIONS 4
Dave Airliead7f8a12014-06-05 14:01:32 +1000265struct drm_dp_remote_i2c_read {
266 u8 num_transactions;
267 u8 port_number;
268 struct {
269 u8 i2c_dev_id;
270 u8 num_bytes;
271 u8 *bytes;
272 u8 no_stop_bit;
273 u8 i2c_transaction_delay;
Dave Airlieae491542015-10-14 18:51:17 +1000274 } transactions[DP_REMOTE_I2C_READ_MAX_TRANSACTIONS];
Dave Airliead7f8a12014-06-05 14:01:32 +1000275 u8 read_i2c_device_id;
276 u8 num_bytes_read;
277};
278
279struct drm_dp_remote_i2c_write {
280 u8 port_number;
281 u8 write_i2c_device_id;
282 u8 num_bytes;
283 u8 *bytes;
284};
285
286/* this covers ENUM_RESOURCES, POWER_DOWN_PHY, POWER_UP_PHY */
287struct drm_dp_port_number_req {
288 u8 port_number;
289};
290
291struct drm_dp_enum_path_resources_ack_reply {
292 u8 port_number;
293 u16 full_payload_bw_number;
294 u16 avail_payload_bw_number;
295};
296
297/* covers POWER_DOWN_PHY, POWER_UP_PHY */
298struct drm_dp_port_number_rep {
299 u8 port_number;
300};
301
302struct drm_dp_query_payload {
303 u8 port_number;
304 u8 vcpi;
305};
306
307struct drm_dp_resource_status_notify {
308 u8 port_number;
309 u8 guid[16];
310 u16 available_pbn;
311};
312
313struct drm_dp_query_payload_ack_reply {
314 u8 port_number;
315 u8 allocated_pbn;
316};
317
318struct drm_dp_sideband_msg_req_body {
319 u8 req_type;
320 union ack_req {
321 struct drm_dp_connection_status_notify conn_stat;
322 struct drm_dp_port_number_req port_num;
323 struct drm_dp_resource_status_notify resource_stat;
324
325 struct drm_dp_query_payload query_payload;
326 struct drm_dp_allocate_payload allocate_payload;
327
328 struct drm_dp_remote_dpcd_read dpcd_read;
329 struct drm_dp_remote_dpcd_write dpcd_write;
330
331 struct drm_dp_remote_i2c_read i2c_read;
332 struct drm_dp_remote_i2c_write i2c_write;
333 } u;
334};
335
336struct drm_dp_sideband_msg_reply_body {
337 u8 reply_type;
338 u8 req_type;
339 union ack_replies {
340 struct drm_dp_nak_reply nak;
341 struct drm_dp_link_address_ack_reply link_addr;
342 struct drm_dp_port_number_rep port_number;
343
344 struct drm_dp_enum_path_resources_ack_reply path_resources;
345 struct drm_dp_allocate_payload_ack_reply allocate_payload;
346 struct drm_dp_query_payload_ack_reply query_payload;
347
348 struct drm_dp_remote_dpcd_read_ack_reply remote_dpcd_read_ack;
349 struct drm_dp_remote_dpcd_write_ack_reply remote_dpcd_write_ack;
350 struct drm_dp_remote_dpcd_write_nak_reply remote_dpcd_write_nack;
351
352 struct drm_dp_remote_i2c_read_ack_reply remote_i2c_read_ack;
353 struct drm_dp_remote_i2c_read_nak_reply remote_i2c_read_nack;
354 struct drm_dp_remote_i2c_write_ack_reply remote_i2c_write_ack;
355 } u;
356};
357
358/* msg is queued to be put into a slot */
359#define DRM_DP_SIDEBAND_TX_QUEUED 0
360/* msg has started transmitting on a slot - still on msgq */
361#define DRM_DP_SIDEBAND_TX_START_SEND 1
362/* msg has finished transmitting on a slot - removed from msgq only in slot */
363#define DRM_DP_SIDEBAND_TX_SENT 2
364/* msg has received a response - removed from slot */
365#define DRM_DP_SIDEBAND_TX_RX 3
366#define DRM_DP_SIDEBAND_TX_TIMEOUT 4
367
368struct drm_dp_sideband_msg_tx {
369 u8 msg[256];
370 u8 chunk[48];
371 u8 cur_offset;
372 u8 cur_len;
373 struct drm_dp_mst_branch *dst;
374 struct list_head next;
375 int seqno;
376 int state;
377 bool path_msg;
378 struct drm_dp_sideband_msg_reply_body reply;
379};
380
381/* sideband msg handler */
382struct drm_dp_mst_topology_mgr;
383struct drm_dp_mst_topology_cbs {
384 /* create a connector for a port */
Thierry Reding12e6cec2014-05-13 11:38:36 +0200385 struct drm_connector *(*add_connector)(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *path);
Dave Airlied9515c52015-09-16 17:55:23 +1000386 void (*register_connector)(struct drm_connector *connector);
Dave Airliead7f8a12014-06-05 14:01:32 +1000387 void (*destroy_connector)(struct drm_dp_mst_topology_mgr *mgr,
388 struct drm_connector *connector);
389 void (*hotplug)(struct drm_dp_mst_topology_mgr *mgr);
390
391};
392
393#define DP_MAX_PAYLOAD (sizeof(unsigned long) * 8)
394
395#define DP_PAYLOAD_LOCAL 1
396#define DP_PAYLOAD_REMOTE 2
397#define DP_PAYLOAD_DELETE_LOCAL 3
398
399struct drm_dp_payload {
400 int payload_state;
401 int start_slot;
402 int num_slots;
Dave Airliedfda0df2014-08-06 16:26:21 +1000403 int vcpi;
Dave Airliead7f8a12014-06-05 14:01:32 +1000404};
405
406/**
407 * struct drm_dp_mst_topology_mgr - DisplayPort MST manager
Dave Airliead7f8a12014-06-05 14:01:32 +1000408 *
409 * This struct represents the toplevel displayport MST topology manager.
410 * There should be one instance of this for every MST capable DP connector
411 * on the GPU.
412 */
413struct drm_dp_mst_topology_mgr {
Daniel Vetter132d49d2016-07-15 21:48:04 +0200414 /**
415 * @dev: device pointer for adding i2c devices etc.
416 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000417 struct device *dev;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200418 /**
419 * @cbs: callbacks for connector addition and destruction.
420 */
Julia Lawall69a0f892015-12-30 22:20:30 +0100421 const struct drm_dp_mst_topology_cbs *cbs;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200422 /**
423 * @max_dpcd_transaction_bytes: maximum number of bytes to read/write
424 * in one go.
425 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000426 int max_dpcd_transaction_bytes;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200427 /**
428 * @aux: AUX channel for the DP MST connector this topolgy mgr is
429 * controlling.
430 */
431 struct drm_dp_aux *aux;
432 /**
433 * @max_payloads: maximum number of payloads the GPU can generate.
434 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000435 int max_payloads;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200436 /**
437 * @conn_base_id: DRM connector ID this mgr is connected to. Only used
438 * to build the MST connector path value.
439 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000440 int conn_base_id;
441
Daniel Vetter132d49d2016-07-15 21:48:04 +0200442 /**
443 * @down_rep_recv: Message receiver state for down replies. This and
444 * @up_req_recv are only ever access from the work item, which is
445 * serialised.
446 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000447 struct drm_dp_sideband_msg_rx down_rep_recv;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200448 /**
449 * @up_req_recv: Message receiver state for up requests. This and
450 * @down_rep_recv are only ever access from the work item, which is
451 * serialised.
452 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000453 struct drm_dp_sideband_msg_rx up_req_recv;
454
Daniel Vetter132d49d2016-07-15 21:48:04 +0200455 /**
456 * @lock: protects mst state, primary, dpcd.
457 */
458 struct mutex lock;
Dave Airliead7f8a12014-06-05 14:01:32 +1000459
Daniel Vetter132d49d2016-07-15 21:48:04 +0200460 /**
461 * @mst_state: If this manager is enabled for an MST capable port. False
462 * if no MST sink/branch devices is connected.
463 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000464 bool mst_state;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200465 /**
466 * @mst_primary: Pointer to the primary/first branch device.
467 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000468 struct drm_dp_mst_branch *mst_primary;
Hersen Wu5e93b822016-01-22 17:07:28 -0500469
Daniel Vetter132d49d2016-07-15 21:48:04 +0200470 /**
471 * @dpcd: Cache of DPCD for primary port.
472 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000473 u8 dpcd[DP_RECEIVER_CAP_SIZE];
Daniel Vetter132d49d2016-07-15 21:48:04 +0200474 /**
475 * @sink_count: Sink count from DEVICE_SERVICE_IRQ_VECTOR_ESI0.
476 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000477 u8 sink_count;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200478 /**
479 * @pbn_div: PBN to slots divisor.
480 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000481 int pbn_div;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200482 /**
483 * @total_slots: Total slots that can be allocated.
484 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000485 int total_slots;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200486 /**
487 * @avail_slots: Still available slots that can be allocated.
488 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000489 int avail_slots;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200490 /**
491 * @total_pbn: Total PBN count.
492 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000493 int total_pbn;
494
Daniel Vetter132d49d2016-07-15 21:48:04 +0200495 /**
496 * @qlock: protects @tx_msg_downq, the tx_slots in struct
497 * &drm_dp_mst_branch and txmsg->state once they are queued
498 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000499 struct mutex qlock;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200500 /**
501 * @tx_msg_downq: List of pending down replies.
502 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000503 struct list_head tx_msg_downq;
Dave Airliead7f8a12014-06-05 14:01:32 +1000504
Daniel Vetter132d49d2016-07-15 21:48:04 +0200505 /**
506 * @payload_lock: Protect payload information.
507 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000508 struct mutex payload_lock;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200509 /**
510 * @proposed_vcpis: Array of pointers for the new VCPI allocation. The
511 * VCPI structure itself is embedded into the corresponding
512 * &drm_dp_mst_port structure.
513 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000514 struct drm_dp_vcpi **proposed_vcpis;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200515 /**
516 * @payloads: Array of payloads.
517 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000518 struct drm_dp_payload *payloads;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200519 /**
520 * @payload_mask: Elements of @payloads actually in use. Since
521 * reallocation of active outputs isn't possible gaps can be created by
522 * disabling outputs out of order compared to how they've been enabled.
523 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000524 unsigned long payload_mask;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200525 /**
526 * @vcpi_mask: Similar to @payload_mask, but for @proposed_vcpis.
527 */
Dave Airliedfda0df2014-08-06 16:26:21 +1000528 unsigned long vcpi_mask;
Dave Airliead7f8a12014-06-05 14:01:32 +1000529
Daniel Vetter132d49d2016-07-15 21:48:04 +0200530 /**
531 * @tx_waitq: Wait to queue stall for the tx worker.
532 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000533 wait_queue_head_t tx_waitq;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200534 /**
535 * @work: Probe work.
536 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000537 struct work_struct work;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200538 /**
539 * @tx_work: Sideband transmit worker. This can nest within the main
540 * @work worker for each transaction @work launches.
541 */
Dave Airliead7f8a12014-06-05 14:01:32 +1000542 struct work_struct tx_work;
Dave Airlie6b8eeca2015-06-15 10:34:28 +1000543
Daniel Vetter132d49d2016-07-15 21:48:04 +0200544 /**
545 * @destroy_connector_list: List of to be destroyed connectors.
546 */
Dave Airlie6b8eeca2015-06-15 10:34:28 +1000547 struct list_head destroy_connector_list;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200548 /**
549 * @destroy_connector_lock: Protects @connector_list.
550 */
Dave Airlie6b8eeca2015-06-15 10:34:28 +1000551 struct mutex destroy_connector_lock;
Daniel Vetter132d49d2016-07-15 21:48:04 +0200552 /**
553 * @destroy_connector_work: Work item to destroy connectors. Needed to
554 * avoid locking inversion.
555 */
Dave Airlie6b8eeca2015-06-15 10:34:28 +1000556 struct work_struct destroy_connector_work;
Dave Airliead7f8a12014-06-05 14:01:32 +1000557};
558
559int drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr, struct device *dev, struct drm_dp_aux *aux, int max_dpcd_transaction_bytes, int max_payloads, int conn_base_id);
560
561void drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr);
562
563
564int drm_dp_mst_topology_mgr_set_mst(struct drm_dp_mst_topology_mgr *mgr, bool mst_state);
565
566
567int drm_dp_mst_hpd_irq(struct drm_dp_mst_topology_mgr *mgr, u8 *esi, bool *handled);
568
569
Dave Airliec6a0aed2014-10-20 16:28:02 +1000570enum drm_connector_status drm_dp_mst_detect_port(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
Dave Airliead7f8a12014-06-05 14:01:32 +1000571
Libin Yangef8f9be2015-12-02 14:09:43 +0800572bool drm_dp_mst_port_has_audio(struct drm_dp_mst_topology_mgr *mgr,
573 struct drm_dp_mst_port *port);
Dave Airliead7f8a12014-06-05 14:01:32 +1000574struct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
575
576
577int drm_dp_calc_pbn_mode(int clock, int bpp);
578
579
580bool drm_dp_mst_allocate_vcpi(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, int pbn, int *slots);
581
Dave Airlie87f59422015-02-24 09:23:55 +1000582int drm_dp_mst_get_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
583
Dave Airliead7f8a12014-06-05 14:01:32 +1000584
585void drm_dp_mst_reset_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
586
587
588void drm_dp_mst_deallocate_vcpi(struct drm_dp_mst_topology_mgr *mgr,
589 struct drm_dp_mst_port *port);
590
591
592int drm_dp_find_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr,
593 int pbn);
594
595
596int drm_dp_update_payload_part1(struct drm_dp_mst_topology_mgr *mgr);
597
598
599int drm_dp_update_payload_part2(struct drm_dp_mst_topology_mgr *mgr);
600
601int drm_dp_check_act_status(struct drm_dp_mst_topology_mgr *mgr);
602
603void drm_dp_mst_dump_topology(struct seq_file *m,
604 struct drm_dp_mst_topology_mgr *mgr);
605
606void drm_dp_mst_topology_mgr_suspend(struct drm_dp_mst_topology_mgr *mgr);
607int drm_dp_mst_topology_mgr_resume(struct drm_dp_mst_topology_mgr *mgr);
608#endif