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Wolfram Sangbb2fd8a2010-04-29 10:03:17 +02001/*
2 * Watchdog driver for IMX2 and later processors
3 *
4 * Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de>
Anson Huang1a9c5ef2014-01-13 19:58:34 +08005 * Copyright (C) 2014 Freescale Semiconductor, Inc.
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +02006 *
7 * some parts adapted by similar drivers from Darius Augulis and Vladimir
8 * Zapolskiy, additional improvements by Wim Van Sebroeck.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
13 *
14 * NOTE: MX1 has a slightly different Watchdog than MX2 and later:
15 *
16 * MX1: MX2+:
17 * ---- -----
18 * Registers: 32-bit 16-bit
19 * Stopable timer: Yes No
20 * Need to enable clk: No Yes
21 * Halt on suspend: Manual Can be automatic
22 */
23
Xiubo Li30cb0422014-04-04 09:33:24 +080024#include <linux/clk.h>
Jingchang Lu334a9d82014-09-12 15:24:36 +080025#include <linux/delay.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020026#include <linux/init.h>
Xiubo Li30cb0422014-04-04 09:33:24 +080027#include <linux/io.h>
28#include <linux/jiffies.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020029#include <linux/kernel.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020030#include <linux/module.h>
31#include <linux/moduleparam.h>
Jingchang Lu334a9d82014-09-12 15:24:36 +080032#include <linux/notifier.h>
Xiubo Lif728f4b2014-06-03 10:45:14 +080033#include <linux/of_address.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020034#include <linux/platform_device.h>
Jingchang Lu334a9d82014-09-12 15:24:36 +080035#include <linux/reboot.h>
Xiubo Lia7977002014-04-04 09:33:25 +080036#include <linux/regmap.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020037#include <linux/timer.h>
Xiubo Li30cb0422014-04-04 09:33:24 +080038#include <linux/watchdog.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020039
40#define DRIVER_NAME "imx2-wdt"
41
42#define IMX2_WDT_WCR 0x00 /* Control Register */
43#define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
44#define IMX2_WDT_WCR_WRE (1 << 3) /* -> WDOG Reset Enable */
45#define IMX2_WDT_WCR_WDE (1 << 2) /* -> Watchdog Enable */
Anson Huang1a9c5ef2014-01-13 19:58:34 +080046#define IMX2_WDT_WCR_WDZST (1 << 0) /* -> Watchdog timer Suspend */
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020047
48#define IMX2_WDT_WSR 0x02 /* Service Register */
49#define IMX2_WDT_SEQ1 0x5555 /* -> service sequence 1 */
50#define IMX2_WDT_SEQ2 0xAAAA /* -> service sequence 2 */
51
Oskar Schirmer474ef122012-02-16 12:17:45 +000052#define IMX2_WDT_WRSR 0x04 /* Reset Status Register */
53#define IMX2_WDT_WRSR_TOUT (1 << 1) /* -> Reset due to Timeout */
54
Markus Pargmann5fe65ce2014-09-08 09:14:07 +020055#define IMX2_WDT_WMCR 0x08 /* Misc Register */
56
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020057#define IMX2_WDT_MAX_TIME 128
58#define IMX2_WDT_DEFAULT_TIME 60 /* in seconds */
59
60#define WDOG_SEC_TO_COUNT(s) ((s * 2 - 1) << 8)
61
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +020062struct imx2_wdt_device {
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020063 struct clk *clk;
Xiubo Lia7977002014-04-04 09:33:25 +080064 struct regmap *regmap;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020065 struct timer_list timer; /* Pings the watchdog when closed */
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +020066 struct watchdog_device wdog;
Jingchang Lu334a9d82014-09-12 15:24:36 +080067 struct notifier_block restart_handler;
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +020068};
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020069
Wim Van Sebroeck86a1e182012-03-05 16:51:11 +010070static bool nowayout = WATCHDOG_NOWAYOUT;
71module_param(nowayout, bool, 0);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020072MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
73 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
74
75
76static unsigned timeout = IMX2_WDT_DEFAULT_TIME;
77module_param(timeout, uint, 0);
78MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default="
79 __MODULE_STRING(IMX2_WDT_DEFAULT_TIME) ")");
80
81static const struct watchdog_info imx2_wdt_info = {
82 .identity = "imx2+ watchdog",
83 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
84};
85
Jingchang Lu334a9d82014-09-12 15:24:36 +080086static int imx2_restart_handler(struct notifier_block *this, unsigned long mode,
87 void *cmd)
88{
89 unsigned int wcr_enable = IMX2_WDT_WCR_WDE;
90 struct imx2_wdt_device *wdev = container_of(this,
91 struct imx2_wdt_device,
92 restart_handler);
93 /* Assert SRS signal */
94 regmap_write(wdev->regmap, 0, wcr_enable);
95 /*
96 * Due to imx6q errata ERR004346 (WDOG: WDOG SRS bit requires to be
97 * written twice), we add another two writes to ensure there must be at
98 * least two writes happen in the same one 32kHz clock period. We save
99 * the target check here, since the writes shouldn't be a huge burden
100 * for other platforms.
101 */
102 regmap_write(wdev->regmap, 0, wcr_enable);
103 regmap_write(wdev->regmap, 0, wcr_enable);
104
105 /* wait for reset to assert... */
106 mdelay(500);
107
108 return NOTIFY_DONE;
109}
110
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200111static inline void imx2_wdt_setup(struct watchdog_device *wdog)
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200112{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200113 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Xiubo Lia7977002014-04-04 09:33:25 +0800114 u32 val;
115
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200116 regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200117
Anson Huang1a9c5ef2014-01-13 19:58:34 +0800118 /* Suspend timer in low power mode, write once-only */
119 val |= IMX2_WDT_WCR_WDZST;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200120 /* Strip the old watchdog Time-Out value */
121 val &= ~IMX2_WDT_WCR_WT;
122 /* Generate reset if WDOG times out */
123 val &= ~IMX2_WDT_WCR_WRE;
124 /* Keep Watchdog Disabled */
125 val &= ~IMX2_WDT_WCR_WDE;
126 /* Set the watchdog's Time-Out value */
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200127 val |= WDOG_SEC_TO_COUNT(wdog->timeout);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200128
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200129 regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200130
131 /* enable the watchdog */
132 val |= IMX2_WDT_WCR_WDE;
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200133 regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200134}
135
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200136static inline bool imx2_wdt_is_running(struct imx2_wdt_device *wdev)
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200137{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200138 u32 val;
139
140 regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
141
142 return val & IMX2_WDT_WCR_WDE;
143}
144
145static int imx2_wdt_ping(struct watchdog_device *wdog)
146{
147 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
148
149 regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ1);
150 regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ2);
151 return 0;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200152}
153
154static void imx2_wdt_timer_ping(unsigned long arg)
155{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200156 struct watchdog_device *wdog = (struct watchdog_device *)arg;
157 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
158
159 /* ping it every wdog->timeout / 2 seconds to prevent reboot */
160 imx2_wdt_ping(wdog);
161 mod_timer(&wdev->timer, jiffies + wdog->timeout * HZ / 2);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200162}
163
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200164static int imx2_wdt_set_timeout(struct watchdog_device *wdog,
165 unsigned int new_timeout)
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200166{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200167 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200168
Michael Grzeschik30dd4a82015-05-06 13:17:59 +0200169 wdog->timeout = new_timeout;
170
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200171 regmap_update_bits(wdev->regmap, IMX2_WDT_WCR, IMX2_WDT_WCR_WT,
Xiubo Lia7977002014-04-04 09:33:25 +0800172 WDOG_SEC_TO_COUNT(new_timeout));
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200173 return 0;
174}
175
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200176static int imx2_wdt_start(struct watchdog_device *wdog)
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200177{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200178 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200179
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200180 if (imx2_wdt_is_running(wdev)) {
181 /* delete the timer that pings the watchdog after close */
182 del_timer_sync(&wdev->timer);
183 imx2_wdt_set_timeout(wdog, wdog->timeout);
184 } else
185 imx2_wdt_setup(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200186
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200187 return imx2_wdt_ping(wdog);
188}
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200189
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200190static int imx2_wdt_stop(struct watchdog_device *wdog)
191{
192 /*
193 * We don't need a clk_disable, it cannot be disabled once started.
194 * We use a timer to ping the watchdog while /dev/watchdog is closed
195 */
196 imx2_wdt_timer_ping((unsigned long)wdog);
197 return 0;
198}
Oskar Schirmer474ef122012-02-16 12:17:45 +0000199
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200200static inline void imx2_wdt_ping_if_active(struct watchdog_device *wdog)
201{
202 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200203
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200204 if (imx2_wdt_is_running(wdev)) {
205 imx2_wdt_set_timeout(wdog, wdog->timeout);
206 imx2_wdt_timer_ping((unsigned long)wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200207 }
208}
209
Krzysztof Kozlowski4bd8ce32015-01-05 10:09:17 +0100210static const struct watchdog_ops imx2_wdt_ops = {
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200211 .owner = THIS_MODULE,
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200212 .start = imx2_wdt_start,
213 .stop = imx2_wdt_stop,
214 .ping = imx2_wdt_ping,
215 .set_timeout = imx2_wdt_set_timeout,
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200216};
217
Krzysztof Kozlowski4bd8ce32015-01-05 10:09:17 +0100218static const struct regmap_config imx2_wdt_regmap_config = {
Xiubo Lia7977002014-04-04 09:33:25 +0800219 .reg_bits = 16,
220 .reg_stride = 2,
221 .val_bits = 16,
222 .max_register = 0x8,
223};
224
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200225static int __init imx2_wdt_probe(struct platform_device *pdev)
226{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200227 struct imx2_wdt_device *wdev;
228 struct watchdog_device *wdog;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200229 struct resource *res;
Xiubo Lia7977002014-04-04 09:33:25 +0800230 void __iomem *base;
231 int ret;
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200232 u32 val;
233
234 wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
235 if (!wdev)
236 return -ENOMEM;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200237
238 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Xiubo Lia7977002014-04-04 09:33:25 +0800239 base = devm_ioremap_resource(&pdev->dev, res);
240 if (IS_ERR(base))
241 return PTR_ERR(base);
242
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200243 wdev->regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, base,
244 &imx2_wdt_regmap_config);
245 if (IS_ERR(wdev->regmap)) {
Xiubo Lia7977002014-04-04 09:33:25 +0800246 dev_err(&pdev->dev, "regmap init failed\n");
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200247 return PTR_ERR(wdev->regmap);
Xiubo Lia7977002014-04-04 09:33:25 +0800248 }
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200249
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200250 wdev->clk = devm_clk_get(&pdev->dev, NULL);
251 if (IS_ERR(wdev->clk)) {
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200252 dev_err(&pdev->dev, "can't get Watchdog clock\n");
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200253 return PTR_ERR(wdev->clk);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200254 }
255
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200256 wdog = &wdev->wdog;
257 wdog->info = &imx2_wdt_info;
258 wdog->ops = &imx2_wdt_ops;
259 wdog->min_timeout = 1;
260 wdog->max_timeout = IMX2_WDT_MAX_TIME;
Vladimir Zapolskiy81351932015-06-02 15:46:18 +0300261 wdog->parent = &pdev->dev;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200262
Fabio Estevamaefb1632015-06-22 01:16:18 -0300263 ret = clk_prepare_enable(wdev->clk);
264 if (ret)
265 return ret;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200266
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200267 regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val);
268 wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200269
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200270 wdog->timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME);
271 if (wdog->timeout != timeout)
272 dev_warn(&pdev->dev, "Initial timeout out of range! Clamped from %u to %u\n",
273 timeout, wdog->timeout);
274
275 platform_set_drvdata(pdev, wdog);
276 watchdog_set_drvdata(wdog, wdev);
277 watchdog_set_nowayout(wdog, nowayout);
278 watchdog_init_timeout(wdog, timeout, &pdev->dev);
279
280 setup_timer(&wdev->timer, imx2_wdt_timer_ping, (unsigned long)wdog);
281
282 imx2_wdt_ping_if_active(wdog);
283
Markus Pargmann5fe65ce2014-09-08 09:14:07 +0200284 /*
285 * Disable the watchdog power down counter at boot. Otherwise the power
286 * down counter will pull down the #WDOG interrupt line for one clock
287 * cycle.
288 */
289 regmap_write(wdev->regmap, IMX2_WDT_WMCR, 0);
290
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200291 ret = watchdog_register_device(wdog);
292 if (ret) {
293 dev_err(&pdev->dev, "cannot register watchdog device\n");
Fabio Estevamdb11cba2015-06-22 01:16:19 -0300294 goto disable_clk;
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200295 }
296
Jingchang Lu334a9d82014-09-12 15:24:36 +0800297 wdev->restart_handler.notifier_call = imx2_restart_handler;
298 wdev->restart_handler.priority = 128;
299 ret = register_restart_handler(&wdev->restart_handler);
300 if (ret)
301 dev_err(&pdev->dev, "cannot register restart handler\n");
302
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200303 dev_info(&pdev->dev, "timeout %d sec (nowayout=%d)\n",
304 wdog->timeout, nowayout);
305
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200306 return 0;
Fabio Estevamdb11cba2015-06-22 01:16:19 -0300307
308disable_clk:
309 clk_disable_unprepare(wdev->clk);
310 return ret;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200311}
312
313static int __exit imx2_wdt_remove(struct platform_device *pdev)
314{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200315 struct watchdog_device *wdog = platform_get_drvdata(pdev);
316 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200317
Jingchang Lu334a9d82014-09-12 15:24:36 +0800318 unregister_restart_handler(&wdev->restart_handler);
319
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200320 watchdog_unregister_device(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200321
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200322 if (imx2_wdt_is_running(wdev)) {
323 del_timer_sync(&wdev->timer);
324 imx2_wdt_ping(wdog);
325 dev_crit(&pdev->dev, "Device removed: Expect reboot!\n");
Jingoo Hanbdf49572013-04-29 18:15:53 +0900326 }
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200327 return 0;
328}
329
330static void imx2_wdt_shutdown(struct platform_device *pdev)
331{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200332 struct watchdog_device *wdog = platform_get_drvdata(pdev);
333 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200334
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200335 if (imx2_wdt_is_running(wdev)) {
336 /*
337 * We are running, we need to delete the timer but will
338 * give max timeout before reboot will take place
339 */
340 del_timer_sync(&wdev->timer);
341 imx2_wdt_set_timeout(wdog, IMX2_WDT_MAX_TIME);
342 imx2_wdt_ping(wdog);
343 dev_crit(&pdev->dev, "Device shutdown: Expect reboot!\n");
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200344 }
345}
346
Xiubo Liaefbaf32014-09-22 18:00:52 +0800347#ifdef CONFIG_PM_SLEEP
Xiubo Libbd59002014-10-16 11:44:15 +0800348/* Disable watchdog if it is active or non-active but still running */
Xiubo Liaefbaf32014-09-22 18:00:52 +0800349static int imx2_wdt_suspend(struct device *dev)
350{
351 struct watchdog_device *wdog = dev_get_drvdata(dev);
352 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
353
Xiubo Libbd59002014-10-16 11:44:15 +0800354 /* The watchdog IP block is running */
355 if (imx2_wdt_is_running(wdev)) {
356 imx2_wdt_set_timeout(wdog, IMX2_WDT_MAX_TIME);
357 imx2_wdt_ping(wdog);
Xiubo Liaefbaf32014-09-22 18:00:52 +0800358
Xiubo Libbd59002014-10-16 11:44:15 +0800359 /* The watchdog is not active */
360 if (!watchdog_active(wdog))
361 del_timer_sync(&wdev->timer);
362 }
Xiubo Liaefbaf32014-09-22 18:00:52 +0800363
364 clk_disable_unprepare(wdev->clk);
365
366 return 0;
367}
368
369/* Enable watchdog and configure it if necessary */
370static int imx2_wdt_resume(struct device *dev)
371{
372 struct watchdog_device *wdog = dev_get_drvdata(dev);
373 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Fabio Estevamaefb1632015-06-22 01:16:18 -0300374 int ret;
Xiubo Liaefbaf32014-09-22 18:00:52 +0800375
Fabio Estevamaefb1632015-06-22 01:16:18 -0300376 ret = clk_prepare_enable(wdev->clk);
377 if (ret)
378 return ret;
Xiubo Liaefbaf32014-09-22 18:00:52 +0800379
380 if (watchdog_active(wdog) && !imx2_wdt_is_running(wdev)) {
Xiubo Libbd59002014-10-16 11:44:15 +0800381 /*
382 * If the watchdog is still active and resumes
383 * from deep sleep state, need to restart the
384 * watchdog again.
Xiubo Liaefbaf32014-09-22 18:00:52 +0800385 */
386 imx2_wdt_setup(wdog);
387 imx2_wdt_set_timeout(wdog, wdog->timeout);
388 imx2_wdt_ping(wdog);
389 } else if (imx2_wdt_is_running(wdev)) {
Xiubo Libbd59002014-10-16 11:44:15 +0800390 /* Resuming from non-deep sleep state. */
391 imx2_wdt_set_timeout(wdog, wdog->timeout);
Xiubo Liaefbaf32014-09-22 18:00:52 +0800392 imx2_wdt_ping(wdog);
Xiubo Libbd59002014-10-16 11:44:15 +0800393 /*
394 * But the watchdog is not active, then start
395 * the timer again.
396 */
397 if (!watchdog_active(wdog))
398 mod_timer(&wdev->timer,
399 jiffies + wdog->timeout * HZ / 2);
Xiubo Liaefbaf32014-09-22 18:00:52 +0800400 }
401
402 return 0;
403}
404#endif
405
406static SIMPLE_DEV_PM_OPS(imx2_wdt_pm_ops, imx2_wdt_suspend,
407 imx2_wdt_resume);
408
Shawn Guof5a427e2011-07-18 11:15:21 +0800409static const struct of_device_id imx2_wdt_dt_ids[] = {
410 { .compatible = "fsl,imx21-wdt", },
411 { /* sentinel */ }
412};
Niels de Vos813296a2013-07-29 09:38:18 +0200413MODULE_DEVICE_TABLE(of, imx2_wdt_dt_ids);
Shawn Guof5a427e2011-07-18 11:15:21 +0800414
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200415static struct platform_driver imx2_wdt_driver = {
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200416 .remove = __exit_p(imx2_wdt_remove),
417 .shutdown = imx2_wdt_shutdown,
418 .driver = {
419 .name = DRIVER_NAME,
Xiubo Liaefbaf32014-09-22 18:00:52 +0800420 .pm = &imx2_wdt_pm_ops,
Shawn Guof5a427e2011-07-18 11:15:21 +0800421 .of_match_table = imx2_wdt_dt_ids,
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200422 },
423};
424
Fabio Porcedda1cb92042013-01-09 12:15:27 +0100425module_platform_driver_probe(imx2_wdt_driver, imx2_wdt_probe);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200426
427MODULE_AUTHOR("Wolfram Sang");
428MODULE_DESCRIPTION("Watchdog driver for IMX2 and later");
429MODULE_LICENSE("GPL v2");
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200430MODULE_ALIAS("platform:" DRIVER_NAME);