blob: 3fa81d55cd0c5210b46e4f6697e0768049bf94be [file] [log] [blame]
Venkatesh Pallipadi02df8b92005-04-15 15:07:10 -04001
2/* _PDC bit definition for Intel processors */
3
4#ifndef __PDC_INTEL_H__
5#define __PDC_INTEL_H__
6
7#define ACPI_PDC_P_FFH (0x0001)
8#define ACPI_PDC_C_C1_HALT (0x0002)
9#define ACPI_PDC_T_FFH (0x0004)
10#define ACPI_PDC_SMP_C1PT (0x0008)
11#define ACPI_PDC_SMP_C2C3 (0x0010)
12#define ACPI_PDC_SMP_P_SWCOORD (0x0020)
13#define ACPI_PDC_SMP_C_SWCOORD (0x0040)
14#define ACPI_PDC_SMP_T_SWCOORD (0x0080)
15#define ACPI_PDC_C_C1_FFH (0x0100)
16
Venkatesh Pallipadi02df8b92005-04-15 15:07:10 -040017#define ACPI_PDC_EST_CAPABILITY_SMP (ACPI_PDC_SMP_C1PT | \
Venkatesh Pallipadi05131ec2005-10-23 16:31:00 -040018 ACPI_PDC_C_C1_HALT | \
Venkatesh Pallipadi02df8b92005-04-15 15:07:10 -040019 ACPI_PDC_P_FFH)
20
21#define ACPI_PDC_C_CAPABILITY_SMP (ACPI_PDC_SMP_C2C3 | \
22 ACPI_PDC_SMP_C1PT | \
23 ACPI_PDC_C_C1_HALT)
24
Len Brown4be44fc2005-08-05 00:44:28 -040025#endif /* __PDC_INTEL_H__ */