Alan Hourihane | dbe7e42 | 2007-05-08 00:39:25 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) Intel Corp. 2007. |
| 3 | * All Rights Reserved. |
| 4 | * |
| 5 | * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to |
| 6 | * develop this driver. |
| 7 | * |
| 8 | * This file is part of the Vermilion Range fb driver. |
| 9 | * The Vermilion Range fb driver is free software; |
| 10 | * you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; either version 2 of the License, or |
| 13 | * (at your option) any later version. |
| 14 | * |
| 15 | * The Vermilion Range fb driver is distributed |
| 16 | * in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this driver; if not, write to the Free Software |
| 23 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 24 | * |
| 25 | * Authors: |
Marcin Garski | db955170 | 2007-10-19 23:22:11 +0200 | [diff] [blame^] | 26 | * Thomas Hellström <thomas-at-tungstengraphics-dot-com> |
| 27 | * Michel Dänzer <michel-at-tungstengraphics-dot-com> |
Alan Hourihane | dbe7e42 | 2007-05-08 00:39:25 -0700 | [diff] [blame] | 28 | * Alan Hourihane <alanh-at-tungstengraphics-dot-com> |
| 29 | */ |
| 30 | |
| 31 | #include <linux/module.h> |
| 32 | #include <linux/kernel.h> |
| 33 | #include <linux/errno.h> |
| 34 | #include <linux/string.h> |
| 35 | #include <linux/delay.h> |
| 36 | #include <linux/mm.h> |
| 37 | #include <linux/fb.h> |
| 38 | #include <linux/pci.h> |
| 39 | #include <asm/cacheflush.h> |
| 40 | #include <asm/tlbflush.h> |
| 41 | #include <linux/mmzone.h> |
Alan Hourihane | dbe7e42 | 2007-05-08 00:39:25 -0700 | [diff] [blame] | 42 | |
| 43 | /* #define VERMILION_DEBUG */ |
| 44 | |
| 45 | #include "vermilion.h" |
| 46 | |
| 47 | #define MODULE_NAME "vmlfb" |
| 48 | |
| 49 | #define VML_TOHW(_val, _width) ((((_val) << (_width)) + 0x7FFF - (_val)) >> 16) |
| 50 | |
| 51 | static struct mutex vml_mutex; |
| 52 | static struct list_head global_no_mode; |
| 53 | static struct list_head global_has_mode; |
| 54 | static struct fb_ops vmlfb_ops; |
| 55 | static struct vml_sys *subsys = NULL; |
| 56 | static char *vml_default_mode = "1024x768@60"; |
| 57 | static struct fb_videomode defaultmode = { |
| 58 | NULL, 60, 1024, 768, 12896, 144, 24, 29, 3, 136, 6, |
| 59 | 0, FB_VMODE_NONINTERLACED |
| 60 | }; |
| 61 | |
| 62 | static u32 vml_mem_requested = (10 * 1024 * 1024); |
| 63 | static u32 vml_mem_contig = (4 * 1024 * 1024); |
| 64 | static u32 vml_mem_min = (4 * 1024 * 1024); |
| 65 | |
| 66 | static u32 vml_clocks[] = { |
| 67 | 6750, |
| 68 | 13500, |
| 69 | 27000, |
| 70 | 29700, |
| 71 | 37125, |
| 72 | 54000, |
| 73 | 59400, |
| 74 | 74250, |
| 75 | 120000, |
| 76 | 148500 |
| 77 | }; |
| 78 | |
| 79 | static u32 vml_num_clocks = ARRAY_SIZE(vml_clocks); |
| 80 | |
| 81 | /* |
| 82 | * Allocate a contiguous vram area and make its linear kernel map |
| 83 | * uncached. |
| 84 | */ |
| 85 | |
| 86 | static int vmlfb_alloc_vram_area(struct vram_area *va, unsigned max_order, |
| 87 | unsigned min_order) |
| 88 | { |
| 89 | gfp_t flags; |
| 90 | unsigned long i; |
| 91 | pgprot_t wc_pageprot; |
| 92 | |
| 93 | wc_pageprot = PAGE_KERNEL_NOCACHE; |
| 94 | max_order++; |
| 95 | do { |
| 96 | /* |
| 97 | * Really try hard to get the needed memory. |
| 98 | * We need memory below the first 32MB, so we |
| 99 | * add the __GFP_DMA flag that guarantees that we are |
| 100 | * below the first 16MB. |
| 101 | */ |
| 102 | |
| 103 | flags = __GFP_DMA | __GFP_HIGH; |
| 104 | va->logical = |
| 105 | __get_free_pages(flags, --max_order); |
| 106 | } while (va->logical == 0 && max_order > min_order); |
| 107 | |
| 108 | if (!va->logical) |
| 109 | return -ENOMEM; |
| 110 | |
| 111 | va->phys = virt_to_phys((void *)va->logical); |
| 112 | va->size = PAGE_SIZE << max_order; |
| 113 | va->order = max_order; |
| 114 | |
| 115 | /* |
| 116 | * It seems like __get_free_pages only ups the usage count |
| 117 | * of the first page. This doesn't work with nopage mapping, so |
| 118 | * up the usage count once more. |
| 119 | */ |
| 120 | |
| 121 | memset((void *)va->logical, 0x00, va->size); |
| 122 | for (i = va->logical; i < va->logical + va->size; i += PAGE_SIZE) { |
| 123 | get_page(virt_to_page(i)); |
| 124 | } |
| 125 | |
| 126 | /* |
| 127 | * Change caching policy of the linear kernel map to avoid |
| 128 | * mapping type conflicts with user-space mappings. |
| 129 | * The first global_flush_tlb() is really only there to do a global |
| 130 | * wbinvd(). |
| 131 | */ |
| 132 | |
| 133 | global_flush_tlb(); |
| 134 | change_page_attr(virt_to_page(va->logical), va->size >> PAGE_SHIFT, |
| 135 | wc_pageprot); |
| 136 | global_flush_tlb(); |
| 137 | |
| 138 | printk(KERN_DEBUG MODULE_NAME |
| 139 | ": Allocated %ld bytes vram area at 0x%08lx\n", |
| 140 | va->size, va->phys); |
| 141 | |
| 142 | return 0; |
| 143 | } |
| 144 | |
| 145 | /* |
| 146 | * Free a contiguous vram area and reset its linear kernel map |
| 147 | * mapping type. |
| 148 | */ |
| 149 | |
| 150 | static void vmlfb_free_vram_area(struct vram_area *va) |
| 151 | { |
| 152 | unsigned long j; |
| 153 | |
| 154 | if (va->logical) { |
| 155 | |
| 156 | /* |
| 157 | * Reset the linear kernel map caching policy. |
| 158 | */ |
| 159 | |
| 160 | change_page_attr(virt_to_page(va->logical), |
| 161 | va->size >> PAGE_SHIFT, PAGE_KERNEL); |
| 162 | global_flush_tlb(); |
| 163 | |
| 164 | /* |
| 165 | * Decrease the usage count on the pages we've used |
| 166 | * to compensate for upping when allocating. |
| 167 | */ |
| 168 | |
| 169 | for (j = va->logical; j < va->logical + va->size; |
| 170 | j += PAGE_SIZE) { |
| 171 | (void)put_page_testzero(virt_to_page(j)); |
| 172 | } |
| 173 | |
| 174 | printk(KERN_DEBUG MODULE_NAME |
| 175 | ": Freeing %ld bytes vram area at 0x%08lx\n", |
| 176 | va->size, va->phys); |
| 177 | free_pages(va->logical, va->order); |
| 178 | |
| 179 | va->logical = 0; |
| 180 | } |
| 181 | } |
| 182 | |
| 183 | /* |
| 184 | * Free allocated vram. |
| 185 | */ |
| 186 | |
| 187 | static void vmlfb_free_vram(struct vml_info *vinfo) |
| 188 | { |
| 189 | int i; |
| 190 | |
| 191 | for (i = 0; i < vinfo->num_areas; ++i) { |
| 192 | vmlfb_free_vram_area(&vinfo->vram[i]); |
| 193 | } |
| 194 | vinfo->num_areas = 0; |
| 195 | } |
| 196 | |
| 197 | /* |
| 198 | * Allocate vram. Currently we try to allocate contiguous areas from the |
| 199 | * __GFP_DMA zone and puzzle them together. A better approach would be to |
| 200 | * allocate one contiguous area for scanout and use one-page allocations for |
| 201 | * offscreen areas. This requires user-space and GPU virtual mappings. |
| 202 | */ |
| 203 | |
| 204 | static int vmlfb_alloc_vram(struct vml_info *vinfo, |
| 205 | size_t requested, |
| 206 | size_t min_total, size_t min_contig) |
| 207 | { |
| 208 | int i, j; |
| 209 | int order; |
| 210 | int contiguous; |
| 211 | int err; |
| 212 | struct vram_area *va; |
| 213 | struct vram_area *va2; |
| 214 | |
| 215 | vinfo->num_areas = 0; |
| 216 | for (i = 0; i < VML_VRAM_AREAS; ++i) { |
| 217 | va = &vinfo->vram[i]; |
| 218 | order = 0; |
| 219 | |
| 220 | while (requested > (PAGE_SIZE << order) && order < MAX_ORDER) |
| 221 | order++; |
| 222 | |
| 223 | err = vmlfb_alloc_vram_area(va, order, 0); |
| 224 | |
| 225 | if (err) |
| 226 | break; |
| 227 | |
| 228 | if (i == 0) { |
| 229 | vinfo->vram_start = va->phys; |
| 230 | vinfo->vram_logical = (void __iomem *) va->logical; |
| 231 | vinfo->vram_contig_size = va->size; |
| 232 | vinfo->num_areas = 1; |
| 233 | } else { |
| 234 | contiguous = 0; |
| 235 | |
| 236 | for (j = 0; j < i; ++j) { |
| 237 | va2 = &vinfo->vram[j]; |
| 238 | if (va->phys + va->size == va2->phys || |
| 239 | va2->phys + va2->size == va->phys) { |
| 240 | contiguous = 1; |
| 241 | break; |
| 242 | } |
| 243 | } |
| 244 | |
| 245 | if (contiguous) { |
| 246 | vinfo->num_areas++; |
| 247 | if (va->phys < vinfo->vram_start) { |
| 248 | vinfo->vram_start = va->phys; |
| 249 | vinfo->vram_logical = |
| 250 | (void __iomem *)va->logical; |
| 251 | } |
| 252 | vinfo->vram_contig_size += va->size; |
| 253 | } else { |
| 254 | vmlfb_free_vram_area(va); |
| 255 | break; |
| 256 | } |
| 257 | } |
| 258 | |
| 259 | if (requested < va->size) |
| 260 | break; |
| 261 | else |
| 262 | requested -= va->size; |
| 263 | } |
| 264 | |
| 265 | if (vinfo->vram_contig_size > min_total && |
| 266 | vinfo->vram_contig_size > min_contig) { |
| 267 | |
| 268 | printk(KERN_DEBUG MODULE_NAME |
| 269 | ": Contiguous vram: %ld bytes at physical 0x%08lx.\n", |
| 270 | (unsigned long)vinfo->vram_contig_size, |
| 271 | (unsigned long)vinfo->vram_start); |
| 272 | |
| 273 | return 0; |
| 274 | } |
| 275 | |
| 276 | printk(KERN_ERR MODULE_NAME |
| 277 | ": Could not allocate requested minimal amount of vram.\n"); |
| 278 | |
| 279 | vmlfb_free_vram(vinfo); |
| 280 | |
| 281 | return -ENOMEM; |
| 282 | } |
| 283 | |
| 284 | /* |
| 285 | * Find the GPU to use with our display controller. |
| 286 | */ |
| 287 | |
| 288 | static int vmlfb_get_gpu(struct vml_par *par) |
| 289 | { |
| 290 | mutex_lock(&vml_mutex); |
| 291 | |
| 292 | par->gpu = pci_get_device(PCI_VENDOR_ID_INTEL, VML_DEVICE_GPU, NULL); |
| 293 | |
| 294 | if (!par->gpu) { |
| 295 | mutex_unlock(&vml_mutex); |
| 296 | return -ENODEV; |
| 297 | } |
| 298 | |
| 299 | mutex_unlock(&vml_mutex); |
| 300 | |
| 301 | if (pci_enable_device(par->gpu) < 0) |
| 302 | return -ENODEV; |
| 303 | |
| 304 | return 0; |
| 305 | } |
| 306 | |
| 307 | /* |
| 308 | * Find a contiguous vram area that contains a given offset from vram start. |
| 309 | */ |
| 310 | static int vmlfb_vram_offset(struct vml_info *vinfo, unsigned long offset) |
| 311 | { |
| 312 | unsigned long aoffset; |
| 313 | unsigned i; |
| 314 | |
| 315 | for (i = 0; i < vinfo->num_areas; ++i) { |
| 316 | aoffset = offset - (vinfo->vram[i].phys - vinfo->vram_start); |
| 317 | |
| 318 | if (aoffset < vinfo->vram[i].size) { |
| 319 | return 0; |
| 320 | } |
| 321 | } |
| 322 | |
| 323 | return -EINVAL; |
| 324 | } |
| 325 | |
| 326 | /* |
| 327 | * Remap the MMIO register spaces of the VDC and the GPU. |
| 328 | */ |
| 329 | |
| 330 | static int vmlfb_enable_mmio(struct vml_par *par) |
| 331 | { |
| 332 | int err; |
| 333 | |
| 334 | par->vdc_mem_base = pci_resource_start(par->vdc, 0); |
| 335 | par->vdc_mem_size = pci_resource_len(par->vdc, 0); |
| 336 | if (!request_mem_region(par->vdc_mem_base, par->vdc_mem_size, "vmlfb")) { |
| 337 | printk(KERN_ERR MODULE_NAME |
| 338 | ": Could not claim display controller MMIO.\n"); |
| 339 | return -EBUSY; |
| 340 | } |
| 341 | par->vdc_mem = ioremap_nocache(par->vdc_mem_base, par->vdc_mem_size); |
| 342 | if (par->vdc_mem == NULL) { |
| 343 | printk(KERN_ERR MODULE_NAME |
| 344 | ": Could not map display controller MMIO.\n"); |
| 345 | err = -ENOMEM; |
| 346 | goto out_err_0; |
| 347 | } |
| 348 | |
| 349 | par->gpu_mem_base = pci_resource_start(par->gpu, 0); |
| 350 | par->gpu_mem_size = pci_resource_len(par->gpu, 0); |
| 351 | if (!request_mem_region(par->gpu_mem_base, par->gpu_mem_size, "vmlfb")) { |
| 352 | printk(KERN_ERR MODULE_NAME ": Could not claim GPU MMIO.\n"); |
| 353 | err = -EBUSY; |
| 354 | goto out_err_1; |
| 355 | } |
| 356 | par->gpu_mem = ioremap_nocache(par->gpu_mem_base, par->gpu_mem_size); |
| 357 | if (par->gpu_mem == NULL) { |
| 358 | printk(KERN_ERR MODULE_NAME ": Could not map GPU MMIO.\n"); |
| 359 | err = -ENOMEM; |
| 360 | goto out_err_2; |
| 361 | } |
| 362 | |
| 363 | return 0; |
| 364 | |
| 365 | out_err_2: |
| 366 | release_mem_region(par->gpu_mem_base, par->gpu_mem_size); |
| 367 | out_err_1: |
| 368 | iounmap(par->vdc_mem); |
| 369 | out_err_0: |
| 370 | release_mem_region(par->vdc_mem_base, par->vdc_mem_size); |
| 371 | return err; |
| 372 | } |
| 373 | |
| 374 | /* |
| 375 | * Unmap the VDC and GPU register spaces. |
| 376 | */ |
| 377 | |
| 378 | static void vmlfb_disable_mmio(struct vml_par *par) |
| 379 | { |
| 380 | iounmap(par->gpu_mem); |
| 381 | release_mem_region(par->gpu_mem_base, par->gpu_mem_size); |
| 382 | iounmap(par->vdc_mem); |
| 383 | release_mem_region(par->vdc_mem_base, par->vdc_mem_size); |
| 384 | } |
| 385 | |
| 386 | /* |
| 387 | * Release and uninit the VDC and GPU. |
| 388 | */ |
| 389 | |
| 390 | static void vmlfb_release_devices(struct vml_par *par) |
| 391 | { |
| 392 | if (atomic_dec_and_test(&par->refcount)) { |
| 393 | pci_set_drvdata(par->vdc, NULL); |
| 394 | pci_disable_device(par->gpu); |
| 395 | pci_disable_device(par->vdc); |
| 396 | } |
| 397 | } |
| 398 | |
| 399 | /* |
| 400 | * Free up allocated resources for a device. |
| 401 | */ |
| 402 | |
| 403 | static void __devexit vml_pci_remove(struct pci_dev *dev) |
| 404 | { |
| 405 | struct fb_info *info; |
| 406 | struct vml_info *vinfo; |
| 407 | struct vml_par *par; |
| 408 | |
| 409 | info = pci_get_drvdata(dev); |
| 410 | if (info) { |
| 411 | vinfo = container_of(info, struct vml_info, info); |
| 412 | par = vinfo->par; |
| 413 | mutex_lock(&vml_mutex); |
| 414 | unregister_framebuffer(info); |
| 415 | fb_dealloc_cmap(&info->cmap); |
| 416 | vmlfb_free_vram(vinfo); |
| 417 | vmlfb_disable_mmio(par); |
| 418 | vmlfb_release_devices(par); |
| 419 | kfree(vinfo); |
| 420 | kfree(par); |
| 421 | mutex_unlock(&vml_mutex); |
| 422 | } |
| 423 | } |
| 424 | |
| 425 | static void vmlfb_set_pref_pixel_format(struct fb_var_screeninfo *var) |
| 426 | { |
| 427 | switch (var->bits_per_pixel) { |
| 428 | case 16: |
| 429 | var->blue.offset = 0; |
| 430 | var->blue.length = 5; |
| 431 | var->green.offset = 5; |
| 432 | var->green.length = 5; |
| 433 | var->red.offset = 10; |
| 434 | var->red.length = 5; |
| 435 | var->transp.offset = 15; |
| 436 | var->transp.length = 1; |
| 437 | break; |
| 438 | case 32: |
| 439 | var->blue.offset = 0; |
| 440 | var->blue.length = 8; |
| 441 | var->green.offset = 8; |
| 442 | var->green.length = 8; |
| 443 | var->red.offset = 16; |
| 444 | var->red.length = 8; |
| 445 | var->transp.offset = 24; |
| 446 | var->transp.length = 0; |
| 447 | break; |
| 448 | default: |
| 449 | break; |
| 450 | } |
| 451 | |
| 452 | var->blue.msb_right = var->green.msb_right = |
| 453 | var->red.msb_right = var->transp.msb_right = 0; |
| 454 | } |
| 455 | |
| 456 | /* |
| 457 | * Device initialization. |
| 458 | * We initialize one vml_par struct per device and one vml_info |
| 459 | * struct per pipe. Currently we have only one pipe. |
| 460 | */ |
| 461 | |
| 462 | static int __devinit vml_pci_probe(struct pci_dev *dev, |
| 463 | const struct pci_device_id *id) |
| 464 | { |
| 465 | struct vml_info *vinfo; |
| 466 | struct fb_info *info; |
| 467 | struct vml_par *par; |
| 468 | int err = 0; |
| 469 | |
| 470 | par = kzalloc(sizeof(*par), GFP_KERNEL); |
| 471 | if (par == NULL) |
| 472 | return -ENOMEM; |
| 473 | |
| 474 | vinfo = kzalloc(sizeof(*vinfo), GFP_KERNEL); |
| 475 | if (vinfo == NULL) { |
| 476 | err = -ENOMEM; |
| 477 | goto out_err_0; |
| 478 | } |
| 479 | |
| 480 | vinfo->par = par; |
| 481 | par->vdc = dev; |
| 482 | atomic_set(&par->refcount, 1); |
| 483 | |
| 484 | switch (id->device) { |
| 485 | case VML_DEVICE_VDC: |
| 486 | if ((err = vmlfb_get_gpu(par))) |
| 487 | goto out_err_1; |
| 488 | pci_set_drvdata(dev, &vinfo->info); |
| 489 | break; |
| 490 | default: |
| 491 | err = -ENODEV; |
| 492 | goto out_err_1; |
| 493 | break; |
| 494 | } |
| 495 | |
| 496 | info = &vinfo->info; |
| 497 | info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK; |
| 498 | |
| 499 | err = vmlfb_enable_mmio(par); |
| 500 | if (err) |
| 501 | goto out_err_2; |
| 502 | |
| 503 | err = vmlfb_alloc_vram(vinfo, vml_mem_requested, |
| 504 | vml_mem_contig, vml_mem_min); |
| 505 | if (err) |
| 506 | goto out_err_3; |
| 507 | |
| 508 | strcpy(info->fix.id, "Vermilion Range"); |
| 509 | info->fix.mmio_start = 0; |
| 510 | info->fix.mmio_len = 0; |
| 511 | info->fix.smem_start = vinfo->vram_start; |
| 512 | info->fix.smem_len = vinfo->vram_contig_size; |
| 513 | info->fix.type = FB_TYPE_PACKED_PIXELS; |
| 514 | info->fix.visual = FB_VISUAL_TRUECOLOR; |
| 515 | info->fix.ypanstep = 1; |
| 516 | info->fix.xpanstep = 1; |
| 517 | info->fix.ywrapstep = 0; |
| 518 | info->fix.accel = FB_ACCEL_NONE; |
| 519 | info->screen_base = vinfo->vram_logical; |
| 520 | info->pseudo_palette = vinfo->pseudo_palette; |
| 521 | info->par = par; |
| 522 | info->fbops = &vmlfb_ops; |
| 523 | info->device = &dev->dev; |
| 524 | |
| 525 | INIT_LIST_HEAD(&vinfo->head); |
| 526 | vinfo->pipe_disabled = 1; |
| 527 | vinfo->cur_blank_mode = FB_BLANK_UNBLANK; |
| 528 | |
| 529 | info->var.grayscale = 0; |
| 530 | info->var.bits_per_pixel = 16; |
| 531 | vmlfb_set_pref_pixel_format(&info->var); |
| 532 | |
| 533 | if (!fb_find_mode |
| 534 | (&info->var, info, vml_default_mode, NULL, 0, &defaultmode, 16)) { |
| 535 | printk(KERN_ERR MODULE_NAME ": Could not find initial mode\n"); |
| 536 | } |
| 537 | |
| 538 | if (fb_alloc_cmap(&info->cmap, 256, 1) < 0) { |
| 539 | err = -ENOMEM; |
| 540 | goto out_err_4; |
| 541 | } |
| 542 | |
| 543 | err = register_framebuffer(info); |
| 544 | if (err) { |
| 545 | printk(KERN_ERR MODULE_NAME ": Register framebuffer error.\n"); |
| 546 | goto out_err_5; |
| 547 | } |
| 548 | |
| 549 | printk("Initialized vmlfb\n"); |
| 550 | |
| 551 | return 0; |
| 552 | |
| 553 | out_err_5: |
| 554 | fb_dealloc_cmap(&info->cmap); |
| 555 | out_err_4: |
| 556 | vmlfb_free_vram(vinfo); |
| 557 | out_err_3: |
| 558 | vmlfb_disable_mmio(par); |
| 559 | out_err_2: |
| 560 | vmlfb_release_devices(par); |
| 561 | out_err_1: |
| 562 | kfree(vinfo); |
| 563 | out_err_0: |
| 564 | kfree(par); |
| 565 | return err; |
| 566 | } |
| 567 | |
| 568 | static int vmlfb_open(struct fb_info *info, int user) |
| 569 | { |
| 570 | /* |
| 571 | * Save registers here? |
| 572 | */ |
| 573 | return 0; |
| 574 | } |
| 575 | |
| 576 | static int vmlfb_release(struct fb_info *info, int user) |
| 577 | { |
| 578 | /* |
| 579 | * Restore registers here. |
| 580 | */ |
| 581 | |
| 582 | return 0; |
| 583 | } |
| 584 | |
| 585 | static int vml_nearest_clock(int clock) |
| 586 | { |
| 587 | |
| 588 | int i; |
| 589 | int cur_index; |
| 590 | int cur_diff; |
| 591 | int diff; |
| 592 | |
| 593 | cur_index = 0; |
| 594 | cur_diff = clock - vml_clocks[0]; |
| 595 | cur_diff = (cur_diff < 0) ? -cur_diff : cur_diff; |
| 596 | for (i = 1; i < vml_num_clocks; ++i) { |
| 597 | diff = clock - vml_clocks[i]; |
| 598 | diff = (diff < 0) ? -diff : diff; |
| 599 | if (diff < cur_diff) { |
| 600 | cur_index = i; |
| 601 | cur_diff = diff; |
| 602 | } |
| 603 | } |
| 604 | return vml_clocks[cur_index]; |
| 605 | } |
| 606 | |
| 607 | static int vmlfb_check_var_locked(struct fb_var_screeninfo *var, |
| 608 | struct vml_info *vinfo) |
| 609 | { |
| 610 | u32 pitch; |
| 611 | u64 mem; |
| 612 | int nearest_clock; |
| 613 | int clock; |
| 614 | int clock_diff; |
| 615 | struct fb_var_screeninfo v; |
| 616 | |
| 617 | v = *var; |
| 618 | clock = PICOS2KHZ(var->pixclock); |
| 619 | |
| 620 | if (subsys && subsys->nearest_clock) { |
| 621 | nearest_clock = subsys->nearest_clock(subsys, clock); |
| 622 | } else { |
| 623 | nearest_clock = vml_nearest_clock(clock); |
| 624 | } |
| 625 | |
| 626 | /* |
| 627 | * Accept a 20% diff. |
| 628 | */ |
| 629 | |
| 630 | clock_diff = nearest_clock - clock; |
| 631 | clock_diff = (clock_diff < 0) ? -clock_diff : clock_diff; |
| 632 | if (clock_diff > clock / 5) { |
| 633 | #if 0 |
| 634 | printk(KERN_DEBUG MODULE_NAME ": Diff failure. %d %d\n",clock_diff,clock); |
| 635 | #endif |
| 636 | return -EINVAL; |
| 637 | } |
| 638 | |
| 639 | v.pixclock = KHZ2PICOS(nearest_clock); |
| 640 | |
| 641 | if (var->xres > VML_MAX_XRES || var->yres > VML_MAX_YRES) { |
| 642 | printk(KERN_DEBUG MODULE_NAME ": Resolution failure.\n"); |
| 643 | return -EINVAL; |
| 644 | } |
| 645 | if (var->xres_virtual > VML_MAX_XRES_VIRTUAL) { |
| 646 | printk(KERN_DEBUG MODULE_NAME |
| 647 | ": Virtual resolution failure.\n"); |
| 648 | return -EINVAL; |
| 649 | } |
| 650 | switch (v.bits_per_pixel) { |
| 651 | case 0 ... 16: |
| 652 | v.bits_per_pixel = 16; |
| 653 | break; |
| 654 | case 17 ... 32: |
| 655 | v.bits_per_pixel = 32; |
| 656 | break; |
| 657 | default: |
| 658 | printk(KERN_DEBUG MODULE_NAME ": Invalid bpp: %d.\n", |
| 659 | var->bits_per_pixel); |
| 660 | return -EINVAL; |
| 661 | } |
| 662 | |
| 663 | pitch = __ALIGN_MASK((var->xres * var->bits_per_pixel) >> 3, 0x3F); |
| 664 | mem = pitch * var->yres_virtual; |
| 665 | if (mem > vinfo->vram_contig_size) { |
| 666 | return -ENOMEM; |
| 667 | } |
| 668 | |
| 669 | switch (v.bits_per_pixel) { |
| 670 | case 16: |
| 671 | if (var->blue.offset != 0 || |
| 672 | var->blue.length != 5 || |
| 673 | var->green.offset != 5 || |
| 674 | var->green.length != 5 || |
| 675 | var->red.offset != 10 || |
| 676 | var->red.length != 5 || |
| 677 | var->transp.offset != 15 || var->transp.length != 1) { |
| 678 | vmlfb_set_pref_pixel_format(&v); |
| 679 | } |
| 680 | break; |
| 681 | case 32: |
| 682 | if (var->blue.offset != 0 || |
| 683 | var->blue.length != 8 || |
| 684 | var->green.offset != 8 || |
| 685 | var->green.length != 8 || |
| 686 | var->red.offset != 16 || |
| 687 | var->red.length != 8 || |
| 688 | (var->transp.length != 0 && var->transp.length != 8) || |
| 689 | (var->transp.length == 8 && var->transp.offset != 24)) { |
| 690 | vmlfb_set_pref_pixel_format(&v); |
| 691 | } |
| 692 | break; |
| 693 | default: |
| 694 | return -EINVAL; |
| 695 | } |
| 696 | |
| 697 | *var = v; |
| 698 | |
| 699 | return 0; |
| 700 | } |
| 701 | |
| 702 | static int vmlfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
| 703 | { |
| 704 | struct vml_info *vinfo = container_of(info, struct vml_info, info); |
| 705 | int ret; |
| 706 | |
| 707 | mutex_lock(&vml_mutex); |
| 708 | ret = vmlfb_check_var_locked(var, vinfo); |
| 709 | mutex_unlock(&vml_mutex); |
| 710 | |
| 711 | return ret; |
| 712 | } |
| 713 | |
| 714 | static void vml_wait_vblank(struct vml_info *vinfo) |
| 715 | { |
| 716 | /* Wait for vblank. For now, just wait for a 50Hz cycle (20ms)) */ |
| 717 | mdelay(20); |
| 718 | } |
| 719 | |
| 720 | static void vmlfb_disable_pipe(struct vml_info *vinfo) |
| 721 | { |
| 722 | struct vml_par *par = vinfo->par; |
| 723 | |
| 724 | /* Disable the MDVO pad */ |
| 725 | VML_WRITE32(par, VML_RCOMPSTAT, 0); |
| 726 | while (!(VML_READ32(par, VML_RCOMPSTAT) & VML_MDVO_VDC_I_RCOMP)) ; |
| 727 | |
| 728 | /* Disable display planes */ |
| 729 | VML_WRITE32(par, VML_DSPCCNTR, |
| 730 | VML_READ32(par, VML_DSPCCNTR) & ~VML_GFX_ENABLE); |
| 731 | (void)VML_READ32(par, VML_DSPCCNTR); |
| 732 | /* Wait for vblank for the disable to take effect */ |
| 733 | vml_wait_vblank(vinfo); |
| 734 | |
| 735 | /* Next, disable display pipes */ |
| 736 | VML_WRITE32(par, VML_PIPEACONF, 0); |
| 737 | (void)VML_READ32(par, VML_PIPEACONF); |
| 738 | |
| 739 | vinfo->pipe_disabled = 1; |
| 740 | } |
| 741 | |
| 742 | #ifdef VERMILION_DEBUG |
| 743 | static void vml_dump_regs(struct vml_info *vinfo) |
| 744 | { |
| 745 | struct vml_par *par = vinfo->par; |
| 746 | |
| 747 | printk(KERN_DEBUG MODULE_NAME ": Modesetting register dump:\n"); |
| 748 | printk(KERN_DEBUG MODULE_NAME ": \tHTOTAL_A : 0x%08x\n", |
| 749 | (unsigned)VML_READ32(par, VML_HTOTAL_A)); |
| 750 | printk(KERN_DEBUG MODULE_NAME ": \tHBLANK_A : 0x%08x\n", |
| 751 | (unsigned)VML_READ32(par, VML_HBLANK_A)); |
| 752 | printk(KERN_DEBUG MODULE_NAME ": \tHSYNC_A : 0x%08x\n", |
| 753 | (unsigned)VML_READ32(par, VML_HSYNC_A)); |
| 754 | printk(KERN_DEBUG MODULE_NAME ": \tVTOTAL_A : 0x%08x\n", |
| 755 | (unsigned)VML_READ32(par, VML_VTOTAL_A)); |
| 756 | printk(KERN_DEBUG MODULE_NAME ": \tVBLANK_A : 0x%08x\n", |
| 757 | (unsigned)VML_READ32(par, VML_VBLANK_A)); |
| 758 | printk(KERN_DEBUG MODULE_NAME ": \tVSYNC_A : 0x%08x\n", |
| 759 | (unsigned)VML_READ32(par, VML_VSYNC_A)); |
| 760 | printk(KERN_DEBUG MODULE_NAME ": \tDSPCSTRIDE : 0x%08x\n", |
| 761 | (unsigned)VML_READ32(par, VML_DSPCSTRIDE)); |
| 762 | printk(KERN_DEBUG MODULE_NAME ": \tDSPCSIZE : 0x%08x\n", |
| 763 | (unsigned)VML_READ32(par, VML_DSPCSIZE)); |
| 764 | printk(KERN_DEBUG MODULE_NAME ": \tDSPCPOS : 0x%08x\n", |
| 765 | (unsigned)VML_READ32(par, VML_DSPCPOS)); |
| 766 | printk(KERN_DEBUG MODULE_NAME ": \tDSPARB : 0x%08x\n", |
| 767 | (unsigned)VML_READ32(par, VML_DSPARB)); |
| 768 | printk(KERN_DEBUG MODULE_NAME ": \tDSPCADDR : 0x%08x\n", |
| 769 | (unsigned)VML_READ32(par, VML_DSPCADDR)); |
| 770 | printk(KERN_DEBUG MODULE_NAME ": \tBCLRPAT_A : 0x%08x\n", |
| 771 | (unsigned)VML_READ32(par, VML_BCLRPAT_A)); |
| 772 | printk(KERN_DEBUG MODULE_NAME ": \tCANVSCLR_A : 0x%08x\n", |
| 773 | (unsigned)VML_READ32(par, VML_CANVSCLR_A)); |
| 774 | printk(KERN_DEBUG MODULE_NAME ": \tPIPEASRC : 0x%08x\n", |
| 775 | (unsigned)VML_READ32(par, VML_PIPEASRC)); |
| 776 | printk(KERN_DEBUG MODULE_NAME ": \tPIPEACONF : 0x%08x\n", |
| 777 | (unsigned)VML_READ32(par, VML_PIPEACONF)); |
| 778 | printk(KERN_DEBUG MODULE_NAME ": \tDSPCCNTR : 0x%08x\n", |
| 779 | (unsigned)VML_READ32(par, VML_DSPCCNTR)); |
| 780 | printk(KERN_DEBUG MODULE_NAME ": \tRCOMPSTAT : 0x%08x\n", |
| 781 | (unsigned)VML_READ32(par, VML_RCOMPSTAT)); |
| 782 | printk(KERN_DEBUG MODULE_NAME ": End of modesetting register dump.\n"); |
| 783 | } |
| 784 | #endif |
| 785 | |
| 786 | static int vmlfb_set_par_locked(struct vml_info *vinfo) |
| 787 | { |
| 788 | struct vml_par *par = vinfo->par; |
| 789 | struct fb_info *info = &vinfo->info; |
| 790 | struct fb_var_screeninfo *var = &info->var; |
| 791 | u32 htotal, hactive, hblank_start, hblank_end, hsync_start, hsync_end; |
| 792 | u32 vtotal, vactive, vblank_start, vblank_end, vsync_start, vsync_end; |
| 793 | u32 dspcntr; |
| 794 | int clock; |
| 795 | |
| 796 | vinfo->bytes_per_pixel = var->bits_per_pixel >> 3; |
| 797 | vinfo->stride = |
| 798 | __ALIGN_MASK(var->xres_virtual * vinfo->bytes_per_pixel, 0x3F); |
| 799 | info->fix.line_length = vinfo->stride; |
| 800 | |
| 801 | if (!subsys) |
| 802 | return 0; |
| 803 | |
| 804 | htotal = |
| 805 | var->xres + var->right_margin + var->hsync_len + var->left_margin; |
| 806 | hactive = var->xres; |
| 807 | hblank_start = var->xres; |
| 808 | hblank_end = htotal; |
| 809 | hsync_start = hactive + var->right_margin; |
| 810 | hsync_end = hsync_start + var->hsync_len; |
| 811 | |
| 812 | vtotal = |
| 813 | var->yres + var->lower_margin + var->vsync_len + var->upper_margin; |
| 814 | vactive = var->yres; |
| 815 | vblank_start = var->yres; |
| 816 | vblank_end = vtotal; |
| 817 | vsync_start = vactive + var->lower_margin; |
| 818 | vsync_end = vsync_start + var->vsync_len; |
| 819 | |
| 820 | dspcntr = VML_GFX_ENABLE | VML_GFX_GAMMABYPASS; |
| 821 | clock = PICOS2KHZ(var->pixclock); |
| 822 | |
| 823 | if (subsys->nearest_clock) { |
| 824 | clock = subsys->nearest_clock(subsys, clock); |
| 825 | } else { |
| 826 | clock = vml_nearest_clock(clock); |
| 827 | } |
| 828 | printk(KERN_DEBUG MODULE_NAME |
| 829 | ": Set mode Hfreq : %d kHz, Vfreq : %d Hz.\n", clock / htotal, |
| 830 | ((clock / htotal) * 1000) / vtotal); |
| 831 | |
| 832 | switch (var->bits_per_pixel) { |
| 833 | case 16: |
| 834 | dspcntr |= VML_GFX_ARGB1555; |
| 835 | break; |
| 836 | case 32: |
| 837 | if (var->transp.length == 8) |
| 838 | dspcntr |= VML_GFX_ARGB8888 | VML_GFX_ALPHAMULT; |
| 839 | else |
| 840 | dspcntr |= VML_GFX_RGB0888; |
| 841 | break; |
| 842 | default: |
| 843 | return -EINVAL; |
| 844 | } |
| 845 | |
| 846 | vmlfb_disable_pipe(vinfo); |
| 847 | mb(); |
| 848 | |
| 849 | if (subsys->set_clock) |
| 850 | subsys->set_clock(subsys, clock); |
| 851 | else |
| 852 | return -EINVAL; |
| 853 | |
| 854 | VML_WRITE32(par, VML_HTOTAL_A, ((htotal - 1) << 16) | (hactive - 1)); |
| 855 | VML_WRITE32(par, VML_HBLANK_A, |
| 856 | ((hblank_end - 1) << 16) | (hblank_start - 1)); |
| 857 | VML_WRITE32(par, VML_HSYNC_A, |
| 858 | ((hsync_end - 1) << 16) | (hsync_start - 1)); |
| 859 | VML_WRITE32(par, VML_VTOTAL_A, ((vtotal - 1) << 16) | (vactive - 1)); |
| 860 | VML_WRITE32(par, VML_VBLANK_A, |
| 861 | ((vblank_end - 1) << 16) | (vblank_start - 1)); |
| 862 | VML_WRITE32(par, VML_VSYNC_A, |
| 863 | ((vsync_end - 1) << 16) | (vsync_start - 1)); |
| 864 | VML_WRITE32(par, VML_DSPCSTRIDE, vinfo->stride); |
| 865 | VML_WRITE32(par, VML_DSPCSIZE, |
| 866 | ((var->yres - 1) << 16) | (var->xres - 1)); |
| 867 | VML_WRITE32(par, VML_DSPCPOS, 0x00000000); |
| 868 | VML_WRITE32(par, VML_DSPARB, VML_FIFO_DEFAULT); |
| 869 | VML_WRITE32(par, VML_BCLRPAT_A, 0x00000000); |
| 870 | VML_WRITE32(par, VML_CANVSCLR_A, 0x00000000); |
| 871 | VML_WRITE32(par, VML_PIPEASRC, |
| 872 | ((var->xres - 1) << 16) | (var->yres - 1)); |
| 873 | |
| 874 | wmb(); |
| 875 | VML_WRITE32(par, VML_PIPEACONF, VML_PIPE_ENABLE); |
| 876 | wmb(); |
| 877 | VML_WRITE32(par, VML_DSPCCNTR, dspcntr); |
| 878 | wmb(); |
| 879 | VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start + |
| 880 | var->yoffset * vinfo->stride + |
| 881 | var->xoffset * vinfo->bytes_per_pixel); |
| 882 | |
| 883 | VML_WRITE32(par, VML_RCOMPSTAT, VML_MDVO_PAD_ENABLE); |
| 884 | |
| 885 | while (!(VML_READ32(par, VML_RCOMPSTAT) & |
| 886 | (VML_MDVO_VDC_I_RCOMP | VML_MDVO_PAD_ENABLE))) ; |
| 887 | |
| 888 | vinfo->pipe_disabled = 0; |
| 889 | #ifdef VERMILION_DEBUG |
| 890 | vml_dump_regs(vinfo); |
| 891 | #endif |
| 892 | |
| 893 | return 0; |
| 894 | } |
| 895 | |
| 896 | static int vmlfb_set_par(struct fb_info *info) |
| 897 | { |
| 898 | struct vml_info *vinfo = container_of(info, struct vml_info, info); |
| 899 | int ret; |
| 900 | |
| 901 | mutex_lock(&vml_mutex); |
| 902 | list_del(&vinfo->head); |
| 903 | list_add(&vinfo->head, (subsys) ? &global_has_mode : &global_no_mode); |
| 904 | ret = vmlfb_set_par_locked(vinfo); |
| 905 | |
| 906 | mutex_unlock(&vml_mutex); |
| 907 | return ret; |
| 908 | } |
| 909 | |
| 910 | static int vmlfb_blank_locked(struct vml_info *vinfo) |
| 911 | { |
| 912 | struct vml_par *par = vinfo->par; |
| 913 | u32 cur = VML_READ32(par, VML_PIPEACONF); |
| 914 | |
| 915 | switch (vinfo->cur_blank_mode) { |
| 916 | case FB_BLANK_UNBLANK: |
| 917 | if (vinfo->pipe_disabled) { |
| 918 | vmlfb_set_par_locked(vinfo); |
| 919 | } |
| 920 | VML_WRITE32(par, VML_PIPEACONF, cur & ~VML_PIPE_FORCE_BORDER); |
| 921 | (void)VML_READ32(par, VML_PIPEACONF); |
| 922 | break; |
| 923 | case FB_BLANK_NORMAL: |
| 924 | if (vinfo->pipe_disabled) { |
| 925 | vmlfb_set_par_locked(vinfo); |
| 926 | } |
| 927 | VML_WRITE32(par, VML_PIPEACONF, cur | VML_PIPE_FORCE_BORDER); |
| 928 | (void)VML_READ32(par, VML_PIPEACONF); |
| 929 | break; |
| 930 | case FB_BLANK_VSYNC_SUSPEND: |
| 931 | case FB_BLANK_HSYNC_SUSPEND: |
| 932 | if (!vinfo->pipe_disabled) { |
| 933 | vmlfb_disable_pipe(vinfo); |
| 934 | } |
| 935 | break; |
| 936 | case FB_BLANK_POWERDOWN: |
| 937 | if (!vinfo->pipe_disabled) { |
| 938 | vmlfb_disable_pipe(vinfo); |
| 939 | } |
| 940 | break; |
| 941 | default: |
| 942 | return -EINVAL; |
| 943 | } |
| 944 | |
| 945 | return 0; |
| 946 | } |
| 947 | |
| 948 | static int vmlfb_blank(int blank_mode, struct fb_info *info) |
| 949 | { |
| 950 | struct vml_info *vinfo = container_of(info, struct vml_info, info); |
| 951 | int ret; |
| 952 | |
| 953 | mutex_lock(&vml_mutex); |
| 954 | vinfo->cur_blank_mode = blank_mode; |
| 955 | ret = vmlfb_blank_locked(vinfo); |
| 956 | mutex_unlock(&vml_mutex); |
| 957 | return ret; |
| 958 | } |
| 959 | |
| 960 | static int vmlfb_pan_display(struct fb_var_screeninfo *var, |
| 961 | struct fb_info *info) |
| 962 | { |
| 963 | struct vml_info *vinfo = container_of(info, struct vml_info, info); |
| 964 | struct vml_par *par = vinfo->par; |
| 965 | |
| 966 | mutex_lock(&vml_mutex); |
| 967 | VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start + |
| 968 | var->yoffset * vinfo->stride + |
| 969 | var->xoffset * vinfo->bytes_per_pixel); |
| 970 | (void)VML_READ32(par, VML_DSPCADDR); |
| 971 | mutex_unlock(&vml_mutex); |
| 972 | |
| 973 | return 0; |
| 974 | } |
| 975 | |
| 976 | static int vmlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
| 977 | u_int transp, struct fb_info *info) |
| 978 | { |
| 979 | u32 v; |
| 980 | |
| 981 | if (regno >= 16) |
| 982 | return -EINVAL; |
| 983 | |
| 984 | if (info->var.grayscale) { |
| 985 | red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8; |
| 986 | } |
| 987 | |
| 988 | if (info->fix.visual != FB_VISUAL_TRUECOLOR) |
| 989 | return -EINVAL; |
| 990 | |
| 991 | red = VML_TOHW(red, info->var.red.length); |
| 992 | blue = VML_TOHW(blue, info->var.blue.length); |
| 993 | green = VML_TOHW(green, info->var.green.length); |
| 994 | transp = VML_TOHW(transp, info->var.transp.length); |
| 995 | |
| 996 | v = (red << info->var.red.offset) | |
| 997 | (green << info->var.green.offset) | |
| 998 | (blue << info->var.blue.offset) | |
| 999 | (transp << info->var.transp.offset); |
| 1000 | |
| 1001 | switch (info->var.bits_per_pixel) { |
| 1002 | case 16: |
| 1003 | ((u32 *) info->pseudo_palette)[regno] = v; |
| 1004 | break; |
| 1005 | case 24: |
| 1006 | case 32: |
| 1007 | ((u32 *) info->pseudo_palette)[regno] = v; |
| 1008 | break; |
| 1009 | } |
| 1010 | return 0; |
| 1011 | } |
| 1012 | |
| 1013 | static int vmlfb_mmap(struct fb_info *info, struct vm_area_struct *vma) |
| 1014 | { |
| 1015 | struct vml_info *vinfo = container_of(info, struct vml_info, info); |
| 1016 | unsigned long size = vma->vm_end - vma->vm_start; |
| 1017 | unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; |
| 1018 | int ret; |
| 1019 | |
| 1020 | if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) |
| 1021 | return -EINVAL; |
| 1022 | if (offset + size > vinfo->vram_contig_size) |
| 1023 | return -EINVAL; |
| 1024 | ret = vmlfb_vram_offset(vinfo, offset); |
| 1025 | if (ret) |
| 1026 | return -EINVAL; |
| 1027 | offset += vinfo->vram_start; |
| 1028 | pgprot_val(vma->vm_page_prot) |= _PAGE_PCD; |
| 1029 | pgprot_val(vma->vm_page_prot) &= ~_PAGE_PWT; |
| 1030 | vma->vm_flags |= VM_RESERVED | VM_IO; |
| 1031 | if (remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT, |
| 1032 | size, vma->vm_page_prot)) |
| 1033 | return -EAGAIN; |
| 1034 | return 0; |
| 1035 | } |
| 1036 | |
| 1037 | static int vmlfb_sync(struct fb_info *info) |
| 1038 | { |
| 1039 | return 0; |
| 1040 | } |
| 1041 | |
| 1042 | static int vmlfb_cursor(struct fb_info *info, struct fb_cursor *cursor) |
| 1043 | { |
| 1044 | return -EINVAL; /* just to force soft_cursor() call */ |
| 1045 | } |
| 1046 | |
| 1047 | static struct fb_ops vmlfb_ops = { |
| 1048 | .owner = THIS_MODULE, |
| 1049 | .fb_open = vmlfb_open, |
| 1050 | .fb_release = vmlfb_release, |
| 1051 | .fb_check_var = vmlfb_check_var, |
| 1052 | .fb_set_par = vmlfb_set_par, |
| 1053 | .fb_blank = vmlfb_blank, |
| 1054 | .fb_pan_display = vmlfb_pan_display, |
| 1055 | .fb_fillrect = cfb_fillrect, |
| 1056 | .fb_copyarea = cfb_copyarea, |
| 1057 | .fb_imageblit = cfb_imageblit, |
| 1058 | .fb_cursor = vmlfb_cursor, |
| 1059 | .fb_sync = vmlfb_sync, |
| 1060 | .fb_mmap = vmlfb_mmap, |
| 1061 | .fb_setcolreg = vmlfb_setcolreg |
| 1062 | }; |
| 1063 | |
| 1064 | static struct pci_device_id vml_ids[] = { |
| 1065 | {PCI_DEVICE(PCI_VENDOR_ID_INTEL, VML_DEVICE_VDC)}, |
| 1066 | {0} |
| 1067 | }; |
| 1068 | |
| 1069 | static struct pci_driver vmlfb_pci_driver = { |
| 1070 | .name = "vmlfb", |
| 1071 | .id_table = vml_ids, |
| 1072 | .probe = vml_pci_probe, |
| 1073 | .remove = __devexit_p(vml_pci_remove) |
| 1074 | }; |
| 1075 | |
| 1076 | static void __exit vmlfb_cleanup(void) |
| 1077 | { |
| 1078 | pci_unregister_driver(&vmlfb_pci_driver); |
| 1079 | } |
| 1080 | |
| 1081 | static int __init vmlfb_init(void) |
| 1082 | { |
| 1083 | |
| 1084 | #ifndef MODULE |
| 1085 | char *option = NULL; |
| 1086 | |
| 1087 | if (fb_get_options(MODULE_NAME, &option)) |
| 1088 | return -ENODEV; |
| 1089 | #endif |
| 1090 | |
| 1091 | printk(KERN_DEBUG MODULE_NAME ": initializing\n"); |
| 1092 | mutex_init(&vml_mutex); |
| 1093 | INIT_LIST_HEAD(&global_no_mode); |
| 1094 | INIT_LIST_HEAD(&global_has_mode); |
| 1095 | |
| 1096 | return pci_register_driver(&vmlfb_pci_driver); |
| 1097 | } |
| 1098 | |
| 1099 | int vmlfb_register_subsys(struct vml_sys *sys) |
| 1100 | { |
| 1101 | struct vml_info *entry; |
| 1102 | struct list_head *list; |
| 1103 | u32 save_activate; |
| 1104 | |
| 1105 | mutex_lock(&vml_mutex); |
| 1106 | if (subsys != NULL) { |
| 1107 | subsys->restore(subsys); |
| 1108 | } |
| 1109 | subsys = sys; |
| 1110 | subsys->save(subsys); |
| 1111 | |
| 1112 | /* |
| 1113 | * We need to restart list traversal for each item, since we |
| 1114 | * release the list mutex in the loop. |
| 1115 | */ |
| 1116 | |
| 1117 | list = global_no_mode.next; |
| 1118 | while (list != &global_no_mode) { |
| 1119 | list_del_init(list); |
| 1120 | entry = list_entry(list, struct vml_info, head); |
| 1121 | |
| 1122 | /* |
| 1123 | * First, try the current mode which might not be |
| 1124 | * completely validated with respect to the pixel clock. |
| 1125 | */ |
| 1126 | |
| 1127 | if (!vmlfb_check_var_locked(&entry->info.var, entry)) { |
| 1128 | vmlfb_set_par_locked(entry); |
| 1129 | list_add_tail(list, &global_has_mode); |
| 1130 | } else { |
| 1131 | |
| 1132 | /* |
| 1133 | * Didn't work. Try to find another mode, |
| 1134 | * that matches this subsys. |
| 1135 | */ |
| 1136 | |
| 1137 | mutex_unlock(&vml_mutex); |
| 1138 | save_activate = entry->info.var.activate; |
| 1139 | entry->info.var.bits_per_pixel = 16; |
| 1140 | vmlfb_set_pref_pixel_format(&entry->info.var); |
| 1141 | if (fb_find_mode(&entry->info.var, |
| 1142 | &entry->info, |
| 1143 | vml_default_mode, NULL, 0, NULL, 16)) { |
| 1144 | entry->info.var.activate |= |
| 1145 | FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW; |
| 1146 | fb_set_var(&entry->info, &entry->info.var); |
| 1147 | } else { |
| 1148 | printk(KERN_ERR MODULE_NAME |
| 1149 | ": Sorry. no mode found for this subsys.\n"); |
| 1150 | } |
| 1151 | entry->info.var.activate = save_activate; |
| 1152 | mutex_lock(&vml_mutex); |
| 1153 | } |
| 1154 | vmlfb_blank_locked(entry); |
| 1155 | list = global_no_mode.next; |
| 1156 | } |
| 1157 | mutex_unlock(&vml_mutex); |
| 1158 | |
| 1159 | printk(KERN_DEBUG MODULE_NAME ": Registered %s subsystem.\n", |
| 1160 | subsys->name ? subsys->name : "unknown"); |
| 1161 | return 0; |
| 1162 | } |
| 1163 | |
| 1164 | EXPORT_SYMBOL_GPL(vmlfb_register_subsys); |
| 1165 | |
| 1166 | void vmlfb_unregister_subsys(struct vml_sys *sys) |
| 1167 | { |
| 1168 | struct vml_info *entry, *next; |
| 1169 | |
| 1170 | mutex_lock(&vml_mutex); |
| 1171 | if (subsys != sys) { |
| 1172 | mutex_unlock(&vml_mutex); |
| 1173 | return; |
| 1174 | } |
| 1175 | subsys->restore(subsys); |
| 1176 | subsys = NULL; |
| 1177 | list_for_each_entry_safe(entry, next, &global_has_mode, head) { |
| 1178 | printk(KERN_DEBUG MODULE_NAME ": subsys disable pipe\n"); |
| 1179 | vmlfb_disable_pipe(entry); |
| 1180 | list_del(&entry->head); |
| 1181 | list_add_tail(&entry->head, &global_no_mode); |
| 1182 | } |
| 1183 | mutex_unlock(&vml_mutex); |
| 1184 | } |
| 1185 | |
| 1186 | EXPORT_SYMBOL_GPL(vmlfb_unregister_subsys); |
| 1187 | |
| 1188 | module_init(vmlfb_init); |
| 1189 | module_exit(vmlfb_cleanup); |
| 1190 | |
| 1191 | MODULE_AUTHOR("Tungsten Graphics"); |
| 1192 | MODULE_DESCRIPTION("Initialization of the Vermilion display devices"); |
| 1193 | MODULE_VERSION("1.0.0"); |
| 1194 | MODULE_LICENSE("GPL"); |