blob: 30fe2078a547249fac4859851520063fe8dce0d1 [file] [log] [blame]
Thierry Reding72323982014-07-11 13:19:06 +02001/*
2 * Copyright (C) 2014 NVIDIA Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __SOC_TEGRA_PM_H__
10#define __SOC_TEGRA_PM_H__
11
12enum tegra_suspend_mode {
13 TEGRA_SUSPEND_NONE = 0,
14 TEGRA_SUSPEND_LP2, /* CPU voltage off */
15 TEGRA_SUSPEND_LP1, /* CPU voltage off, DRAM self-refresh */
16 TEGRA_SUSPEND_LP0, /* CPU + core voltage off, DRAM self-refresh */
17 TEGRA_MAX_SUSPEND_MODE,
18};
19
20#ifdef CONFIG_PM_SLEEP
21enum tegra_suspend_mode
22tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode);
23
24/* low-level resume entry point */
25void tegra_resume(void);
26#else
27static inline enum tegra_suspend_mode
28tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode)
29{
30 return TEGRA_SUSPEND_NONE;
31}
32
33static inline void tegra_resume(void)
34{
35}
36#endif /* CONFIG_PM_SLEEP */
37
38#endif /* __SOC_TEGRA_PM_H__ */