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Lennert Buytenhek2e5f0322008-10-07 13:45:18 +00001/*
Lennert Buytenhek076d3e12009-03-20 09:50:39 +00002 * net/dsa/mv88e6131.c - Marvell 88e6095/6095f/6131 switch chip support
3 * Copyright (c) 2008-2009 Marvell Semiconductor
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
Barry Grussling19b2f972013-01-08 16:05:54 +000011#include <linux/delay.h>
12#include <linux/jiffies.h>
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000013#include <linux/list.h>
Paul Gortmaker2bbba272012-01-24 10:41:40 +000014#include <linux/module.h>
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000015#include <linux/netdevice.h>
16#include <linux/phy.h>
Ben Hutchingsc8f0b862011-11-27 17:06:08 +000017#include <net/dsa.h>
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000018#include "mv88e6xxx.h"
19
Alexander Duyckb4d23942014-09-15 13:00:27 -040020static char *mv88e6131_probe(struct device *host_dev, int sw_addr)
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000021{
Alexander Duyckb4d23942014-09-15 13:00:27 -040022 struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000023 int ret;
24
Alexander Duyckb4d23942014-09-15 13:00:27 -040025 if (bus == NULL)
26 return NULL;
27
Andrew Lunncca8b132015-04-02 04:06:39 +020028 ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), PORT_SWITCH_ID);
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000029 if (ret >= 0) {
Guenter Roecka93e4642014-10-29 10:44:55 -070030 int ret_masked = ret & 0xfff0;
31
Andrew Lunncca8b132015-04-02 04:06:39 +020032 if (ret_masked == PORT_SWITCH_ID_6085)
Peter Korsgaardec80bfc2011-04-05 03:03:56 +000033 return "Marvell 88E6085";
Andrew Lunncca8b132015-04-02 04:06:39 +020034 if (ret_masked == PORT_SWITCH_ID_6095)
Lennert Buytenhek076d3e12009-03-20 09:50:39 +000035 return "Marvell 88E6095/88E6095F";
Andrew Lunncca8b132015-04-02 04:06:39 +020036 if (ret == PORT_SWITCH_ID_6131_B2)
Guenter Roecka93e4642014-10-29 10:44:55 -070037 return "Marvell 88E6131 (B2)";
Andrew Lunncca8b132015-04-02 04:06:39 +020038 if (ret_masked == PORT_SWITCH_ID_6131)
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000039 return "Marvell 88E6131";
40 }
41
42 return NULL;
43}
44
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000045static int mv88e6131_setup_global(struct dsa_switch *ds)
46{
47 int ret;
Andrew Lunn54d792f2015-05-06 01:09:47 +020048
49 ret = mv88e6xxx_setup_global(ds);
50 if (ret)
51 return ret;
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000052
Barry Grussling3675c8d2013-01-08 16:05:53 +000053 /* Enable the PHY polling unit, don't discard packets with
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000054 * excessive collisions, use a weighted fair queueing scheme
55 * to arbitrate between packet queues, set the maximum frame
56 * size to 1632, and mask all interrupt sources.
57 */
58 REG_WRITE(REG_GLOBAL, 0x04, 0x4400);
59
Barry Grussling3675c8d2013-01-08 16:05:53 +000060 /* Set the VLAN ethertype to 0x8100. */
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000061 REG_WRITE(REG_GLOBAL, 0x19, 0x8100);
62
Barry Grussling3675c8d2013-01-08 16:05:53 +000063 /* Disable ARP mirroring, and configure the upstream port as
Lennert Buytenheke84665c2009-03-20 09:52:09 +000064 * the port to which ingress and egress monitor frames are to
65 * be sent.
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000066 */
Lennert Buytenheke84665c2009-03-20 09:52:09 +000067 REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1100) | 0x00f0);
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000068
Barry Grussling3675c8d2013-01-08 16:05:53 +000069 /* Disable cascade port functionality unless this device
Barry Grussling81399ec2011-06-24 19:53:51 +000070 * is used in a cascade configuration, and set the switch's
Lennert Buytenheke84665c2009-03-20 09:52:09 +000071 * DSA device number.
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000072 */
Barry Grussling81399ec2011-06-24 19:53:51 +000073 if (ds->dst->pd->nr_chips > 1)
74 REG_WRITE(REG_GLOBAL, 0x1c, 0xf000 | (ds->index & 0x1f));
75 else
76 REG_WRITE(REG_GLOBAL, 0x1c, 0xe000 | (ds->index & 0x1f));
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000077
Barry Grussling3675c8d2013-01-08 16:05:53 +000078 /* Force the priority of IGMP/MLD snoop frames and ARP frames
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000079 * to the highest setting.
80 */
81 REG_WRITE(REG_GLOBAL2, 0x0f, 0x00ff);
82
83 return 0;
84}
85
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000086static int mv88e6131_setup(struct dsa_switch *ds)
87{
Guenter Roeckd1988932015-04-02 04:06:31 +020088 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000089 int i;
90 int ret;
91
Guenter Roeck0d65da42015-04-02 04:06:29 +020092 ret = mv88e6xxx_setup_common(ds);
93 if (ret < 0)
94 return ret;
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000095
Guenter Roeck0d65da42015-04-02 04:06:29 +020096 mv88e6xxx_ppu_state_init(ds);
Peter Korsgaardec80bfc2011-04-05 03:03:56 +000097
Guenter Roeckd1988932015-04-02 04:06:31 +020098 switch (ps->id) {
Andrew Lunncca8b132015-04-02 04:06:39 +020099 case PORT_SWITCH_ID_6085:
Guenter Roeckd1988932015-04-02 04:06:31 +0200100 ps->num_ports = 10;
101 break;
Andrew Lunncca8b132015-04-02 04:06:39 +0200102 case PORT_SWITCH_ID_6095:
Guenter Roeckd1988932015-04-02 04:06:31 +0200103 ps->num_ports = 11;
104 break;
Andrew Lunncca8b132015-04-02 04:06:39 +0200105 case PORT_SWITCH_ID_6131:
106 case PORT_SWITCH_ID_6131_B2:
Guenter Roeckd1988932015-04-02 04:06:31 +0200107 ps->num_ports = 8;
108 break;
109 default:
110 return -ENODEV;
111 }
112
Andrew Lunn143a8302015-04-02 04:06:34 +0200113 ret = mv88e6xxx_switch_reset(ds, false);
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +0000114 if (ret < 0)
115 return ret;
116
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +0000117 ret = mv88e6131_setup_global(ds);
118 if (ret < 0)
119 return ret;
120
Guenter Roeckd1988932015-04-02 04:06:31 +0200121 for (i = 0; i < ps->num_ports; i++) {
Andrew Lunn54d792f2015-05-06 01:09:47 +0200122 ret = mv88e6xxx_setup_port(ds, i);
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +0000123 if (ret < 0)
124 return ret;
125 }
126
127 return 0;
128}
129
Guenter Roeckd1988932015-04-02 04:06:31 +0200130static int mv88e6131_port_to_phy_addr(struct dsa_switch *ds, int port)
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +0000131{
Guenter Roeckd1988932015-04-02 04:06:31 +0200132 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
133
134 if (port >= 0 && port < ps->num_ports)
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +0000135 return port;
Guenter Roeckd1988932015-04-02 04:06:31 +0200136
137 return -EINVAL;
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +0000138}
139
140static int
141mv88e6131_phy_read(struct dsa_switch *ds, int port, int regnum)
142{
Guenter Roeckd1988932015-04-02 04:06:31 +0200143 int addr = mv88e6131_port_to_phy_addr(ds, port);
144
145 if (addr < 0)
146 return addr;
147
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +0000148 return mv88e6xxx_phy_read_ppu(ds, addr, regnum);
149}
150
151static int
152mv88e6131_phy_write(struct dsa_switch *ds,
153 int port, int regnum, u16 val)
154{
Guenter Roeckd1988932015-04-02 04:06:31 +0200155 int addr = mv88e6131_port_to_phy_addr(ds, port);
156
157 if (addr < 0)
158 return addr;
159
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +0000160 return mv88e6xxx_phy_write_ppu(ds, addr, regnum, val);
161}
162
Ben Hutchings98e67302011-11-25 14:36:19 +0000163struct dsa_switch_driver mv88e6131_switch_driver = {
Florian Fainelliac7a04c2014-09-11 21:18:09 -0700164 .tag_protocol = DSA_TAG_PROTO_DSA,
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +0000165 .priv_size = sizeof(struct mv88e6xxx_priv_state),
166 .probe = mv88e6131_probe,
167 .setup = mv88e6131_setup,
168 .set_addr = mv88e6xxx_set_addr_direct,
169 .phy_read = mv88e6131_phy_read,
170 .phy_write = mv88e6131_phy_write,
171 .poll_link = mv88e6xxx_poll_link,
Andrew Lunne413e7e2015-04-02 04:06:38 +0200172 .get_strings = mv88e6xxx_get_strings,
173 .get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
174 .get_sset_count = mv88e6xxx_get_sset_count,
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +0000175};
Ben Hutchings3d825ed2011-11-25 14:37:16 +0000176
177MODULE_ALIAS("platform:mv88e6085");
178MODULE_ALIAS("platform:mv88e6095");
179MODULE_ALIAS("platform:mv88e6095f");
180MODULE_ALIAS("platform:mv88e6131");