Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*- |
| 2 | */ |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 3 | /* |
Dave Airlie | bc54fd1 | 2005-06-23 22:46:46 +1000 | [diff] [blame] | 4 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
| 6 | * All Rights Reserved. |
Dave Airlie | bc54fd1 | 2005-06-23 22:46:46 +1000 | [diff] [blame] | 7 | * |
| 8 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 9 | * copy of this software and associated documentation files (the |
| 10 | * "Software"), to deal in the Software without restriction, including |
| 11 | * without limitation the rights to use, copy, modify, merge, publish, |
| 12 | * distribute, sub license, and/or sell copies of the Software, and to |
| 13 | * permit persons to whom the Software is furnished to do so, subject to |
| 14 | * the following conditions: |
| 15 | * |
| 16 | * The above copyright notice and this permission notice (including the |
| 17 | * next paragraph) shall be included in all copies or substantial portions |
| 18 | * of the Software. |
| 19 | * |
| 20 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| 21 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 22 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
| 23 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
| 24 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 25 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 26 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 27 | * |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 28 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
Jesse Barnes | 5669fca | 2009-02-17 15:13:31 -0800 | [diff] [blame] | 30 | #include <linux/device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | #include "drmP.h" |
| 32 | #include "drm.h" |
| 33 | #include "i915_drm.h" |
| 34 | #include "i915_drv.h" |
Kenneth Graunke | f49f058 | 2010-09-11 01:19:14 -0700 | [diff] [blame] | 35 | #include "intel_drv.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 37 | #include <linux/console.h> |
Zhao Yakui | 354ff96 | 2009-07-08 14:13:12 +0800 | [diff] [blame] | 38 | #include "drm_crtc_helper.h" |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 39 | |
Kyle McMartin | d6073d7 | 2009-05-26 12:27:34 -0400 | [diff] [blame] | 40 | static int i915_modeset = -1; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 41 | module_param_named(modeset, i915_modeset, int, 0400); |
| 42 | |
| 43 | unsigned int i915_fbpercrtc = 0; |
| 44 | module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | |
Jesse Barnes | 652c393 | 2009-08-17 13:31:43 -0700 | [diff] [blame] | 46 | unsigned int i915_powersave = 1; |
| 47 | module_param_named(powersave, i915_powersave, int, 0400); |
| 48 | |
Jesse Barnes | 3381434 | 2010-01-14 20:48:02 +0000 | [diff] [blame] | 49 | unsigned int i915_lvds_downclock = 0; |
| 50 | module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400); |
| 51 | |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 52 | static struct drm_driver driver; |
Zhenyu Wang | 1f7a6e3 | 2010-02-23 14:05:24 +0800 | [diff] [blame] | 53 | extern int intel_agp_enabled; |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 54 | |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 55 | #define INTEL_VGA_DEVICE(id, info) { \ |
Kristian Høgsberg | 49ae35f | 2009-12-16 15:16:15 -0500 | [diff] [blame] | 56 | .class = PCI_CLASS_DISPLAY_VGA << 8, \ |
| 57 | .class_mask = 0xffff00, \ |
| 58 | .vendor = 0x8086, \ |
| 59 | .device = id, \ |
| 60 | .subvendor = PCI_ANY_ID, \ |
| 61 | .subdevice = PCI_ANY_ID, \ |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 62 | .driver_data = (unsigned long) info } |
Kristian Høgsberg | 49ae35f | 2009-12-16 15:16:15 -0500 | [diff] [blame] | 63 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 64 | static const struct intel_device_info intel_i830_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 65 | .gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 66 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 67 | }; |
| 68 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 69 | static const struct intel_device_info intel_845g_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 70 | .gen = 2, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 71 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 72 | }; |
| 73 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 74 | static const struct intel_device_info intel_i85x_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 75 | .gen = 2, .is_i85x = 1, .is_mobile = 1, |
Adam Jackson | 5ce8ba7 | 2010-04-15 14:03:30 -0400 | [diff] [blame] | 76 | .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 77 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 78 | }; |
| 79 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 80 | static const struct intel_device_info intel_i865g_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 81 | .gen = 2, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 82 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 83 | }; |
| 84 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 85 | static const struct intel_device_info intel_i915g_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 86 | .gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 87 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 88 | }; |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 89 | static const struct intel_device_info intel_i915gm_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 90 | .gen = 3, .is_mobile = 1, |
Kristian Høgsberg | b295d1b | 2009-12-16 15:16:17 -0500 | [diff] [blame] | 91 | .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 92 | .has_overlay = 1, .overlay_needs_physical = 1, |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 93 | .supports_tv = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 94 | }; |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 95 | static const struct intel_device_info intel_i945g_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 96 | .gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 97 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 98 | }; |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 99 | static const struct intel_device_info intel_i945gm_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 100 | .gen = 3, .is_i945gm = 1, .is_mobile = 1, |
Kristian Høgsberg | b295d1b | 2009-12-16 15:16:17 -0500 | [diff] [blame] | 101 | .has_hotplug = 1, .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 102 | .has_overlay = 1, .overlay_needs_physical = 1, |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 103 | .supports_tv = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 104 | }; |
| 105 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 106 | static const struct intel_device_info intel_i965g_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 107 | .gen = 4, .is_broadwater = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 108 | .has_hotplug = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 109 | .has_overlay = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 110 | }; |
| 111 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 112 | static const struct intel_device_info intel_i965gm_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 113 | .gen = 4, .is_crestline = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 114 | .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 115 | .has_overlay = 1, |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 116 | .supports_tv = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 117 | }; |
| 118 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 119 | static const struct intel_device_info intel_g33_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 120 | .gen = 3, .is_g33 = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 121 | .need_gfx_hws = 1, .has_hotplug = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 122 | .has_overlay = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 123 | }; |
| 124 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 125 | static const struct intel_device_info intel_g45_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 126 | .gen = 4, .is_g4x = 1, .need_gfx_hws = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 127 | .has_pipe_cxsr = 1, .has_hotplug = 1, |
Xiang, Haihao | 92f49d9 | 2010-09-16 10:43:10 +0800 | [diff] [blame] | 128 | .has_bsd_ring = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 129 | }; |
| 130 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 131 | static const struct intel_device_info intel_gm45_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 132 | .gen = 4, .is_g4x = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 133 | .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 134 | .has_pipe_cxsr = 1, .has_hotplug = 1, |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 135 | .supports_tv = 1, |
Xiang, Haihao | 92f49d9 | 2010-09-16 10:43:10 +0800 | [diff] [blame] | 136 | .has_bsd_ring = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 137 | }; |
| 138 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 139 | static const struct intel_device_info intel_pineview_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 140 | .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 141 | .need_gfx_hws = 1, .has_hotplug = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 142 | .has_overlay = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 143 | }; |
| 144 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 145 | static const struct intel_device_info intel_ironlake_d_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 146 | .gen = 5, .is_ironlake = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 147 | .need_gfx_hws = 1, .has_pipe_cxsr = 1, .has_hotplug = 1, |
Xiang, Haihao | 92f49d9 | 2010-09-16 10:43:10 +0800 | [diff] [blame] | 148 | .has_bsd_ring = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 149 | }; |
| 150 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 151 | static const struct intel_device_info intel_ironlake_m_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 152 | .gen = 5, .is_ironlake = 1, .is_mobile = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 153 | .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1, |
Xiang, Haihao | 92f49d9 | 2010-09-16 10:43:10 +0800 | [diff] [blame] | 154 | .has_bsd_ring = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 155 | }; |
| 156 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 157 | static const struct intel_device_info intel_sandybridge_d_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 158 | .gen = 6, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 159 | .need_gfx_hws = 1, .has_hotplug = 1, |
Xiang, Haihao | 881f47b | 2010-09-19 14:40:43 +0100 | [diff] [blame] | 160 | .has_bsd_ring = 1, |
Eric Anholt | f6e450a | 2009-11-02 12:08:22 -0800 | [diff] [blame] | 161 | }; |
| 162 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 163 | static const struct intel_device_info intel_sandybridge_m_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 164 | .gen = 6, .is_mobile = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 165 | .need_gfx_hws = 1, .has_hotplug = 1, |
Xiang, Haihao | 881f47b | 2010-09-19 14:40:43 +0100 | [diff] [blame] | 166 | .has_bsd_ring = 1, |
Eric Anholt | a13e409 | 2010-01-07 15:08:18 -0800 | [diff] [blame] | 167 | }; |
| 168 | |
Chris Wilson | 6103da0 | 2010-07-05 18:01:47 +0100 | [diff] [blame] | 169 | static const struct pci_device_id pciidlist[] = { /* aka */ |
| 170 | INTEL_VGA_DEVICE(0x3577, &intel_i830_info), /* I830_M */ |
| 171 | INTEL_VGA_DEVICE(0x2562, &intel_845g_info), /* 845_G */ |
| 172 | INTEL_VGA_DEVICE(0x3582, &intel_i85x_info), /* I855_GM */ |
Adam Jackson | 5ce8ba7 | 2010-04-15 14:03:30 -0400 | [diff] [blame] | 173 | INTEL_VGA_DEVICE(0x358e, &intel_i85x_info), |
Chris Wilson | 6103da0 | 2010-07-05 18:01:47 +0100 | [diff] [blame] | 174 | INTEL_VGA_DEVICE(0x2572, &intel_i865g_info), /* I865_G */ |
| 175 | INTEL_VGA_DEVICE(0x2582, &intel_i915g_info), /* I915_G */ |
| 176 | INTEL_VGA_DEVICE(0x258a, &intel_i915g_info), /* E7221_G */ |
| 177 | INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info), /* I915_GM */ |
| 178 | INTEL_VGA_DEVICE(0x2772, &intel_i945g_info), /* I945_G */ |
| 179 | INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info), /* I945_GM */ |
| 180 | INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info), /* I945_GME */ |
| 181 | INTEL_VGA_DEVICE(0x2972, &intel_i965g_info), /* I946_GZ */ |
| 182 | INTEL_VGA_DEVICE(0x2982, &intel_i965g_info), /* G35_G */ |
| 183 | INTEL_VGA_DEVICE(0x2992, &intel_i965g_info), /* I965_Q */ |
| 184 | INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info), /* I965_G */ |
| 185 | INTEL_VGA_DEVICE(0x29b2, &intel_g33_info), /* Q35_G */ |
| 186 | INTEL_VGA_DEVICE(0x29c2, &intel_g33_info), /* G33_G */ |
| 187 | INTEL_VGA_DEVICE(0x29d2, &intel_g33_info), /* Q33_G */ |
| 188 | INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info), /* I965_GM */ |
| 189 | INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info), /* I965_GME */ |
| 190 | INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info), /* GM45_G */ |
| 191 | INTEL_VGA_DEVICE(0x2e02, &intel_g45_info), /* IGD_E_G */ |
| 192 | INTEL_VGA_DEVICE(0x2e12, &intel_g45_info), /* Q45_G */ |
| 193 | INTEL_VGA_DEVICE(0x2e22, &intel_g45_info), /* G45_G */ |
| 194 | INTEL_VGA_DEVICE(0x2e32, &intel_g45_info), /* G41_G */ |
| 195 | INTEL_VGA_DEVICE(0x2e42, &intel_g45_info), /* B43_G */ |
Chris Wilson | 41a5142 | 2010-09-17 08:22:30 +0100 | [diff] [blame] | 196 | INTEL_VGA_DEVICE(0x2e92, &intel_g45_info), /* B43_G.1 */ |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 197 | INTEL_VGA_DEVICE(0xa001, &intel_pineview_info), |
| 198 | INTEL_VGA_DEVICE(0xa011, &intel_pineview_info), |
| 199 | INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info), |
| 200 | INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info), |
Eric Anholt | f6e450a | 2009-11-02 12:08:22 -0800 | [diff] [blame] | 201 | INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info), |
Zhenyu Wang | 8554048 | 2010-09-07 13:45:32 +0800 | [diff] [blame] | 202 | INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info), |
| 203 | INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info), |
Eric Anholt | a13e409 | 2010-01-07 15:08:18 -0800 | [diff] [blame] | 204 | INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info), |
Zhenyu Wang | 8554048 | 2010-09-07 13:45:32 +0800 | [diff] [blame] | 205 | INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info), |
Zhenyu Wang | 4fefe43 | 2010-08-19 09:46:16 +0800 | [diff] [blame] | 206 | INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info), |
Zhenyu Wang | 8554048 | 2010-09-07 13:45:32 +0800 | [diff] [blame] | 207 | INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info), |
Kristian Høgsberg | 49ae35f | 2009-12-16 15:16:15 -0500 | [diff] [blame] | 208 | {0, 0, 0} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 209 | }; |
| 210 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 211 | #if defined(CONFIG_DRM_I915_KMS) |
| 212 | MODULE_DEVICE_TABLE(pci, pciidlist); |
| 213 | #endif |
| 214 | |
Zhenyu Wang | 3bad078 | 2010-04-07 16:15:53 +0800 | [diff] [blame] | 215 | #define INTEL_PCH_DEVICE_ID_MASK 0xff00 |
| 216 | #define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00 |
| 217 | |
| 218 | void intel_detect_pch (struct drm_device *dev) |
| 219 | { |
| 220 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 221 | struct pci_dev *pch; |
| 222 | |
| 223 | /* |
| 224 | * The reason to probe ISA bridge instead of Dev31:Fun0 is to |
| 225 | * make graphics device passthrough work easy for VMM, that only |
| 226 | * need to expose ISA bridge to let driver know the real hardware |
| 227 | * underneath. This is a requirement from virtualization team. |
| 228 | */ |
| 229 | pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL); |
| 230 | if (pch) { |
| 231 | if (pch->vendor == PCI_VENDOR_ID_INTEL) { |
| 232 | int id; |
| 233 | id = pch->device & INTEL_PCH_DEVICE_ID_MASK; |
| 234 | |
| 235 | if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) { |
| 236 | dev_priv->pch_type = PCH_CPT; |
| 237 | DRM_DEBUG_KMS("Found CougarPoint PCH\n"); |
| 238 | } |
| 239 | } |
| 240 | pci_dev_put(pch); |
| 241 | } |
| 242 | } |
| 243 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 244 | static int i915_drm_freeze(struct drm_device *dev) |
| 245 | { |
Rafael J. Wysocki | 61caf87 | 2010-02-18 23:06:27 +0100 | [diff] [blame] | 246 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 247 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 248 | pci_save_state(dev->pdev); |
| 249 | |
| 250 | /* If KMS is active, we do the leavevt stuff here */ |
| 251 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
| 252 | int error = i915_gem_idle(dev); |
| 253 | if (error) { |
| 254 | dev_err(&dev->pdev->dev, |
| 255 | "GEM idle failed, resume might fail\n"); |
| 256 | return error; |
| 257 | } |
| 258 | drm_irq_uninstall(dev); |
| 259 | } |
| 260 | |
| 261 | i915_save_state(dev); |
| 262 | |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 263 | intel_opregion_fini(dev); |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 264 | |
| 265 | /* Modeset on resume, not lid events */ |
| 266 | dev_priv->modeset_on_lid = 0; |
Rafael J. Wysocki | 61caf87 | 2010-02-18 23:06:27 +0100 | [diff] [blame] | 267 | |
| 268 | return 0; |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 269 | } |
| 270 | |
Dave Airlie | 6a9ee8a | 2010-02-01 15:38:10 +1000 | [diff] [blame] | 271 | int i915_suspend(struct drm_device *dev, pm_message_t state) |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 272 | { |
| 273 | int error; |
| 274 | |
| 275 | if (!dev || !dev->dev_private) { |
| 276 | DRM_ERROR("dev: %p\n", dev); |
Keith Packard | 1ae8c0a | 2009-06-28 15:42:17 -0700 | [diff] [blame] | 277 | DRM_ERROR("DRM not initialized, aborting suspend.\n"); |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 278 | return -ENODEV; |
| 279 | } |
| 280 | |
Dave Airlie | b932ccb | 2008-02-20 10:02:20 +1000 | [diff] [blame] | 281 | if (state.event == PM_EVENT_PRETHAW) |
| 282 | return 0; |
| 283 | |
Chris Wilson | 6eecba3 | 2010-09-08 09:45:11 +0100 | [diff] [blame] | 284 | drm_kms_helper_poll_disable(dev); |
| 285 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 286 | error = i915_drm_freeze(dev); |
| 287 | if (error) |
| 288 | return error; |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 289 | |
Dave Airlie | b932ccb | 2008-02-20 10:02:20 +1000 | [diff] [blame] | 290 | if (state.event == PM_EVENT_SUSPEND) { |
| 291 | /* Shut down the device */ |
| 292 | pci_disable_device(dev->pdev); |
| 293 | pci_set_power_state(dev->pdev, PCI_D3hot); |
| 294 | } |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 295 | |
| 296 | return 0; |
| 297 | } |
| 298 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 299 | static int i915_drm_thaw(struct drm_device *dev) |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 300 | { |
Jesse Barnes | 5669fca | 2009-02-17 15:13:31 -0800 | [diff] [blame] | 301 | struct drm_i915_private *dev_priv = dev->dev_private; |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 302 | int error = 0; |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 303 | |
Rafael J. Wysocki | 61caf87 | 2010-02-18 23:06:27 +0100 | [diff] [blame] | 304 | i915_restore_state(dev); |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 305 | intel_opregion_setup(dev); |
Rafael J. Wysocki | 61caf87 | 2010-02-18 23:06:27 +0100 | [diff] [blame] | 306 | |
Jesse Barnes | 5669fca | 2009-02-17 15:13:31 -0800 | [diff] [blame] | 307 | /* KMS EnterVT equivalent */ |
| 308 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
| 309 | mutex_lock(&dev->struct_mutex); |
| 310 | dev_priv->mm.suspended = 0; |
| 311 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 312 | error = i915_gem_init_ringbuffer(dev); |
Jesse Barnes | 5669fca | 2009-02-17 15:13:31 -0800 | [diff] [blame] | 313 | mutex_unlock(&dev->struct_mutex); |
Jesse Barnes | 226485e | 2009-02-23 15:41:09 -0800 | [diff] [blame] | 314 | |
| 315 | drm_irq_install(dev); |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 316 | |
Zhao Yakui | 354ff96 | 2009-07-08 14:13:12 +0800 | [diff] [blame] | 317 | /* Resume the modeset for every activated CRTC */ |
| 318 | drm_helper_resume_force_mode(dev); |
| 319 | } |
Jesse Barnes | 5669fca | 2009-02-17 15:13:31 -0800 | [diff] [blame] | 320 | |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 321 | intel_opregion_init(dev); |
| 322 | |
Linus Torvalds | c9354c8 | 2009-11-02 09:29:55 -0800 | [diff] [blame] | 323 | dev_priv->modeset_on_lid = 0; |
Jesse Barnes | 06891e2 | 2009-09-14 10:58:48 -0700 | [diff] [blame] | 324 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 325 | return error; |
| 326 | } |
| 327 | |
Dave Airlie | 6a9ee8a | 2010-02-01 15:38:10 +1000 | [diff] [blame] | 328 | int i915_resume(struct drm_device *dev) |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 329 | { |
Chris Wilson | 6eecba3 | 2010-09-08 09:45:11 +0100 | [diff] [blame] | 330 | int ret; |
| 331 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 332 | if (pci_enable_device(dev->pdev)) |
| 333 | return -EIO; |
| 334 | |
| 335 | pci_set_master(dev->pdev); |
| 336 | |
Chris Wilson | 6eecba3 | 2010-09-08 09:45:11 +0100 | [diff] [blame] | 337 | ret = i915_drm_thaw(dev); |
| 338 | if (ret) |
| 339 | return ret; |
| 340 | |
| 341 | drm_kms_helper_poll_enable(dev); |
| 342 | return 0; |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 343 | } |
| 344 | |
Chris Wilson | dc96e9b | 2010-10-01 12:05:06 +0100 | [diff] [blame^] | 345 | static int i8xx_do_reset(struct drm_device *dev, u8 flags) |
| 346 | { |
| 347 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 348 | |
| 349 | if (IS_I85X(dev)) |
| 350 | return -ENODEV; |
| 351 | |
| 352 | I915_WRITE(D_STATE, I915_READ(D_STATE) | DSTATE_GFX_RESET_I830); |
| 353 | POSTING_READ(D_STATE); |
| 354 | |
| 355 | if (IS_I830(dev) || IS_845G(dev)) { |
| 356 | I915_WRITE(DEBUG_RESET_I830, |
| 357 | DEBUG_RESET_DISPLAY | |
| 358 | DEBUG_RESET_RENDER | |
| 359 | DEBUG_RESET_FULL); |
| 360 | POSTING_READ(DEBUG_RESET_I830); |
| 361 | msleep(1); |
| 362 | |
| 363 | I915_WRITE(DEBUG_RESET_I830, 0); |
| 364 | POSTING_READ(DEBUG_RESET_I830); |
| 365 | } |
| 366 | |
| 367 | msleep(1); |
| 368 | |
| 369 | I915_WRITE(D_STATE, I915_READ(D_STATE) & ~DSTATE_GFX_RESET_I830); |
| 370 | POSTING_READ(D_STATE); |
| 371 | |
| 372 | return 0; |
| 373 | } |
| 374 | |
Kenneth Graunke | f49f058 | 2010-09-11 01:19:14 -0700 | [diff] [blame] | 375 | static int i965_reset_complete(struct drm_device *dev) |
| 376 | { |
| 377 | u8 gdrst; |
Kenneth Graunke | eeccdca | 2010-09-11 01:24:50 -0700 | [diff] [blame] | 378 | pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst); |
Kenneth Graunke | f49f058 | 2010-09-11 01:19:14 -0700 | [diff] [blame] | 379 | return gdrst & 0x1; |
| 380 | } |
| 381 | |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 382 | static int i965_do_reset(struct drm_device *dev, u8 flags) |
| 383 | { |
| 384 | u8 gdrst; |
| 385 | |
| 386 | pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst); |
| 387 | pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | flags | 0x1); |
| 388 | |
| 389 | return wait_for(i965_reset_complete(dev), 500); |
| 390 | } |
| 391 | |
| 392 | static int ironlake_do_reset(struct drm_device *dev, u8 flags) |
| 393 | { |
| 394 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 395 | u32 gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR); |
| 396 | I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, gdrst | flags | 0x1); |
| 397 | return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); |
| 398 | } |
| 399 | |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 400 | /** |
| 401 | * i965_reset - reset chip after a hang |
| 402 | * @dev: drm device to reset |
| 403 | * @flags: reset domains |
| 404 | * |
| 405 | * Reset the chip. Useful if a hang is detected. Returns zero on successful |
| 406 | * reset or otherwise an error code. |
| 407 | * |
| 408 | * Procedure is fairly simple: |
| 409 | * - reset the chip using the reset reg |
| 410 | * - re-init context state |
| 411 | * - re-init hardware status page |
| 412 | * - re-init ring buffer |
| 413 | * - re-init interrupt state |
| 414 | * - re-init display |
| 415 | */ |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 416 | int i915_reset(struct drm_device *dev, u8 flags) |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 417 | { |
| 418 | drm_i915_private_t *dev_priv = dev->dev_private; |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 419 | /* |
| 420 | * We really should only reset the display subsystem if we actually |
| 421 | * need to |
| 422 | */ |
| 423 | bool need_display = true; |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 424 | int ret; |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 425 | |
| 426 | mutex_lock(&dev->struct_mutex); |
| 427 | |
Chris Wilson | 069efc1 | 2010-09-30 16:53:18 +0100 | [diff] [blame] | 428 | i915_gem_reset(dev); |
Chris Wilson | 77f0123 | 2010-09-19 12:31:36 +0100 | [diff] [blame] | 429 | |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 430 | /* |
Kenneth Graunke | f49f058 | 2010-09-11 01:19:14 -0700 | [diff] [blame] | 431 | * Set the domains we want to reset (GRDOM/bits 2 and 3) as |
| 432 | * well as the reset bit (GR/bit 0). Setting the GR bit |
| 433 | * triggers the reset; when done, the hardware will clear it. |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 434 | */ |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 435 | ret = -ENODEV; |
| 436 | switch (INTEL_INFO(dev)->gen) { |
| 437 | case 5: |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 438 | ret = ironlake_do_reset(dev, flags); |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 439 | break; |
| 440 | case 4: |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 441 | ret = i965_do_reset(dev, flags); |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 442 | break; |
Chris Wilson | dc96e9b | 2010-10-01 12:05:06 +0100 | [diff] [blame^] | 443 | case 2: |
| 444 | ret = i8xx_do_reset(dev, flags); |
| 445 | break; |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 446 | } |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 447 | if (ret) { |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 448 | DRM_ERROR("Failed to reset chip.\n"); |
Daniel J Blueman | f953c93 | 2010-05-17 14:23:52 +0100 | [diff] [blame] | 449 | mutex_unlock(&dev->struct_mutex); |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 450 | return ret; |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 451 | } |
| 452 | |
| 453 | /* Ok, now get things going again... */ |
| 454 | |
| 455 | /* |
| 456 | * Everything depends on having the GTT running, so we need to start |
| 457 | * there. Fortunately we don't need to do this unless we reset the |
| 458 | * chip at a PCI level. |
| 459 | * |
| 460 | * Next we need to restore the context, but we don't use those |
| 461 | * yet either... |
| 462 | * |
| 463 | * Ring buffer needs to be re-initialized in the KMS case, or if X |
| 464 | * was running at the time of the reset (i.e. we weren't VT |
| 465 | * switched away). |
| 466 | */ |
| 467 | if (drm_core_check_feature(dev, DRIVER_MODESET) || |
Zou Nan hai | 8187a2b | 2010-05-21 09:08:55 +0800 | [diff] [blame] | 468 | !dev_priv->mm.suspended) { |
| 469 | struct intel_ring_buffer *ring = &dev_priv->render_ring; |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 470 | dev_priv->mm.suspended = 0; |
Zou Nan hai | 8187a2b | 2010-05-21 09:08:55 +0800 | [diff] [blame] | 471 | ring->init(dev, ring); |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 472 | mutex_unlock(&dev->struct_mutex); |
| 473 | drm_irq_uninstall(dev); |
| 474 | drm_irq_install(dev); |
| 475 | mutex_lock(&dev->struct_mutex); |
| 476 | } |
| 477 | |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 478 | mutex_unlock(&dev->struct_mutex); |
Chris Wilson | 9fd9814 | 2010-09-18 08:08:06 +0100 | [diff] [blame] | 479 | |
| 480 | /* |
| 481 | * Perform a full modeset as on later generations, e.g. Ironlake, we may |
| 482 | * need to retrain the display link and cannot just restore the register |
| 483 | * values. |
| 484 | */ |
| 485 | if (need_display) { |
| 486 | mutex_lock(&dev->mode_config.mutex); |
| 487 | drm_helper_resume_force_mode(dev); |
| 488 | mutex_unlock(&dev->mode_config.mutex); |
| 489 | } |
| 490 | |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 491 | return 0; |
| 492 | } |
| 493 | |
| 494 | |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 495 | static int __devinit |
| 496 | i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
| 497 | { |
Jordan Crouse | dcdb167 | 2010-05-27 13:40:25 -0600 | [diff] [blame] | 498 | return drm_get_pci_dev(pdev, ent, &driver); |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 499 | } |
| 500 | |
| 501 | static void |
| 502 | i915_pci_remove(struct pci_dev *pdev) |
| 503 | { |
| 504 | struct drm_device *dev = pci_get_drvdata(pdev); |
| 505 | |
| 506 | drm_put_dev(dev); |
| 507 | } |
| 508 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 509 | static int i915_pm_suspend(struct device *dev) |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 510 | { |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 511 | struct pci_dev *pdev = to_pci_dev(dev); |
| 512 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
| 513 | int error; |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 514 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 515 | if (!drm_dev || !drm_dev->dev_private) { |
| 516 | dev_err(dev, "DRM not initialized, aborting suspend.\n"); |
| 517 | return -ENODEV; |
| 518 | } |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 519 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 520 | error = i915_drm_freeze(drm_dev); |
| 521 | if (error) |
| 522 | return error; |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 523 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 524 | pci_disable_device(pdev); |
| 525 | pci_set_power_state(pdev, PCI_D3hot); |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 526 | |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 527 | return 0; |
| 528 | } |
| 529 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 530 | static int i915_pm_resume(struct device *dev) |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 531 | { |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 532 | struct pci_dev *pdev = to_pci_dev(dev); |
| 533 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
| 534 | |
| 535 | return i915_resume(drm_dev); |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 536 | } |
| 537 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 538 | static int i915_pm_freeze(struct device *dev) |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 539 | { |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 540 | struct pci_dev *pdev = to_pci_dev(dev); |
| 541 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
| 542 | |
| 543 | if (!drm_dev || !drm_dev->dev_private) { |
| 544 | dev_err(dev, "DRM not initialized, aborting suspend.\n"); |
| 545 | return -ENODEV; |
| 546 | } |
| 547 | |
| 548 | return i915_drm_freeze(drm_dev); |
| 549 | } |
| 550 | |
| 551 | static int i915_pm_thaw(struct device *dev) |
| 552 | { |
| 553 | struct pci_dev *pdev = to_pci_dev(dev); |
| 554 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
| 555 | |
| 556 | return i915_drm_thaw(drm_dev); |
| 557 | } |
| 558 | |
| 559 | static int i915_pm_poweroff(struct device *dev) |
| 560 | { |
| 561 | struct pci_dev *pdev = to_pci_dev(dev); |
| 562 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 563 | |
Rafael J. Wysocki | 61caf87 | 2010-02-18 23:06:27 +0100 | [diff] [blame] | 564 | return i915_drm_freeze(drm_dev); |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 565 | } |
| 566 | |
Chris Wilson | b4b78d1 | 2010-06-06 15:40:20 +0100 | [diff] [blame] | 567 | static const struct dev_pm_ops i915_pm_ops = { |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 568 | .suspend = i915_pm_suspend, |
| 569 | .resume = i915_pm_resume, |
| 570 | .freeze = i915_pm_freeze, |
| 571 | .thaw = i915_pm_thaw, |
| 572 | .poweroff = i915_pm_poweroff, |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 573 | .restore = i915_pm_resume, |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 574 | }; |
| 575 | |
Jesse Barnes | de151cf | 2008-11-12 10:03:55 -0800 | [diff] [blame] | 576 | static struct vm_operations_struct i915_gem_vm_ops = { |
| 577 | .fault = i915_gem_fault, |
Jesse Barnes | ab00b3e | 2009-02-11 14:01:46 -0800 | [diff] [blame] | 578 | .open = drm_gem_vm_open, |
| 579 | .close = drm_gem_vm_close, |
Jesse Barnes | de151cf | 2008-11-12 10:03:55 -0800 | [diff] [blame] | 580 | }; |
| 581 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 582 | static struct drm_driver driver = { |
Dave Airlie | 792d2b9 | 2005-11-11 23:30:27 +1100 | [diff] [blame] | 583 | /* don't use mtrr's here, the Xserver or user space app should |
| 584 | * deal with them for intel hardware. |
| 585 | */ |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 586 | .driver_features = |
| 587 | DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/ |
| 588 | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM, |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 589 | .load = i915_driver_load, |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 590 | .unload = i915_driver_unload, |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 591 | .open = i915_driver_open, |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 592 | .lastclose = i915_driver_lastclose, |
| 593 | .preclose = i915_driver_preclose, |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 594 | .postclose = i915_driver_postclose, |
Rafael J. Wysocki | d8e2920 | 2010-01-09 00:45:33 +0100 | [diff] [blame] | 595 | |
| 596 | /* Used in place of i915_pm_ops for non-DRIVER_MODESET */ |
| 597 | .suspend = i915_suspend, |
| 598 | .resume = i915_resume, |
| 599 | |
Dave Airlie | cda1738 | 2005-07-10 17:31:26 +1000 | [diff] [blame] | 600 | .device_is_agp = i915_driver_device_is_agp, |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 601 | .enable_vblank = i915_enable_vblank, |
| 602 | .disable_vblank = i915_disable_vblank, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 603 | .irq_preinstall = i915_driver_irq_preinstall, |
| 604 | .irq_postinstall = i915_driver_irq_postinstall, |
| 605 | .irq_uninstall = i915_driver_irq_uninstall, |
| 606 | .irq_handler = i915_driver_irq_handler, |
| 607 | .reclaim_buffers = drm_core_reclaim_buffers, |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 608 | .master_create = i915_master_create, |
| 609 | .master_destroy = i915_master_destroy, |
Ben Gamari | 955b12d | 2009-02-17 20:08:49 -0500 | [diff] [blame] | 610 | #if defined(CONFIG_DEBUG_FS) |
Ben Gamari | 27c202a | 2009-07-01 22:26:52 -0400 | [diff] [blame] | 611 | .debugfs_init = i915_debugfs_init, |
| 612 | .debugfs_cleanup = i915_debugfs_cleanup, |
Ben Gamari | 955b12d | 2009-02-17 20:08:49 -0500 | [diff] [blame] | 613 | #endif |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 614 | .gem_init_object = i915_gem_init_object, |
| 615 | .gem_free_object = i915_gem_free_object, |
Jesse Barnes | de151cf | 2008-11-12 10:03:55 -0800 | [diff] [blame] | 616 | .gem_vm_ops = &i915_gem_vm_ops, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 617 | .ioctls = i915_ioctls, |
| 618 | .fops = { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 619 | .owner = THIS_MODULE, |
| 620 | .open = drm_open, |
| 621 | .release = drm_release, |
Arnd Bergmann | ed8b670 | 2009-12-16 22:17:09 +0000 | [diff] [blame] | 622 | .unlocked_ioctl = drm_ioctl, |
Jesse Barnes | de151cf | 2008-11-12 10:03:55 -0800 | [diff] [blame] | 623 | .mmap = drm_gem_mmap, |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 624 | .poll = drm_poll, |
| 625 | .fasync = drm_fasync, |
Kristian Høgsberg | c9a9c5e | 2009-09-12 04:33:34 +1000 | [diff] [blame] | 626 | .read = drm_read, |
Dave Airlie | 8ca7c1d | 2005-07-07 21:51:26 +1000 | [diff] [blame] | 627 | #ifdef CONFIG_COMPAT |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 628 | .compat_ioctl = i915_compat_ioctl, |
Dave Airlie | 8ca7c1d | 2005-07-07 21:51:26 +1000 | [diff] [blame] | 629 | #endif |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 630 | }, |
| 631 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 632 | .pci_driver = { |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 633 | .name = DRIVER_NAME, |
| 634 | .id_table = pciidlist, |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 635 | .probe = i915_pci_probe, |
| 636 | .remove = i915_pci_remove, |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 637 | .driver.pm = &i915_pm_ops, |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 638 | }, |
Dave Airlie | bc5f452 | 2007-11-05 12:50:58 +1000 | [diff] [blame] | 639 | |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 640 | .name = DRIVER_NAME, |
| 641 | .desc = DRIVER_DESC, |
| 642 | .date = DRIVER_DATE, |
| 643 | .major = DRIVER_MAJOR, |
| 644 | .minor = DRIVER_MINOR, |
| 645 | .patchlevel = DRIVER_PATCHLEVEL, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 646 | }; |
| 647 | |
| 648 | static int __init i915_init(void) |
| 649 | { |
Zhenyu Wang | 1f7a6e3 | 2010-02-23 14:05:24 +0800 | [diff] [blame] | 650 | if (!intel_agp_enabled) { |
| 651 | DRM_ERROR("drm/i915 can't work without intel_agp module!\n"); |
| 652 | return -ENODEV; |
| 653 | } |
| 654 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 655 | driver.num_ioctls = i915_max_ioctl; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 656 | |
Chris Wilson | 3116971 | 2009-09-14 16:50:28 +0100 | [diff] [blame] | 657 | i915_gem_shrinker_init(); |
| 658 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 659 | /* |
| 660 | * If CONFIG_DRM_I915_KMS is set, default to KMS unless |
| 661 | * explicitly disabled with the module pararmeter. |
| 662 | * |
| 663 | * Otherwise, just follow the parameter (defaulting to off). |
| 664 | * |
| 665 | * Allow optional vga_text_mode_force boot option to override |
| 666 | * the default behavior. |
| 667 | */ |
| 668 | #if defined(CONFIG_DRM_I915_KMS) |
| 669 | if (i915_modeset != 0) |
| 670 | driver.driver_features |= DRIVER_MODESET; |
| 671 | #endif |
| 672 | if (i915_modeset == 1) |
| 673 | driver.driver_features |= DRIVER_MODESET; |
| 674 | |
| 675 | #ifdef CONFIG_VGA_CONSOLE |
| 676 | if (vgacon_text_force() && i915_modeset == -1) |
| 677 | driver.driver_features &= ~DRIVER_MODESET; |
| 678 | #endif |
| 679 | |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 680 | if (!(driver.driver_features & DRIVER_MODESET)) { |
| 681 | driver.suspend = i915_suspend; |
| 682 | driver.resume = i915_resume; |
| 683 | } |
| 684 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 685 | return drm_init(&driver); |
| 686 | } |
| 687 | |
| 688 | static void __exit i915_exit(void) |
| 689 | { |
Chris Wilson | 3116971 | 2009-09-14 16:50:28 +0100 | [diff] [blame] | 690 | i915_gem_shrinker_exit(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 691 | drm_exit(&driver); |
| 692 | } |
| 693 | |
| 694 | module_init(i915_init); |
| 695 | module_exit(i915_exit); |
| 696 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 697 | MODULE_AUTHOR(DRIVER_AUTHOR); |
| 698 | MODULE_DESCRIPTION(DRIVER_DESC); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 699 | MODULE_LICENSE("GPL and additional rights"); |