Catalin Marinas | f1a0c4a | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 ARM Ltd. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | * |
| 13 | * You should have received a copy of the GNU General Public License |
| 14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 15 | */ |
| 16 | #ifndef __ASM_CACHE_H |
| 17 | #define __ASM_CACHE_H |
| 18 | |
| 19 | #define L1_CACHE_SHIFT 6 |
| 20 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) |
| 21 | |
| 22 | /* |
| 23 | * Memory returned by kmalloc() may be used for DMA, so we must make |
| 24 | * sure that all such allocations are cache aligned. Otherwise, |
| 25 | * unrelated code may cause parts of the buffer to be read into the |
| 26 | * cache before the transfer is done, causing old data to be seen by |
| 27 | * the CPU. |
| 28 | */ |
| 29 | #define ARCH_DMA_MINALIGN L1_CACHE_BYTES |
| 30 | #define ARCH_SLAB_MINALIGN 8 |
| 31 | |
| 32 | #endif |