blob: 428aaf86c95b907ebb119649d0d4e293d0166700 [file] [log] [blame]
Catalin Marinasc1cc1552012-03-05 11:49:27 +00001/*
2 * Based on arch/arm/mm/mmu.c
3 *
4 * Copyright (C) 1995-2005 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/export.h>
21#include <linux/kernel.h>
22#include <linux/errno.h>
23#include <linux/init.h>
24#include <linux/mman.h>
25#include <linux/nodemask.h>
26#include <linux/memblock.h>
27#include <linux/fs.h>
Catalin Marinas2475ff92012-10-23 14:55:08 +010028#include <linux/io.h>
Catalin Marinas41089352015-01-29 17:33:35 +000029#include <linux/slab.h>
Laura Abbottda141702015-01-21 17:36:06 -080030#include <linux/stop_machine.h>
Catalin Marinasc1cc1552012-03-05 11:49:27 +000031
32#include <asm/cputype.h>
Laura Abbottaf86e592014-11-21 21:50:42 +000033#include <asm/fixmap.h>
Catalin Marinasc1cc1552012-03-05 11:49:27 +000034#include <asm/sections.h>
35#include <asm/setup.h>
36#include <asm/sizes.h>
37#include <asm/tlb.h>
Jungseok Leec79b9542014-05-12 18:40:51 +090038#include <asm/memblock.h>
Catalin Marinasc1cc1552012-03-05 11:49:27 +000039#include <asm/mmu_context.h>
40
41#include "mm.h"
42
Ard Biesheuveldd006da2015-03-19 16:42:27 +000043u64 idmap_t0sz = TCR_T0SZ(VA_BITS);
44
Catalin Marinasc1cc1552012-03-05 11:49:27 +000045/*
46 * Empty_zero_page is a special page that is used for zero-initialized data
47 * and COW.
48 */
49struct page *empty_zero_page;
50EXPORT_SYMBOL(empty_zero_page);
51
Catalin Marinasc1cc1552012-03-05 11:49:27 +000052pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
53 unsigned long size, pgprot_t vma_prot)
54{
55 if (!pfn_valid(pfn))
56 return pgprot_noncached(vma_prot);
57 else if (file->f_flags & O_SYNC)
58 return pgprot_writecombine(vma_prot);
59 return vma_prot;
60}
61EXPORT_SYMBOL(phys_mem_access_prot);
62
63static void __init *early_alloc(unsigned long sz)
64{
65 void *ptr = __va(memblock_alloc(sz, sz));
Laura Abbottda141702015-01-21 17:36:06 -080066 BUG_ON(!ptr);
Catalin Marinasc1cc1552012-03-05 11:49:27 +000067 memset(ptr, 0, sz);
68 return ptr;
69}
70
Laura Abbottda141702015-01-21 17:36:06 -080071/*
72 * remap a PMD into pages
73 */
74static void split_pmd(pmd_t *pmd, pte_t *pte)
75{
76 unsigned long pfn = pmd_pfn(*pmd);
77 int i = 0;
78
79 do {
80 /*
81 * Need to have the least restrictive permissions available
82 * permissions will be fixed up later
83 */
84 set_pte(pte, pfn_pte(pfn, PAGE_KERNEL_EXEC));
85 pfn++;
86 } while (pte++, i++, i < PTRS_PER_PTE);
87}
88
89static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
Mark Salterd7ecbdd2014-03-12 12:28:06 -040090 unsigned long end, unsigned long pfn,
Laura Abbottda141702015-01-21 17:36:06 -080091 pgprot_t prot,
92 void *(*alloc)(unsigned long size))
Catalin Marinasc1cc1552012-03-05 11:49:27 +000093{
94 pte_t *pte;
95
Mark Rutlanda1c76572015-01-27 16:36:30 +000096 if (pmd_none(*pmd) || pmd_sect(*pmd)) {
Laura Abbottda141702015-01-21 17:36:06 -080097 pte = alloc(PTRS_PER_PTE * sizeof(pte_t));
98 if (pmd_sect(*pmd))
99 split_pmd(pmd, pte);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000100 __pmd_populate(pmd, __pa(pte), PMD_TYPE_TABLE);
Laura Abbottda141702015-01-21 17:36:06 -0800101 flush_tlb_all();
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000102 }
Mark Rutlanda1c76572015-01-27 16:36:30 +0000103 BUG_ON(pmd_bad(*pmd));
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000104
105 pte = pte_offset_kernel(pmd, addr);
106 do {
Mark Salterd7ecbdd2014-03-12 12:28:06 -0400107 set_pte(pte, pfn_pte(pfn, prot));
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000108 pfn++;
109 } while (pte++, addr += PAGE_SIZE, addr != end);
110}
111
Laura Abbottda141702015-01-21 17:36:06 -0800112void split_pud(pud_t *old_pud, pmd_t *pmd)
113{
114 unsigned long addr = pud_pfn(*old_pud) << PAGE_SHIFT;
115 pgprot_t prot = __pgprot(pud_val(*old_pud) ^ addr);
116 int i = 0;
117
118 do {
119 set_pmd(pmd, __pmd(addr | prot));
120 addr += PMD_SIZE;
121 } while (pmd++, i++, i < PTRS_PER_PMD);
122}
123
124static void alloc_init_pmd(struct mm_struct *mm, pud_t *pud,
Ard Biesheuvele1e1fdd2014-10-20 14:02:15 +0200125 unsigned long addr, unsigned long end,
Laura Abbottda141702015-01-21 17:36:06 -0800126 phys_addr_t phys, pgprot_t prot,
127 void *(*alloc)(unsigned long size))
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000128{
129 pmd_t *pmd;
130 unsigned long next;
131
132 /*
133 * Check for initial section mappings in the pgd/pud and remove them.
134 */
Mark Rutlanda1c76572015-01-27 16:36:30 +0000135 if (pud_none(*pud) || pud_sect(*pud)) {
Laura Abbottda141702015-01-21 17:36:06 -0800136 pmd = alloc(PTRS_PER_PMD * sizeof(pmd_t));
137 if (pud_sect(*pud)) {
138 /*
139 * need to have the 1G of mappings continue to be
140 * present
141 */
142 split_pud(pud, pmd);
143 }
Ard Biesheuvele1e1fdd2014-10-20 14:02:15 +0200144 pud_populate(mm, pud, pmd);
Laura Abbottda141702015-01-21 17:36:06 -0800145 flush_tlb_all();
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000146 }
Mark Rutlanda1c76572015-01-27 16:36:30 +0000147 BUG_ON(pud_bad(*pud));
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000148
149 pmd = pmd_offset(pud, addr);
150 do {
151 next = pmd_addr_end(addr, end);
152 /* try section mapping first */
Catalin Marinasa55f9922014-02-04 16:01:31 +0000153 if (((addr | next | phys) & ~SECTION_MASK) == 0) {
154 pmd_t old_pmd =*pmd;
Ard Biesheuvel8ce837c2014-10-20 15:42:07 +0200155 set_pmd(pmd, __pmd(phys |
156 pgprot_val(mk_sect_prot(prot))));
Catalin Marinasa55f9922014-02-04 16:01:31 +0000157 /*
158 * Check for previous table entries created during
159 * boot (__create_page_tables) and flush them.
160 */
zhichang.yuan523d6e92014-12-09 07:26:47 +0000161 if (!pmd_none(old_pmd)) {
Catalin Marinasa55f9922014-02-04 16:01:31 +0000162 flush_tlb_all();
zhichang.yuan523d6e92014-12-09 07:26:47 +0000163 if (pmd_table(old_pmd)) {
164 phys_addr_t table = __pa(pte_offset_map(&old_pmd, 0));
Catalin Marinas41089352015-01-29 17:33:35 +0000165 if (!WARN_ON_ONCE(slab_is_available()))
166 memblock_free(table, PAGE_SIZE);
zhichang.yuan523d6e92014-12-09 07:26:47 +0000167 }
168 }
Catalin Marinasa55f9922014-02-04 16:01:31 +0000169 } else {
Mark Salterd7ecbdd2014-03-12 12:28:06 -0400170 alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys),
Laura Abbottda141702015-01-21 17:36:06 -0800171 prot, alloc);
Catalin Marinasa55f9922014-02-04 16:01:31 +0000172 }
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000173 phys += next - addr;
174 } while (pmd++, addr = next, addr != end);
175}
176
Laura Abbottda141702015-01-21 17:36:06 -0800177static inline bool use_1G_block(unsigned long addr, unsigned long next,
178 unsigned long phys)
179{
180 if (PAGE_SHIFT != 12)
181 return false;
182
183 if (((addr | next | phys) & ~PUD_MASK) != 0)
184 return false;
185
186 return true;
187}
188
189static void alloc_init_pud(struct mm_struct *mm, pgd_t *pgd,
Ard Biesheuvele1e1fdd2014-10-20 14:02:15 +0200190 unsigned long addr, unsigned long end,
Laura Abbottda141702015-01-21 17:36:06 -0800191 phys_addr_t phys, pgprot_t prot,
192 void *(*alloc)(unsigned long size))
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000193{
Jungseok Leec79b9542014-05-12 18:40:51 +0900194 pud_t *pud;
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000195 unsigned long next;
196
Jungseok Leec79b9542014-05-12 18:40:51 +0900197 if (pgd_none(*pgd)) {
Laura Abbottda141702015-01-21 17:36:06 -0800198 pud = alloc(PTRS_PER_PUD * sizeof(pud_t));
Ard Biesheuvele1e1fdd2014-10-20 14:02:15 +0200199 pgd_populate(mm, pgd, pud);
Jungseok Leec79b9542014-05-12 18:40:51 +0900200 }
201 BUG_ON(pgd_bad(*pgd));
202
203 pud = pud_offset(pgd, addr);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000204 do {
205 next = pud_addr_end(addr, end);
Steve Capper206a2a72014-05-06 14:02:27 +0100206
207 /*
208 * For 4K granule only, attempt to put down a 1GB block
209 */
Laura Abbottda141702015-01-21 17:36:06 -0800210 if (use_1G_block(addr, next, phys)) {
Steve Capper206a2a72014-05-06 14:02:27 +0100211 pud_t old_pud = *pud;
Ard Biesheuvel8ce837c2014-10-20 15:42:07 +0200212 set_pud(pud, __pud(phys |
213 pgprot_val(mk_sect_prot(prot))));
Steve Capper206a2a72014-05-06 14:02:27 +0100214
215 /*
216 * If we have an old value for a pud, it will
217 * be pointing to a pmd table that we no longer
218 * need (from swapper_pg_dir).
219 *
220 * Look up the old pmd table and free it.
221 */
222 if (!pud_none(old_pud)) {
Steve Capper206a2a72014-05-06 14:02:27 +0100223 flush_tlb_all();
zhichang.yuan523d6e92014-12-09 07:26:47 +0000224 if (pud_table(old_pud)) {
225 phys_addr_t table = __pa(pmd_offset(&old_pud, 0));
Catalin Marinas41089352015-01-29 17:33:35 +0000226 if (!WARN_ON_ONCE(slab_is_available()))
227 memblock_free(table, PAGE_SIZE);
zhichang.yuan523d6e92014-12-09 07:26:47 +0000228 }
Steve Capper206a2a72014-05-06 14:02:27 +0100229 }
230 } else {
Laura Abbottda141702015-01-21 17:36:06 -0800231 alloc_init_pmd(mm, pud, addr, next, phys, prot, alloc);
Steve Capper206a2a72014-05-06 14:02:27 +0100232 }
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000233 phys += next - addr;
234 } while (pud++, addr = next, addr != end);
235}
236
237/*
238 * Create the page directory entries and any necessary page tables for the
239 * mapping specified by 'md'.
240 */
Laura Abbottda141702015-01-21 17:36:06 -0800241static void __create_mapping(struct mm_struct *mm, pgd_t *pgd,
Ard Biesheuvele1e1fdd2014-10-20 14:02:15 +0200242 phys_addr_t phys, unsigned long virt,
Laura Abbottda141702015-01-21 17:36:06 -0800243 phys_addr_t size, pgprot_t prot,
244 void *(*alloc)(unsigned long size))
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000245{
246 unsigned long addr, length, end, next;
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000247
248 addr = virt & PAGE_MASK;
249 length = PAGE_ALIGN(size + (virt & ~PAGE_MASK));
250
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000251 end = addr + length;
252 do {
253 next = pgd_addr_end(addr, end);
Laura Abbottda141702015-01-21 17:36:06 -0800254 alloc_init_pud(mm, pgd, addr, next, phys, prot, alloc);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000255 phys += next - addr;
256 } while (pgd++, addr = next, addr != end);
257}
258
Laura Abbottda141702015-01-21 17:36:06 -0800259static void *late_alloc(unsigned long size)
260{
261 void *ptr;
262
263 BUG_ON(size > PAGE_SIZE);
264 ptr = (void *)__get_free_page(PGALLOC_GFP);
265 BUG_ON(!ptr);
266 return ptr;
267}
268
269static void __ref create_mapping(phys_addr_t phys, unsigned long virt,
270 phys_addr_t size, pgprot_t prot)
Mark Salterd7ecbdd2014-03-12 12:28:06 -0400271{
272 if (virt < VMALLOC_START) {
273 pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n",
274 &phys, virt);
275 return;
276 }
Ard Biesheuvele1e1fdd2014-10-20 14:02:15 +0200277 __create_mapping(&init_mm, pgd_offset_k(virt & PAGE_MASK), phys, virt,
Laura Abbottda141702015-01-21 17:36:06 -0800278 size, prot, early_alloc);
Mark Salterd7ecbdd2014-03-12 12:28:06 -0400279}
280
Ard Biesheuvel8ce837c2014-10-20 15:42:07 +0200281void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
282 unsigned long virt, phys_addr_t size,
283 pgprot_t prot)
284{
Laura Abbottda141702015-01-21 17:36:06 -0800285 __create_mapping(mm, pgd_offset(mm, virt), phys, virt, size, prot,
Ard Biesheuvel60305db2015-01-22 10:01:40 +0000286 late_alloc);
Mark Salterd7ecbdd2014-03-12 12:28:06 -0400287}
288
Laura Abbottda141702015-01-21 17:36:06 -0800289static void create_mapping_late(phys_addr_t phys, unsigned long virt,
290 phys_addr_t size, pgprot_t prot)
291{
292 if (virt < VMALLOC_START) {
293 pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n",
294 &phys, virt);
295 return;
296 }
297
298 return __create_mapping(&init_mm, pgd_offset_k(virt & PAGE_MASK),
299 phys, virt, size, prot, late_alloc);
300}
301
302#ifdef CONFIG_DEBUG_RODATA
303static void __init __map_memblock(phys_addr_t start, phys_addr_t end)
304{
305 /*
306 * Set up the executable regions using the existing section mappings
307 * for now. This will get more fine grained later once all memory
308 * is mapped
309 */
310 unsigned long kernel_x_start = round_down(__pa(_stext), SECTION_SIZE);
311 unsigned long kernel_x_end = round_up(__pa(__init_end), SECTION_SIZE);
312
313 if (end < kernel_x_start) {
314 create_mapping(start, __phys_to_virt(start),
315 end - start, PAGE_KERNEL);
316 } else if (start >= kernel_x_end) {
317 create_mapping(start, __phys_to_virt(start),
318 end - start, PAGE_KERNEL);
319 } else {
320 if (start < kernel_x_start)
321 create_mapping(start, __phys_to_virt(start),
322 kernel_x_start - start,
323 PAGE_KERNEL);
324 create_mapping(kernel_x_start,
325 __phys_to_virt(kernel_x_start),
326 kernel_x_end - kernel_x_start,
327 PAGE_KERNEL_EXEC);
328 if (kernel_x_end < end)
329 create_mapping(kernel_x_end,
330 __phys_to_virt(kernel_x_end),
331 end - kernel_x_end,
332 PAGE_KERNEL);
333 }
334
335}
336#else
337static void __init __map_memblock(phys_addr_t start, phys_addr_t end)
338{
339 create_mapping(start, __phys_to_virt(start), end - start,
340 PAGE_KERNEL_EXEC);
341}
342#endif
343
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000344static void __init map_mem(void)
345{
346 struct memblock_region *reg;
Catalin Marinase25208f2013-08-23 18:04:44 +0100347 phys_addr_t limit;
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000348
Steve Capperf6bc87c2013-04-30 11:00:33 +0100349 /*
350 * Temporarily limit the memblock range. We need to do this as
351 * create_mapping requires puds, pmds and ptes to be allocated from
352 * memory addressable from the initial direct kernel mapping.
353 *
Catalin Marinas3dec0fe2014-10-24 18:16:47 +0100354 * The initial direct kernel mapping, located at swapper_pg_dir, gives
355 * us PUD_SIZE (4K pages) or PMD_SIZE (64K pages) memory starting from
356 * PHYS_OFFSET (which must be aligned to 2MB as per
357 * Documentation/arm64/booting.txt).
Steve Capperf6bc87c2013-04-30 11:00:33 +0100358 */
Catalin Marinas3dec0fe2014-10-24 18:16:47 +0100359 if (IS_ENABLED(CONFIG_ARM64_64K_PAGES))
360 limit = PHYS_OFFSET + PMD_SIZE;
361 else
362 limit = PHYS_OFFSET + PUD_SIZE;
Catalin Marinase25208f2013-08-23 18:04:44 +0100363 memblock_set_current_limit(limit);
Steve Capperf6bc87c2013-04-30 11:00:33 +0100364
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000365 /* map all the memory banks */
366 for_each_memblock(memory, reg) {
367 phys_addr_t start = reg->base;
368 phys_addr_t end = start + reg->size;
369
370 if (start >= end)
371 break;
372
Catalin Marinase25208f2013-08-23 18:04:44 +0100373#ifndef CONFIG_ARM64_64K_PAGES
374 /*
375 * For the first memory bank align the start address and
376 * current memblock limit to prevent create_mapping() from
377 * allocating pte page tables from unmapped memory.
378 * When 64K pages are enabled, the pte page table for the
379 * first PGDIR_SIZE is already present in swapper_pg_dir.
380 */
381 if (start < limit)
382 start = ALIGN(start, PMD_SIZE);
383 if (end < limit) {
384 limit = end & PMD_MASK;
385 memblock_set_current_limit(limit);
386 }
387#endif
Laura Abbottda141702015-01-21 17:36:06 -0800388 __map_memblock(start, end);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000389 }
Steve Capperf6bc87c2013-04-30 11:00:33 +0100390
391 /* Limit no longer required. */
392 memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000393}
394
Laura Abbottda141702015-01-21 17:36:06 -0800395void __init fixup_executable(void)
396{
397#ifdef CONFIG_DEBUG_RODATA
398 /* now that we are actually fully mapped, make the start/end more fine grained */
399 if (!IS_ALIGNED((unsigned long)_stext, SECTION_SIZE)) {
400 unsigned long aligned_start = round_down(__pa(_stext),
401 SECTION_SIZE);
402
403 create_mapping(aligned_start, __phys_to_virt(aligned_start),
404 __pa(_stext) - aligned_start,
405 PAGE_KERNEL);
406 }
407
408 if (!IS_ALIGNED((unsigned long)__init_end, SECTION_SIZE)) {
409 unsigned long aligned_end = round_up(__pa(__init_end),
410 SECTION_SIZE);
411 create_mapping(__pa(__init_end), (unsigned long)__init_end,
412 aligned_end - __pa(__init_end),
413 PAGE_KERNEL);
414 }
415#endif
416}
417
418#ifdef CONFIG_DEBUG_RODATA
419void mark_rodata_ro(void)
420{
421 create_mapping_late(__pa(_stext), (unsigned long)_stext,
422 (unsigned long)_etext - (unsigned long)_stext,
423 PAGE_KERNEL_EXEC | PTE_RDONLY);
424
425}
426#endif
427
428void fixup_init(void)
429{
430 create_mapping_late(__pa(__init_begin), (unsigned long)__init_begin,
431 (unsigned long)__init_end - (unsigned long)__init_begin,
432 PAGE_KERNEL);
433}
434
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000435/*
436 * paging_init() sets up the page tables, initialises the zone memory
437 * maps and sets up the zero page.
438 */
439void __init paging_init(void)
440{
441 void *zero_page;
442
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000443 map_mem();
Laura Abbottda141702015-01-21 17:36:06 -0800444 fixup_executable();
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000445
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000446 /* allocate the zero page. */
447 zero_page = early_alloc(PAGE_SIZE);
448
449 bootmem_init();
450
451 empty_zero_page = virt_to_page(zero_page);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000452
453 /*
454 * TTBR0 is only used for the identity mapping at this stage. Make it
455 * point to zero page to avoid speculatively fetching new entries.
456 */
457 cpu_set_reserved_ttbr0();
458 flush_tlb_all();
Ard Biesheuveldd006da2015-03-19 16:42:27 +0000459 cpu_set_default_tcr_t0sz();
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000460}
461
462/*
463 * Enable the identity mapping to allow the MMU disabling.
464 */
465void setup_mm_for_reboot(void)
466{
Ard Biesheuveldd006da2015-03-19 16:42:27 +0000467 cpu_set_reserved_ttbr0();
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000468 flush_tlb_all();
Ard Biesheuveldd006da2015-03-19 16:42:27 +0000469 cpu_set_idmap_tcr_t0sz();
470 cpu_switch_mm(idmap_pg_dir, &init_mm);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000471}
472
473/*
474 * Check whether a kernel address is valid (derived from arch/x86/).
475 */
476int kern_addr_valid(unsigned long addr)
477{
478 pgd_t *pgd;
479 pud_t *pud;
480 pmd_t *pmd;
481 pte_t *pte;
482
483 if ((((long)addr) >> VA_BITS) != -1UL)
484 return 0;
485
486 pgd = pgd_offset_k(addr);
487 if (pgd_none(*pgd))
488 return 0;
489
490 pud = pud_offset(pgd, addr);
491 if (pud_none(*pud))
492 return 0;
493
Steve Capper206a2a72014-05-06 14:02:27 +0100494 if (pud_sect(*pud))
495 return pfn_valid(pud_pfn(*pud));
496
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000497 pmd = pmd_offset(pud, addr);
498 if (pmd_none(*pmd))
499 return 0;
500
Dave Andersonda6e4cb2014-04-15 18:53:24 +0100501 if (pmd_sect(*pmd))
502 return pfn_valid(pmd_pfn(*pmd));
503
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000504 pte = pte_offset_kernel(pmd, addr);
505 if (pte_none(*pte))
506 return 0;
507
508 return pfn_valid(pte_pfn(*pte));
509}
510#ifdef CONFIG_SPARSEMEM_VMEMMAP
511#ifdef CONFIG_ARM64_64K_PAGES
Johannes Weiner0aad8182013-04-29 15:07:50 -0700512int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000513{
Johannes Weiner0aad8182013-04-29 15:07:50 -0700514 return vmemmap_populate_basepages(start, end, node);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000515}
516#else /* !CONFIG_ARM64_64K_PAGES */
Johannes Weiner0aad8182013-04-29 15:07:50 -0700517int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000518{
Johannes Weiner0aad8182013-04-29 15:07:50 -0700519 unsigned long addr = start;
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000520 unsigned long next;
521 pgd_t *pgd;
522 pud_t *pud;
523 pmd_t *pmd;
524
525 do {
526 next = pmd_addr_end(addr, end);
527
528 pgd = vmemmap_pgd_populate(addr, node);
529 if (!pgd)
530 return -ENOMEM;
531
532 pud = vmemmap_pud_populate(pgd, addr, node);
533 if (!pud)
534 return -ENOMEM;
535
536 pmd = pmd_offset(pud, addr);
537 if (pmd_none(*pmd)) {
538 void *p = NULL;
539
540 p = vmemmap_alloc_block_buf(PMD_SIZE, node);
541 if (!p)
542 return -ENOMEM;
543
Catalin Marinasa501e322014-04-03 15:57:15 +0100544 set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL));
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000545 } else
546 vmemmap_verify((pte_t *)pmd, node, addr, next);
547 } while (addr = next, addr != end);
548
549 return 0;
550}
551#endif /* CONFIG_ARM64_64K_PAGES */
Johannes Weiner0aad8182013-04-29 15:07:50 -0700552void vmemmap_free(unsigned long start, unsigned long end)
Tang Chen01975182013-02-22 16:33:08 -0800553{
554}
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000555#endif /* CONFIG_SPARSEMEM_VMEMMAP */
Laura Abbottaf86e592014-11-21 21:50:42 +0000556
557static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss;
558#if CONFIG_ARM64_PGTABLE_LEVELS > 2
559static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss;
560#endif
561#if CONFIG_ARM64_PGTABLE_LEVELS > 3
562static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss;
563#endif
564
565static inline pud_t * fixmap_pud(unsigned long addr)
566{
567 pgd_t *pgd = pgd_offset_k(addr);
568
569 BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd));
570
571 return pud_offset(pgd, addr);
572}
573
574static inline pmd_t * fixmap_pmd(unsigned long addr)
575{
576 pud_t *pud = fixmap_pud(addr);
577
578 BUG_ON(pud_none(*pud) || pud_bad(*pud));
579
580 return pmd_offset(pud, addr);
581}
582
583static inline pte_t * fixmap_pte(unsigned long addr)
584{
585 pmd_t *pmd = fixmap_pmd(addr);
586
587 BUG_ON(pmd_none(*pmd) || pmd_bad(*pmd));
588
589 return pte_offset_kernel(pmd, addr);
590}
591
592void __init early_fixmap_init(void)
593{
594 pgd_t *pgd;
595 pud_t *pud;
596 pmd_t *pmd;
597 unsigned long addr = FIXADDR_START;
598
599 pgd = pgd_offset_k(addr);
600 pgd_populate(&init_mm, pgd, bm_pud);
601 pud = pud_offset(pgd, addr);
602 pud_populate(&init_mm, pud, bm_pmd);
603 pmd = pmd_offset(pud, addr);
604 pmd_populate_kernel(&init_mm, pmd, bm_pte);
605
606 /*
607 * The boot-ioremap range spans multiple pmds, for which
608 * we are not preparted:
609 */
610 BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
611 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
612
613 if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)))
614 || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) {
615 WARN_ON(1);
616 pr_warn("pmd %p != %p, %p\n",
617 pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)),
618 fixmap_pmd(fix_to_virt(FIX_BTMAP_END)));
619 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
620 fix_to_virt(FIX_BTMAP_BEGIN));
621 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
622 fix_to_virt(FIX_BTMAP_END));
623
624 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
625 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
626 }
627}
628
629void __set_fixmap(enum fixed_addresses idx,
630 phys_addr_t phys, pgprot_t flags)
631{
632 unsigned long addr = __fix_to_virt(idx);
633 pte_t *pte;
634
Mark Rutlandb63dbef2015-03-04 13:27:35 +0000635 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
Laura Abbottaf86e592014-11-21 21:50:42 +0000636
637 pte = fixmap_pte(addr);
638
639 if (pgprot_val(flags)) {
640 set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags));
641 } else {
642 pte_clear(&init_mm, addr, pte);
643 flush_tlb_kernel_range(addr, addr+PAGE_SIZE);
644 }
645}